Reference Indication Consists Of A Gap Patents (Class 370/504)
  • Patent number: 7855994
    Abstract: In a mobile communication system, multiple transceivers perform radio communications in the same frequency band.
    Type: Grant
    Filed: April 26, 2006
    Date of Patent: December 21, 2010
    Assignee: NTT DoCoMo, Inc.
    Inventors: Hiromasa Fujii, Takatoshi Sugiyama, Hitoshi Yoshino
  • Patent number: 7813460
    Abstract: Method and apparatus for sampling a high-speed digital signal include providing a data signal to a differential data input circuit, an offset control signal, and a strobe pulse. In response to the strobe pulse, the data signal is resolved into an output logic state based to a relatively greater extent on the differential data signal and to a relatively lesser extent on the offset control signal.
    Type: Grant
    Filed: September 30, 2005
    Date of Patent: October 12, 2010
    Assignee: SLT Logic, LLC
    Inventor: Alan Fiedler
  • Patent number: 7764713
    Abstract: Synchronization of related packet data network streams is provided. Synchronization is achieved by inserting synchronization packets into data streams that are to be aligned with one another after transmission of those data streams across a network. More particularly, corresponding synchronization packets are inserted into the corresponding data streams at the same time, to serve as markers for performing synchronization of the data at the receiving end. The corresponding data streams may comprise an audio data stream and a corresponding video data stream.
    Type: Grant
    Filed: September 28, 2005
    Date of Patent: July 27, 2010
    Assignee: Avaya Inc.
    Inventors: Cherian Abraham, Timothy Connal Delaney, Nevill Inglis, Karen Phelan, Luke Anthony Tucker
  • Patent number: 7702946
    Abstract: A clock filter circuit (20), which serves for filtering the clock of non-isochronous data signals having a selected one of at least two nominal data rates, has an auxiliary clock source (21) that generates an auxiliary clock signal (27) with a pulse repetition rate which is in the range between the at least two predetermined data rates, a delay line (22) connected to the auxiliary clock source (21) for creating a set of mutually delayed copies of the auxiliary clock signal and a multiplexer (23) that switches in a cyclic order between the delayed copies according to predetermined rules, which depend on the selected data rate to generate a filtered clock signal (28). A control circuit determines whether the rate of the filtered clock (28) signal must be increased or decreased as compared to said data signal and controls the multiplexer (23) to delay or advance the cyclical switching accordingly.
    Type: Grant
    Filed: November 15, 2005
    Date of Patent: April 20, 2010
    Assignee: Alcatel
    Inventors: Michael Joachim Wolf, Wolfgang Thiele
  • Patent number: 7688863
    Abstract: Methods and apparatus for sharing network bandwidth between devices connected to a bus are presented. Each of the devices belongs to one of a number of device classes. Each device class is associated with a respective data transfer rate at which information may be exchanged over the bus. An exemplary method includes the step of assigning a gap interval to each device based on at least the data transfer rate of the class to which the device belongs, the assigned gap interval being inserted between portions of a data stream sent by the corresponding device over the bus. The assigned gap interval may be inserted between portions of a data stream sent by the corresponding device over the bus to achieve the desired data rate resulting in an equitable sharing of bandwidth between the devices connected to the bus.
    Type: Grant
    Filed: September 25, 2002
    Date of Patent: March 30, 2010
    Assignee: Renesas Technology America, Inc.
    Inventor: Robert L. Chamberlain
  • Patent number: 7656869
    Abstract: In a data output control apparatus, a data replacement unit performs replacement of information packets so as to reflect the contents of a partial TS after the transfer status thereof has changed, and outputs a replacement signal as information relating to the replaced packet data to a controller. Therefore, the controller for controlling the data replacement unit can continuously recognize the status of replacement of packet data, and becomes able to change the respective information tables according to the operation of the partial TS, thereby realizing dynamic change while maintaining the continuity of the respective tables in the partial TS.
    Type: Grant
    Filed: July 29, 2004
    Date of Patent: February 2, 2010
    Assignee: Panasonic Corporation
    Inventor: Satoshi Takahashi
  • Patent number: 7627688
    Abstract: Systems and methods are described which allow the detection of gaps in a set of data. These systems and methods may include defining streams of data from a network topology, associating incoming data with one or more of these streams, and processing these streams. A gap may be detected by comparing the times of events in the stream. If a gap is detected remedial action may be taken, and processing of the streams temporarily halted. Processing of the streams may continue when data for a certain stream is received, or after the lapse of a certain period of time.
    Type: Grant
    Filed: July 9, 2003
    Date of Patent: December 1, 2009
    Assignee: Vignette Corporation
    Inventors: John C. Artz, Jr., Heeren Pathak
  • Patent number: 7613211
    Abstract: A method for digital clock smoothing comprising: (A) inputting an asynchronous data stream having an asynchronous symbol rate into a two-port memory block; (B) accumulating a plurality of symbols of the asynchronous data stream in the two-port memory block for a predetermined time period; (C) computing an average symbol rate for the input asynchronous data stream; (D) generating a clock error signal equal to the difference between the average symbol rate of the input asynchronous data stream and a nominal output synchronous clock; (E) obtaining a smoothed symbol rate clock by using the error clock signal; and (F) generating an output smoothed data stream having the smoothed symbol rate clock.
    Type: Grant
    Filed: February 18, 2006
    Date of Patent: November 3, 2009
    Assignee: Wideband Semiconductors, Inc.
    Inventors: Richard John Fagerlund, James P. Flynn, Mark Fong, David Bruce Isaksen
  • Publication number: 20090257459
    Abstract: A transmitting system inserts runt abort packets in an outgoing data stream during idle time inter-frame time fill. The runt abort packets cause the receiving system to synchronize itself to the transmitting system so that even if an error during inter-frame time fill causes the receiving system to go into an erroneous state, the receiving system will be synchronized with the transmitting system before receiving valid data. In one embodiment, the transmitting system transmits data in packets over SONET, The packet data is scrambled at the transmitting end and descrambled at the receiving end. Runt abort packets. sent during inter-frame time fill resynchronize the descrambler. If there is an error in the inter-frame time fill bytes, causing the receiving end descrambler to no longer be synchronized with the transmitting end scrambler, the runt abort packets will cause the descrambler to resynchronize state with the transmitting scrambler.
    Type: Application
    Filed: June 26, 2009
    Publication date: October 15, 2009
    Applicant: JUNIPER NETWORKS, INC.
    Inventors: Dennis C. FERGUSON, Devereaux C. CHEN, Eric M. VERWILLOW, Ramesh PADMANABHAN, Thomas Michael SKIBO
  • Patent number: 7596154
    Abstract: A method of synchronizing an Orthogonal Frequency Division Multiplexed (OFDM) IEEE 802.11a data packet at a receiver is disclosed. The 802.11a data packet has a series of short training sequence (STS) symbols as a preamble. Cross-correlation at the receiver of the STS in the 802.11a packet PLCP preamble with the modified reference STS, that is 10 circular shifted by eight samples, results in a main correlation peak but with reduced pre- and post-lobes. To locate the cross-correlation peak, a running second derivative of the cross-correlation function is performed. Peak selection employs a running comparison of the position and magnitude of all peaks in the intermediate neighborhood of the local peaks. Following selection of a peak from within the cross-correlation function of the first STS in the PLOP preamble, both the position and magnitude of the first STS is compared to those of the second STS. Based on the two independent calculations, the start of the OFDM frame is estimated.
    Type: Grant
    Filed: August 28, 2007
    Date of Patent: September 29, 2009
    Assignee: Synad Technologies Limited
    Inventor: Mehul Mehta
  • Publication number: 20090238133
    Abstract: A communication system includes a plurality of communication stations arranged to respectively transmit a beacon on which beacon time information related to a beacon received from a peripheral communication station is placed at a predetermined transmission interval and control a beacon transmission timing of its own station while a collision with the beacon transmitted from the peripheral communication station is avoided on the basis of beacon information placed on the received beacon, in which at least a part of the communication stations includes means configured to decide a priority with respect to beacons received from at least one peripheral communication station and means configured to place beacon time information of a beacon having a high priority among the received beacons on a beacon of its own station, and transmits the beacon at a predetermined transmission interval.
    Type: Application
    Filed: March 17, 2009
    Publication date: September 24, 2009
    Inventor: Kazuyuki SAKODA
  • Patent number: 7593327
    Abstract: A method and apparatus are disclosed for compensating for a frequency offset between an ingress local area network and an egress local area network that communicate over a transport network. The bandwidth of an egress port is adjusted by varying an inter-packet gap size between each packet so that the packets can be delivered without overflowing an egress buffer. The size of the inter-packet gap is reduced when the frequency of the ingress local area network is greater than the frequency of the egress local area network. The size of the inter-packet gap is increased when the frequency of the ingress local area network is less than the frequency of the egress local area network. The size of the egress inter-packet gap may be statically or dynamically adjusted to compensate for a frequency offset.
    Type: Grant
    Filed: August 18, 2003
    Date of Patent: September 22, 2009
    Assignee: Agere Systems Inc.
    Inventors: Mark A. Bordogna, Adam B. Healey, Peter A. Stropparo
  • Patent number: 7583774
    Abstract: A clock synchronizer, for generating a local clock signal synchronized to a received clock signal, is described and claimed, along with a corresponding clock synchronization method. The clock synchronizer incorporates a reference oscillator providing a reference signal, and a synthesizer circuit arranged to synthesize a local clock signal from the reference signal. The synthesizer circuit comprises a phase-locked-loop circuit, including a phase detector receiving the reference signal, and a controllable divider arranged in a feedback path from a controlled oscillator to the phase detector, the divider being controllable to set a frequency division value N along the path to determine a ratio of the local clock frequency to the reference frequency. The clock synchronizer also incorporates a clock comparison circuit adapted to generate a digital signal indicative of an asynchronism between the local and remote clock signals. A control link is arranged to link the clock comparison circuit to the divider.
    Type: Grant
    Filed: November 15, 2004
    Date of Patent: September 1, 2009
    Assignee: Wolfson Microelectronics plc
    Inventor: Paul Lesso
  • Patent number: 7570666
    Abstract: An apparatus and method for guard interval detection in a multi-carrier receiver has been disclosed. According to the present invention, the apparatus and method are employed for determining a guard interval length of an input signal to be one of a plurality of available guard interval lengths. The apparatus of the present invention includes an auto-correlator, a power density calculator and a maximum detector. The auto-correlator is used to generate a correlation result in response to the input signal, and the power density calculator is used to generate a plurality of power density results in response the correlation result and the available guard interval lengths. The maximum detector is employed to generate a determination result in response to the maximum value of the plurality of power density results.
    Type: Grant
    Filed: February 1, 2005
    Date of Patent: August 4, 2009
    Assignee: Industrial Technology Research Institute
    Inventor: Hung-Hsiang Wang
  • Patent number: 7570667
    Abstract: A transmitting system inserts runt abort packets in an outgoing data stream during idle time inter-frame time fill. The runt abort packets cause the receiving system to synchronize itself to the transmitting system so that even if an error during inter-frame time fill causes the receiving system to go into an erroneous state, the receiving system will be synchronized with the transmitting system before receiving valid data. In one embodiment, the transmitting system transmits data in packets over SONET. The packet data is scrambled at the transmitting end and descrambled at the receiving end. Runt abort packets sent during inter-frame time fill resynchronize the descrambler. If there is an error in the inter-frame time fill bytes, causing the receiving end descrambler to no longer be synchronized with the transmitting end scrambler, the runt abort packets will cause the descrambler to resynchronize state with the transmitting scrambler.
    Type: Grant
    Filed: July 13, 2006
    Date of Patent: August 4, 2009
    Assignee: Juniper Networks, Inc.
    Inventors: Dennis C. Ferguson, Devereaux C. Chen, Eric M. Verwillow, Ramesh Padmanabhan, Thomas Michael Skibo
  • Patent number: 7546090
    Abstract: A slave radio station establishes communization with a master radio station by transmitting a signal intermittently, listening for a response, and saving power by deactivating its transmitter and receiver at other times. When the master radio station responds, the slave station may synchronize periods of receiver activation with a beacon signal transmitted periodically by the master station and may cease transmission of the intermittent signal.
    Type: Grant
    Filed: February 5, 2003
    Date of Patent: June 9, 2009
    Assignee: Koninklijke Philips Electronics N.V.
    Inventor: Anthony David Sayers
  • Patent number: 7522633
    Abstract: A transmission system is disclosed that has small circuit scale and small memory capacity, and moreover, in which higher-layer protocol data are transmitted with little transmission delay. A sending device converts the higher-layer protocol data to continuous blocks of a fixed length that is ideal for frames on the transmission path. The sending device next matches the sending rate to the transmission rate of the transmission path by inserting idle blocks between blocks and then transmits. Relay devices receive the blocks and idle blocks from the sending device, and discard the idle blocks to extract the valid blocks. The relay devices further match the sending rate to the transmission rate of the transmission path on the transmission side by inserting idle blocks between the valid blocks and transmit the blocks to a prescribed transfer destination. A receiving device receives the blocks and idle blocks from the final-stage relay device and then discards the idle blocks to extract only the valid blocks.
    Type: Grant
    Filed: December 23, 2003
    Date of Patent: April 21, 2009
    Assignee: NEC Corporation
    Inventor: Kiyohisa Ichino
  • Patent number: 7522641
    Abstract: In one embodiment, a 10 Giga-bit Ethernet conversion system is provided that is operable to be inserted in 10 Gigabit optical fiber Ethernet systems, wherein each optical fiber Ethernet system includes an electrical-to-optical interface presenting electrical signals to an optical interface for converting the electrical signals to optical signals, the electrical signals being organized into a plurality of channels, wherein each channel carries Ethernet idle characters between data frame transmissions.
    Type: Grant
    Filed: March 10, 2005
    Date of Patent: April 21, 2009
    Inventor: Farrokh Mohamadi
  • Patent number: 7505485
    Abstract: Methods and systems provide approaches to start code emulation prevention at a granularity higher than the bit level. By operating at a level other than the bit level, processing capability requirements on both the encoder and decoder side can be reduced. In accordance with one or more embodiments, a start code emulation prevention method looks for data patterns relative to fixed-size data portions larger than single bits. When a particular pattern is found, start code emulation prevention data is inserted to prevent start code emulation. The inserted data is larger than a single bit and, in some embodiments, comprises a byte. When a decoder decodes data that has had start code emulation prevention data inserted, it can easily identify legitimate start codes and then can remove the start code emulation prevention data to provide the original data that was protected.
    Type: Grant
    Filed: January 22, 2003
    Date of Patent: March 17, 2009
    Assignee: Microsoft Corporation
    Inventors: Gary J. Sullivan, Stephen J. Estrop
  • Patent number: 7372874
    Abstract: A method of synchronising an Orthogonal Frequency Division Multiplexed (OFDM) IEEE 802.11a data packet at a receiver is disclosed. The 802.11a data packet has a series of short training sequence (STS) symbols as a preamble. Cross-correlation at the receiver of the STS in the 802.11a packet PLCP preamble with the modified reference STS, that is circular shifted by eight samples, results in a main correlation peak but with reduced pre- and post-lobes. To locate the cross-correlation peak, a running second derivative of the cross-correlation function is performed. Peak selection employs a running comparison of the position and magnitude of all peaks in the intermediate neighbourhood of the local peaks. Following selection of a peak from within the cross-correlation function of the first STS in the PLCP preamble, both the position and magnitude of the first STS is compared to those of the second STS. Based on the two independent calculations, the start of the OFDM frame is estimated.
    Type: Grant
    Filed: November 7, 2003
    Date of Patent: May 13, 2008
    Assignee: Synad Technologies Limited
    Inventor: Mehul Mehta
  • Publication number: 20080075128
    Abstract: A network component comprising at least one processor configured to implement a method comprising adding a clock synchronization data to a data stream comprising a plurality of Ethernet packets, wherein the clock synchronization data is located in a gap between two of the Ethernet packets. Also disclosed is a method comprising adding a clock synchronization data to a gap between a plurality of Ethernet packets in a data stream, wherein the clock synchronization data comprises a timestamp, a first bit that indicates whether the clock synchronization data is a request or an acknowledgement, and a second bit that indicates a requested operational mode.
    Type: Application
    Filed: April 16, 2007
    Publication date: March 27, 2008
    Applicant: FUTUREWEI TECHNOLOGIES, INC.
    Inventor: Serge Francois Fourcand
  • Patent number: 7289540
    Abstract: Techniques for aligning timing intervals across channels of a communication system, where each of the channels includes a number of cyclically-recurring time slots, each of the timing intervals includes one or more of the time slots, and each of the channels has one or more of the timing intervals associated therewith. A first one of the timing intervals, associated with a first one of the channels, is scheduled starting at a particular time slot of the first channel. One or more other timing intervals associated with the first channel are then scheduled by providing a specified inter-interval gap between timing intervals of each of one or more pairs of the timing intervals associated with the first channel. The scheduled timing intervals for the first channel are then copied to one or more of the other channels to provide alignment of the timing intervals across the channels.
    Type: Grant
    Filed: March 14, 2003
    Date of Patent: October 30, 2007
    Assignee: Lucent Technologies Inc.
    Inventor: Martin D. Carroll
  • Patent number: 7190691
    Abstract: A method of controlling timing for an uplink synchronous transmission scheme is disclosed, including combining time alignment bit (TAB) information transmitted received during a predetermined period, determining a timing renewal value based on the combination, and controlling the transmission timing according to the timing renewal value. Thus, the TAB information transmitted by a base station may be used to synchronize the uplink transmissions of mobile communication devices.
    Type: Grant
    Filed: February 21, 2002
    Date of Patent: March 13, 2007
    Assignee: LG Electronics Inc.
    Inventors: Seung Hoon Hwang, Bong Hoe Kim, Sung Lark Kwon
  • Patent number: 7133423
    Abstract: A method and system for maintaining synchronization in a home network is disclosed. The home network includes a host ethernet media access controller and an HPNA chip, where control frame and data frame pairs are transferred between the host ethernet media access controller (MAC) and the HPNA chip. The method and system include sending a null frame from the host ethernet MAC to the HPNA chip prior to the data frame, and recognizing the null frame on the HPNA chip as an indication that a next received frame will be the data frame, thereby maintaining synchronization between the control frame and the data frame pairs.
    Type: Grant
    Filed: June 19, 2001
    Date of Patent: November 7, 2006
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Peter K. Chow, Harand Gaspar
  • Patent number: 7099352
    Abstract: A transmitting system inserts runt abort packets in an outgoing data stream during idle time inter-frame time fill. The runt abort packets cause the receiving system to synchronize itself to the transmitting system so that even if an error during inter-frame time fill causes the receiving system to go into an erroneous state, the receiving system will be synchronized with the transmitting system before receiving valid data. In one embodiment, the transmitting system transmits data in packets over SONET. The packet data is scrambled at the transmitting end and descrambled at the receiving end. Runt abort packets sent during inter-frame time fill resynchronize the descrambler. If there is an error in the inter-frame time fill bytes, causing the receiving end descrambler to no longer be synchronized with the transmitting end scrambler, the runt abort packets will cause the descrambler to resynchronize state with the transmitting scrambler.
    Type: Grant
    Filed: January 3, 2001
    Date of Patent: August 29, 2006
    Assignee: Juniper Networks, Inc.
    Inventors: Dennis C. Ferguson, Devereaux C. Chen, Eric M. Verwillow, Ramesh Padmanabhan, Thomas Michael Skibo
  • Patent number: 7076392
    Abstract: The present invention provides a test bitstream generator and method for generating test bitstreams to test a bitstream decoder that is arranged to decode bitstreams generated in accordance with a predefined syntax. The method comprises the steps of generating test code from the syntax, the test code being arranged when executed to generate a test bitstream dependent on values assigned to a plurality of variables, each variable having a number of interesting values. The method then involves executing the test code, including the step of, for each of said variables, assigning that variable one of its interesting values, in order to thereby generate a test bitstream dependent on the interesting value assigned to each variable. It has been found that this technique provides an automated process for extensively testing a bitstream decoder.
    Type: Grant
    Filed: October 6, 2000
    Date of Patent: July 11, 2006
    Assignee: ARM Limited
    Inventor: Peter Brian Wilson
  • Patent number: 7031348
    Abstract: A splicing system includes a splicer for seamlessly splicing togther digitally encoded data streams. In a preferred embodiment, the splicer preferably parses successive splice buffers of data stream data for a splice-out point and a splice-in point, closing an initial group of pictures GOP if needed. The preferred splicer further finds a new data stream real-time program clock reference PCR value for aligning new data stream decode/presentation, and aligns the new data stream start time. Concurrently, the splicer preferably uses a frame table to detect overflow and corrects such overflow by adding null packets, thereby delaying portions of data stream data. The splicer also preferably restores data stream encoding by deleting null packets, and thereby accelerating a portion of data stream data. In a further preferred embodiment, the splicer preferably uses a bit-clock schedule offset to delay or accelerate portions of data stream data.
    Type: Grant
    Filed: April 4, 1998
    Date of Patent: April 18, 2006
    Assignee: Optibase, Ltd.
    Inventor: Hillel Gazit
  • Patent number: 7007106
    Abstract: Systems and methods are disclosed for time synchronization of operations in a control system. Synchronization networks and devices are provided for transferring synchronization information between controllers in a distributed or localized control system, which is employed in order to allow operation of such controllers to be synchronized with respect to time. Also disclosed are synchronization protocols and hardware apparatus employed in synchronizing control operations in a control system.
    Type: Grant
    Filed: May 22, 2001
    Date of Patent: February 28, 2006
    Assignee: Rockwell Automation Technologies, Inc.
    Inventors: Mark Flood, Anthony Cachat, Mark Ruetty, Steven Zuponcic
  • Patent number: 6999406
    Abstract: A reception synchronization apparatus capable of achieving precise synchronization of an OFDM signal including a frame guard added to the OFDM signal includes a multiplier for calculating the correlation between a received OFDM signal and an OFDM signal delayed by a delay circuit; a moving integration circuit for adding a signal from the multiplier over a guard period; n frame guard removing circuits, which respectively receive a signal from the moving integration circuit, remove the frame guard period from the received signal, and output a resultant signal; n interval integrators for cumulatively adding signals outputted from the frame guard removing circuits; and a detection circuit for detecting a maximum peak from the results from the n interval integrators and generating a detection signal indicating a synchronization timing position corresponding to the detected maximum peak position.
    Type: Grant
    Filed: December 5, 2001
    Date of Patent: February 14, 2006
    Assignee: Sony Corporation
    Inventors: Hiroaki Takahashi, Mitsuhiro Suzuki
  • Patent number: 6882661
    Abstract: A system transfers a data stream including data packets separated by non-packet words from a first clock domain to a second clock domain. It includes an elasticity buffer into which the data stream is written in a cyclic sequence under the control of the clock frequency in the first clock domain and from which the data stream is read out in a cyclic sequence under the control of the clock frequency in the second domain. The two sequences are monitored to provide an anticipatory signal indicating that the reading sequence approaches proximity to the writing sequence. A non-packet word is inserted into the data stream in the first domain. In the second clock domain the existence of the inserted non-packet word is detected and the buffer is caused to advance the reading cycle thereby to discard the said inserted non-packet word.
    Type: Grant
    Filed: September 14, 2000
    Date of Patent: April 19, 2005
    Assignee: 3Com Corporation
    Inventors: Tadhg Creedon, Denise De Paor, Fergus Casey
  • Patent number: 6804265
    Abstract: An apparatus comprising a parallel arrangement of circuits is described. Each circuit has a data net input. Each circuit has an indication signal net input configured to transport an indication signal having shapes and/or temporal locations different than a data signal on the data net input.
    Type: Grant
    Filed: May 19, 2000
    Date of Patent: October 12, 2004
    Assignee: Cisco Technology, Inc.
    Inventor: Joel C. Naumann
  • Publication number: 20040170197
    Abstract: A method of synchronising an Orthogonal Frequency Division Multiplexed (OFDM) IEEE 802.11a data packet at a receiver is disclosed. The 802.11a data packet has a series of short training sequence (STS) symbols as a preamble. Cross-correlation at the receiver of the STS in the 802.11a packet PLCP preamble with the modified reference STS, that is circular shifted by eight samples, results in a main correlation peak but with reduced pre- and post-lobes.
    Type: Application
    Filed: November 7, 2003
    Publication date: September 2, 2004
    Inventor: Mehul Mehta
  • Patent number: 6785353
    Abstract: A method for detecting synchronization loss of the trellis minimum path metric in V.34 modem communications. The invention detects synchronization loss due to bit inversions in trellis decoding in transmitted digital frames due to a periodic inversion pattern that is used for superframe synchronization. The method provides synchronization loss detection by finding the ratio of moving averages for a series of data blocks to the average of a series of inverted 4D symbols located periodically in the beginning and center of received data frames.
    Type: Grant
    Filed: September 6, 2000
    Date of Patent: August 31, 2004
    Assignee: Telogy Networks, Inc.
    Inventor: Adrian Zakrzewski
  • Patent number: 6760346
    Abstract: A packet switching network which allows the duration of guard time of each packet to be reduced to a minimum and the transmission efficiency of the network to be increased is disclosed. The sending nodes send the packet switch packets each having a guard time added thereto. The receiving nodes receive the packets from the packet switch. Each of the receiving nodes includes a switch timing detector for detecting switch timing of the packet switch based on a serial signal received from the packet switch, and a timing holder for holding the switch timing.
    Type: Grant
    Filed: January 6, 2000
    Date of Patent: July 6, 2004
    Assignee: NEC Corporation
    Inventors: Yoshihiko Suemura, Soichiro Araki, Yoshiharu Maeno, Akio Tajima, Seigo Takahashi
  • Patent number: 6711181
    Abstract: A system for packet parsing and data reconstruction in an IEEE 1394-1995 serial bus network includes a network interface unit, a processing unit, and a memory wherein an operating system resides. The operating system includes a streaming services module and a multimedia Application Program Interface (API) module. The network interface unit receives a stream of packets from a transmission device. Each packet includes a header portion, and may also include a data portion. The data portion, if present, stores data content generated from source data organized in accordance with a predetermined format. The streaming services module stores and then parses the received packets. A method for packet parsing and data reconstruction includes the steps of receiving a packet stream; storing a first and a second packet; locating a header portion within the first packet; and determining whether a header portion within the second packet immediately follows the header portion within the first packet.
    Type: Grant
    Filed: November 17, 1999
    Date of Patent: March 23, 2004
    Assignees: Sony Corporation, Sony Electronics Inc.
    Inventors: Xin Xue, Kevin Lym, Hisato Shima
  • Patent number: 6693918
    Abstract: A solution to the word alignment problem in a Serializer Deserializer (SERDES)/Media Access Controller environment is to have for each SERDES lane: a recovered clock, a Write Pointer counter and a FIFO. Misaligned words are simply stored in their FIFO's according to the respective recovered clocks and straightforward increments of the various Write Pointers WP_i. One of the lanes is selected as a reference, and the contents of the other FIFO's are inspected to determine the nature of their misalignment, if any. Then the values from the Read Pointer counters RP_i are individually offset by corresponding amounts to compensate for the misalignment, so that when data is read it is indeed aligned. These offsets by corresponding amounts are simply individual per lane adjustments to the various Read Pointers, and cooperate with the adjustments to those Read Pointer for rate matching.
    Type: Grant
    Filed: April 28, 2000
    Date of Patent: February 17, 2004
    Assignee: Agilent Technologies, Inc.
    Inventors: Michael J Dallabetta, Herman Pang
  • Publication number: 20030235214
    Abstract: An interface for transmitting and receiving service channel frames over an Ethernet includes an Ethernet physical layer and a physical service channel. The Ethernet physical layer is configured to transmit and receive Ethernet frames over an Ethernet physical medium. The physical service channel is configured to transmit and receive service channel frames over the Ethernet physical medium. In operation, the physical service channel transmits the service channel frames within inter-frame gaps defined by the Ethernet frames so as not to interfere with the transmission or receipt of the Ethernet frames.
    Type: Application
    Filed: May 6, 2003
    Publication date: December 25, 2003
    Inventors: Andre Leroux, Daniel Faucher
  • Patent number: 6556590
    Abstract: A method of transmitting timing critical data via an asynchronous channel without changing any datum to be transmitted. The timing critical data can be an MPEG transport stream. The asynchronous channel can be a computer or telephone network, a digital storage media such as a digital VCR, or a digital interface. The method involves tagging each transmission unit of the data stream, before inputting to the channel, with timing information, and using the timing information at the output end of the channel to recreate the proper data timing. Various schemes are described for packing the timing information tags with each or a plurality of transmission units.
    Type: Grant
    Filed: November 6, 1998
    Date of Patent: April 29, 2003
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Ronald W. J. .J. Saeijs, Imran A. Shah, Takashi Sato
  • Publication number: 20030072258
    Abstract: The present invention relates to employing OFDM modulation in combination with spatial diversity and space-time block coding to provide high data rates and exceptional interference immunity. For transmission, quadrature modulated data is encoded in space and time to create individual series of encoded symbols. Each of these series of encoded symbols is subjected to a type of inverse Fourier Transform in corresponding transmission paths. In each transmission path, cyclic extensions may be appended to the resultant symbols, which are subsequently converted to an analog format, modulated, amplified, and transmitted from one of multiple antennas. Preferably, such communications are implemented from base stations to mobile terminals in an environment where the frequency reuse factor is approximately one and the base stations are synchronized to a common clock signal.
    Type: Application
    Filed: October 15, 2001
    Publication date: April 17, 2003
    Inventors: Vahid Tarokh, Tharmalingam Ratnarajah, Wen Tong
  • Patent number: 6501809
    Abstract: A clock smoothing circuit generates a smoothed clock signal from a gapped clock signal having unevenly spaced pulses separated by gaps that result from the removal of data bits and from a reference clock signal having evenly spaced pulses that create a predetermined reference frequency. A smoothing element is coupled to the input elements to receive the gapped clock signal and the reference clock signal. In one embodiment, the smoothing element generates a smoothed clock signal having one pulse for each of the pulses in the gapped clock signal and having a frequency that is greater than one-half of the predetermined reference frequency. Each pulse in the smoothed clock signal is synchronized with a pulse in the reference clock signal.
    Type: Grant
    Filed: March 19, 1999
    Date of Patent: December 31, 2002
    Assignee: Conexant Systems, Inc.
    Inventors: Anton Monk, Ladd S. El Wardani
  • Patent number: 6430183
    Abstract: A data transmission system, including a plurality of transmitters for transmitting a stream of multiplexed packets over a broadband channel, the packets being constructed from a stream of variable length data blocks, each of the blocks originating from different sources. The system also includes a plurality of receivers for receiving the stream of packets from the broadband channel and reconstructing the stream of variable length data blocks. The data blocks are distributed over one or more packets. The packets also include a packet header having a source identifier (SID) for identifying the source of the packet, and the first of the packets further including a block header having a block identifier (BID) for identifying the data block being transmitted.
    Type: Grant
    Filed: July 31, 1998
    Date of Patent: August 6, 2002
    Assignee: International Business Machines Corporation
    Inventors: Julian Satran, Efraim Zeidner, Benny Rochwerger, Kenneth M. Nagin, Itamar Gilad
  • Publication number: 20020034160
    Abstract: A multi-point communications system is set forth herein. The communications system comprises a head end unit disposed at a primary site and a plurality of receivers disposed at remote sites. The head end unit includes a transmitter for transmitting OFDM/DMT symbols over a predetermined number of bins across a transmission medium. The OFDM/DMT symbols are transmitted in periodically occurring formatted symbol frames. The cyclic prefix includes a predetermined periodic signal superimposed thereon. The receivers receive the OFDM/DMT symbols over a subset of the predetermined number of bins from the transmission medium and use the superimposed signals to attain symbol alignment. Preferably, the superimposed signal is an impulse signal that varies in polarity throughout the transmission cycle and which is superimposed on one or more symbols occurring during a cyclic prefix of the formatted symbol frames.
    Type: Application
    Filed: July 25, 2001
    Publication date: March 21, 2002
    Inventors: Daniel J. Marchok, Richard C. Younce, Samir Kapoor, Peter J.W. Melsa
  • Publication number: 20020031196
    Abstract: A transceiver for operating in a network wherein the transceiver is arranged to synchronize to a time reference common to the network having distinguishable instances comprising:
    Type: Application
    Filed: June 21, 2001
    Publication date: March 14, 2002
    Inventors: Thomas Muller, Olaf Joeressen, Jurgen Schnitzler, Markus Schetelig
  • Patent number: 6304911
    Abstract: A reception indicator circuit is provided for use in an apparatus, wherein the apparatus enables a host system to receive information packets from a medium. The reception indicator circuit has a delay calculator, a byte count comparator and a signal asserter. The delay calculator selects and reads a reference delay value in one of N number of length-delay data storage elements. A reference length value contained in the one of N number of length-delay data storage elements corresponds to a length value of an information packet being received by the apparatus. The length value of the information packet is determined based on data in the information packet. The byte count comparator detects when the reference delay value number of bytes in the information packet have been received by the apparatus. The signal asserter asserts a reception indication signal when the byte count comparator detects that the reference delay value number of bytes in the information packet have been received by the apparatus.
    Type: Grant
    Filed: June 25, 1997
    Date of Patent: October 16, 2001
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Joseph A. Brcich, David G. Roberts, Robert Williams
  • Patent number: 6285654
    Abstract: A multi-point communications system that comprises a head end unit disposed at a primary site and a plurality of receivers disposed at remote sites. The head end unit includes a transmitter for transmitting OFDM/DMT symbols over a predetermined number of bins across a transmission medium. The OFDM/DMT symbols are transmitted in periodically occurring formatted symbol frames. The cyclic prefix includes a predetermined periodic signal superimposed thereon. The receivers receive the OFDM/DMT symbols over a subset of the predetermined number of bins from the transmission medium and use the superimposed signals to attain symbol alignment. In accordance with a further aspect of the present invention, the receivers apply a predetermined incremental phase shift to received samples corresponding to the received OFDM/DMT symbols to thereby compensate for phase shifts. The multi-point communications system may include a similar system for aligning symbols transmissions from a remote service unit having a transmitter.
    Type: Grant
    Filed: April 24, 1997
    Date of Patent: September 4, 2001
    Assignee: Tellabs Operations, Inc.
    Inventors: Daniel J. Marchok, Richard C. Younce, Samir Kapoor, Peter J. W. Melsa
  • Patent number: 6192056
    Abstract: A demodulating apparatus and a demodulating method includes a correlation detector for detecting a correlation between a guard section of the symbol of a digital orthogonal frequency division multiplex modulated signal and a section having a correlation with the guard section in an effective symbol of the symbol, a section integrator for section integrating a detected output of the correlation detector with respect to the guard section, a peak detector for detecting a peak of a triangular wave signal from the section integrator, and a frame timing signal producing circuit for producing a frame timing signal of a predetermined frame of each of the frames based on a peak detecting signal from the peak detector. The frame synchronizing signal generator circuit may be made synchronized by a frame timing signal from the frame timing signal producing circuit.
    Type: Grant
    Filed: May 4, 1998
    Date of Patent: February 20, 2001
    Assignee: Sony Corporation
    Inventor: Tatsuya Tsuruoka
  • Patent number: 6185250
    Abstract: Analog modems are enabled to better learn the slicing levels employed at the interface to a digital transmission network by reducing the effects of the various noise sources. Initially a training sequence is received to preliminarily adjust the analog modem's equalizer. Thereafter, a special training sequence, protected against intersymbol interference, is employed to collect samples of each slicing level, to ascertain the least mean squared value of each slicing level from the received samples and to obtain the channel's impulse response at each slicing level. Thereafter, the analog modem's equalizer may be fine tuned in accordance with the channel impulse response ascertained at each slicing level.
    Type: Grant
    Filed: June 22, 1999
    Date of Patent: February 6, 2001
    Assignee: Lucent Technologies Inc.
    Inventors: Zhenyu Wang, Yhean-Sen Lai, Jiangtao Xi, Bahman Barazesh
  • Patent number: 6108353
    Abstract: A demodulating apparatus according for demodulating a modulated signal obtained by modulating a plurality of carriers having different frequencies, includes a data demodulating circuit for demodulating data by frequency-analyzing a time waveform of the modulated signal which is formed of a data period of one modulation time and a guard interval succeeding the data period and which includes in the data period a period having correlation with the guard interval and provided at a position away from the modulated signal by the one modulation time, a correlation circuit for detecting correlation between the guard interval of the modulated signal and the period in the data period having correlation with the guard interval and provided at a position away from the modulated signal by the one modulation time, and a synchronization signal generating circuit including the correlation circuit and for generating a synchronization signal based on a detection output from the correlation circuit.
    Type: Grant
    Filed: January 15, 1998
    Date of Patent: August 22, 2000
    Assignee: Sony Corporation
    Inventors: Jin Nakamura, Tatsuya Tsuruoka, Kiyoshi Nomura
  • Patent number: 6084852
    Abstract: In a burst mode communications system, bursts of information with a known preamble are transmitted from a burst mode transmitter and are received by a burst mode receiver which uses the preamble to determine the presence of a burst and to determine the correct carrier frequency, carrier phase, symbol clock frequency and symbol clock phase in order to correctly recover the symbols transmitted, and thus the information contained within the burst. The present invention comprises a method of burst transmission using a preamble which contains an initial pulse and a Barker sequence following the initial pulse separated by a dead time period equal to the transmission time of at least one symbol. The preamble can be transmitted on orthogonal carriers and the order of the Barker sequence can be reversed and multiplied by minus one on one of the carriers to reduce the probability that noise events on both carriers make the Barker sequence less detectable on each channel.
    Type: Grant
    Filed: October 11, 1996
    Date of Patent: July 4, 2000
    Assignee: Next Level Communications
    Inventor: Lawrence Ebringer
  • Patent number: 6046993
    Abstract: A method of adapting synchronous transmission to the rules that apply to asynchronous transmission in a radio medium. In asynchronous transmission, the transmitter/receiver operates in monitoring mode for a given short period of time, in order to establish whether or not transmission will take place. The synchronous transmission is, for example, a TDMA transmission for a personal telephone system active over short distances (10-200 m). According to the method, the radio medium is monitored by a synchronous transmitter over a brief time period between two time slots and the power received is measured and compared with a given prescribed threshold power in accordance with asynchronous rules. Permission to transmit can be given on the basis of the result of this comparison.
    Type: Grant
    Filed: March 12, 1997
    Date of Patent: April 4, 2000
    Assignee: Telefonaktiebolaget LM Ericsson
    Inventor: Dag E:son .ANG.kerberg