Reference Indication Consists Of A Gap Patents (Class 370/504)
  • Patent number: 5991289
    Abstract: A synchronization system for an input signal having a plurality of OFDM symbols, each symbol having at least one guard interval, includes a correlation device for providing a product of the input signal with a complex conjugate of the input signal delayed for a predetermined period, an arithmetic device for obtaining an argument value of the product, and a detection device for detecting a transition in phase values of an output of the arithmetic device, wherein the transition occurring when the phase value in one portion of the symbol duration is substantially smaller than another portion of the symbol duration. The system additionally includes a power estimator for detecting an OFDM symbol frame of the input signal with reference to a predetermined threshold, and a device for estimating fractional carrier frequency offset.
    Type: Grant
    Filed: August 5, 1997
    Date of Patent: November 23, 1999
    Assignee: Industrial Technology Research Institute
    Inventors: Chia-Chi Huang, Yung-Liang Huang, Chorng-Ren Sheu
  • Patent number: 5883899
    Abstract: Introduction of discontinuous transmission in CDMA communications techniques is achieved by using selectively puncturing coded output of a convolutional encoder. By temporarily increasing the coding rate during a frame, information only fills an information part of a frame in a compressed mode, leaving an idle part of the frame in which to perform other functions, such as evaluation of other frequencies for use in handover between frequencies.
    Type: Grant
    Filed: April 23, 1996
    Date of Patent: March 16, 1999
    Assignee: Telefonaktiebolaget LM Ericsson
    Inventors: Erik Dahlman, Per Hans P. Willars, Olof E. Grimlund, Lars-Magnus Ewerbring
  • Patent number: 5787078
    Abstract: The problem of pulse frame synchronization occurs for example in a telecommunications system with cordless terminals operating according to the DECT standard. To establish a radio connection between base station and a cordless terminal, the base station scans its radio cell in sequence with the available ten high-frequency carriers in the DECT frame rhythm. In a multiple cell environment, the synchronization of all base stations belonging to a cordless telecommunications installation is necessary, to enable all base stations to scan the same frequency at the same time. This is achieved by blanking the DECT multi-frame synchronization pulses. The pulse gap is evaluated by error detection circuits which are present anyway, and used for the PSCN Primary receiver Scan Number-synchronization.
    Type: Grant
    Filed: August 9, 1996
    Date of Patent: July 28, 1998
    Assignee: Alcatel N.V.
    Inventors: Klaus Geywitz, Artur Veloso
  • Patent number: 5764648
    Abstract: In a wireless telephone of a mobile communication system, which performs transmission in a series of bursts, in synchronism with a receive signal transmitted from a base station, each transmission burst being performed responsive to a transmission timing signal, a sync signal is detected from the receive signal, the transmission timing signal is generated on the basis of the sync signal, and each transmission burst is effected in accordance with the transmission timing signal. When the sync signal ceases to be detected, the transmission timing signal is autonomously generated for a certain time period after the sync signal is last detected. In another aspect of the invention, during reception in a first channel, the channel quality of another vacant channel is measured by transferring PLL data to a PLL prior to the slot in which the measurement is effected.
    Type: Grant
    Filed: July 14, 1995
    Date of Patent: June 9, 1998
    Assignees: Sanyo Electric Co., ltd., Tottori Sanyo Electric Co. Ltd.
    Inventors: Manabu Yamane, Junji Tanaka, Hideko Taniguchi, Mitsuru Morimoto
  • Patent number: 5751723
    Abstract: In a packet network, message packets (130) are comprised of vacant or unused bits for future system enhancements or for remedying unknown design oversights or utilizing vacant portions of fixed length data packets. Furthermore, message packets (130) comprise a message type identifier distinguishing message architecture. A transmit and receive packet network node (100) maintains an unused bit catalog (125) listing vacant or unused bits of particular message packet types. When a message packet type having vacant or unused bits is detected propagating through the packet network, background data is retrieved from a transmit background data queue (115) and interleaved into such message packets to form enriched message packets (130') for transportation through the packet network. Receiving packet network nodes (100) detect enriched message packets (130') and extract and buffer the background data.
    Type: Grant
    Filed: July 1, 1996
    Date of Patent: May 12, 1998
    Assignee: Motorola, Inc.
    Inventors: Dean Paul Vanden Heuvel, Brent Matthew McKay, James Morris Tooker
  • Patent number: 5687200
    Abstract: A data transmission link is especially designed to meet new FCC regulations setting 5 KHz band widths for transmitting control signals to industrial systems. The new band width creates timing distortions which are overcome by inserting a new timing pulse into a data pulse stream. The center of that inserted timing pulse is taken as an axis of reference for retiming each pulse in the data pulse stream so that the fluctuations of a time frame synchronizing pulse become irrelevant. The retiming process is repeated for each data time frame.
    Type: Grant
    Filed: February 17, 1995
    Date of Patent: November 11, 1997
    Assignee: Maxtec International Corporation
    Inventor: Gerald M. Berger
  • Patent number: 5583894
    Abstract: A slip buffer includes a first-in-first-out memory, an input address generating means, an output address generating means, and a slip buffer control logic. The input address generating means generates addresses into which data is read into the first-in-first-out memory. The output address generating means generates addresses from which data is read from the first-in-first-out memory. The slip buffer control logic includes a first latch, a second latch and a slip address generation means. A first boundary address of a first frame boundary is stored in the first latch. The first latch includes a first validity bit which indicates whether the first boundary address is valid, A second boundary address of a second frame boundary is stored in the second latch. The second latch includes a second validity bit which indicates whether the second boundary address is valid.
    Type: Grant
    Filed: March 20, 1995
    Date of Patent: December 10, 1996
    Assignee: VLSI Technology, Inc.
    Inventor: Charles E. Linsley