Multiplexing Plural Input Channels To A Common Output Channel Patents (Class 370/537)
  • Patent number: 7764717
    Abstract: A multiplexing system having an input unit, a storage unit and control unit. The input unit receives data units corresponding to multiple source data streams and extracts packets from the data units. The control unit computes data rate estimates for the source data streams based on timestamps in the source data streams. The storage unit stores a packet count and previous timestamp value for each source data stream. The control unit computes a preliminary data rate estimate for a source data stream based on samples of a local clock if timestamps are not received promptly. The control unit also computes scheduling rates based on the data rate estimates. The scheduling rates are used to control the rates of allocation of data from the source data streams into a multiplexed output stream. The control unit computes scheduling rates in a way that avoids oversubscription of the output channel.
    Type: Grant
    Filed: May 6, 2005
    Date of Patent: July 27, 2010
    Assignee: Oracle America, Inc.
    Inventors: James J. Yu, Sebastian Turullols, Aly E. Orady
  • Patent number: 7764608
    Abstract: Methods and apparatus are described for management of traffic comprising a statistical shaper having a plurality of inputs each for receiving a data stream and a plurality of outputs forming a variable rate bit streams; a multiplexer which combines the bit streams to form an output stream; a modulation stage which is operable to use one or more of a plurality of different modulation schemes to modulate the bit streams onto an output bearer; and, a controller which is operable to control the amount of data arriving at the modulation stage. The controller performs rate control of the data arriving at the modulation stage so that the rate of data output in the output stream from the modulator stage is within a predetermined limit for the transmission channel. For example if the modulation rate for any one bitstream changes, this would alter the rate of data transmission after the modulation stage except that excess data is stored in buffers.
    Type: Grant
    Filed: March 21, 2005
    Date of Patent: July 27, 2010
    Assignee: Newtec CY
    Inventors: Dirk Breynaert, Maximilien d'Oreye de Lantremange, Daniel Delaruelle
  • Patent number: 7764614
    Abstract: The present invention provides a method and an apparatus for providing data management between a serial interface and another component. A variable rate buffer manager and state machine progress data on a serial link relative to a width and clocking frequency of a parallel bus that interfaces within the serial link. Event scheduler logic is provided that controls the mode of operation of the buffer manager and state machine.
    Type: Grant
    Filed: November 15, 2005
    Date of Patent: July 27, 2010
    Assignee: LSI Corporation
    Inventor: Kuo-Shu Wang
  • Patent number: 7760634
    Abstract: Disclosed are a radio link control (RLC) entity and a data processing method for the RLC entity. The RLC entity includes a transmission data storing module that stores PDUs corresponding to SDUs transmitted from a first upper layer and outputs the stored PDUs by SDU units, a ciphering module that ciphers the PDUs stored in the transmission data storing module and transmitting the ciphered PDUs to a first RLC entity, a deciphering module that deciphers the ciphered PDUs transmitted from a second RLC entity, and a received data storing module that stores the deciphered PDUs and outputs the PDUs toward a second upper layer in the form of SDU units.
    Type: Grant
    Filed: November 5, 2007
    Date of Patent: July 20, 2010
    Assignee: LG Electronics Inc.
    Inventor: Seung June Yi
  • Patent number: 7760768
    Abstract: A system and method for allocating sources to channels is provided. Multiple sources provide input signals to be transferred to the channels. Storage units associated with the channels store source identification information for each of the sources that transfer input signals to the channels. Selection circuit selectively pass one of the plurality of input signals from a respective one of the plurality of sources according to a state of a respective control input to the selection circuit, the control input for each selection circuit being determined based on the source identification information of a source associated with the selection circuit. A checking circuit checks outputs of the selection circuits and forwards passed input signals to the channel, such that the input channels are forwarded to the channel according to the priorities associated with the sources. The invention for allocating multiple sources to multiple channels can be applied to a direct memory access (DMA) controller.
    Type: Grant
    Filed: October 21, 2003
    Date of Patent: July 20, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Ji Young Lee
  • Patent number: 7760769
    Abstract: Methods and apparatus provide for the combining and filtering of serial data from multiple serial data sources. At least one of the serial data sources frames serial data into packets. The serial data source that frames serial data drives a serial port in an exclusive manner. Another serial data source also provides data to the serial port. As the serial data comes from the sources, the serial port generates a stream of serial data that is sent to a serial stream filter. The serial stream filter extracts the packet from other serial data and selectively forwards the packet and the other serial data to one or more recipients.
    Type: Grant
    Filed: November 15, 2005
    Date of Patent: July 20, 2010
    Assignee: Network Appliance, Inc.
    Inventors: Stuart J. Lovett, Andrew G. Reynolds
  • Patent number: 7756016
    Abstract: A method that changes the selection of a 2:1 multiplexer that receives a first output signal from a first framer and a second output signal from a second framer. The first output signal is the same as the second output signal. An apparatus having a framer and a 2:1 multiplexer that receives an inbound signal from the framer. A first multiplexer receives at least one signal from another framer and the 2:1 multiplexer has an input coupled to an output from the first multiplexer. A second multiplexer receives at least one signal from the other framer and the second multiplexer has an output coupled to an input of the framer for an outbound signal.
    Type: Grant
    Filed: January 25, 2006
    Date of Patent: July 13, 2010
    Assignee: Force IO Networks, Inc.
    Inventor: Jim Mao
  • Patent number: 7742502
    Abstract: In order to facilitate the transport of 1 Gbit/s Ethernet signals over an Optical Transport Network using the Optical Transport Hierarchy as specified by ITU-T G.709, a new OTH entity referred to as Optical Channel Data Unit-0 (ODU0, 101) with a capacity of approximately 1.22 Gbit/s is defined. This new entity fits perfectly into the existing OTH multiplexing structure, allowing the transport of two times a 1 Gbit/s Ethernet client layer signal within the capacity of one ODU1 (110), while being individually switchable. A 1 Gbit/s Ethernet signal (102) can be mapped into the ODU0 payload (103) using the Transparent Generic Framing Procedure (GFP-T) encapsulation technique as specified in Rec. G.7041.
    Type: Grant
    Filed: October 21, 2005
    Date of Patent: June 22, 2010
    Assignee: Alcatel
    Inventors: Maarten Vissers, Günter Grüell
  • Patent number: 7742481
    Abstract: In order to allow the generation of a time stamp in consideration of a frame skip even in the case where the frame skip is generated, a PES generation section of a multiplexer detects the number of skipped frames by analyzing elementary video streams output from a video encoder to determine a PTS on the basis of the time difference between frames calculated on the basis of the number of skipped frames. Then, a frame to which a PTS is to be placed with the above stream analysis is cut out to insert the PTS into a PES header of this frame to be transmitted to the transmission channel.
    Type: Grant
    Filed: September 6, 2005
    Date of Patent: June 22, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Tatsunori Saito
  • Patent number: 7742397
    Abstract: A system and method for delivering digital subscriber line (DSL) service to a subscriber. In a telecommunications network, the signal passing through a protector field is diverted to a cross connect block that can be selectively configured to establish a communication route between the cross connect block and a splitter selectively receiving a DSL signal. The combined signal is then placed back upon the network by the cross connect block, which directs the combined signal back to the protector field.
    Type: Grant
    Filed: July 14, 2008
    Date of Patent: June 22, 2010
    Assignee: ADC Telecommunications, Inc.
    Inventors: Bryan K. Kennedy, Richard Wolf
  • Publication number: 20100150182
    Abstract: A multiplexer handling different types of traffic in different queue types, including in one embodiment time-stamped content such as in the form of MPEG service data, untimed content such as in the form of other variable bit rate data, and periodic tables, such as in the form of MPEG program specific information, allocates a tag to each packet, which is used to schedule packets for transmission. A tagging algorithm tags each packet in the queue, and a packet scheduling algorithm uses the tag to determine which packet is next to be transmitted, and a control algorithm determines when the scheduling algorithm will be executed. The algorithms cooperate to allow the multiplexer to handle traffic without requiring an internal clock to be synchronized with the input streams, nor stuffing of packets to pad out the contents of the variable bit rate traffic.
    Type: Application
    Filed: December 12, 2008
    Publication date: June 17, 2010
    Inventor: Ciro A. Noronha, JR.
  • Patent number: 7738507
    Abstract: The network relay device of the invention carries out data transmission to and from an opposite device to relay data in a network. The network relay device includes: multiple ports connecting with corresponding multiple ports of the opposite device via multiple links; and a link aggregation control module that aggregates the multiple links to establish a link aggregation, which is regarded as one logic link, and carries out transmission of a control frame signal including a synchronization bit, as well as data transmission, at each port via the link aggregation. In response to detection of occurrence of a trouble in at least one of the aggregated multiple links, the link aggregation control module causes a port that connects with a normal link without the trouble among the multiple ports to stop the data transmission and send the control frame signal including the synchronization bit set equal to a first value.
    Type: Grant
    Filed: September 19, 2008
    Date of Patent: June 15, 2010
    Assignees: Hitachi, Ltd., Hitachi Hybrid Network Co., Ltd.
    Inventors: Masashi Suzuki, Manabu Fujita, Hiroyuki Isogai, Shinji Nozaki
  • Patent number: 7738513
    Abstract: A method for multiplexing digital data, wherein a packet of digital data is simultaneously sent from front to rear and from rear to front. Additionally, a method for multiplexing digital data, wherein a packet of digital data is simultaneously sent from the beginning of the packet towards the end and from the end towards the beginning. Additionally, a method for multiplexing digital data, wherein simultaneously a packet of digital data is sent and the same packet is sent backwards.
    Type: Grant
    Filed: December 8, 2003
    Date of Patent: June 15, 2010
    Assignee: Nonend Inventions N.V.
    Inventors: Marc van Oldenborgh, Martijn Gnirrep
  • Publication number: 20100141822
    Abstract: An analog multiplexer is configured to multiplex a plurality of input analog signal channels into a single output analog signal channel. The analog multiplexer comprises a plurality of input sampling circuits associated with respective ones of the input analog signal channels and an amplifier having an input controllably connectable in turn to each of the input sampling circuits. The analog multiplexer is further configured to connect at least a given one of the input analog signal channels to a sampling element of its corresponding input sampling circuit at a predetermined time prior to connecting the sampling element of that input sampling circuit to the input of the amplifier. The predetermined time is less than a full clock cycle of a sampling clock of the amplifier. The analog multiplexer may be implemented in readout circuitry coupled to a pixel array in an image sensor.
    Type: Application
    Filed: December 8, 2008
    Publication date: June 10, 2010
    Inventor: Song Xue
  • Patent number: 7733814
    Abstract: A time-division communication system wirelessly receives a communication signal during receive time periods and wirelessly transfers a communication signal during transmit time periods. These communication signals have multiple receive and transmit channels. The communication system circulates the received communication signal to various filters that pass particular receive channels and that reflect other receive channels back the circulator(s). Eventually, the reflected receive channels circulate to the appropriate filters and are passed. The filters also pass transmit channels to the circulator(s) where they are circulated and reflected until they combine into the transmit communication signal.
    Type: Grant
    Filed: May 19, 2008
    Date of Patent: June 8, 2010
    Inventors: Walter F. Rausch, Harry W. Perlow
  • Patent number: 7733921
    Abstract: Audio packets occupy spaces in a packet stream so as to reduce packet jitter in a receiver.
    Type: Grant
    Filed: May 8, 2007
    Date of Patent: June 8, 2010
    Assignee: Zenith Electronics LLC
    Inventor: Timothy G. Laud
  • Patent number: 7729391
    Abstract: A transmitting device includes a first buffer for temporarily storing audio data, a second buffer for temporarily storing video data, a multiplexing unit for outputting audio data coming from the first buffer and video data coming from the second buffer onto a single signal channel, and a transmission buffer monitoring unit for monitoring the amount of first buffered data stored in the first buffer and, if the amount of the first buffered data exceeds a first threshold, instructing the second buffer to discard video data.
    Type: Grant
    Filed: October 12, 2005
    Date of Patent: June 1, 2010
    Assignee: KDDI Corporation
    Inventors: Satoshi Miyaji, Yasuhiro Takishima
  • Patent number: 7729374
    Abstract: Fibre channel interface apparatus and methods are disclosed. In one embodiment, a system includes at least one input interface adapted to receive one or more frames of data, the frames of data being at least one of transmitted and received at a node of a fibre channel network, and an output interface adapted to provide the received one or more frames of data to a device. The device may comprise a radar system, such as an electronically-scanned radar system. In a further embodiment, the system is adapted to combine multiple data streams of the fibre channel network by a method including encoding the first and second data streams of the fibre channel network, and merging the encoded first and second data streams into a plurality of frames.
    Type: Grant
    Filed: August 31, 2004
    Date of Patent: June 1, 2010
    Assignee: The Boeing Company
    Inventor: Robert Neal Zettwoch
  • Patent number: 7729389
    Abstract: A network interface includes N input lanes that receive data symbols and idle symbols. A substitutor module periodically replaces an idle symbol on each input lane with a corresponding alignment symbol to form an alignment group. M interleaver modules each interleave a portion of the data symbols and alignment symbols onto a corresponding transmit lane based on an interleaving pattern that provides each transmit lane with N/M alignment symbols from the alignment group. M is an integer greater than 1 and N is greater than M. In some features the substitutor module periodically replaces successive idle symbols on each lane with alignment symbols to form corresponding alignment groups. An interleaver module interleaves the data symbols and alignment groups onto M transmit lanes according to an interleaving pattern that provides each transmit lane with one of the alignment groups.
    Type: Grant
    Filed: May 2, 2006
    Date of Patent: June 1, 2010
    Assignee: Marvell International Ltd.
    Inventor: William Lo
  • Patent number: 7729390
    Abstract: A transmit signal is spread by a plurality of spreading sections 103, 104, 105, and 106, using different spreading codes. A selection section 107 increases the number of spread signals to be output as the number of retransmissions increases. By this means, a retransmission signal spread by means of many spreading codes is code division multiplexed. As a result, retransmission signal error rate characteristics are improved on the receiving side by despreading this code division multiplexed signal using the same plurality of spreading codes as on the transmitting side, and selecting or combining the despreading results with the greatest correlation power thereamong. Also, since the degree of code multiplexing is increased proportionally as the number of retransmissions increases, retransmission signal error rate characteristics can be improved without lowering spectral efficiency unnecessarily.
    Type: Grant
    Filed: August 11, 2003
    Date of Patent: June 1, 2010
    Assignee: Panasonic Corporation
    Inventor: Hiroaki Sudo
  • Patent number: 7720676
    Abstract: An audio signal encoded in the form of data is spectrally reconstructed so part of the frequency spectrum of the audio signal is decoded with a spectral band limiting encoder (i.e., a core encoder). The complementary part of the frequency spectrum of the audio signal is decoded with an extension encoder. Information representing at least one cut-off frequency of the signal decoded by the core decoder is used to select, from amongst the data to be decoded or the data decoded with the extension decoder.
    Type: Grant
    Filed: March 3, 2004
    Date of Patent: May 18, 2010
    Assignee: France Telecom
    Inventors: Pierrick Philippe, Jean-Bernard Rault
  • Patent number: 7720113
    Abstract: A receiving apparatus (100) includes demodulation parts (101, 102) for receiving the respective one of received signals of broadast systems to output demodulated data and timing clocks synchronized with the respective demodulated data, a clock generating part (103) for outputting, to an A/V decoder (107), the two timing clocks from the demodulation parts (101, 102) as high-rate and low-rate timing clocks and for outputting a control signal for multiplexing the two demodulated data from the demodulation parts (101, 102), and a multiplexing part (104) for multiplexing, based on the control signal, the two demodulated data to output the multiplexed data to the A/V decoder (107). The A/V decoder (107) receives the multiplexed data and timing clocks from the receiving apparatus (100) to process the video/audio signals of each broadcast.
    Type: Grant
    Filed: November 18, 2004
    Date of Patent: May 18, 2010
    Assignee: Panasonic Corporation
    Inventors: Shunsuke Sakai, Yuji Nakai
  • Patent number: 7715440
    Abstract: Different types of media (text, sound, animated images, . . . ) are transmitted to a relay center. According to the invention, this data is split up in terms of common synchronization points (PS0, . . . , PS4), and packets are assembled together combing all of the data of each media type that is defined between identical synchronization points. As a result, each packet contains data that is to be executed simultaneously on the telecommunications terminal. A particular application lies with mobile terminals.
    Type: Grant
    Filed: April 2, 2002
    Date of Patent: May 11, 2010
    Assignee: Alcatel
    Inventors: Christophe Comps, Philippe Beaux
  • Patent number: 7711006
    Abstract: A data merge unit is provided for providing an interleaved data stream, the data stream including data frames received on two or more input channels, wherein data frames from each of the two or more input channels are arranged in time-slots of the interleaved data stream. The data merge unit comprises an input unit to receive data frames from two or more input channels, a frame merge buffer arranged to receive data frames from the two or more input channels via the input unit and store said data frames; and, an output generator to generate the interleaved data stream, the output generator being configured to select complete data frames from the frame merge buffer and arrange said complete data frames in the interleaved data stream.
    Type: Grant
    Filed: August 13, 2004
    Date of Patent: May 4, 2010
    Assignee: Napatech A/S
    Inventors: William M. Dries, Kathryn E. Rickard
  • Patent number: 7706417
    Abstract: A method of generating a plurality of data streams using a data protocol is disclosed. The method comprises steps of receiving an input data stream comprising a periodic sequence of data words, wherein each the data word of the input data stream is associated with a data stream of a plurality of data streams. The data words of the input data stream are sequentially processed by a data control circuit. Finally, data output by the data control circuit is demultiplexed to generate a plurality of output data streams. A circuit for generating a plurality of data streams using a data protocol is also disclosed.
    Type: Grant
    Filed: October 25, 2005
    Date of Patent: April 27, 2010
    Assignee: XILINX, Inc.
    Inventor: Martin B. Rhodes
  • Patent number: 7701939
    Abstract: An OLT (Optical Line Terminal) having a multicast control unit, which controls connections dedicated for the multicast services, and a plurality of PON (Passive Optical Network) interfaces for accommodating subscriber terminals and each PON interface is provided with a unicast dedicated port for the unicast communication. When the multicast data packets are received at the multicast control unit, it identifies every PON interfaces as distribution destinations of those packets with referring to a pre-defined table and distributes first copied packets to respective identified PON interfaces. In each PON interface, it identifies every subscriber terminals as transmission destinations of the distributed multicast data packets with referring to another pre-defined table, and the second copied multicast data packets are multiplexed with the unicast data packets and transmitted to the subscriber terminals.
    Type: Grant
    Filed: July 28, 2006
    Date of Patent: April 20, 2010
    Assignee: NEC Corporation
    Inventor: Masashi Tanaka
  • Patent number: 7697571
    Abstract: A system and method are disclosed for effectively performing an audio/video synchronization procedure in a receiver device that is embodied in a computer that receives input data from a source device and provides output data to a destination device. The receiver device may preferably include a demultiplexer configured to recover elementary bitstreams from a multiplexed bitstream. The demultiplexer may also preferably extract decode timestamps and output timestamps corresponding to the elementary bitstreams. One or more decoders may then decode the elementary bitstreams to produce decoded frames in accordance with the foregoing decode timestamps. One or more output modules may then process the decoded frames to produce processed frames in accordance with the output timestamps.
    Type: Grant
    Filed: September 28, 2006
    Date of Patent: April 13, 2010
    Assignees: Sony Corporation, Sony Electronics Inc.
    Inventor: Klaus Zimmermann
  • Patent number: 7697575
    Abstract: The remultiplexing apparatus includes a control information selector that selects a packet containing program control information from the inputted bit stream, a program control information editor that edits contents of the selected program control information and generates new program control information corresponding to an outputted bit stream, and a remultiplexer for multiplexing again the packet containing media information in the inputted bit stream and the program control information generated by the program control information editor.
    Type: Grant
    Filed: October 27, 2003
    Date of Patent: April 13, 2010
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Yoshiaki Kato, Yuka Fujita, Tokumichi Murakami
  • Patent number: 7697572
    Abstract: A multiplexer includes a body having a mechanism, incorporated into the body, for receiving more than one incoming data stream and converting the more than one data stream into a single output stream. An integral time clock is incorporated into the body and is adapted to incrementally time stamp each incoming data stream. The processor on the device also runs software to parse user selected data streams for the purpose of filtering out unnecessary data from the incoming streams, thereby reducing the volume of data and, in particular unwanted data, from being processed and/or logged from the device. The integration of a multimeter for voltage and amperage reading acquisition also reduces the need for external peripheral devices being attached to the device.
    Type: Grant
    Filed: December 7, 2006
    Date of Patent: April 13, 2010
    Assignee: Spectrum External Line Inspection Technology Inc.
    Inventors: Ken Smelquist, Robert Gagnon, Mike Westman, Grant Dakin
  • Publication number: 20100080250
    Abstract: Embodiments related to bundling of data streams in data communication are described and depicted
    Type: Application
    Filed: January 16, 2009
    Publication date: April 1, 2010
    Inventors: Pidder KASSEL, Friedrich BECKMANN
  • Patent number: 7688869
    Abstract: In one embodiment, the invention relates to a serial line circuit that comprises a serial information (SI) bus and at most two isolators interposed between a pair of programmable devices. In the TRANSMIT direction, a first programmable device is configured to multiplex serial data received from a plurality of serial UARTs and to route such data to the second programmable device over the SI bus and through a first isolator. In the RECEIVE direction, the second programmable device is configured to sample data from a plurality of serial interconnects and to route the sampled data to the first programmable device. The sampled data is routed over the SI bus and through a second isolator. The data transmission over the SI bus is in accordance with a proprietary serial transmission protocol described below.
    Type: Grant
    Filed: February 19, 2004
    Date of Patent: March 30, 2010
    Assignee: Aruba Networks, Inc.
    Inventors: Joel F. Adam, Jerry Martinson
  • Patent number: 7688867
    Abstract: A dual-mode network storage controller integrated on a chip is connected to a first set of hosts over a block-level storage area network (SAN), and to a second set of hosts over a metadata Ethernet/IP network. The dual-mode storage controller is also connected to one or more storage devices, such as a Redundant Array of Independent Disks (RAID). The storage controller comprises dedicated-hardware metadata translation logic for translating metadata (e.g. file-level) storage commands into block-level storage commands. The storage controller can also include block translation logic for translating logical block-level storage commands into physical block-level storage commands. The storage controller further comprises multiplexing logic for sequentially transmitting to the storage device(s) block level storage commands derived from the commands received from the first set of hosts and the second set of hosts.
    Type: Grant
    Filed: August 27, 2007
    Date of Patent: March 30, 2010
    Assignee: QLogic Corporation
    Inventor: Govind Kizhepat
  • Patent number: 7680142
    Abstract: A communications chip having a plurality of ports. Each port is provided with an interface for attachment to an external communications facility to exchange data traffic. There is also a switching matrix for routing data traffic on the chip between the ports. The chip further includes a plurality of logic analyzers. Each logic analyzer is associated with a corresponding one of the ports. Each logic analyzers is operable to monitor data traffic passing through its corresponding port and to trigger on one or more predetermined conditions relating to the monitored data traffic. The chip further includes a control interface to allow reconfiguration of the predetermined conditions for at least one of the logic analyzers.
    Type: Grant
    Filed: May 11, 2004
    Date of Patent: March 16, 2010
    Assignee: Sun Microsystems, Inc.
    Inventors: Knut Tvete, Hans Rygh, Bjorn Dag Johnsen
  • Patent number: 7680157
    Abstract: A transmitting apparatus connects a first network that includes a plurality of channels each of which having a preset priority and a predetermined bandwidth speed and a second network. A bandwidth-speed adjusting unit retrieves, when a channel speed of the second network changes, the changed channel speed, adjusts the bandwidth speed in such a manner that a sum of the bandwidth speeds of the channels of the first network does is below the changed channel speed and a bandwidth speed of a high-priority channel is not decreased from an inherent bandwidth speed, and resets the adjusted bandwidth speed on each of the channels of the first network.
    Type: Grant
    Filed: May 31, 2006
    Date of Patent: March 16, 2010
    Assignee: Fujitsu Limited
    Inventor: Masashige Kawarai
  • Patent number: 7675949
    Abstract: Multiple interfaces dedicated to individual logic circuits such as memory arrays are capable of being dynamically reconfigured from operating separately and in parallel to operating in a more collective manner to ensure that data associated with all of the logic circuits will be communicated irrespective of a failure in any of the interfaces. Specifically, a plurality of interfaces, each of which being ordinarily configured to communicate data associated with an associated logic circuit in parallel with the other interfaces, may be dynamically reconfigured, e.g., in response to a detected failure in one or more of the interfaces, to communicate data associated with each of the interfaces over each of at least a subset of the interfaces in a time multiplexed and replicated manner.
    Type: Grant
    Filed: November 19, 2008
    Date of Patent: March 9, 2010
    Assignee: International Business Machines Corporation
    Inventors: Gerald Keith Bartley, John Michael Borkenhagen, William Paul Hovis, Paul Rudrud
  • Patent number: 7668209
    Abstract: A digital broadcast transmitting/receiving system and a method for processing data are disclosed. The method for processing data may enhance the receiving performance of the receiving system by performing additional coding and multiplexing processes on the traffic information data and transmitting the processed data. Thus, robustness is provided to the traffic information data, thereby enabling the data to respond strongly against the channel environment which is always under constant and vast change.
    Type: Grant
    Filed: October 3, 2006
    Date of Patent: February 23, 2010
    Assignee: LG Electronics Inc.
    Inventors: Jin Pil Kim, Young In Kim, Ho Taek Hong, In Hwan Choi, Kook Yeon Kwak, Hyoung Gon Lee, Byoung Gill Kim, Jin Woo Kim, Jong Moon Kim, Won Gyu Song
  • Patent number: 7664077
    Abstract: In an information transmission method, a radio communications system, a base station and a mobile station, a TBS size, a modulation scheme and the number of codes in a multicode are converted into identification data having a relatively smaller data size before being transmitted to a destination of communication. The TBS size is identified by using, in combination, an identification code identifying a channelization code set, an identification code identifying a modulation scheme, and an identification code obtained by converting a combination of the number of codes in a multicode and a modulation pattern identification (TFRC) into a corresponding code. Accordingly, the data size for TBS size identification is reduced.
    Type: Grant
    Filed: January 12, 2006
    Date of Patent: February 16, 2010
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Michiaki Takano
  • Patent number: 7660334
    Abstract: A data storage system includes a first storage processor for storing and retrieving data from a data storage array for at least one host computer; a second storage processor, coupled to the first storage processor by a communication link, for storing and retrieving data from the data storage array for the at least one host computer; a number M of multiplexers, M being greater than one, each of the multiplexers being coupled to the first storage processor and the second storage processor for receiving data signals from the first storage processor and the second storage processor and transmitting the data signals to a disk drive device; a number A of arbiters, each being coupled to the first storage processor, the second storage processor and a number N of the plurality of multiplexers, for receiving arbiter control signals from the first storage processor and the second storage processor and transmitting multiplexer control signals to each of the number N of the plurality of multiplexers; and a midplane device
    Type: Grant
    Filed: June 28, 2004
    Date of Patent: February 9, 2010
    Assignee: EMC Corporation
    Inventors: Stephen E. Strickland, John V. Burroughs, Bassem N. Bishay, Steven D. Sardella
  • Patent number: 7660245
    Abstract: In a packet communications system stream data is transported over a channel over which packet loss or corruption is possible, with forward error correction (“FEC”) information. A transmitter receives source packets comprising source data, generates FEC source packets formatted to allow for identification of lost or corrupted source packets at a receiver, arranges source data from the source packets into a plurality of source symbols wherein at least one source packet is arranged into more than one source symbol, associates a plurality of source symbols with a source block, generates a plurality of repair symbols from the source block according to a predetermined FEC encoding process and groups the plurality of repair symbols into one or more FEC repair packets associated with the source block. A receiver can use the FEC repair symbols from the FEC repair packets to recover source symbols, as needed.
    Type: Grant
    Filed: September 16, 2005
    Date of Patent: February 9, 2010
    Assignee: QUALCOMM Incorporated
    Inventor: Michael Luby
  • Patent number: 7656323
    Abstract: An all-digital serializer-de-serializer includes an all-digital clock multiplier unit (CMU) circuit, an all-digital clock and data recovery (CDR) circuit, a multiplexer (MUX), and a demultiplexer (DeMUX). The all-digital clock and data recovery (CDR) circuit couples to the all-digital clock multiplier unit (CMU) circuit. The multiplexer (MUX), couples to all-digital clock multiplier unit (CMU) circuit, and serializes data. The demultiplexer (DeMUX), couples to the all-digital clock and data recovery (CDR) circuit, and de-serializes data.
    Type: Grant
    Filed: May 12, 2008
    Date of Patent: February 2, 2010
    Assignee: Altera Corporation
    Inventors: William W. Bereza, Tad Kwasniewski, Rakesh H. Patel
  • Patent number: 7656905
    Abstract: The invention provides an apparatus and method for transparently transporting four plesiochronous Gigabit Ethernet, Fibre Channel or other packet-based data signals over a network. Multiple plesiochronous Gigabit Ethernet data streams are aggregated onto an independent clock source at an ingress circuit through the use of transparent IDLE character insertion. The independent clock is selected such that the output data rate is greater than the composite input data rate of all the plesiochronous data streams. The signals are encapsulated with forward error correction and mapped to a reciprocal FEC interface prior to transport. An egress circuit at the receiving end recovers the modulated signal and extracts the data stream. Each independent data stream is mapped to a local clock domain via IDLE character insertion or removal. Therefore, the input and output signals are transparent and identical in content.
    Type: Grant
    Filed: December 24, 2003
    Date of Patent: February 2, 2010
    Inventors: Samir Sheth, Brian Royal, Kelly Hawkins
  • Patent number: 7656910
    Abstract: The present invention relates to network transmission technologies, and provide a Generic Framing Procedure (GFP)-based add/drop multiplexing (add/drop multiplexing) method, apparatus and system to improve add/drop multiplexing utilization, in which multiple Gigabyte Ethernet (GE) connections among multiple nodes are multiplexed in GFP to a byte synchronous interface for transmission, wherein a bandwidth of the byte synchronous interface is smaller than a sum of peak bandwidths of the group of GE connections borne on the byte synchronous interface; statistical multiplexing is carried out on effective data borne on the multiple GEs by means of buffers, and the effective data are treated by priority in the case of network congestion. The present invention implements statistical add/drop multiplexing for multiple data services in various types, and can be used in implementing a statistical ADM for diverse data services in burst mode, even a statistical ADM for multiple mixed services.
    Type: Grant
    Filed: May 24, 2007
    Date of Patent: February 2, 2010
    Assignee: Huawei Technologies Co., Ltd.
    Inventor: Congqi Li
  • Patent number: 7656809
    Abstract: A system for automatically planning firmware card ports on multiplexors in a DSL network is disclosed. The system is operable to query element management systems (EMS's) in a DSL network to identify the multiplexor devices that each of the EMS's is dedicated to managing. Thereafter, the system queries the multiplexor devices identified as being managed by a particular EMS for the planning status of the multiplexor's ports. Upon identifying unplanned ports, and those that are inconsistent with the prescribed plan, the system plans the ports consistent with a prescribed planning arrangement.
    Type: Grant
    Filed: September 5, 2006
    Date of Patent: February 2, 2010
    Assignee: AT&T Intellectual Property I, L.P.
    Inventors: Joel E. Cordsmeyer, Frederick Edwards, Robert J. Bates, James R. Miller, Kenneth D. Franklin
  • Publication number: 20100020831
    Abstract: An original blanking period of a video signal is shortened to a set blanking period, and audio data is multiplexed into a resulting superimposing period. Table distinguishing data indicating the length of the superimposing period is inserted into the period as a blanking signal. With this configuration, it is possible to enable transmission and reception of an audio signal in a system capable of transmitting and receiving a video signal.
    Type: Application
    Filed: September 28, 2009
    Publication date: January 28, 2010
    Applicant: Sony Corporation
    Inventor: Hiroshige Okamoto
  • Patent number: 7653089
    Abstract: The present invention provides methods and apparatus for reconfiguring protocol data for a multiplexed data stream which is reduced to carry fewer services for cable-side transmission in a cable television plant or the like. More particularly, the present invention provides methods and apparatus for reconfiguring protocol data for a desired combination of data streams contained within an incoming high data rate multiplexed data stream, such as a high data rate Quadrature Phase Shift Keying (QPSK) modulated multiplexed data stream, when the incoming multiplexed data stream is reduced.
    Type: Grant
    Filed: December 23, 2004
    Date of Patent: January 26, 2010
    Assignee: General Instrument Corporation
    Inventors: Arthur P. Jost, Erik Elstermann, Jeffrey D. Kuczynski-Brown, Richard DiColli, Jeffrey Paul Viola
  • Patent number: 7646789
    Abstract: In a communication system in which a plurality of communication terminals sequentially transfer data to a server during the respective transmission permissible periods assigned to the respective communication terminals, the communication terminal transfers a preamble for synchronization to the server at a time of starting the transmission permissible period, converts a data frame for every 8 bits into every 10 bit-code, and transmits to the server, the signal string with a code indicating the head added there, during the transmission permissible period, and turns a communication to the server into a zero signal state, during a period other than the transmission permissible period, while the server establishes a synchronization by reading the preamble for synchronization inserted into the signal string received from each of the communication terminals, converts a portion of the zero signal state of the signal string into a predetermined special code string, and inversely transforms the received signal string i
    Type: Grant
    Filed: January 28, 2003
    Date of Patent: January 12, 2010
    Assignee: NEC Corporation
    Inventors: Masaki Umayabashi, Satomi Shioiri, Kazuo Takagi, Makoto Shibutani
  • Patent number: 7646720
    Abstract: A remote service testing system comprising a service analyzer within an access network, a first enterprise network having a first plurality of nodes, and a first network extension coupled to the first enterprise network and the service analyzer. The service analyzer accesses the first enterprise network over the first network extension and performs test functions on the first plurality of nodes.
    Type: Grant
    Filed: October 6, 2004
    Date of Patent: January 12, 2010
    Assignee: Sprint Communications Company L.P.
    Inventor: Michael K. Bugenhagen
  • Patent number: 7643519
    Abstract: Embodiments of apparatuses, articles, methods, and systems for pre-processing and packetizing data for transmission in accordance with a transmission protocol are generally described herein. Other embodiments may be described and claimed.
    Type: Grant
    Filed: March 29, 2006
    Date of Patent: January 5, 2010
    Assignee: Intel Corporation
    Inventors: Steve Devereux, Rodney B. Rubert, Timothy Verrall
  • Patent number: 7643465
    Abstract: A system for adding a time stamp to transmission traffic on a wireless network comprises a front end processor that receives a packet from the network and generates a Start Of Frame pulse and a LENGTH field corresponding to a length of the packet. A time stamp generator generates a time stamp by sampling the system master time counter. A synchronizer receives the SOF pulse and the LENGTH field from the front end processor, and generates a control signal. A multiplexer inputs the packet from the front end processor, the control signal and the time stamp, and outputs a modified packet with a field in the packet replaced by the time stamp.
    Type: Grant
    Filed: April 13, 2007
    Date of Patent: January 5, 2010
    Assignee: Broadcom Corporation
    Inventors: John Lorek, David R. Dworkin
  • Patent number: 7636375
    Abstract: A method and system for transferring to a same client terminal at least a first flow with a first service quality and at least a second flow with a second service quality. The first flow is transmitted to the client terminal through an unconnected network, and the second flow is transmitted to the client terminal by a content server through a connected network after network resource booking with service quality by exchanging messages via the unconnected network. The method establishes a high throughput link between the client terminal and the content server, and transmits the second flow with the booked service quality to the client terminal through the high throughput link.
    Type: Grant
    Filed: February 3, 2003
    Date of Patent: December 22, 2009
    Inventors: Christophe Delesalle, Stephane Statiotis, Christian Wipliez