Abstract: A method of channel estimation of a mobile communication system based on a time division pilot field is disclosed. The method uses a transmitting end that transmits a time division pilot sequence having a cyclic prefix and a receiving end that transforms the time division pilot sequence into frequency domain using a fast Fourier transform module. Channel estimation is performed to obtain a channel frequency response estimation result. The receiving end transforms the channel frequency response estimation result back into time domain and obtains a channel impulse response estimation result.

Abstract: An adaptive receiver equalizes incoming data expressed as a series of symbols, the degree of equalization being adjusted by some adaptive control logic. An amplitude detector samples the amplitude of the eye openings of incoming symbols and conveys the resulting measures of eye amplitude to the adaptive control logic. The control logic experiments with different equalization settings while monitoring the resulting eye amplitude to find the equalization setting that provides incoming data eyes of the highest amplitude. A data filter may be included to enable the amplitude detector only in response to particular incoming data patterns.

Abstract: A method and accompanying system are disclosed for tuning each channel of a high-speed SerDes link interface arranged in a configuration linking a local side to a remote side. The method includes transmitting a flow control packets from the local side to the remote side to change remote side transmission characteristics in a link channel; monitoring the bit error rate (BER) in the link channel; transferring additional flow control packets to adjust the remote side transmission characteristics; and processing the BER data at the local side to generate the remote side transmission characteristics for the link channel.

Abstract: In a receiver with a multi-stage equalizer, such as an SLI equalizer, cumulative symbol estimates generated in one or more early stages of the equalizer are used as effective pilot symbols to improve channel estimation for later stages.

Abstract: An apparatus comprising an analog filter, an analog to digital converter coupled to said analog filter; and a digital filter coupled to said analog to digital converter; wherein the apparatus is configured such that distortion introduced into a filtered signal by said analog filter is substantially compensated by said digital filter.

Abstract: A receiving system and method of processing a broadcast signal is provided. The receiving system includes a signal receiving unit, a known sequence detector, a channel equalizer, a block decoder, and an error correction unit and receives a broadcast signal including mobile service data and a data group including multiple known data sequences. The known sequence detector detects the multiple known data sequences. The channel equalizer repetitively updates equalization coefficients and filters up to a pre-determined number of iterations based upon the detected known data sequences and converges the equalization coefficient. The channel equalizer interpolates or extrapolates using the converged equalization coefficients and channel-equalizes the mobile service data. The block decoder performs turbo-decoding in block units on the channel-equalized mobile service data. The error correction unit performs error correction decoding on the decoded mobile service data to correct errors in the mobile service data.

Abstract: Interference carrier regeneration and interference cancellation involve generating a Cross Polarization Interference Cancellation (XPIC) error signal representative of a difference between a first signal derived from a first communication signal that is received over a wireless communication link and a first symbol decision that is based on the first signal. The first communication signal is affected by interference from a second communication signal, on an orthogonal polarization channel of the same nominal frequency channel, for example. Based on the XPIC error signal and a second symbol decision for the second communication signal, a carrier of interference affecting the first signal from the second communication signal is regenerated. A rotation and derotation arrangement rotates a cross-channel interference signal and derotates a main channel equalizer feedback signal based on the regenerated interference carrier.

Abstract: Wireless communication receiver with hybrid equalizer and RAKE receiver. The receiver compares performance of the system for RAKE only and RAKE in combination with equalizer estimates. The receiver enables or disables the equalizer accordingly.

Abstract: A method and apparatus for transmitting and receiving a space block coding signal through Iterative Multi-user Detection is provided. The apparatus includes a multi-user interference cancellation unit which cancels multi-user interference in a received signal and outputs a first signal and a second signal that are sequentially transmitted from two transmitting antennas, a linear combiner which performs linear combination for the first signal and the second signal, and an equalizer which applies different equalization coefficients to the combined first signal and the second signal, respectively, to perform frequency-domain equalization.

Abstract: A DFE circuit for use in a semiconductor memory device and an initializing method thereof. In the method of initializing a DFE circuit used in a semiconductor memory device having a discontinuous data transmission, the DFE circuit may be used for changing a sampling reference level in response to a level of previous data and sampling transmission data. The method includes terminating a data channel having a transmission of the transmission data at a predefined termination level, and controlling a sampling start time point of the transmission data as a time point preceding a transmission time point of the transmission data by a predefined time. Further, an initialization may be performed of the previous data on the basis of initialization data obtained through a pre-sampling of the data channel at a sampling start time point of the transmission data, thereby obtaining an initialization of the DFE circuit and compensating for a feedback delay.

Abstract: Apparatus, and an associated method, for the receive part of a receiving station, such as a mobile station or other transceiver of a cellular communication system. Selection is made of filter characteristics to be exhibited by an adaptive, input noise whitening filter. A noise estimator estimates a noise component of a noise sequence. An autocorrelation estimator estimates the noise-component autocorrelation. A determination is made as to whether the autocorrelation exceeds a threshold. If so, filter characteristics are selected to cause the input noise whitening filter to operate to inject whitening noise into the received sequence.

Abstract: Decision feedback equalizer (“DFE”) circuitry bases determination of the coefficients that are used in its various taps on the algebraic sign of the current value of an error signal and prior serial data signal values output by the DFE circuitry. Use of such algebraic sign information (rather than full error signal values) greatly simplifies the circuitry needed to determine the tap coefficients. The DFE circuitry can be adaptive, i.e., such that it automatically adjusts the tap coefficients for changing serial data signal transmission conditions.

Abstract: A communication device is provided for receiving a packet including a preamble part having a continuous waveform, a sync part having a specific pattern and a data part, which has been modulated by changing electrical load. The communication device includes: a preamble detection unit for detecting the preamble part from a received signal to extract sampling timing based on the continuous waveform; a sync detection unit for detecting the sync part from the received signal based on the sampling timing to output a timing signal indicating a start position of the sync part; a delay buffer for giving a delay to the received signal so that the head of the sync part is not outputted until the detection of the sync part is determined; an adaptive equalization unit for performing adaptive equalization using the sync part based on the timing signal by inputting the delayed received signal; and a decoding unit for performing decoding processing of an equalized output signal from the adaptive equalization unit.

Abstract: A wireless communication system is provided having a transmitter, having a modulation unit for performing a frequency shift keying modulation wherein an output of the modulation unit is bundled into data blocks. The communication system furthermore comprises a cyclic prefix adding unit for adding a cyclic prefix (CP) into each data block of an output of the modulation unit.

Abstract: A stochastic signal generation circuit includes a signal output circuit and a signal processing circuit connected with the signal output circuit. The signal output circuit includes two matching semiconductor components, wherein the signal output circuit detects a slight mismatch between the two matching semiconductor components, converts the detected slight mismatch into a corresponding electric signal, amplifies the electric signal, and outputs an analog voltage signal. The signal processing circuit converts the analog voltage signal into a stochastic digital signal. Also, a method for generating a stochastic signal is provided. The present invention decreases the cost of the integrated circuit, and better ensures the information security of the electronic products.

Abstract: System and method for equalizing an orthogonal frequency division multiplexed signal having been encoded by spreading subcarriers in the frequency domain using orthogonal codes includes receiving the signal at a receiver (300), demodulating the signal to produce demodulated information, producing a spread frequency domain representation of the demodulated information, determining an equalized representation by adjusting the power and phase of the spread frequency domain representation at least one frequency based on adjustment values, de-spreading the equalized spread frequency domain representation using the orthogonal codes to produce a de-spread frequency domain representation including received subcarriers, determining a subcarrier value for each of the received subcarriers, orthogonally spreading the determined subcarrier values using the orthogonal codes to produce a model spread frequency representation, calculating expected error values based upon the model spread frequency representation and the equa

Abstract: The present invention relates to a waveform equalizer and a method for controlling the same, as well as a receiving apparatus and a method for controlling the same whereby better receiving characteristics are provided than before. In a filter 28, registers 911 through 915 delay an input DT1; multipliers 920 through 925 multiply outputs from the registers by filter coefficients C20 through C25 respectively; and adders 931 through 935 add up outputs from the multipliers to acquire DT2. A selector 81 either outputs a timing signal at intervals of a symbol period of DT1 to drive the filter 82 as a symbol rate equalizer, or outputs the timing signal at intervals of half the symbol period to operate the filter 82 as a fractionally spaced equalizer. The present invention may be applied to waveform equalizers performing waveform equalization of the input signal.

Abstract: A method of compensating interference of received symbols in a MIMO OFDM receiver employs MMSE equalization and LLR scaling, and a MIMO OFDM receiver includes a linear MMSE equalizer. The method provides a low-complexity, numerically robust method for compensating interference of received symbols and provides a low-cost, robust digital baseband receiver for MIMO-OFDM, achieved by merging linear MMSE equalization and scaling of the corresponding equalized symbols into a single algorithm that, for the 2×M MIMO case, completely avoids computationally extensive matrix inversion and allows for significant simplification of symbol detection as compared to separate equalization and scaling.

Abstract: Techniques are described to adaptively adjust the equalizer settings of each transmitter in a transmitter-receiver pair. The transmitter-receiver pair can be used at least with implementations that comply with 40GBASE-CR4 or 100GBASE-CR10. For implementations that comply with 40GBASE-CR4, equalizer settings of four transmitters may be independently established.

Abstract: A method and circuit that gives a sequence pattern that represents directions of positive and negative transitions of the phase that continue over a predetermined number from a certain reference symbol to an adjoining next reference symbol; finds (heuristically) one or more interpolate symbols that meet conditions (such as standards for power spectra) of a predetermined frequency spectrum, i.e., band, and a predetermined (range of) amplitude with reference to the given sequence pattern; and stores the found sequence pattern and a phase value and an amplitude value corresponding to the found one or more interpolate symbols in a memory as a lookup table against the prepared memory area.

Abstract: A coding scheme selection unit outputs bits of a signal in a past reception to a second coding unit and outputs bits of a retransmission signal to a third coding unit. The second coding unit decodes bits. The third coding unit codes bits with a different constraint length from a constraint length in the second coding unit.

Abstract: Disclosed is a MIMO receiving apparatus in which a residual interference calculation unit (17) inputs noise-suppressed frequency domain channel estimation values, output from FFT units (12-1-1 to 12-M-N), equalizing weights calculated by a weight calculating unit (13), equalized signals from equalization processing by an equalization filter (14) and reference signals generated by reference signal generating units (16-1 to 16-M) to calculate a residual interference, and the likelihood correction units (18-1 to 18-M) receive time domain equalized signal from the IDFT units (15-1 to 15-M) and the residual interference calculated by the residual interference calculation unit (17) to correct the likelihood of the equalized signal (FIG.1).

Abstract: Disclosed is a symbol timing recovery circuit which includes an interpolator to generate, using a first filter, interpolation data of an input signal; a forward equalizer to eliminate, using a second filter, a forward interference wave from the input signal based on the interpolation data, and to output the resultant signal after the elimination, a first identification signal, and a first error signal; a backward equalizer to eliminate, using a third filter, a backward interference wave from the input signal based on the interpolation data, and to output the resultant signal after the elimination, a second identification signal, and a second error signal; and a timing recovery unit to generate a tap coefficient of the first filter, based on a tap coefficient of the second filter, a tap coefficient of the third filter, the first identification signal, the first error signal, the second identification signal, and the second error signal.

Abstract: A wireless modem and noise cancellation method for the same for noise cancellation effectively cancels a noise signal induced from a device to which the wireless modem is connected. A primary antenna receives a radio signal that includes a first noise signal coming from a device to which the wireless modem is connected; a secondary antenna receives a second noise signal from the connected device; a noise signal adjuster for adjusting the second noise signal received by the secondary antenna using a correlation parameter between noise signals received by the primary antenna and the secondary antenna; and a noise remover subtracts the noise signal adjusted by the noise signal adjuster from the radio signal received by the primary antenna.

Abstract: A tunable equalizer with a tunable equalizer frequency response is provided. The tunable equalizer includes an amplifier circuit for amplifying input signals and a tunable circuit coupled to the amplifier circuit. The tunable circuit is arranged to provide a zero point in the equalizer frequency response and the zero point is adjusted according to a controllable value. When the controllable value varies according to a uniform offset, the corresponding zero point varies according to a non-uniform offset.

Abstract: A channel equalizer arranged to receive a data signal encoded by a plurality of amplitude levels, the circuitry including a filter having a plurality of taps, each tap generating an output signal based on a coefficient, an input for receiving an error signal for adapting the coefficients, and an output for outputting a filtered signal; and blind error generation circuitry arranged to generate the error signal, the blind error generation circuitry including: error estimating circuitry arranged to estimate the error of the filtered signal based on maximum likelihood; and adding circuitry coupled to the error estimating circuitry and to the output of the filter and arranged to add at least part of the filtered signal to the error estimated by the error estimating circuitry to generate the error signal.

Abstract: A method of processing a digital broadcast signal includes Reed-Solomon (RS) encoding enhanced service data for each column of at least one RS frame payload and adding a Cyclic Redundancy Check (CRC) checksum byte at a right end of each row of the at least one RS frame payload to build at least one RS frame and forming data groups including the enhanced service data in the built RS frame and a plurality of known data sequences. Forming the data groups includes mapping the RS encoded enhanced service data into each of the data groups and inserting a place holder for a non-systematic RS parity into each of the data groups. The method further includes deinterleaving data in each of the data groups including the enhanced service data and the place holder and multiplexing the enhanced service data in each of the formed data groups with main service data.

Abstract: A data receiving device, for receiving digital data via a differential signal transmission path made up of two or more channels including one channel of a reference clock, includes a digital data receiver configured to receive various data channel signals transmitted from the transmitter side to the differential signal transmission path, a reference clock receiver configured to receive a reference clock transmitted from the transmitter side to the differential signal transmission path, and a transmission loss rate determining unit configured to determine between degree of magnitudes of transmission loss with the reference clock, based on waveform deterioration resulting from the reference clock receiving at the reference clock receiving unit having passed through the differential signal transmission path.

Abstract: A Decision Feedback Equalizer (DFE) capable of preventing incremental increases of a jitter of a recovered clock and reduction of a voltage margin of decided data due to delay of feedback data. The DFE includes a combiner for combining received data with feedback data and outputting the combined data as equalization data, a decision circuit for deciding recovery data by receiving the equalization data, a feedback loop for supplying the recovery data to the combiner as feedback data and a clock recovery circuit for removing a delay data component from the equalization data through the feedback loop, recovering a clock with respect to the other equalization data except the delay data component and supplying the recovered clock for decision operation of the decision circuit.

Abstract: Aspects of a method and system for selective equalization enablement based on modulation type are disclosed. One such method includes receiving a signal via an RF channel, detecting a modulation type of the signal, and selecting an equalization circuit for processing the signal based on the modulation type.

Abstract: An integrated circuit having a filter apparatus for filtering a first symbol sequence is disclosed. The first symbol sequence has a predetermined symbol duration. The apparatus includes at least one delay device which is clocked in accordance with a clock, and configured to delay the first symbol sequence by a delay time. A relationship between the delay time of the delay device and a clock duration of the clocked delay device has a predetermined value which is not equal to the one.

Abstract: A method for communication includes receiving signals at a receiver from one or more sources, including a target signal transmitted by a given transmitter. A channel response is estimated from the given transmitter to the receiver, and a filter response is computed by taking a sum of an autocorrelation of the received signals with an adaptive noise factor, and applying the sum to the estimated channel response. The filter response is applied to the received signals in order to recover the target signal.

Abstract: A folding adaptive equalizer is provided. The equalizer comprises an equalizer core and an automatic gain control loop. The equalizing transfer function of the equalizer core is modulated by one or more gain control signals generated by the automatic gain control loop and by a folding signal generated by the automatic gain control loop. When the folding signal is inactive, an increase in the gain control signals produces an increase in the high-frequency, high-bandwidth gain of the transfer function of the equalizer core. When the folding signal is active, further gain can be applied by decreasing the gain control signals, which produces a frequency-shift in the transfer function of the equalizer core toward lower bandwidth and an increase in the high-frequency, low-bandwidth gain of the transfer function of the equalizer core.

Abstract: Methods and systems for processing signals in a receiver are disclosed herein and may include updating a plurality of filter taps utilizing at least one channel response vector and at least one correlation vector, for a plurality of received clusters, based on initialized values related to the at least one channel response vector and the at least one correlation vector. At least a portion of the received signal clusters may be filtered utilizing at least a portion of the updated plurality of filter taps. The update may be repeated whenever a specified signal-to-noise ratio (SNR) for the received signal clusters is reached. The initialized values may be updated during a plurality of iterations, and the update may be repeated whenever a specified number of the plurality of iterations is reached.

Abstract: A multi-phase partial response equalizer circuit includes sampler circuits that sample an input signal to generate sampled signals in response to sampling clock signals having different phases. A first multiplexer circuit selects one of the sampled signals as a first sampled bit to represent the input signal. A first storage circuit coupled to an output of the first multiplexer circuit stores the first sampled bit in response to a first clock signal. A second multiplexer circuit selects one of the sampled signals as a second sampled bit to represent the input signal based on the first sampled bit. A second storage circuit stores a sampled bit selected from the sampled signals in response to a second clock signal. A time period between the second storage circuit storing a sampled bit and the first storage circuit storing the first sampled bit is substantially greater than a unit interval in the input signal.

Abstract: A system and apparatus are disclosed for a method and apparatus for equalizing signals. An apparatus that incorporates teachings of the present disclosure may include, for example, an equalizer (100) having a channel estimation calculator (102) for calculating a time domain channel estimation from a baseband signal, an FFT processor (104) for translating the time domain channel estimation to a frequency domain channel estimation, a tap weight calculator (106) for calculating a frequency domain tap weight according to the frequency domain channel estimation, an inverse FFT processor (108) for translating the frequency domain tap weight calculation to a time domain tap weight calculation, and a filter (110) for equalizing the baseband signal according to the time domain tap weight calculation.

Abstract: An exemplary method is disclosed to accurately estimate the center frequency of a narrow-band interference (NBI). The exemplary method uses multi-stage autocorrelation-function (ACF) to estimate an NBI frequency. The exemplary method allows an accurate estimation of the center frequency of NBI in an Ultra-Wideband system. A narrow band interference (NBI) estimator based on such a method allows a low complexity hardware implementation. The exemplary method estimates the frequency in multiple stages. Each stage performs an ACF operation on the received signals. The first stage gives an initial estimation and the following stages refine the estimation. The results of all stages are combined to produce the final estimation. An apparatus based on such a multi-stage narrow band interference frequency detector is also disclosed to improve the accuracy by combining various filters with the detector.

Abstract: A method of equalizing a signal received over transmission channel defined by BEM coefficients of a basis expansion model of its channel taps, comprising the step of approximately solving the relation (I) for x[n] by an iterative method, n being the index of time, y[n] being the received signal, x[n] being the equalized signal, Bm[n] being the mth basis function of the basis expansion model, M being the model order of the basis expansion model, and blm, being the BEM coefficient of the mth of the basis function of the /th channel tap, and w[n] being optional noise.

Abstract: A receiver for receiving a data signal having a channel profile may include an equalizer, to which the data signal is feedable, the equalizer having a plurality of filters and a switching device coupled to the filters, a selection device, which is disposed such that it determines a first number and a second number in dependence on the channel profile, and the switching device is disposed such that it connects a number of linear filters corresponding to the first number to form a first overall filter and connects a number of linear filters corresponding to the second number to form a second overall filter.

Abstract: A receiver including an input module, a computation module, and an equalizer module. The input module is configured to receive a message from a wireless communication channel. The message includes multiple training fields. The computation module is configured to recursively compute equalizer parameters, as the training fields are being received, based on the training fields and a channel estimation matrix. The equalizer module is configured to apply the equalizer parameters to the message to recover user data.

Abstract: For the first wireless base station, a first correlation value based on a calculation result on channel estimation values having an identical signal timing and a calculation result on channel estimation values having different signal timings, and determines, for the second wireless base station, a second correlation value based on a calculation result on channel estimation values having an identical signal timing, and controls the weighting-adding at the equalizer based on these correlation values.

Abstract: An adjustable equalizer that includes a first branch including a low pass filter (LPF) typically having a variable gain (?), and a second branch including a high pass filter (HPF) typically having another variable gain (?). Outputs of the branches in response to an input signal are summed to produce an equalized output. The equalizer can be implemented using CMOS technology and can be capable of equalizing an input indicative of data having a maximum data rate of at least 1 Gb/s. Typically, the equalizer is embodied in a receiver for use in equalizing a signal, indicative of video or other data, that has propagated over a serial link to the receiver.

Abstract: Embodiments of an apparatus and method for selective SC equalization are provided. Multipath propagation in a communication channel often changes, and the severity of multipath propagation is often below worst case conditions supported by a SC communication device. When multipath propagation is less severe and below worst conditions, the use of FDE in a SC receiver to mitigate ISI can be overkill and can result in excess power being consumed. The excess power consumption can be attributed to the general inability of the structure used to perform FDE to scale in terms of performance with channel conditions. Embodiments of the apparatus and method for performing selective equalization in a SC receiver allow either FDE or TDE to be performed based on the current multipath propagation conditions of a communication channel. In general, TDE is used in place of FDE to conserve power when channel conditions permit.

Abstract: Disclosed is an OFDM wireless communication system comprising an access point, and a plurality of remote user terminals. The access point receives one or more training symbols transmitted by the user terminals, each training symbol comprising pilot symbols associated with phase offset estimation OFDM sub-carriers of said training symbol, the phase offset estimation sub-carriers comprising subsets of sub-carriers associated with respective user terminals, wherein each subset is used exclusively by the associated user terminal during channel estimation, and further symbols associated with channel estimation OFDM sub-carriers of said training symbol, wherein the channel estimation sub-carriers are used by all user terminals.

Abstract: A method and apparatus for multi-user detection is disclosed. A signal is received in a shared spectrum, and samples of the received signals are produced as a received vector. The received vector is segmented into vector segments. Each segment has a portion that overlaps with another segment and the overlapping portion includes at least one chip less than twice a channel impulse response length. For each vector segment, symbols are successively determined for communications by determining symbols for a communication in the communications, ordering the communications by received power and removing a contribution of the communication from the vector segment. The determining of symbols includes equalizing an input vector corresponding to a segment of the received vector using fast Fourier transform. The determined symbols are assembled into a data vector for each communication in the communications.

Abstract: A network receiver and the adjusting method thereof, the network receiver includes a first delay unit, a second delay unit, a first processing unit and an adjusting circuit. The first delay unit is for delaying a first signal received from a first transmission line to generate a delayed first signal. The second delay unit is for delaying a second signal received from a second transmission line to generate a delayed second signal. The first processing unit is for processing a difference between the delayed first signal and the delayed second signal to generate first data. The adjusting circuit adjusts the first and second delay units to have a plurality of delay amount combinations, the first processing unit generates a plurality of first data respectively corresponding to the delay amount combinations, and the adjusting circuit adjusts delay amount of the first and second delay units according to the first data.

Abstract: A receiver and method are described herein that address inter-symbol interference in a received signal by using a two-stage equalizer which includes a first demodulation stage that processes the received signal and produces initial symbol decisions, and a non-linear equalization second stage that uses the received signal to perform a sequential search in an attempt to improve upon the initial symbol decisions where if able to improve upon the initial symbol decisions then an output sequence is obtained from the sequential search and if not able to improve upon the sequence metric threshold then the output sequence is the initial symbol decisions.

Abstract: A receiver for a telecommunications system in which a data signal is transmitted using a closed loop transmit diversity system and a pilot signal is transmitted using a space time transmit diversity system, the receiver comprising an equalizer for equalising a signal received by the receiver, wherein the equalizer is configured to produce an equalized signal in which effects caused by a propagation channel through which the data signal was transmitted are alleviated, the receiver further comprising a processor for processing the equalized received signal to recover the pilot signal.

Abstract: An equalizer includes an oversampling logic unit, a direct current setting unit, and an alternating current setting unit. The oversampling logic unit oversamples data from a channel to generate a plurality of direct current terms and a plurality of alternating current terms according to an oversampling clock, and outputting a plurality of direct current terms corresponding to an output clock and a plurality of alternating current terms corresponding to the output clock according to the output clock. The direct current setting unit adjusts a direct current setting of the equalizer according to a plurality of direct current terms inputted by the oversampling logic unit within a first predetermined time. And the alternating current setting unit adjusts an alternating current setting of the equalizer according to a plurality of alternating current terms inputted by the oversampling logic unit within the first predetermined time.

Abstract: As disclosed herein, a “super receiver” structure enriches the information provided for decoding modem bits included in a received sequence of symbols. In particular, an equalizer circuit provides joint metrics to a decoder circuit, where the joint metrics advantageously reflect joint bit probabilities. However, the metrics are computed without need for complex joint probability calculations. The decoder circuit “fuses” the joint metrics with corresponding side information, which indicates the likelihood that one or more bits represented by the joint metric take on a particular value. Such fusing biases the soft value estimation for the other bits represented by the joint metric, thus enabling the decoder to operate on refined soft values in its bit decoding operations.