Equalizers Patents (Class 375/229)
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Patent number: 8724687Abstract: A data processing method, an equalizer, and a receiver in a wireless communication system including a relay station are provided. The data processing method includes: receiving a base station signal from a base station; receiving a relay station signal from a relay station; determining a propagation delay between the base station signal and the relay station signal; generating an equalizing signal in which interference generated between the base station signal and the relay station signal is alleviated in consideration of the propagation delay; and recovering information bits transmitted by the base station from the equalizing signal. According to an exemplary embodiment of the present invention, it is possible to alleviate performance deterioration due to an interference problem generated in a relay system.Type: GrantFiled: April 6, 2012Date of Patent: May 13, 2014Assignee: Electronics and Telecommunications Research InstituteInventors: Young Jo Bang, Hyeong Sook Park, Eon Young Hong, Kyung Yeol Sohn, Jun Woo Kim, Youn Ok Park, Jae Kwon Kim
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Patent number: 8724685Abstract: An apparatus and a method for interference cancellation in a Multiple Input Multiple Output (MIMO) wireless communication system. The method for interference cancellation includes equalizing first reception signals received through two or more reception antennas to estimate transmission signals transmitted through two or more transmission antennas, generating two or more second reception signals in which a mutual interference between the transmission signals is removed from the first reception signals by using the estimated transmission signals, independently equalizing the generated two or more second reception signals, and combining the independently equalized two or more second reception signals to estimate a transmission signal in which an interference is removed.Type: GrantFiled: October 21, 2011Date of Patent: May 13, 2014Assignees: Samsung Electronics Co., Ltd., Korea University Research and Business FoundationInventors: Young-Min Ki, Byonghyo Shim, Jong-Yoon Hwang, Seung-Hwan Won, Chae-Man Lim
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Publication number: 20140126621Abstract: A communications receiver includes an antenna, and a burst signal acquisition circuit coupled to the antenna to detect a burst signal received over a wireless communications channel. The burst signal has a burst structure that includes channel-corrupted known preamble bits, channel-corrupted known probe bits and channel-corrupted unknown data bits. A channel estimator is coupled to the burst signal acquisition circuit to generate a-priori a gain vector based on uncorrupted known probe bits, and to perform a recursive least squares (RLS) operation to determine an impulse response of the wireless communications channel based on the channel-corrupted known probe bits and the gain vector. A maximum likelihood sequence estimator (MLSE) or equalizer is coupled to the channel estimator and the burst signal acquisition circuit.Type: ApplicationFiled: November 2, 2012Publication date: May 8, 2014Applicant: Harris CorporationInventors: Joseph B. Shaver, John Wesley Nieto, Michael Patrick Snook
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Publication number: 20140126622Abstract: In one embodiment, a method includes applying, by a transimpedance amplifier at a receiving end of a communication link, equalization to a signal carried by the communication link at the receiving end of the communication link.Type: ApplicationFiled: November 6, 2012Publication date: May 8, 2014Applicant: Fujitsu LimitedInventors: Scott McLeod, Nikola Nedovic
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Patent number: 8718197Abstract: A receiver includes an equalizer and a decoder which decodes data from a signal. The signal is based upon an output of the equalizer. The receiver also includes an encoder, which re-encodes the decoded data, and an error generator, which generates an error vector based upon the signal and the encoded data and which weights the error vector according to a reliability that the decoder accurately decoded the data from the signal. A controller controls the equalizer in response to the weighted error vector.Type: GrantFiled: January 13, 2003Date of Patent: May 6, 2014Assignee: Zenith Electronics LLCInventors: Richard W. Citta, Peter Ho
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Publication number: 20140119422Abstract: An equalizer includes a multi-layer printed circuit board, an equalizing module, a first ground via, and a second ground via. The equalizing module includes two inputs, first and second signal vias, first and second resistors, two outputs, first and second microstrip lines. The first microstrip line extends from a side of a pad, which is connected to the first signal via and a bottom layer of the printed circuit board. The first microstrip line is bent and connected to a pad, which is connected to a first terminal of the second resistor. The second microstrip line extends from a side of a pad, which is connected to the second signal via and a bottom layer of the printed circuit board. The second microstrip line is bent and connected to a pad, which is connected to a second terminal of the second resistor.Type: ApplicationFiled: October 30, 2013Publication date: May 1, 2014Applicant: HON HAI PRECISION INDUSTRY CO., LTD.Inventors: EN-SHUO CHANG, PO-CHUAN HSIEH
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Patent number: 8711964Abstract: A method and an apparatus for pre-scheduling in a closed-loop multiple user multiple input multiple output (MU-MIMO) antenna system. A base station receives channel information representing a downlink channel condition of each mobile station from mobile stations in a cell, and determines a candidate user group for each of frequency bands included in an entire frequency band, based on the channel information, the candidate user group including mobile stations to which resources can be simultaneously allocated. The base station also instructs a mobile station included in each candidate user group to transmit a sounding signal through a corresponding frequency band. If the sounding signal is received through the corresponding frequency band, the base station performs a scheduling with regard to the mobile station included in each candidate user group.Type: GrantFiled: February 2, 2011Date of Patent: April 29, 2014Assignee: Samsung Electronics Co., Ltd.Inventors: Seung-Won Kang, Sung-Woo Park, Soon-Young Yoon, Keun-Chul Hwang
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Patent number: 8711917Abstract: A sampling filter device wherein the filter characteristic is variable without using a control signal of a complicated waveform is provided. A sampling filter device 105 has integration capacitors 130 and 131, an integration time adjustment section 180, and a plurality of switches 100, 101, 110, and 111. Input current is integrated in different time duration with one clock and is stored in the integration capacitors 130 and 131 and charges stored in the integration capacitor from several clocks before to one clock before are added and the result is output. When charge is stored in the integration capacitors 130 and 131 with each clock, the integration time duration is changed, whereby it is made possible to weight and add output charge and the filter characteristic changes.Type: GrantFiled: January 16, 2009Date of Patent: April 29, 2014Assignee: Panasonic CorporationInventors: Satoshi Tsukamoto, Noriaki Saito, Katsuaki Abe, Kentaro Miyano, Yoshifumi Hosokawa, Yasuyuki Naito
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Patent number: 8712336Abstract: A method is described for controlling a data unit receiver or a data unit sender. The data unit receiver or sender comprise a gap response procedure for responding to gaps in the sequence of data units received at the receiver. A reordering detection procedure S12 is provided for detecting a reordering indication indicative of a potential re-ordering of data units in the course of a transmission from sender to receiver, and the gap response procedure is adapted in response to detecting a re-ordering indication.Type: GrantFiled: June 9, 2004Date of Patent: April 29, 2014Assignee: Telefonaktiebolaget L M Ericsson (Publ)Inventors: Henning Wiemann, Joachim Sachs, Michael Meyer
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Patent number: 8711988Abstract: A demodulator is provided that functions as a reduced-state equalizer and produces reliable soft bit values. According to an embodiment, soft bit values are generated for a sequence of transmitted symbols using a demodulator by updating an M-state trellis managed by the demodulator responsive to a transition from symbol time n?1 to symbol time n, where M is a function of the number of bits per symbol in the sequence of transmitted symbols. Survivor metrics associated with the M states of the trellis are saved each symbol time so that the demodulator can calculate soft bit values with regard to transitions from symbol time n+D?1 to symbol time n+D. The trellis is traced back through to calculate soft bit values for a symbol detected at symbol time n?D based on survivor metrics saved for the M states at symbol time n?D.Type: GrantFiled: September 11, 2012Date of Patent: April 29, 2014Assignee: Telefonaktiebolaget LM Ericsson (Publ)Inventor: Dayong Chen
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Patent number: 8711922Abstract: A multi-phase partial response equalizer is disclosed. The equalizer includes receiver circuitry to receive a data symbol over N bit intervals and to generate N sets of samples in response to N clock signals having different phases. A first storage stage is provided, including storage elements to store the sets of samples during a common clock interval. First and second selection circuits are respectively coupled to an input and an output of the first storage stage. An output storage stage is coupled to the second selection circuit to store an output sample. The first and second selection circuits, over multiple clock intervals, cooperatively select the output sample from one of the sets of samples based on a most recent previous output sample.Type: GrantFiled: April 7, 2011Date of Patent: April 29, 2014Assignee: Rambus Inc.Inventors: Jie Shen, Ting Wu, Kun-Yang (Ken) Chang
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Patent number: 8711906Abstract: In described embodiments, a transceiver includes an eye monitor and margin detector having one or more samplers with corresponding logic. One or more programmable provisioning parameters are defined based on a pre-defined minimum target operating margin for acceptable noise and jitter margins. For example, two programmable provisioning parameters, phase and voltage, correspond with thresholds for margin samplers placed within the eye. Initially, the transceiver applies equalization, after which an inner eye of the transceiver, as detected by the eye monitor, is relatively open with some margin for supporting channels. If the receiver margin goes below this target margin, the eye closes, which is registered by the samplers. In the presence of spectrally rich input data, if the receiver margin goes below this target margin, an updated adaptation of equalizer or other circuit parameters might be initiated; else, adaptation is not generally required.Type: GrantFiled: November 8, 2010Date of Patent: April 29, 2014Assignee: LSI CorporationInventors: Mohammad Mobin, Ye Liu, Amaresh Malipatil
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Patent number: 8711919Abstract: Various embodiments described herein are directed to methods and systems for blind mode adaptive equalizer system to recover complex valued data symbols from the signal transmitted over time-varying dispersive wireless channels. For example, various embodiments may utilize an architecture comprised of a channel gain normalizer, a blind mode equalizer with hierarchical structure (BMAEHS) comprised of a level 1 adaptive system and a level 2 adaptive system, and an initial data recovery subsystem. The BMAEHS may additionally be comprised of an orthogonalizer for providing a faster convergence speed. In various architectures of the invention, the BMAEHS may be replaced by a cascade of multiple equalizer stages for providing computational and other advantages. Various embodiments may employ either linear or decision feedback configurations. In the communication receiver architectures, differential encoders and decoders are presented to resolve possible ambiguities.Type: GrantFiled: March 29, 2012Date of Patent: April 29, 2014Inventor: Rajendra Kumar
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Patent number: 8711916Abstract: A method of initializing tap coefficients of an equalizer may include estimating impulse response coefficients of a channel through which a received signal traveled based on a known portion of the received signal. The method may also include loading the impulse response coefficients into a channel filter and generating a reference signal. The reference signal may be passed through the channel filter to build a training signal. Tap coefficients of the equalizer may be adjusted based on the training signal from the channel filter and on a delayed version of the reference signal.Type: GrantFiled: July 27, 2007Date of Patent: April 29, 2014Assignee: Intel CorporationInventor: Jie Zhu
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Patent number: 8705602Abstract: Transmitter equalizer circuitry, e.g., for a serial, digital, data signal, includes tapped delay line circuitry for outputting a plurality of differently delayed versions of the signal propagating through the delay line circuitry. The equalizer circuitry also includes a plurality of electrical current digital-to-analog converters (“DACs”). The equalizer circuitry still further includes controllable (e.g., programmable) routing circuitry for selectably routing the delayed versions of the signal to the various DACs. The current strengths employed by the various DACs are also preferably controllable (e.g., programmable).Type: GrantFiled: October 16, 2009Date of Patent: April 22, 2014Assignee: Altera CorporationInventors: Weiqi Ding, Mengchi Liu, Mingde Pan, Thungoc M. Tran, Sergey Shumarayev
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Patent number: 8705603Abstract: Data receivers often include equalizers for operating on received signals. The equalizers often have a plurality of taps, with signals from each tap weighted based on tap settings or values. The tap settings may be set based on bit error rates of data output from the equalizer. In some embodiments data output from the equalizer is split into two signals, and the two signals are processed to indicate a data eye of the data output from the equalizer. Preferred tap settings may be determined by setting tap settings to different values and using tap settings expected to maximize the data eye. This may be performed separately for different bit settings in an attempt to reduce effects of inter-signal interference.Type: GrantFiled: February 5, 2009Date of Patent: April 22, 2014Assignee: Vitesse Semiconductor CorporationInventors: Tim Coe, Greg Warwar
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Patent number: 8699554Abstract: In at least some embodiments, a receiver for a wireless communication system is provided. The receiver includes an equalizer that provides an equalized channel matrix. The receiver also includes scaling logic coupled to the equalizer, the scaling logic selectively scales coefficients of the equalized channel matrix. The receiver also includes a decoder coupled to the scaling logic. The decoder decodes a signal based on the equalized channel matrix with scaled coefficients.Type: GrantFiled: October 30, 2007Date of Patent: April 15, 2014Assignee: Texas Instruments IncorporatedInventors: Deric W. Waters, Anuj Batra, Srinath Hosur
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Patent number: 8699585Abstract: Transmitters for data communication can include a pattern generator configured to generate parallel data stream composed of k bits, k being a natural number greater than 2, a serializer configured to convert the parallel data stream into a serial data stream, a pre-emphasis circuit configured to pre-emphasize the serial data stream based on a pre-emphasis control value, to transmit the pre-emphasized serial data stream to a receiver via a first transmission line, and a pre-emphasis controller configured to receive measured values of transmission errors of the pre-emphasized serial data stream from the receiver via a second transmission line, and configured to set the pre-emphasis control value corresponding to a minimum measured value of the transmission errors, to an optimum pre-emphasis control value.Type: GrantFiled: July 31, 2009Date of Patent: April 15, 2014Assignee: Samsung Electronics Co., Ltd.Inventor: Hitoshi Okamura
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Patent number: 8699555Abstract: An adaptive equalizer circuit, set forth by way of example and not limitation, includes a plurality of paths receiving an input signal. One or more equalizers are each provided on one of the paths and are operative to equalize signal amplitude. An equalizer selector receives the input signal and is operative to output a selection signal based on higher-frequency content and lower-frequency content of the input signal. The selection signal is operative to select one of the paths to output an output signal that is based on the input signal.Type: GrantFiled: December 2, 2011Date of Patent: April 15, 2014Assignee: Maxim Integrated Products, Inc.Inventor: Mehmet Ali Tan
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Patent number: 8693882Abstract: An electronic dispersion compensation module may perform one or more electronic dispersion compensation solutions. The electronic dispersion compensation module may include a solution control module. The solution control module may configure the electronic dispersion compensation module to perform an electronic dispersion compensation solution using data indicating a bit error rate. A bit error rate module may create the data indicating a bit error rate. The bit error rate module may form part of a clock and data recovery module. The electronic dispersion compensation module may be configured to receive a signal from a backplane and may also be configured to apply any of a plurality of electronic dispersion compensation solutions to the signal received from the backplane.Type: GrantFiled: May 30, 2007Date of Patent: April 8, 2014Assignee: Finisar CorporationInventors: James D. McVey, Charles Steven Joiner
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Patent number: 8693562Abstract: A process receives a composite signal transmitted via a nonlinear data transmission channel, with the composite signal having a first signal UL and a second signal LL. The process includes the following: demodulating and decoding the first signal UL by using a first demodulation and decoding chain in order to regenerate first information of the first signal UL; recoding and shaping to produce a continuous time waveform; applying a nonlinearity function based on a set of coefficients updated according to an adaptive correlation calculation process to the continuous time waveform; subtracting the result of the nonlinearity function from the composite signal in order to generate a result E; and demodulating and decoding the result E by using a second demodulation and decoding chain in order to regenerate second information of the second signal LL.Type: GrantFiled: May 13, 2004Date of Patent: April 8, 2014Assignee: STMicroelectronics S.A.Inventor: Jacques Meyer
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Patent number: 8693532Abstract: Signal equalization is facilitated in a manner that provides for feedback operation with desirable equalization operation. As consistent with one or more embodiments, a sign is assigned to received signals by generating an output that is an absolute value of the received signals, and a comparator processes the output and to generate a signal having a voltage level limited to a predetermined value. A sign of a signal output by an equalizer is detected and used to assign a sign to the output of the comparator. A summation circuit sums the output of the equalizer with the output of the comparator, and provides the sum to the equalizer as an error signal. The equalizer modifies a frequency component of received signals based on the error signal.Type: GrantFiled: July 20, 2012Date of Patent: April 8, 2014Assignee: NXP B.V.Inventors: Sujan Pandey, Hubertus Gerardus Hendrikus Vermeulen, Abhijit Kumar Deb
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Patent number: 8693898Abstract: An adaptive equalizer includes a finite impulse response filter with a predetermined number of taps; and a tap coefficient adaptive controller having a register to hold tap coefficients for the filter, a weighted center calculator to calculate a weighted center of the tap coefficients, and a tap coefficient shifter to shift the tap coefficients based on a calculation result of the weighted center. During an initial training period, the tap coefficient shifter shifts the tap coefficients on a symbol data basis such that a difference between the calculated weighted center of the tap coefficients and a tap center defined by the number of taps is minimized.Type: GrantFiled: October 14, 2011Date of Patent: April 8, 2014Assignee: Fujitsu LimitedInventors: Nobukazu Koizumi, Kazuhiko Hatae, Noriyasu Nakayama, Koji Nakamuta, Hisao Nakashima, Kosuke Komaki
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Patent number: 8693530Abstract: An apparatus, method, computer readable medium, and system are provided to generate a symbol placement associated with a transmission scheme by transforming a retrieved set of equalization coefficients. Symbols included in the symbol placement may be analyzed and quantified in terms of their distance from a decision boundary. Symbols may be synthesized on an iterative basis in order to obtain visibility into the underlying performance of the transmission scheme over time. If equalization is unable to reduce a signal impairment below a threshold value within a predetermined amount of time, then a determination may be made that a non-linear distortion source is present in a network or communication system. Signals received from a plurality of user terminals may be compared with one another in order to determine a probable location or cause of the non-linear distortion.Type: GrantFiled: August 2, 2010Date of Patent: April 8, 2014Assignee: Comcast Cable Communications, LLCInventors: Lawrence D. Wolcott, Phillip F. Chang
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Publication number: 20140092951Abstract: An embodiment of the invention includes a receiver with reduced error terms and incoming jitter tracking that improves jitter tolerance. An embodiment provides these benefits based on a voltage integrator that recovers data and clock information from incoming signals without use of a PLL, PI, CDR, and the like. An embodiment provides these benefits based on a time integrator that recovers, using digital logic, data and clock information from incoming signals without use of a PLL, PI, CDR, and the like. Other embodiments are described herein.Type: ApplicationFiled: September 30, 2012Publication date: April 3, 2014Inventors: Kiriti Bhagavathula, Chunyu Zhang, Steven A. Peterson
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Patent number: 8687478Abstract: Aspects of a method and apparatus for band separation for multiband communication systems are provided. One or more circuits for use in a transceiver may comprise a triplexer and a leakage processing module. The triplexer may comprise a multiband port, a Multimedia Over Coaxial Alliance (MoCA) port, a television upstream port, and a television downstream port. The leakage processing module may comprise a television downstream input port, a cable television downstream output port, a MoCA port, and a cable television upstream port. The leakage processing module may be operable to (1) process a MoCA signal to generate a first compensation signal; (2) process a cable upstream signal to generate a second compensation signal; (3) process a filtered signal based at least in part on the first and second compensation signals; and (4) output the processed filtered signal via the cable television downstream output port of said leakage processing module.Type: GrantFiled: November 21, 2011Date of Patent: April 1, 2014Assignee: MaxLinear, Inc.Inventors: Madhukar Reddy, Timothy Gallagher
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Patent number: 8687743Abstract: Methods and apparatus are provided for detecting and decoding adaptive equalization training frames (having a frame marker comprised of a string of binary ones and binary zeroes). Training frames are detected by shifting the received data; inserting at least one binary value at one end of the shifted received data to generate a modified version of the received data; applying a logic function to the received data and the modified version of the received data that identifies when corresponding bit positions have different values; and detecting the frame marker when an output of the logic function has a first binary value in an approximate middle of a string of a second binary value. The training frames are decoded using a distance between the approximate center of the frame marker and a predefined binary value in an output of the logic function.Type: GrantFiled: February 14, 2013Date of Patent: April 1, 2014Assignee: Agere Systems LLCInventors: Yasser Ahmed, Xingdong Dai, Mohammad S. Mobin, Lane A. Smith
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Publication number: 20140086297Abstract: A transmission circuit including an equalizer circuit, a slicer circuit, a signal detection circuit, and a control circuit is provided. The equalizer circuit performs an equalizing operation on an input signal according to preset states to output an equalizing signal corresponding to each preset state. The slicer circuit performs a slicing operation on the equalizing signal to output a slicing signal. The signal detection circuit detects and compares the equalizing signal and the slicing signal and accordingly adjusts the equalizer circuit to one of the preset states. The control circuit receives the slicing signal corresponding to each preset state, compares the slicing signal corresponding to each preset state with a plurality of signal patterns to generate a comparison result, and selects one of the preset states according to the comparison result, such that the control circuit let the equalizer circuit perform the equalizing operation according to the selected preset state.Type: ApplicationFiled: September 9, 2013Publication date: March 27, 2014Applicant: VIA Technologies, Inc.Inventors: Hung-Hao Shen, Wei-Yu Wang
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Publication number: 20140086296Abstract: A multi user receiver configured to receive a signal including multiple symbol streams assigned to various users is described. The multiple symbol streams include at least one first symbol stream assigned to a user of the multi user receiver and at least one second symbol stream assigned to another user, wherein a modulation alphabet applied for the at least one second symbol stream is unknown at the multi user receiver. The multi user receiver includes a symbol stream election unit configured to elect a symbol stream of the multiple symbol streams, an equalizer configured to provide an equalized symbol of the elected symbol stream, and a detector configured to generate a detected symbol from the equalized symbol on the basis of a constellation, wherein, if the second symbol stream is elected, the constellation is a mixed constellation including constellation points of at least two of multiple predefined modulation alphabets.Type: ApplicationFiled: September 26, 2012Publication date: March 27, 2014Inventors: Biljana Badic, Tobias Scholand, Rajarajan Balraj, Peter Jung, Guido Bruck, Zijian Bai, Stanislaus Iwelski
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Patent number: 8681847Abstract: Provided is a channel equalizing apparatus and method for improving channel equalization performance in an Orthogonal Frequency Division Multiplexing (OFDM) reception system applied to digital broadcasting or a communication system. The apparatus, includes: a channel estimating unit for performing channel estimation by using a pilot signal of a frequency domain; a digital filtering unit for changing a characteristic of a channel in a time domain based on an estimated channel estimation result; and a channel equalizing unit for performing channel equalization of a frequency domain on the signal after changing the channel characteristic.Type: GrantFiled: November 28, 2008Date of Patent: March 25, 2014Assignee: Electronics and Telecommunications Research InstituteInventors: Jae-Hyun Seo, Heung-Mook Kim, Soo-In Lee
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Patent number: 8681851Abstract: An adaptive filter includes: a filter configured to perform a filtering process for an input signal with a filter coefficient set therein, and output the processed input signal as an output signal; a calculating unit configured to calculate a value indicative of an error between an amplitude of the output signal and a reference amplitude; an output unit configured to output a first constant as a parameter when the amplitude of the output signal is greater than the predetermined amplitude, the parameter used when updating the filter coefficient, and output a second constant as the parameter when the amplitude of the output signal is smaller than the predetermined amplitude; and an updating unit configured to update the filter coefficient with an update amount corresponding to the parameter and the value indicative of the error, such that the error is reduced.Type: GrantFiled: June 29, 2012Date of Patent: March 25, 2014Assignee: Semiconductor Components Industries, LLCInventor: Yasuji Saito
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Patent number: 8681848Abstract: An apparatus for equalizing channels is provided, which is generally transparent to link training. The apparatus generally includes equalization paths formed by an input circuit, a crossbar, and an output circuit and a controller. Each equalization path is coupled to at least one of the channels, and a controller has a VGA loop, a crossbar loop, and a driver loop. The AGC loop receives a first reference voltage and provides a gain control signal to the input circuit, and the gain control network comprises a replica of at least one of the equalization paths. The crossbar loop receives a second reference voltage and provides a crossbar control signal to the crossbar. The driver loop receives a third reference voltage and provides a driver control signal for the output circuit.Type: GrantFiled: October 28, 2011Date of Patent: March 25, 2014Assignees: Texas Instruments Incorporated, Texas Instruments Deutschland GmbHInventors: Yaqi Hu, Yanli Fan, Huawen Jin, Ulrich Schacht, Karl Muth, Mark W. Morgan
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Patent number: 8675722Abstract: Equalization techniques for compensating distortion associated with a communications channel are provided. In one aspect of the invention, a method/apparatus for equalizing an input signal received from a communications channel includes the following steps/operations. At least one sampling is generated from the received input signal based on a clock signal unrelated to a clock signal used to recover data associated with the received input signal. Distortion associated with the communications channel is then compensated for based on at least a portion of the at least one generated sampling.Type: GrantFiled: September 23, 2003Date of Patent: March 18, 2014Assignee: International Business Machines CorporationInventor: Jose A. Tierno
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Patent number: 8675724Abstract: A method for updating a tap coefficient of a decision feedback equalizer is provided. The method includes sampling a first input signal received by a sampler of a decision feedback equalizer. It is determined if an amplitude of the first input signal falls within a range defined between a first predetermined voltage level and a second predetermined voltage level. If the amplitude of the first input signal falls outside the range, a tap coefficient is updated to generate an updated tap coefficient that is fed back to adjust an amplitude of a second input signal received at an input end of the decision feedback equalizer. If the amplitude of the first input signal falls within the range, the tap coefficient is free from being updated.Type: GrantFiled: July 15, 2010Date of Patent: March 18, 2014Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yung-Chow Peng, Yu-Chun Lin
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Patent number: 8675723Abstract: A symbol sequence corresponding to a vestigial sideband (VSB) signal is divided into a plurality of sections, respective ones of which correspond to respective time periods. Individual ones of the sections are recursively adaptively equalized to produce respective equalized sections. A bit stream is constructed from the equalized sections.Type: GrantFiled: February 15, 2011Date of Patent: March 18, 2014Assignee: Samsung Electronics Co., Ltd.Inventors: DoHan Kim, Beom kon Kim, Sergey Zhidkov
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Patent number: 8670507Abstract: Systems and methods are provided for decoding signal vectors in multiple-input multiple-output (MIMO) systems, where the receiver has received one or more signal vectors from the same transmitted vector. The receiver combines the received vectors by vector concatenation The concatenated vector may then be decoded using, for example, maximum-likelihood decoding. In some embodiments, the combined signal vector is equalized before decoding.Type: GrantFiled: November 21, 2012Date of Patent: March 11, 2014Assignee: Marvell World Trade Ltd.Inventors: Jungwon Lee, Woong Jun Jang, Leilei Song
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Publication number: 20140064354Abstract: A filter calculating device includes a first equalization filter calculating section that generates at least a first conversion matrix and a first triangular matrix based on a channel state of a first channel; a first quasi-orthogonalization section that calculates a first unimodular matrix based on the first triangular matrix; and a second equalization filter calculating section that generates at least a second conversion matrix and a second triangular matrix based on a channel state of a second channel and the first unimodular matrix.Type: ApplicationFiled: April 2, 2012Publication date: March 6, 2014Applicant: SHARP KABUSHIKI KAISHAInventors: Hiroshi Nakano, Hiromichi Tomeba, Takashi Onodera, Alvaro Ruiz Delgado
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Patent number: 8666005Abstract: Method and apparatuses are disclosed to substantially compensate for various unwanted interferences and/or distortions within a communications receiver. Each of these apparatuses and methods estimate the various unwanted interferences and/or distortions within the communications receiver. Each of these apparatuses and methods remove the estimates of the various unwanted interferences and/or distortions within the communications receiver from one or more communications signals within the communications receiver to substantially compensate for the various unwanted interferences and/or distortions.Type: GrantFiled: June 30, 2011Date of Patent: March 4, 2014Assignee: Broadcom CorporationInventors: Ramon Alejandro Gomez, Bruce J. Currivan, Massimo Brandolini, Young Shin, Francesco Gatta, Hanli Zou, Loke Kun Tan, Lin He, Thomas Joseph Kolze, Leonard Dauphinee, Robindra Joshi, Binning Chen
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Patent number: 8665940Abstract: An integrated receiver supports adaptive receive equalization. An incoming bit stream is sampled using edge and data clock signals derived from a reference clock signal. A phase detector determines whether the edge and data clock signals are in phase with the incoming data, while some clock recovery circuitry adjusts the edge and data clock signals as required to match their phases to the incoming data. The receiver employs the edge and data samples used to recover the edge and data clock signals to note the locations of zero crossings for one or more selected data patterns. The pattern or patterns may be selected from among those apt to produce the greatest timing error. Equalization settings may then be adjusted to align the zero crossings of the selected data patterns with the recovered edge clock signal.Type: GrantFiled: May 30, 2012Date of Patent: March 4, 2014Assignee: Rambus Inc.Inventor: Robert E. Palmer
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Patent number: 8665941Abstract: One or more embodiments describe a decision feedback equalizer for highly spectrally efficient communications. A method may be performed in a decision feedback equalizer (DFE). The method may include initializing values of tap coefficients of the DFE based on values of tap coefficients of a partial response filter through which said transmitted symbols passed en route to said sequence estimation circuit. The method may include receiving estimates of transmitted symbols from a sequence estimation circuit, and receiving an error signal that is generated based on an estimated partial response signal output by the sequence estimation circuit. The method may include updating values of tap coefficients of the DFE based on the error signal and the estimates of transmitted symbols. The method may include generating one or more constraints that restrict the impact of the error signal on the updating of the values of the tap coefficients of the DFE.Type: GrantFiled: January 31, 2013Date of Patent: March 4, 2014Assignee: MagnaCom Ltd.Inventor: Amir Eliaz
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Patent number: 8660171Abstract: A timing jitter measurement circuit for measuring timing jitter in the digital domain may use an interpolator bank to over-sample a signal from a media reader, a zero crossing estimator to estimate a zero crossing moment in the output of the interpolator bank and a time interval analyzer (TIA) to calculate the timing jitter as the deviation of the estimated zero crossing moment from an expected zero crossing moment in a clock signal. The timing jitter measurement circuit may be integrated into digital circuitry since it avoids using analog devices. Consequently, it may simplify the chip design, lower power consumption and save space.Type: GrantFiled: August 15, 2008Date of Patent: February 25, 2014Assignee: Marvell International Ltd.Inventors: Mats Oberg, Jin Xie, Bin Ni
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Patent number: 8660200Abstract: The present invention provides architectures and methods which implement dual-pass joint channel estimation and data demodulation in communication systems to provide enhanced performance of the communication link. While not limited to any particular communication protocol, such architectures and methods are particularly beneficial in OFDM systems. Channel estimates may be performed using reference symbols and demodulated data symbols according to certain patterns of subcarriers for OFDM symbols. The channel estimates obtained from different patterns may be combined for dual-pass channel estimate which may have reduced estimation error. Such a procedure enables more accurate channel estimation and improved data demodulation, thereby enhancing system performance.Type: GrantFiled: August 15, 2008Date of Patent: February 25, 2014Inventors: Bhaskar Patel, Arumugam Govindswamy
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Patent number: 8654913Abstract: A method and apparatus for processing a signal in a wireless communication system. The method comprises: receiving a signal at a receiver over a wireless channel; sampling the signal to produce a plurality of signal samples; and supplying the samples to an equaliser implemented in software running on a processor of the receiver, the equaliser being configured to process the samples using at least one equaliser time period having a nominal length. The method further comprises dynamically determining one or more characteristics of the channel; in dependence on the determined channel characteristics, dynamically selecting between a first operational state of the equaliser in which the nominal length is used and a second operational state of the equaliser in which an alternative length is used in place of the nominal length; and processing the samples in the equaliser using the determined equaliser time period length.Type: GrantFiled: March 26, 2009Date of Patent: February 18, 2014Assignee: ICERA, Inc.Inventors: Simon Huckett, Phil Jones, Carlo Luschi
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Patent number: 8654904Abstract: In one embodiment, a receiver comprises an automatic gain controller (AGC), an equalizer, a controller, and a register interface. The AGC makes gain adjustments to compensate for changes in the average amplitude of a received signal. The equalizer has a coefficient updater that calculates coefficients and a finite impulse response (FIR) filter that applies the coefficients to the received signal to generate an equalized signal. During gain adjustments by the AGC, the register interface provides a weight freeze signal to the coefficient updater, which subsequently freezes the updating of the coefficients for a freeze duration period. Then, register interface provides a scaling factor, generated by the controller based on the size of the gain adjustment, to the coefficient updater. At the end of the freeze period, coefficient updater applies the scaling factor to the coefficients and unfreezes the coefficient updating.Type: GrantFiled: October 9, 2007Date of Patent: February 18, 2014Assignee: Agere Systems LLCInventors: Uwe Sontowski, Dominic W. Yip
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Patent number: 8654829Abstract: A signaling circuit having a selectable-tap equalizer. The signaling circuit includes a buffer, a select circuit and an equalizing circuit. The buffer is used to store a plurality of data values that correspond to data signals transmitted on a signaling path during a first time interval. The select circuit is coupled to the buffer to select a subset of data values from the plurality of data values according to a select value. The equalizing circuit is coupled to receive the subset of data values from the select circuit and is adapted to adjust, according to the subset of data values, a signal level that corresponds to a data signal transmitted on the signaling path during a second time interval.Type: GrantFiled: December 28, 2012Date of Patent: February 18, 2014Assignee: Rambus Inc.Inventors: Jared L. Zerbe, Vladimir M. Stojanovic, Fred F. Chen
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Patent number: 8654898Abstract: Incoming data at a high-speed serial receiver is digitized and then digital signal processing (DSP) techniques may be used to perform digital equalization. Such digital techniques may be used to correct various data anomalies. In particular, in a multi-channel system, where crosstalk may be of concern, knowledge of the characteristics of the other channels, or even the data on those channels, may allow crosstalk to be subtracted out. Knowledge of data channel geometries, particularly in the context of backplane transmissions, may allow echoes and reflections caused by connectors to be subtracted out. As data rates increase, fractional rate processing can be employed. For example, the analog-to-digital conversion can be performed at half-rate and then two DSPs can be used in parallel to maintain throughput at the higher initial clock rate. At even higher rates, quadrature techniques can allow analog-to-digital conversion at quarter-rate, with four DSPs used in parallel.Type: GrantFiled: May 8, 2008Date of Patent: February 18, 2014Assignee: Altera CorporationInventors: William W. Bereza, Albert Vareljian, Rakesh H. Patel
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Patent number: 8654830Abstract: A receiver is optimized by adapting parameters of a linear equalizer component within the receiver. Data decisions and error decisions are generated. These data decision and error decisions are used to derive an error rate of data by measuring the number of margin hits that occur. A balance value is also calculated from the data decisions and the error decisions. The balance value is used to update parameters of the linear equalizer. The updating of the parameter continues until the number of margin hits has been minimized.Type: GrantFiled: December 20, 2010Date of Patent: February 18, 2014Assignee: Netlogic Microsystems, Inc.Inventors: Andrew Lin, Faramarz Bahmani
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Patent number: 8654909Abstract: According to an embodiment, a semiconductor integrated circuit includes an amplifier, an interference wave suppression unit, a coupler and a filter control circuit. The interference wave suppression unit includes a filter being controlled to be on or off. The filter is configured to suppress an interference wave component of an amplified signal to output the signal as an output signal when the filter is on. The coupler is configured to detect an input signal or the output signal. The filter control circuit controls the filter to be on when a signal level of a detection input signal or a detection output signal detected by the coupler is greater than or equal to a reference value, and controls the filter to be off when the signal level is smaller than the reference value, at arbitrary determination timing in a period of time between a transmission and a reception.Type: GrantFiled: September 20, 2011Date of Patent: February 18, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Mitsuyuki Ashida, Hideaki Majima
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Publication number: 20140044159Abstract: One embodiment of the present invention sets forth a mechanism for transmitting and receiving ground-referenced single-ended signals. A transmitter combines a direct current (DC) to DC converter including a flying capacitor with a 2:1 clocked multiplexer to drive a single-ended signaling line. The transmitter drives a pair of voltages that are symmetric about the ground power supply level. Signaling currents are returned to the ground plane to minimize the generation of noise that is a source of crosstalk between different signaling lines. Noise introduced through the power supply is correlated with the switching rate of the data and may be reduced using an equalizer circuit.Type: ApplicationFiled: October 16, 2013Publication date: February 13, 2014Applicant: NVIDIA CorporationInventors: John W. Poulton, Thomas Hastings Greer, III, William J. Dally
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Patent number: 8649467Abstract: A method of multi-symbol channel estimation for estimating channel response to a plurality of transmission symbols within an observation window transmitted through a time-varying channel in a multi-carrier modulation system is provided. The method is to be implemented using a channel estimation device, and includes the steps of: obtaining a window pilot receive vector according to a part of elements of each of receive symbols corresponding to pilots in a corresponding one of the transmission symbols; computing a window pilot channel trans form matrix based upon the pilots in the transmission symbols; computing an estimated value of a polynomial coefficient vector based upon the window pilot receive vector and the window pilot channel transform matrix; and for each of the transmission symbols, computing a plurality of estimated values of channel response associated with possible transmission paths in the time-varying channel according to the estimated value of the polynomial coefficient vector.Type: GrantFiled: July 20, 2011Date of Patent: February 11, 2014Assignee: National Chi Nan UniversityInventors: Shyue-Win Wei, Yih-Haw Jan, Ting-Ru Yan