Abstract: An improved method and arrangement for altering musical dynamics of a sound S included in a sound signal is disclosed. The altering of the musical dynamics is performed by filtering and amplification of the sound signal. The filtering is performed by the use of a parametric equalizer, the parametric equalizer having a first gain G1 and a resonance frequency fr being related to a pitch frequency fp of said sound S. The amplification is performed by an amplifier amplifying the sound signal with a second gain G2, the second gain G2 being dependent on the first gain G1.

Abstract: A system for performing encryption and/or decryption may include a parent cryptographic device. The parent cryptographic device may be configured to receive a first cryptographic key. The parent cryptographic device may be configured to determine one or more session keys based on the first cryptographic key and/or internally generated random data bits. The parent cryptographic device may be configured to insert the one or more session keys onto one or more child cryptographic devices that are operably connected to the parent cryptographic device. The one or more child cryptographic devices may be configured to receive the one or more session keys from the parent cryptographic device, and perform one or more of encryption or decryption of communications exchanged with another child cryptographic device of the one or more child cryptographic devices. The one or more child cryptographic devices may perform encryption/decryption after separation from the parent cryptographic device.

Abstract: A base station communicates with a plurality of user equipments (UEs) using a method. The method includes receiving, by the base station, a plurality of signals from a plurality of user equipments (UE) in communication with the base station. The method also includes using an iterative algorithm to estimate a matrix ? of channel coefficients based on the received signals. The method further includes decoding, at the base station, the received signals using the estimated matrix ?.

Abstract: The present invention is directed to data communication systems and methods. More specifically, embodiments of the present invention provide a communication system that removes reflection signals. A digital data stream is processed through both tentative path and the main path. The tentative path uses a first DFE device and a reflection cancellation circuit to generate a correction signal for removing reflection signal from the digital data stream. A second DFE device removes ISI and other noises from the corrected digital data stream. There are other embodiments as well.

Abstract: An apparatus, method, and system are provided for determining a location of an error source. Equalization coefficients may be retrieved and an average period of time between localized peak amplitudes may be determined. The average period of time may be multiplied by a velocity of propagation associated with a communication channel to determine an approximate location of the error source. The equalization coefficients may correspond to the inverse of the frequency response associated with the communication channel and may be updated over time using replacement or combination (e.g., convolution) techniques.

Abstract: An electronic device for compensating for process variation is provided. The electronic device includes a first circuit configured to consume a current supplied to the first circuit, and a second circuit configured to control the current supplied to the first circuit, The second circuit is configured to generate a signal for controlling the current supplied to the circuit based on a frequency of a pulse signal generated using a second component that is of a same kind as a first component of the first circuit.

Abstract: A method for sending and receiving a signal is disclosed, and a corresponding device and system. The method includes performing constellation mapping on a data stream to obtain a mapped signal, and performing pre-filtering on the mapped signal to convert the mapped signal into a narrowband signal filtered signal. The pre-filtering is finite impulse response filtering. A bandwidth of the narrowband signal filtered signal is less than bandwidth of the mapped signal, and the narrowband signal filtered signal is a baud rate signal. The method also includes performing waveform forming according to the narrowband signal filtered signal to obtain a shaped signal, and performing digital-to-analog conversion on the shaped signal to convert a shaped second signal into an analog signal, and sending the analog signal.

Abstract: A wireless transceiver apparatus including: a channel estimator, a discrete matrix transform module, a tone set controller, and a shared matrix transform module. The channel estimator determines a channel matrix for each tone on each communication link. The discrete matrix transform module derives a transform matrix for the communication link(s) on a selected base tone from the associated channel matrix determined by the channel estimator. The tone set controller initializes an estimation of the transform matrix, on a neighboring tone, with the transform matrix derived for the base tone. The shared matrix transform module iteratively estimates the transform matrix on a neighboring tone, from successive perturbations of the initial transform matrix derived for the base tone and the associated channel matrix for the neighboring tone; thereby reducing a number of iterations required to estimate the transform matrix on the neighboring tone.

Abstract: In an example, an apparatus for clock data recovery (CDR) in a receiver includes a decision feedback equalizer (DFE) having a data slicer providing data samples, an error slicer providing error samples, and an offset error slicer providing offset error samples, the offset error slicer operable to set its threshold based on an offset first post-cursor coefficient. The apparatus further includes a CDR circuit operable to control a sampling clock for the data slicer, the error slicer, and the offset error slicer based on the data samples and the offset error samples.

Abstract: A system and method for calculating optimal equalizer coefficients during an initialization phase is disclosed. An equalizer system for processing a received signal at a communications receiver comprises several equalizers and adaptation modules. A first equalizer is configured to receive and process a received signal to create a first equalizer output. The first equalizer is active during an initialization phase and active during an operational phase. A second equalizer is configured to receive and process the first equalizer output to create a second equalizer output. The second equalizer is active during an initialization phase and aids in the generation of the first equalizer coefficients, and inactive during an operation phase. A third equalizer is configured to receive and process the first equalizer output to create a third equalizer output such that the third equalizer is inactive during an initialization phase and active during an operation phase.

Abstract: A method for evaluating operation of a receiver comprising an analog front end, a plurality of samplers connected in parallel to the analog front end, the plurality of samplers comprising a plurality of utility samplers, a plurality of data samplers and a plurality of timing samplers, an unrolled decision feedback equalizer (UDFE) connected to outputs of the plurality of data samplers, and a serial input parallel out (SIPO) block connected to an output of the UDFE and outputs of the plurality of utility and timing samplers. The method comprises adjusting settings of the plurality of utility samplers to sweep across a range of interest, at each of a plurality of points comparing a selected output of one of the plurality of utility samplers at that point to an output of one of the plurality of data samplers to detect an error event, and, accumulating the error events.

Abstract: In an example, an apparatus for clock data recovery (CDR) includes a data slicer operable to generate data samples derived from a transmitted signal, and an error slicer operable to generate error samples derived from a transmitted signal. The apparatus further includes a CDR circuit operable to generate sampling clock phase for the data slicer and the error slicer from output of the data samples and the error samples. The apparatus further includes a decision adapt circuit operable to set a decision threshold of the error slicer, wherein for each main-cursor data sample of the data samples the decision adapt circuit is operable to adjust the decision threshold based on a function of at least one pre-cursor data sample, at least one post-cursor data sample, or a combination of at least one pre-cursor data sample and at least one post-cursor data sample.

Abstract: A passive equalizer includes a first resistive element coupled between a first input node and a first output node, a first capacitive element, a first variable resistor, and a first inductive element coupled in series between the first input node and the first output node, a first transistor having a first current electrode coupled to the first output node, and a first current source coupled to the first current electrode of the first transistor.

Abstract: Method and system for performing an equalization process between a remote PCI (Peripheral Component Interface)-Express device and a local PCI-Express device are provided. The use of a forced coefficient in a third phase of the equalization process is enabled. When the remote PCI-Express has made a preset request, then the local PCI-Express device sends the preset request back to the remote PCI-Express device with the forced coefficient.

Abstract: An impulse noise mitigation circuit (INMC) may set a cut-off frequency of each of two high pass filters to bound a frequency bandwidth of a desired signal, wherein a first of the two filters allows frequencies higher than the frequency bandwidth of the desired signal, and a second of the two filters allows frequencies lower than the frequency bandwidth of the desired signal. The INMC may compute and store a mean magnitude separately for a first signal response of the first filter and a second signal response of the second filter. The INMC may select the first filter for impulse noise mitigation when the mean magnitude of the second filter is greater than the mean magnitude of the first filter. The INMC may select the second filter for impulse noise mitigation when the mean magnitude of the first filter is greater than the second filter.

Abstract: The present invention is directed to data communication. More specifically, embodiments of the present invention provide a method for acquiring sampling frequency by sweeping through a predetermined frequency range, performing data sampling at different frequencies within the predetermined frequency range, and determining a target frequency for sampling data based on a maximum early peak frequency and a maximum late peak frequency. There are other embodiments as well.

Abstract: An apparatus and method for generating a composite signal includes electronics configured to modulate a carrier utilizing a finite set of composite signal phases to generate a composite signal, the finite set of composite signal phases being determined through an optimization process that minimizes a constant envelope for the phase modulated carrier, subject to constraints on desired signal power levels of the signals to be combined and either zero or one or more relative phase relationships between the signals. The apparatus and method can be extended to generating an optimized composite signal of different frequencies.

Abstract: A FIR transmit architecture uses multiple driver divisions to allow signals with different delays to be summed into the output signal by the driver itself. The architecture includes a first multiplexer, a plurality of delay cells, a plurality of sign blocks, a switch block, a second multiplexer, and a plurality of drivers.

Abstract: This disclosure provides a split-path equalizer and a clock recovery circuit. More particularly, clock recovery operation is enhanced, particularly at high-signaling rates, by separately equalizing each of a data path and an edge path. In specific embodiments, the data path is equalized in a manner that maximizes signal-to-noise ratio and the edge path is equalized in a manner that emphasizes symmetric edge response for a single unit interval and zero edge response for other unit intervals (e.g., irrespective of peak voltage margin). Such equalization tightens edge grouping and thus enhances clock recovery, while at the same time optimizing data-path sampling. Techniques are also disclosed for addressing split-path equalization-induced skew.

Abstract: Canceling distortion in the receive path of a radio is achieved by down-converting an RF transmit signal to cancel leakage and intermodulation noise in a receive path baseband or intermediate frequency signal. Cancelation may be combined with digital pre-distortion of the transmit signal. Processing may be applied to optimize cancelation. Further cancelation can be achieved by re-modulating the demodulated and error-corrected receive signal, and predicting distortion caused by the transmit path. The cancelation system may be calibrated using a test signal.

Abstract: Systems and methods for reducing interference between CATV devices at subscribers' premises.

Abstract: A method is disclosed. The method includes sampling a data signal having a voltage value at an expected edge time of the data signal. A first alpha value is generated, and a second alpha value generated in dependence upon the voltage value. The data signal is adjusted by the first alpha value to derive a first adjusted signal. The data signal is adjusted by the second alpha value to derive a second adjusted signal. The first adjusted signal is sampled to output a first data value while the second adjusted signal is sampled to output a second data value. A selection is made between the first data value and the second data value as a function of a prior received data value to determine a received data value.

Abstract: The communication apparatus comprises a modulator that modulates an input signal to generate a modulated signal; an inserter that inserts a predetermined element into the modulated signal at a predetermined position to generate inserted data of which the number of elements is equal to a size of Fast Fourier Transformation (FFT); a calculator that calculates Peak-to-Average Power Ratio (PAPR) of a baseband signal corresponding to the inserted data; and a transmitter transmits a transmission signal corresponding to the baseband signal based on the calculated PAPR.

Abstract: Embodiments include a method comprising: receiving a signal comprising a plurality of symbols; estimating that a first symbol of the plurality of symbols has a first value; based on the first value of the first symbol, cancelling, at least in part, inter symbol interference that the first symbol has on a second symbol of the plurality of symbols; determining a first error associated with the first value of the first symbol; and in response to the first error being higher than a threshold value, generating, for the first symbol, a second value that is different from the first value of the first symbol, and based on the second value of the first symbol, cancelling, at least in part, inter symbol interference that the first symbol has on the second symbol.

Abstract: A transmitter apparatus to transmit to a plurality of receiver apparatuses a data signal at the same timing and on the same frequency, includes a transmitter unit that transmits a demodulation reference signal addressed to a first receiver apparatus and a demodulation reference signal addressed to a second receiver apparatus different from the first receiver apparatus at the same timing and on the same frequency.

Abstract: An apparatus is provided. A first adder generates a first superposed signal in response to a first feedback equalization signal and an input signal. A second adder generates a second superposed signal in response to a second feedback equalization signal and the first superposed signal. An edge slicer generates an edge signal by slicing the first superposed signal. A data slicer generates a data signal by slicing the second superposed signal. An error slicer generates an error signal by slicing the second superposed signal. A CDR circuit generates a first and second clock signal in response to the data signal and the edge signal. An adaptive filter generates the reference signal and equalizer coefficients in response to data signal and the error signal. An equalizing unit generates the first feedback equalization signal and the second feedback equalization signal in response to the data signal and the equalizer coefficients.

Abstract: Described herein is an apparatus, method and system corresponding to relate to a low power digital phase interpolator (PI). The apparatus comprises: a digital mixer unit to generate phase signals from a series of input signals, the phase signals having phases which are digitally controlled; a poly-phase filter, coupled to the digital mixer unit, to generate a filtered signal by reducing phase error in the phase signals; and an output buffer, coupled to the poly-phase filter, to generate an output signal by buffering the filtered signal. The low power digital PI consumes less power compared to traditional current-mode PIs operating on the same power supply levels because the digital PI is independent of any bias circuit which are needed for current mode PIs.

Abstract: A digital wireless transmitter is provided. The digital wireless transmitter includes a serial-to-parallel converter, a delta-sigma modulator (DSM), and a radio frequency (RF) converter. The serial-to-parallel converter is configured to interpolate a serial digital input signal and to output N parallel signals, where N is a positive integer greater than one. The DSM is configured to perform delta-sigma modulation on the N parallel signals in parallel. The RF converter is configured to arrange N delta-sigma modulated signals into K parallel signals, to delay the K parallel signals by different delay times, and to convert delayed signals into an RF signal, where K is a positive integer greater than N.

Abstract: A UE configured to adjust a L3 filter coefficient, comprises initializing a first filter coefficient of a first filter and a second filter coefficient of a second filter based on a primary filter coefficient of a primary filter received from an associated wireless network entity; adjusting the primary filter coefficient by one of: setting the primary filter coefficient to the first filter coefficient if a first difference between a measurement result of the primary filter and a first measurement result of the first filter is less than a first coefficient threshold and setting the primary filter coefficient to the second filter coefficient if a second difference between the measurement result of the primary filter and a second measurement result of the second filter is less than a second coefficient threshold; and applying the adjusted primary filter coefficient to measurements of one or more cells in an active cell set.

Abstract: A receiver includes an analog-to-digital converter module configured to receive a test bit stream via a transmission channel and to provide a channel loss value of the transmission channel based on the test bit stream, a continuous time linear equalization module configured to receive a data bit stream via the transmission channel and to provide an equalized data bit stream based on an equalization setting, and a control module configured to set the equalization setting such that the CTLE module provides an equalization level to compensate for the channel loss value.

Abstract: A radio communication device may be provided. The radio communication device may include: a first circuit; a second circuit; a processor configured to operate the radio communication device in a plurality of operation modes, wherein the plurality of operation modes may include: a first operation mode in which the first circuit processes received data of a first communication channel independent from the second circuit and in which the second circuit processes received data of a second communication channel independent from the first circuit; and a second operation mode in which the first circuit and the second circuit jointly process received data of a third communication channel. The radio communication device may further include a mode switching circuit configured to switch between the plurality of operation modes.

Abstract: A system including a first filter. The first filter includes first taps that receive respective coefficients. The first filter, based on the coefficients, filters an input signal. A first device updates some of the coefficients based on the input signal. The first device does not update one of the coefficients. A second filter includes second taps configured to receive respectively first and second coefficients. The second filter, based on the first and second coefficients, filters an output of the first filter. A second device, based on the output of the first filter, updates the second coefficient to account for a change in: an amount of gain of the system not accounted for by the first device due to the one of the coefficients not being updated; and a timing phase error of the input signal as a result of the first device not updating the one of the coefficients.

Abstract: Disclosed is an apparatus and method for speaker equalization in a mobile device. In one embodiment, placement of a mobile device including a speaker is determined and speaker equalization is performed in accordance with the determined placement.

Abstract: A differential cross-coupled common-source or common-emitter low-noise amplifier having capacitive degeneration is disclosed. Further, a radio receiver comprising such a low-noise amplifier is disclosed. Further, a method of controlling switched capacitive networks of an amplifier is disclosed. The method comprises controlling capacitances of the switched degeneration capacitor networks and/or the switched cross-coupling capacitor networks. Further, a computer program for implementing the method is disclosed.

Abstract: The present invention is directed to systems and method for attenuating intermodulation interference. In particular, methods and systems to attenuate intermodulation interference contained within an aggregate signal having a transmitted signal that was transmitted over a communications channel having channel effects that produce the intermodulation interference are provided. The communications channel may be a cable television distribution network and the signal may be a cable television signal. A method is provided to predict when intermodulation interference will be large, so that actions within a receiver can be taken to reduce the impact of the interference and improve overall receiver performance.

Abstract: An eye diagram capture device includes a delay line arranged to receive a digital signal and output time delayed version of the digital signal. An edge detection circuit is arranged to receive the digital signal and the time delayed version of the digital signal, the edge detection circuit operating to output a signal corresponding to a logical value of the digital signal received coincident with an edge of the time delay version of the digital signal. A voltage comparator is arranged to receive the digital signal and a reference voltage. The voltage comparator operates to output a first signal when the a voltage of the digital signal and the reference voltage are equal to each other.

Abstract: During transmission of a signal, a decoder receives a data symbol sequence and one or more copies of the data symbol sequence. The data symbol sequence and each of the copies have unknown noise, including unknown phase shifts. The unknown phase shifts are estimated such that the data symbol sequence that was transmitted is substantially recovered.

Abstract: A high-speed clock generator device includes a phase-interpolator (PI) circuit, a smoothing block, and inverter-based low-pass filters. The PI circuit receives a multiple clock signals with different phase angles and generates an output clock signal having a correct phase angle. The smoothing block smooths the clock signals with different phase angles and generates a number of smooth clock signals featuring improved linearity. The inverter-based low-pass filters filter harmonics of the clock signals with different phase angles.

Abstract: A DMT system for a half-duplex two-way link carries Internet protocol encoded video stream on a coaxial cable that also carries a baseband rendition of the same video stream. A plurality of downlink symbols modulated on a subband of subcarriers in a downlink signal are decoded. The symbols may carry data encoded on a subband using a constellation of QAM symbols assigned to the subband. Other subbands may be associated with different QAM constellations. Lower-order constellations of QAM symbols may be assigned to subbands that include higher-frequency subcarriers and higher-order constellations of QAM symbols may be assigned to subbands that include lower-frequency subcarriers. A block error correction decoder may be synchronized based on an identification of the first constellation of QAM symbols and information identifying boundaries between the plurality of downlink symbols.

Abstract: An equalizer includes a first sampler, a second sampler, and an equalization circuit. The first sampler is used for sampling an input data to generate an output data, and the second sampler is used for sampling the input data to generate an edge information. The equalization circuit is coupled to the first sampler and the second sampler, and includes an equalization unit and a control unit. The equalization unit performs an equalization operation on an original input data in order to generate the input data according to a plurality of tap coefficients. The control unit is coupled to the equalization unit, for adjusting the plurality of tap coefficients according to the output data and the edge information.

Abstract: A multi-phase partial response equalizer circuit includes sampler circuits that sample an input signal to generate sampled signals in response to sampling clock signals having different phases. A first multiplexer circuit selects one of the sampled signals as a first sampled bit to represent the input signal. A first storage circuit coupled to an output of the first multiplexer circuit stores the first sampled bit in response to a first clock signal. A second multiplexer circuit selects one of the sampled signals as a second sampled bit to represent the input signal based on the first sampled bit. A second storage circuit stores a sampled bit selected from the sampled signals in response to a second clock signal. A time period between the second storage circuit storing a sampled bit and the first storage circuit storing the first sampled bit is substantially greater than a unit interval in the input signal.

Abstract: A receiver may process a received signal to generate a processed received signal. The receiver may generate, during a sequence estimation process, an estimate of a phase error of the processed received signal. The receiver may generate an estimate of a value of a transmitted symbol corresponding to the received signal based on the estimated phase error. The generation of the estimate of the phase error may comprise generation of one or more phase candidate vectors. The generation of the estimate may comprise calculation of a metric based on the one or more phase candidate vectors. The calculation of the metric may comprise phase shifting the processed received signal based on the estimated phase error resulting in a phase-corrected received signal. The calculation of the metric may comprise calculating a Euclidean distance based on the phase-corrected received signal and one or more symbol candidate vectors.

Abstract: In a method for performing successive interference cancellation (SIC) in a multiple input, multiple output (MIMO) communication channel, a plurality of received signals are processed to decode a first codeword. An equalizer is generated corresponding to a second codeword and applied to the plurality of received signals to generate an equalized signal. An interference signal is also generated using the first codeword and then subtracted from the equalized signal. The equalized signal is processed to decode the second codeword.

Abstract: A decoder including a decode module, a matrix module, and a marking module. The decode module receives data and performs a first decoding iteration to decode the data. The first decoding iteration includes generating a first matrix having a first byte. The matrix module generates a second matrix based on the first matrix. The second matrix includes the first and second bytes. The second byte is adjacent and sequentially prior or subsequent to the first byte. The marking module: determines whether the first byte has been correctly decoded; based on determining whether the first byte has been correctly decoded, determines a status of the second byte; and based on the status of the second byte, marks the first byte as an erasure. The decode module, based on the second byte being marked as an erasure, corrects the second byte during the second decoding iteration.

Abstract: One embodiment relates to a receiver circuit for a data link. The receiver circuit includes a linear equalizer for receiving an input data signal and outputting an equalized signal, and a variable gain amplifier for receiving the equalized signal and outputting an amplified signal. Adaptation circuitry is connected to the linear equalizer and the variable gain amplifier. The adaptation circuitry adapts both a gain of the variable gain amplifier and a direct current voltage setting of the linear equalizer. Other embodiments and features are also disclosed.

Abstract: A receiver may be operable to receive a signal. A sequence estimation module of the receiver may generate estimated symbols corresponding to the received signal. The generating of the estimated symbols may use tap information associated with one or both of a pulse shaper via which the signal was transmitted and an input filter of the receiver. The sequence estimation module may generate a reconstructed signal based on the estimated symbols and the tap information. A feed forward equalizer (FFE) of the receiver may adapt a plurality of tap coefficients of the FFE based on the reconstructed signal. The signal may be equalized via the FFE. The adaptation of the tap coefficients of the FFE may be based on a least-mean-square (LMS) process for minimizing a mean square of the error signal. An output signal of the FFE may comprise a power gain compensation.

Abstract: There is provided a transmission system and method of operating thereof. The method comprises: dividing a data sequence to be transmitted into a plurality of data blocks; encoding one or more data blocks with one or more linear systematic cyclic codes thus giving rise to encoded data blocks; transmitting said encoded data blocks over an ISI transmission channel; upon receiving, applying a linear integer-forcing (IF) equalization to the received data blocks; processing the output of the IF equalization thereby detecting for each encoded data block a valid codeword with maximal likelihood of decoding; and reconstructing the data blocks using the respective detected valid codewords.

Abstract: An integrated circuit equalizes a data signal expressed as a series of symbols. The symbols form data patterns with different frequency components. By considering these patterns, the integrated circuit can experiment with equalization settings specific to a subset of the frequency components, thereby finding an equalization control setting that optimizes equalization. Optimization can be accomplished by setting the equalizer to maximize symbol amplitude.

Abstract: A wireless combination time, frequency and spectral shaping communications method that transmits data in convolution unit matrices (data frames) of N×N (N2), where generally either all N2 data symbols are received over N spreading time intervals (each composed of N time slices), or none are. To transmit, the N2 sized data frame matrix is multiplied by a first N×N time-frequency shifting matrix, permuted, and then multiplied by a second N×N spectral shaping matrix, thereby mixing each data symbol across the entire resulting N×N matrix (TFSSS data matrix). Columns from this N2 TFSSS data matrix are selected, modulated, and transmitted, on a one element per time slice basis. At the receiver, the replica TFSSS matrix is reconstructed and deconvoluted, revealing the data. The method can accommodate multiple users at once, can adapt to changing channel conditions, and is particularly useful for coping with channel impairments such as Doppler shifts.

Abstract: A method comprising receiving digital samples from an optical communication system, assigning the samples into bins based on signal levels of the samples, computing an average signal level for each bin, determining a level adjustment transformation function for the samples based on the average signal levels of the bins, and applying the level adjustment transformation function to the samples. Also, disclosed is an optical receiver comprising a frontend configured to receive an optical signal over an optical channel, and convert the optical signal into a plurality of sequences of digital samples, and a processor coupled to the frontend and configured to perform a channel equalization on the samples of the sequences, assign the channel equalized samples of each sequence into bins based on signal levels of the channel equalized samples, determine a level adjustment transformation function for each sequence, and apply the level adjustment transformation function to each sequence.