Abstract: A signal processing apparatus includes: a control section; a signal processing section connected with a plurality of signal processing elements and configured to perform signal processing for enhancing or attenuating an input signal in a specific frequency band; and a crossfade signal section including a crossfade signal processing element capable of replacing at least one of the signal processing elements, wherein the control section is configured to control any one of the signal processing elements among the plurality of signal processing elements, and the crossfade signal processing element, to crossfade to the crossfade signal processing element having the signal processing element as a new characteristic, to perform processing for replacing any one of the signal processing elements by the crossfade signal processing element, and to perform the processing on remaining signal processing elements of the plurality of signal processing elements in the signal processing section.

Abstract: An apparatus, system, and method are provided for reducing a number of intersymbol interference components to be suppressed. Included is a receiver path with a linear equalizer configured to: receive a signal pulse including a data component and a first number of post-cursor intersymbol interference components, delay and process the signal pulse such that the signal pulse includes a second number of post-cursor intersymbol interference components which is less than the first number of post-cursor intersymbol interference components, and produce an output signal that includes the data component and the second number of post-cursor intersymbol interference components. The receiver path further includes a decision feedback equalizer in electrical communication with the linear equalizer. The decision feedback equalizer is configured to: receive the output signal from the linear equalizer, and suppress the second number of the post-cursor intersymbol interference components of the output signal.

Abstract: Methods, systems, and apparatus for EM communications. One of the apparatus includes a super-regenerative amplifier (SRA) configured to receive a binary phase shift keying (BPSK) modulated signal and to output an amplitude signal as a function of changes in phase in the BPSK modulated signal; a pseudo synchronous demodulator that rectifies the amplitude signal and generates an envelope of the rectified amplitude signal; and an analog to digital converter that converts the amplitude values of the envelope to digital binary values.

Abstract: A method comprises selecting a starting point on a map of equalization coefficients and measuring an eye height of a signal transmitted using the set of equalization coefficients associated with the starting point and an eye height associated with each adjacent point on the map relative to the starting point. The eye height associated with an adjacent point is based on a signal transmitted using the set of equalization coefficients associated with the adjacent point. The method also comprises walking on the map in a first direction from the starting point to the adjacent point associated with the greatest eye height, wherein the eye height associated with the adjacent point is greater than or equal to the eye height associated with the starting point.

Abstract: Systems and techniques relating to channel degradation detection for communication systems are described. A described system includes an interface to transmit signals and receive signals via a channel that includes a cable; an echo canceller coupled with the interface, the echo canceller to perform echo cancellation based on echo tap values to remove portions of the transmitted signals that appear as echoes within the received signals; an equalizer coupled with the interface, the equalizer to perform signal equalization based on equalizer tap values, the equalizer tap values being determined based on at least a portion of the received signals to adjust an impulse response of the channel and reduce inter-symbol interference within the received signals; and circuitry configured to determine a return loss channel quality indicator of the channel based on the echo tap values, determine an insertion loss channel quality indicator of the channel based on the equalizer tap values, or both.

Abstract: An asymmetric cross-connect system, constituted of: a cross-connect circuitry; and a control circuitry, wherein the cross-connect circuitry comprises a plurality of adaptive equalizers and a plurality of fixed equalizers, wherein the plurality of adaptive equalizers are in electrical communication with a multi-purpose port of a user device and each of the plurality of fixed equalizers are in electrical communication with a respective output of a processor of the user device, and wherein the cross-connect circuitry is arranged, responsive to the control circuitry, to provide a communication path between one of the outputs the processor and the multi-purpose port.

Abstract: A transmitting circuit includes: a multiplexer configured to output a third digital signal obtained by alternately synthesizing a first digital signal of a predetermined cycle length and a predetermined data rate with a second digital signal of the predetermined cycle length and the predetermined data rate; a first selector configured to output the first digital signal in a first state and output the third digital signal in a second state that is different from the first state; a second selector configured to output the second digital signal in the first state and output the third digital signal in the second state; a first driver circuit configured to output a signal corresponding to a signal output from the first selector; and a second driver circuit configured to output a signal corresponding to a signal output from the second selector.

Abstract: An example method of performing an eye-scan in a receiver includes: generating digital samples from an analog signal input to the receiver based on a sampling clock, the sampling clock phase-shifted with respect to a reference clock based on a phase interpolator (PI) code; equalizing the digital samples based on first equalization parameters of a plurality of equalization parameters of the receiver; adapting the plurality of equalization parameters and performing clock recovery based on the digital samples to generate the PI code; and performing a plurality of cycles of locking the plurality of equalization parameters, suspending phase detection in the clock recovery, offsetting the PI code, collecting an output of the receiver, resuming the phase detection in the clock recovery, and unlocking the equalization parameters to perform the eye scan.

Abstract: Circuits, devices, methods for decision feedback equalization are described. A decision feedback circuit can include L N-tap decision feedback equalizer (DFE) branch input lines and an unfolding multiplexer array network. The network is configured to generate at least one unfolded output based on inputs from a subset of the branch input lines and includes a plurality of multiplexer arrays wherein outputs from a first multiplexer array in the plurality of multiplexer arrays are connected to selection lines of a second multiplexer array in the plurality of multiplexer arrays.

Abstract: A method of allocating pilot bits in a wireless communication system using a multiple carrier modulation (MCM) is disclosed. The method includes allocating a plurality of precoded data symbols precoded by a precoding matrix module and a plurality of non-precoded pilot bits to a plurality of subcarriers, and transmitting the allocated precoded data symbols and the allocated non-precoded pilot bits.

Abstract: A data receiver includes a plurality of samplers, each of the samplers amplifies a difference between a first reference voltage and an input voltage and amplifies a difference between a second reference voltage and the input voltage. Operational paths of the samplers are differently controlled according to a level of second data corresponding to the second reference voltage, and first data corresponding to the first reference voltage is past data preceding current data and the second data is past data preceding the first data in the sampler.

Abstract: A system, method and device for wireless communication is provided. The method includes receiving, by a receiver, data from a transmitter, storing the data in the receiver, and determining, by the receiver, a probability of a bit stored in the data and a probability of a symbol based on the probability of the bit, wherein determining the probability of the bit includes moving a decision boundary associated with a constellation diagram.

Abstract: A sequence estimation device includes a grouping unit, a sequence estimation unit and a combination unit. The grouping unit groups a first plurality of equalized signals into a plurality of equalized signal groups according to a grouping rule. The sequence estimation unit, coupled to the grouping unit, processes the plurality of equalized signal groups according to a sequence estimation rule to obtain a plurality of estimated signal groups, respectively. The combination unit, coupled to the sequence estimation unit, permutes the plurality of estimated signal groups to a plurality of estimated signals according to the grouping rule.

Abstract: An apparatus for processing data includes a linear equalizer, a load switchably connected to an output of the linear equalizer, a slicer configured to sample a signal derived from the output of the linear equalizer, and a detector circuit configured to detect an over-equalization condition in data to be sampled by the slicer and to connect the load to the output of the linear equalizer in the over-equalization condition.

Abstract: A signaling system includes a pre-emphasizing transmitter and an equalizing receiver coupled to one another via a high-speed signal path. The receiver measures the quality of data conveyed from the transmitter. A controller uses this information and other information to adaptively establish appropriate transmit pre-emphasis and receive equalization settings, e.g. to select the lowest power setting for which the signaling system provides some minimum communication bandwidth without exceeding a desired bit-error rate.

Abstract: The reception (102) reception unit includes; a first processing unit processing a first signal received from a source channel, and including a filtering unit to filter said first signal in digital domain, and extract unit to extract a information from said first signal; a second processing unit processing a second signal received from a destination channel, and said source channel and said destination channel are distinct each other; a third processing unit providing said information extracted from said first signal to said second signal said third processing unit executes; providing said information from said first processing unit to said second processing unit using information lanes of a clock rate strictly lower than a symbol rate of said second signal, a monitoring unit to generate a monitor signal according to the quality of said second signal; and a control unit controlling a skew between said first signal and said second signal in a bandwidth of said filtering units in said first processing unit.

Abstract: A data detection method, having the steps of: a. receiving a signal transmitted over a communication channel, the signal being representative of at least a stream of interfering symbols xk, each representing one or more bits of a transmitted message; b. filtering the received signal through at least a filter bank having at least a first filter representative of a linear response of the channel and a second filter representative of a non-linear response of the channel, and sampling the filtered signals at the symbol rate, thus obtaining respective sequences of filtered samples rk(1) rk(3); and c. jointly computing the a posteriori probabilities of N>1 consecutive symbols xk. A data detector for carrying out such a method, and a method of transmitting data over a nonlinear channel, optimizing spectral efficiency when data detection is performed using such a method is also provided.

Abstract: Disclosed is a method for processing a reception signal, and a MIMO receiver, the method comprising a step in which: a reference resource element (RE) is selected within an RE group that comprises a plurality of REs; generated is a preprocessing filter which will be shared by the plurality of REs in the RE group on the basis of channel information of the reference RE; on the basis of channel information of the plurality of REs other than the reference RE, generated is a covariance matrix with respect to each of the REs other than the reference RE; and reception signals with respect to each of the plurality of REs are offset by selectively using the preprocessing filter and the covariance matrix, and thereby detection signals with respect to the RE group are generated.

Abstract: A communication device is provided including a receiver to receive a signal set. A first equalizer equalizes the signal set in accordance with a first equalization process taking into account that the signal set includes an inter cell interference signal, thereby generating a first equalized signal set. A first calculating circuit is configured to calculate a predefined characteristic of the first equalized signal set. A second equalizer equalizes the signal set in accordance with a second equalization process taking into account that the signal set is free from an inter cell interference signal, thereby generating a second equalized signal set. A second calculating circuit is configured to calculate a predefined characteristic of the second equalized signal set. A selecting circuit is configured to select the first equalized signal set or the second equalized signal set for further processing based on the determined predefined characteristics.

Abstract: Systems, devices and techniques for processing received QPSK modulated optical signals include sampling the received signal at twice the baud rate, thereby producing samples that are then processed as 9-QAM symbols using a decision directed least squares optimization method. A third stage of channel equalization is filtering performs channel equalization to mitigate linear filtering effects along the transmission link. Data bits are then recovered from the resulting symbol estimates. The received optical signal may also include dual polarized signals for increased bandwidth capacity.

Abstract: Disclosed are a method, computing device, and a non-transitory computer-readable medium storing computer-executable instructions which, when executed, cause a processor to perform operations, which may include: sending a transmit signal including non-linear elements; receiving another signal comprising at least a portion of the transmit signal through a receive chain of a computing device; simulating the transmit chain; generating, by the simulated transmit chain, a first signal associated with the transmit signal; generating a second signal by frequency shifting the first signal; generating one or more first kernels associated with the second signal; performing decimation of the one or more first kernels; transforming the one or more first kernels using a lower triangular matrix, into one or more second kernels; combining the one or more second kernels to generate an echo cancellation signal; and subtracting the echo cancellation signal from the received at least a portion of the transmit signal.

Abstract: A amplifier system may include a predistorter receiving an input signal to generate a predistortion signal, a first converter receiving the predistortion signal to generate a preamplified signal, a power amplifier receiving the preamplified signal to generate an output signal based on the preamplified signal and the input signal, and a second converter sampling the output signal to generate a feedback signal. The power amplifier may produce a distortion signal at a first frequency, the second converter may sample the output signal using a timing signal with a second frequency that is lower than the first frequency to generate the feedback signal, and the predistorter, based upon the feedback signal, may predistort the predistortion signal to reduce the distortion signal at the first frequency.

Abstract: An equalizer circuit of a particular equalization stage of a equalizer circuit is omitted, and input signals that would have otherwise been received at the omitted equalization circuit bypass the equalization stage and are instead processed at an equalizer circuit included at the next stage. Thus, a subset of the received frequency-domain signals can be processed by equalizer circuits at a first stage, while the remaining received frequency-domain signals bypass the first stage and are processed at an equalizer circuit included at a second stage.

Abstract: An adaptive equalizer includes: a speculative equalization circuit which operates a plurality of first tap coefficients with respect to input data and selects operation data corresponding to the input data from a plurality of operation data obtained by the operation; and an adaptive equalization circuit which generates the plurality of first tap coefficients, on the basis of the input data.

Abstract: An exemplary audio signal processing system includes a modal decomposer and an adaptive modal beamformer. The modal decomposer generates a plurality of zeroth-order eigenbeams from audio signals from an (e.g., spherical) array of audio sensors. The adaptive modal beamformer (i) steers the zeroth-order eigenbeams to a specified direction, (ii) adaptively generates a plurality of weighting coefficients for the plurality of zeroth-order eigenbeams, where the plurality of weighting coefficients satisfy a constraint of having only non-negative values, (iii) respectively applies the plurality of adaptively generated weighting coefficients to the plurality of steered, zeroth-order eigenbeams to generate a plurality of weighted, steered, zeroth-order eigenbeams, and (iv) combines the plurality of weighted, steered, zeroth-order eigenbeams to generate an output audio signal. Some embodiments have a further constraint that the weighting coefficients sum to a specified value (e.g., one).

Abstract: A method of designing a truncated filter includes designing a prototype filter with a target frequency response, and selecting a soft truncation function with a roll-off parameter specifying a rate in which the soft truncation function transitions to zero. The method also includes applying the soft truncation function to the prototype filter to produce a truncated filter, and storing the truncated filter to a memory.

Abstract: A method for processing one or more received radio signals is provided. The method may include performing a channel estimation of a transmission channel for at least a portion of the one or more radio signals received, to identify at least one soft channel parameter representing a channel impulse response of the transmission channel, and identifying at least one soft intercarrier interference parameter representing an interference for the one or more radio signals received using a first frequency carrier. The interference is caused by the one or more radio signals received using a second frequency carrier. The method may further include detecting soft data from the one or more radio signals based at least on the at least one soft channel parameter and the at least one soft intercarrier interference parameter.

Abstract: The present invention is directed to a MIMO equalization system and method, optimized for baud rate clock recovery in coherent symbol-spaced DP-QPSK Metro systems. According to this method, the Mueller & Muller timing function is extended to cope with controlled ISI induced signals, while decoupling between MIMO equalization and clock recovery loops, using a midpoint output of the equalizer for timing estimation, instead of its final output. At least a portion of controlled Inter-Symbol Interference (ISI) is kept intact and the controlled ISI is compensated by an MLSE, right after carrier timing synchronization.

Abstract: A serial communication circuit (FIG. 3) is disclosed. The circuit includes an equalizer circuit (306) arranged to receive a data signal (CH 1) and produce an equalized data signal. A log detector circuit (300) receives the data signal and produces a power signal indicating a power level of the data signal. A decision circuit (332) receives the power signal and produces a select signal. A first selection circuit (336) receives a plurality of first correction signals and applies one of the first correction signals to the equalizer circuit in response to the select signal.

Abstract: A wireless communication device includes a delay circuit to generate four or more delay signals, an amplifier circuit amplifying the four or more delay signals to generate four or more amplified delay signals, and a combiner circuit combining at least two amplified delay signals to generate an output signal, a second phase of a second amplified delay signal is between a first phase of a first amplified delay signal and a third phase of a third amplified delay signal, gains of the amplifier circuit for the four or more delay signals are controlled such that the output signal is generated by combining the first amplified delay signal and the third amplified delay signal, and a phase of the output signal is between the first phase of the first amplified delay signal and the third phase of the third amplified delay signal.

Abstract: An apparatus, method, computer readable medium, and system are provided to generate a symbol placement associated with a transmission scheme by transforming a retrieved set of equalization coefficients. Symbols included in the symbol placement may be analyzed and quantified in terms of their distance from a decision boundary. Symbols may be synthesized on an iterative basis in order to obtain visibility into the underlying performance of the transmission scheme over time. If equalization is unable to reduce a signal impairment below a threshold value within a predetermined amount of time, then a determination may be made that a non-linear distortion source is present in a network or communication system. Signals received from a plurality of user terminals may be compared with one another in order to determine a probable location or cause of the non-linear distortion.

Abstract: A continuous-time linear equalizer implementing enhanced analog delay cells with gain-peaking characteristics and a constant delay time. A receiver feed-forward equalizer architecture implements a gain-stage chain, analog multipliers for correcting coefficients, and a linear combiner as an analog summation circuit. Each of the gain stages produces linear gain peaking and presents a constant delay-time (through calibrations) at each stage. Each delay cell includes a transconductance stage configured to convert a differential input voltage signal to a differential output current signal, wherein the transconductance stage includes a differential pair of first and second transistors coupled in a source degeneration configuration, a negative resistance network coupled in parallel with a tunable resistor network, and shunt inductive circuitry coupled in parallel with the negative resistance network.

Abstract: A method of blind tap coefficient adaptation includes receiving a digital data signal including random digital data, equalizing a first portion of the digital data signal using a first set of predetermined tap coefficients and a second portion of the digital data signal using a second set of predetermined tap coefficients. The method includes generating a first eye diagram and a second eye diagram from a first portion and a second portion of an equalized signal, respectively. The first eye diagram is compared with the second eye diagram to determine which of the sets of predetermined tap coefficients results in a data signal having a higher signal quality. The method includes inputting to an equalizer as an initial set of tap coefficients the first set of predetermined tap coefficients or the second set of predetermined tap coefficients according to the determination.

Abstract: A vehicular wireless transmission apparatus includes a memory that stores (i) a default adjustment value relative to a default vehicle model, (ii) a default vehicle model data indicating the default vehicle model, and (iii) a correction value table for correcting the default adjustment value to be compliant with each of different vehicle models different from the default vehicle model. When a host vehicle model data read from a different ECU does not match with the default vehicle model data stored in the memory, it is determined that the vehicular wireless transmission apparatus is presently mounted in a host vehicle model indicated by the host vehicle model data read from the different ECU. The default adjustment value is then corrected by retrieving a correction value corresponding to the host vehicle model data from the correction value table.

Abstract: Data signals transmitted by a plurality of transmitting antennas over a radio channel are demodulated. The method comprises receiving (202) on a plurality of receiving antennas, a data signal and a reference signal, the contents of the reference signal being known a priori to the receiver. The contents of the reference signal are used for calculating (204) an estimated polynomial channel matrix. A polynomial pre-filter matrix is calculated (206, 208) by a decomposition of the estimated polynomial channel matrix into a product of a paraunitary polynomial matrix and an upper triangular polynomial matrix with minimum phase filters on its main diagonal, where the polynomial pre-filter matrix is obtained by calculating the paraconjugate of the paraunitary polynomial matrix. The received data signal is demodulated (212) where the received data signal is multiplied with the calculated polynomial pre-filter matrix.

Abstract: Digital receiver systems and clock recovery techniques for use in digital receiver systems are provided to implement asynchronous baud-rate clock recovery systems for high data rate serial receivers multilevel line modulation. A two-stage postcursor ISI equalization system is provided to efficiently emulate a 4-level DFE (decision feedback equalization) system, for example, while converting a 4-level equalized signal to s 2-level equalized signal. For example, a two stage postcursor ISI equalization system includes a DFE stage which operates on a most significant component of a given 4-level data symbol, followed by a DFFE (decision-feedforward equalizer) stage which operates on a least significant component of the given 4-level data symbol. In parallel with the DFFE stage, an estimate of the least significant component is subtracted from the equalized 4-level data symbol to convert the 4-level data symbol to a 2-level symbol.

Abstract: Circuits that are matched to balanced codes may recover transmitted information in a noise resilient and power efficient manner. Circuit components for processing a balanced code may include one or more of: matched amplification of the signals representing the balanced code, matched equalization and/or filtering on the signals representing the balanced code, matched non-linear filtering on the signaling representing the balanced code to detect the presence of particular symbols and matched latching of the signals representing the balanced code. Such matched circuits and circuit components may be achieved at least in part by incorporating suitable common circuit nodes and/or a single energy source into circuit topologies.

Abstract: A method and a clock receiver circuit for implementing low jitter and enhanced duty cycle, and a design structure on which the subject circuit resides are provided. The clock receiver circuit accepts single-ended complementary metal oxide semiconductor (CMOS) and differential clock signals. The clock receiver circuit includes input circuitry coupled to a differential pair that biasing a reference clock and allows for single-ended or differential clock signals. The differential pair uses multiple current mirrors for switching the polarity of the input signals to achieve enhanced jitter performance, and cross coupled inverters for retaining signal symmetry.

Abstract: A joint estimation and compensation method of RF imperfections in a LIE (Long Term Evolution) uplink system comprises steps: establishing a joint signal model with RF imperfections; according to the joint signal model, undertaking estimation and compensation of CFO, DC offset, multipath channel, IQ imbalance and shaping filter imbalance of a received signal; and using a frequency equalizer to equalize said received signal and determine modulation data. For reducing computational complexity, the present invention further converts the received signal from a time domain to a frequency domain to undertake frequency domain compensation. The present invention can indeed solve the problems of IQ imbalance, filter imbalance, DC offset, multipath channel and CFO and effectively estimate and compensate RF imperfections in the LTE uplink system.

Abstract: Reference processing may be used in a video encoder or decoder to derive reference pictures that are better correlated with a source image to be encoded or decoded, which generally yields better coding efficiency. Methods for filter selection for a reference processing unit adapted for use in a video codec system are discussed. Specifically, methods for filter selection based on performing motion estimation and obtaining distortion/cost information by comparing reference pictures, either processed or non-processed, with the source image to be encoded are discussed.

Abstract: An improved receiver design implements a practical method for modeling users in SIC turbo loop multiuser detection architectures, wherein in each loop unsubtracted estimation errors from previous loops are used to appropriately scale the error covariance matrix for each user, thereby accurately representing the remaining residual interference in the data stream for each desired user. The effect of estimation errors in previous interference cancellation operations is thereby minimized, and symbol estimations in successive turbo loops are improved, for example during multiuser MMSE, multiuser MMSE with interference rejection combining (MMSE-IRC), sample matrix inversion (SMI), or any of their adaptive variants (least mean-square, recursive least square, Kalman filter etc.). The estimated residual symbol energy can be computed per symbol, and then applied to entire data streams, to groups of symbols, or to each symbol separately.

Abstract: The present invention calculates an echo profile on the basis of: a complex baseband signal generated in a front end (2#b) on the basis of a received signal transmitted by an antenna (1#b); and a transmission symbol estimated value (dfin) supplied by a trellis decoder (8). With the estimated transmission symbol (dfin) as a filter input, the echo profile is calculated on the basis of a filter coefficient of an adaptive filter having a received signal as the desired filter-output signal. On the basis of the calculated echo profile, a sampling-frequency control unit (10) controls the sampling frequency of the baseband signal in the front end (2#b). As a result, it is possible to perform a highly accurate timing-recovery control.

Abstract: Methods and systems for obtaining improved joint channel estimates for a multi-user, frequency-multiplexed data transmission such as SC-FDMA or OFDM begins by estimating separate contributions of users (and/or other signal sources) to the received signal based on joint frequency domain channel estimates. A reduced data set is obtained by subtracting contributions of one or more users from the received data, leaving only the estimated contributions of the remaining users, with noise and residual estimation error signal. Time domain joint channel estimation is then performed on the reduced data set, which is feasible because the number of users has been reduced. In exemplary embodiments, the reduced data set includes only one estimated user contribution. This process is repeated to obtain time domain estimates for all of the users. The method can be repeated by using the TD channel estimates to re-estimate the user contributions and calculate revised TD channel estimates.

Abstract: A calibration system built in an electronic device with noise suppression is provided. The calibration system includes a first audio receiving module, a second audio receiving module and a correction module. The correction module corrects an adjustment value of the first audio receiving module and the second audio receiving module. The adjustment value is for adjusting gains of audio received results of the first audio receiving and second audio receiving.

Abstract: A method for discrete multitone (DMT) transmission is disclosed. In the method, a DMT signal is received from a transmission channel. The DMT signal is passed through a time-domain equalizer (TEQ) to obtain an equalized DMT signal. The DMT signal is passed through a target impulse response (TIR) filter to obtain a TIR signal. A mean square error (MSE) of an error signal is obtained from the equalized DMT signal and the TIR signal. A TEQ coefficient vector of the TEQ is iteratively updated based on the MSE of the error signal, a frequency kernel matrix corresponding to the TEQ and a frequency kernel matrix corresponding to the TIR filter.

Abstract: A balanced up-conversion mixer includes: a negative resistance compensation circuit generating and outputting first and second currents based on a DC bias voltage; a mixing circuit allowing a differential radio frequency current (DRFC) signal pair to flow thereinto based on the first and second currents from the negative resistance compensation circuit, a differential oscillating voltage (DOV) signal pair and a differential intermediate frequency voltage (DIFV) signal pair; and a load circuit outputting a differential radio frequency voltage signal pair based on its impedance, the DC bias voltage and the DRFC signal pair. The DRFC signal pair has a frequency associated with those of the DOV and DIFV signal pairs.

Abstract: An equalization processing apparatus includes a correlation matrix generating unit. The correlation matrix generating unit calculates a correlation value between a plurality of paths of a received signal coming from the paths based on a correlation pattern selected from a plurality of correlation patterns indicating combinations of the numbers of correlation chips as arbitrary chips to be used for calculation of the correlation value among all the chips of the received signal and identification numbers of the correlation chips so as to generate a correlation matrix that is applied to equalization processing on the received signal.

Abstract: In at least one embodiment, a lighting system includes a link path power dissipation circuit to actively and selectively control power dissipation of excess energy in a switching power converter of the lighting system. The link path power dissipation circuit dissipates power through a link path of the switching power converter by controlling a link current of the switching power converter. In at least one embodiment, the controller controls the link path power dissipation circuit to limit the link current with a current source and dissipate power in the current source. In at least one embodiment, the link path power dissipation circuit includes a switch to limit the link current and dissipate power in the link path.

Abstract: A computing device is configured to receive information for setting up a simulation of a device. The computing device is further configured to request one or more modules corresponding to one or more features associated with the simulation. The computing device is further configured to receive the one or more modules. The computing device is further configured to perform the simulation using the one or more modules and the different modules. The computing device is further configured to determine that the simulation requires debugging based on a result of the simulation. The computing device is configured to further debug the simulation based on determining that the simulation requires debugging, and provide the result of the simulation including information associated with the debugging of the simulation.

Abstract: Apparatus, methods, and other embodiments associated with reliably determining signal loss over a data communication channel have been described. According to one embodiment, a method includes receiving input signals at an input of a serializer/deserializer device and equalizing the input signals to form equalized signals which compensate for frequency response distortion. The method also includes analyzing the equalized signals to determine whether peak amplitudes of the equalized signals are within a range of amplitudes defined by two threshold values. Furthermore, the method includes analyzing the equalized signals to determine whether logic levels of the equalized signals correspond to a sequence of a same logic level. The method further includes generating a signal absent indicator when the peak amplitudes of the equalized signals are within the range, or when the logic levels of the equalized signals correspond to the sequence of the same logic level.