Abstract: An apparatus and method for measuring power of carrier channel in question and power leaked from an adjacent channel (leakage power) of a transmitter, and calculating a ratio between the leakage power and the carrier power in the time domain using a digital signal processing technique. The power measurement apparatus includes a frequency mixer which receives a signal from a transmission channel in consideration, an A/D converter for converting an output of the frequency mixer to a digital signal, a Hilbert converter for converting the digital signal into a complex signal, a low pass filter for removing low frequency components from the output signal of the Hilbert converter, a bandpass filter for separating the output of the low pass filter into the carrier power and the leakage power, and a power processing unit for computing the ratio between the leakage power and the carrier power.

Abstract: A method of automatically detecting the baud rate of an input signal and an apparatus using the method. A counter is started upon detecting a first transition of the input signal. The counter is stopped upon detecting a second transition of the input signal. After the counter is stopped, the measured count in the counter represents the duration between the first and second transitions of the input signal. The measured count is compared to a plurality of expected counts to determine which of the plurality of expected counts has a value closest to the measured count. The input signal is sampled using a baud rate based on the expected count having a value closest to the measured count.

Abstract: A high speed modem is provided which uses a selectable, desirable portion of the total available bandwidth of a transmission channel. In a preferred embodiment, the invention is incorporated in a dedicated hardware circuit which is connected on one end to a data processor and on the other end to an upstream transceiver through a channel supporting an Asymmetric Digital Subscriber Loop (ADSL) standard. The achievable target data rate of the modem is based on the capabilities of an analog front end (AFE) used in the modem, and a signal processor within the dedicated hardware. In particular, the modem AFE contains subband filtering which causes an upstream transceiver to use only a selected number of available sub-channels for downstream data transmission. The data rate of the modem is increased by upgrading the AFE or the signal processor in order to increase the number of processable transmitted downstream sub-channels.

Abstract: A method for reducing interference and increasing spectral efficiency in a frequency reuse pattern (600) is disclosed. The method includes the steps of generating n original communications beams (302-308) assigned to substantially non-overlapping frequency bands, with the original communications beams extending over a first set of predetermined bandwidths. The method also generates n shifted communications beams (402-408) shifted by an orthogonal frequency separation from the n original communications beams (302-308), with the n shifted communications beams (402-408) extending over a second set of predetermined bandwidths. The method projects the n original communications beams (302-308) and the n shifted communications beams (402-408) in a frequency reuse pattern (600) over a region of interest by alternating the n original communications beams (302-308) with the n shifted communications beams (402-408).

Abstract: A receiver for receiving a cable and terrestrial digital signals of differing VSB modes where the data levels of the various signals have a desired relationship that enables simple data level slicing and error determination. Some of the signals have sync levels that do not conform to the desired relationship and the receiver includes a comb filter for reducing interference when receiving an 8VSB terrestrial signal. The mode of the received signal is determined and a correction factor is applied to the syncs of the signals as needed to reestablish the desired relationship. Operation of the comb filter results in additional levels and a disruption of the desired relationship. For such cases, the comb filtered data levels are modified to make them a subset of the VSB 16 data levels. The modifications are accomplished in feedback paths of the phase tracker after the circuit equalizer and do not affect the data levels passed to the next stage.

Abstract: A triggered clock signal generator produces a periodic output clock signal (CLOCK3) in response to an input TRIGGER signal, wherein a delay between the TRIGGER signal and the first pulse of the CLOCK3 signal is accurately adjustable. The apparatus includes a period generator and a phase adjuster. The period generator, using a periodic input signal (CLOCK1) as a timing reference, responds to the TRIGGER signal by producing a periodic output clock signal (CLOCK2) in adjustably delayed response to a next pulse of the CLOCK1 signal. The phase adjuster phase shifts the CLOCK2 signal to produce the CLOCK3 signal. The phase adjuster compares the phase of the CLOCK1 signal to the phase of the TRIGGER signal to determine an appropriate amount by which to phase shift the CLOCK2 signal so that the time delay between the TRIGGER signal and the first pulse of the CLOCK3 signal is independent of the phase relation between the TRIGGER and CLOCK1 signals.

Abstract: A subscriber unit for wireless communication with a base station in a wireless subscriber communication system includes a FIR chip, a DIF (digital intermediate frequency) chip, a single prccessor chip and a radio. The processor chip transcodes a digital voice input signal to provide digital input symbols; demodulates an output signal received from the base station to provide digital output symbols; and synthesizes a digital voice output signal from the digital output symbols. The FIR chip FIR filters the digital input symbols and generates timing signals for timing the transcoding and synthesizing operations in the processor chip. The DIF chip digitally synthesizes a digital intermediate frequency signal by direct digital synthesis (DDS) and modulates the digital intermediate frequency signal with the filtered input symbols to provide a modulated intermediate frequency input signal. The radio further processes the modulated input signal for transmission to the base station.

Abstract: This invention describes a compressive method of transmitting digital information. Parallel communication branches are coded to transmit ensembles of bits coded so that they can be added together and forwarded over a single transmitted channel without interference. Decoding occurs at a receiving station. In accordance with the invention an iterative method of modulating multiple simultaneous signals is accomplished, so that multiple closely spaced signals can pass through a narrow bandpass filter, where the bandwidth of the communications highway connecting a transmit and receive station is determined by the communication bit rate of the simultaneous bit ensemble. The invention is also advantageously applicable to a compressive digital storage system.

Abstract: An applications program is provided for permitting a user of a host processing system to dynamically control a modem having forward compatible and expandable functionality. In a preferred embodiment, the applications program is designed to run on a personal computer running the Windows.RTM. shell, and the modem is compatible with ADSL promulgated standards. As part of such program, initialization and detection routines determine the capabilities of an ADSL modem, including whether the same has been upgraded to have enhanced data throughput. A calibration routine measures the computing power available to the host processor, and based on this information and other relevant parameters determines nominal setup parameters for the modem. These parameters are stored in a Device Parameter Table so that they can be accessed by various application programs that may make use of such modem.

Abstract: The object of the invention is a method and a circuit arrangement for the processing of a signal in connection with its reception, when the signal conforms to one or more system specifications. The invention is preferably applied in receivers operating on two frequency ranges or in receivers intended to be used in two radio communication systems. Preferably the receiver is a part of a mobile station or a base station of a cellular system. An inventive idea is that before the analog-to-digital converter (324) the intermediate frequency signal (IF1, IF2) is processed on a wide band (310, 320) so that both the narrow band signal and the broadband signal are on the pass-band of the signal line. Then, when a narrow band signal is received, the signal also contains signals outside the band of the payload signal.

Abstract: A parallel interface is provided between a standard parallel port of a computer system and a modem so as to increase the data transfer rate between the two systems without modifying the hardware of the computer system and independently of the application program running on the computer system.

Abstract: A system and method for compensating for slight variances between a first rate at which a far end modem transmits a series of data frames to a near end modem and a second rate at which the near end modem requires reception of the series of data frames. The modems comprise a data pump which receives data frames from the other modem at the first rate on a telephone line. The data frames are received by a data pump which provides the frames a character at a time to a controller coupled to the data pump. The controller places the characters into a pair of frame buffers in a memory coupled to the controller. The controller receives data frames from a vocoder at the second rate to be transmitted to the other modem. The controller attempts to provide data frames to the vocoder at the second rate in order to avoid distortion in the data frame flow, in particular, distortion in the compressed speech.

Abstract: A method and apparatus for increasing the speed of a Universal Asynchronous Receiver/Transmitter ("UART") while maintaining backward compatibility. The UART contains registers for controlling the flow of data. Two registers are the DLL (Divisor Latch Least significant) internal register and the DLM (Divisor Latch Most significant) internal register. Due to the UART not using all of the 16 bits contained in the DLL and DLM registers, an additional register, the Increased Baudrate (IB) register, is created. The IB register uses bits which are unused (or always set to zero in a conventional UART). Through the IB register, the UART may use higher crystal frequencies. In addition, when the UART is at speeds equal to or less than 115,200 bits per second, the IB register is programmed to zero, thus mimicking the operation of a convention UART at speeds equal to or less than 115,200 bits per second. Thus, the method and system for a high speed UART increases speeds while still maintaining backward compatibility.

Abstract: A method is disclosed for efficiently transmitting large numbers of data channels through a satellite (24). The method uses a block encoder (28) that encodes the data channels with a block code to produce an encoded uplink data stream. A modulator (30) modulates the encoded uplink data stream. A transmit antenna (32) then sends the resultant modulated uplink data stream (34) to the satellite (24). The satellite uses a satellite demodulator (48) and a switch (50) to produce an internal data stream consisting of selected data channels in the uplink data stream (34). The internal data stream is fed into a convolutional encoder (52). The output of the convolutional encoder (52) is connected to a satellite modulator (54). The satellite transmit antenna (56) then sends the resultant modulated downlink data stream (58) to a receiver.

Abstract: A Telephony dialer communicates with a telephony application programming interface to conduct transaction over through a communication port in any of a plurality of modes supported by the application programming interface. A snoop module snoops the port to detect an incoming character string requesting a transition into an ancillary mode not supported by the application programming interface. A modem call control module facilitates a transition into the ancillary mode.

Abstract: An integrated cable-termination circuit is presented that can be selectably automatically configured to terminate a signal cable in conformance with one of a plurality of electrical interface standards, including, for example, CCITT/EIA standards V.11/RS-422 and V.35. Selected termination configurations are maintained when input voltages exceed power supply voltages or when power to the circuit is removed. A plurality of cable-termination circuits are provided to form an integrated selectable cable terminator for selectably terminating multiple cables, each in conformance with one of a plurality of electrical interface standards.

Abstract: The process of synchronizing matching circuits of a communication system having modules connected with each other by serial data lines includes providing a transmitter and a receiver in each module as an interface between the serial data lines and a matching circuit; synchronizing at least one other matching circuit with a synchronizing matching circuit and transmitting the required synchronizing signals over the serial data lines; supplying parallel signals from the synchronizing matching circuit to the transmitter connected thereto and converting those parallel signals into serial signals in that transmitter; feeding the serial signals over the serial data lines to the receivers connected with the at least one other matching circuit, converting the serial signals into other parallel signals in those receivers and supplying the other parallel signals to the at least one other matching circuit connected with the receivers; generating an error signal in each receiver on detection of a transmission error; and r

Abstract: Signal-reproduction method and apparatus receive a code string formed by coding a frequency-axial spectral signal obtained by performing the spectral transformation of a time-axial acoustic-waveform signal, and decode the received code string. Subsequently, the method and apparatus reproduce the acoustic-waveform signal by extracting part of the spectral signal, and performing the reverse-spectral-transformation of the extracted part.

Abstract: A code division multiple access (CDMA) is a type of spread-spectrum communication system having a plurality of subscriber units and at least one base station. In order for a first subscriber unit to communicate with a second subscriber unit, a transmitter unit of the first subscriber unit imprints a unique code upon transmission and the second subscriber unit includes a receiver, which uses the code to decode the transmission. In addition, each transmitter with a CDMA communication system includes a stream cipher generator for enciphering the voice and data communications. Each receiver within a CDMA communication system contains an identical or similar stream cipher generator, which is used to decipher the received enciphered communication. The present invention relates to a stream cipher generator having a plurality of linear feedback shift registers to produce a stream cipher for increasing security using ciphered messages.

Abstract: A system of distributing video and/or audio information employs digital signal processing to achieve high rates of data compression. The compressed and encoded audio and/or video information is sent over standard telephone, cable or satellite broadcast channels to a receiver specified by a subscriber of the service, preferably in less than real time, for later playback and optional recording on standard audio and/or video tape.

Abstract: A communication system (700) comprises a plurality of base sites (702-708) which include a first antenna (712) for transmitting a synchronous communication protocol such as a paging protocol and a second antenna (714) for transmitting a rotating phase signal. A communication device (250) takes the synchronous communication protocol and develops a reference signal (220) from the received protocol. The communication device (250) takes the reference signal (220) and the received rotating phase signal (214) and uses a phase detector (216) to produce a phase difference signal (232) which is substantially equal to the angle of the communication device (250) with respect to the particular base site (702-708) which transmitted the signals. In order to determine the location of the communication device at least two such phase difference signals (232), one phase difference signal from at least two different base sites is determined.

Abstract: A universal asynchronous receiver and transmitter includes a transmit clock supplier and a receive clock generator. The clock supplier provides an opposite system with a baud clock in response to its baud rate before transmitting data to the opposite system. The receive clock generator generates a baud clock in response to a baud rate supplied from the opposite system and receives data.

Abstract: A direct digital frequency synthesizer for generating a digital sine or cosine function waveform receive digital input. Memory stores digital samples along portions of sine and cosine function waveforms. The memory outputs the digital samples in response to a first portion of the digital input. Control logic is responsive to the digital input and controls the output of the digital samples from the memory to allow digital samples along a complete cycle of the sine or cosine function waveform to be output even though only portions of the sine and cosine function waveforms are stored in the memory. A linear interpolator receives a second portion of the digital input and modifies digital samples output by the memory to generate intermediate digital samples between the digital samples stored in the memory to improve accuracy.

Abstract: A method for reducing signal degradation in a Digital Loop Carrier System by removing signaling information normally embedded continuously in digital information being conveyed over the system. The system remains in this signaling free communication mode until it detects a change in its supervisory condition requiring that it exit from the signaling free communication mode or terminate communication allowing the system to enter an idle mode.

Abstract: An apparatus for detecting when a dynamic signal is stable. The apparatus is couplable to a first charge pump connected to receive the dynamic signal and generate a first signal as a function of the dynamic signal. The first charge pump has a predetermined capacitance and current.

Abstract: In a communication system in which a transmitter transmits data over a communication channel of a fixed bandwidth to a receiver, the method according to which the transmit data rate is continuously adjusted to a rate which is substantially equal to a short-term average data rate. The channel capacity and/or other characteristics of the system, is continuously adjusted, through changes in transmit power, symbol rate and modulation format, to a level at which the ratio of received signal energy per bit to noise spectral density (E.sub.b /N.sub.o) at the receiver is close to but above its minimum acceptable level, thereby matching the channel capacity and/or other characteristics of the system to the traffic. The system has further attributes which adjust the transmit data rate responsive to conditions involving at least one of data traffic levels, power reserve emergency, thermal load and message priority.

Abstract: An automatic baud rate detector circuit includes a serial input, a counter, a register, a comparator and a state machine circuit. The serial input receives a serial data stream having a bit defined by a first transition from a first logic state to a second logic state and next subsequent second transition from the second logic state to the first logic state. A counter increments a sample count in response to a clock signal when a count enable signal supplied to the counter is active. A register coupled to the counter stores the sample count as a minimum count when a load control signal supplied to the counter is active. The comparator is coupled to the counter and the register and generates a compare signal which indicates whether the sample count is less than the minimum count. The state machine circuit is coupled to the serial input for receiving the serial data stream and supplies the count enable signal to the counter and the load enable signal to the register.

Abstract: A digital communication system is disclosed. A transmitter combines a digitized signal into a digital data stream with variable data rate and transmits it to a receiver. The receiver decodes the received signal with an actually transmitted data rate. For this reason, the receiver has to estimate the coding data rate of the received signal. The receiver decodes the received signal at one decoding rate, which is evaluated whether the decoding rate is correct or not. Such evaluation is achieved by, for example, measuring S/N ratio. According to such estimation the receiver estimates the actual transmitted data rate.

Abstract: In one embodiment a system is provided for multirate communications allowing for different data rates for each data unit on a channel, including both data units from different mobile units and from the same mobile unit. A sending unit preferably begins by determining the rate at which to start communications, and monitors, for example by use of an RSSI detector, for an indication that the rate should be changed. A rate adjustor implements the change, and can make changes as frequently as every data unit. The encoder applies the appropriate rate and inserts a rate indicator indicative of the data or encoding rate, and sends the data unit. On receiving data units, the receiving unit first determines the rate for each data unit or group of units, then appropriately decodes the data unit(s). As a result, the actual data throughput can be adjusted to permit optimized throughput.

Abstract: An apparatus for serial data communication between a plurality of IC chips with a reduced number of inter-chip signal lines. In the apparatus, one IC chip acts as a master, while the other chip(s) are slaved to it. In response to conditions internal to the master chip or in response to a request from at least one of the slave chips, the master chip generates a transfer control signal and a synchronization clock signal. The transfer control signal defines a transfer phase during which data transfer among the chips can take place. The chips take turns sending and receiving data in a multiplexed fashion, with sending and receiving parties designated by a count of synchronization clock signal cycles. The synchronization clock signal is generated at a high frequency, to allow fast data transfer.

Abstract: A communications system 10 having an Asymmetric Digital Subscriber Line (ADSL) transceiver (24) is provided which may be configured either as a central office or a remote terminal in a system. The transceiver (24) operates in a listen/report idle state to report line activity to a host processor (22) prior to being configured as a central office or remote terminal. The host processor configures the transceiver (24) as a central office, remote terminal, or as otherwise specified based on the line activity.

Abstract: Reflections on bus stubs are reduced by sensing when transition occurs on the bus. When a transition is detected, an impedance matched clamp device is activated that clamps the signal to the new (post-transition) voltage for a short period of time. This clamping action reduces the energy in the reflected wave which reduces the ability of the reflected wave to change the voltage on the bus. A receiver detects when a transition occurs on the bus. The output of the receiver is coupled to a delay device. Logic gates combine the output of the delay device with the output of the receiver to produce two pulsed outputs. One pulsed output is pulsed in response to a low-to-high transition on the bus, the other pulsed output is pulsed in response to a high-to-low transition on the bus. These pulsed outputs control the clamp devices so that the clamp devices are only turned on for a short period of time.

Abstract: A receiver time at the reception instant of a transmission time marker contained in received data elements is determined. A multiplicity of successively received data elements are stored, and a receiver time which corresponds to a data element reception instant is also stored. Then the stored data elements are searched for a transmission time marker, and the receiver time is determined which corresponds to the reception instant of the transmission time marker, using the stored receiver time(s). The novel method is distinguished by the fact that the receiver time which corresponds to the reception instant of a single data element is stored per specific or indefinite multiplicity of stored data elements, and that the determination of the receiver time corresponding to the reception instant of the transmission time marker takes place on the basis of the stored receiver time(s). The determination is effected by extrapolating or interpolating based on the stored receiver time(s).

Abstract: A host signal processor (HSP) modem has a software interface between HSP modem hardware and native audio hardware in a host computer. No hard wire connections between modem hardware and audio hardware are required for synchronization. Instead, a software clock recovery system matches a transfer rate of the HSP modem hardware and a transfer rate of the audio hardware by duplicating or deleting samples. The software interface allows the native audio hardware to make audible the handshaking sequence during modem connections which eliminates the need for a speaker and speaker drivers in the modem hardware. The combination of HSP modem hardware, audio hardware, and software executed by the host computer also allows the HSP modem to perform voice communication such as telephone or speakerphone functions.

Abstract: An apparatus and method for automatically selecting different data rates for communicating data over a high bit rate, digital signal line (HDSL) line such as a dry pair line. In one embodiment master/slave interface circuits at opposite ends of a line attempt to establish communications at a higher frequency. If this fails, communications are attempted at a lower frequency. If communications are successful at the higher frequency and communications continue for a predetermined period of time at the higher frequency and then communications fail, an attempt is made to reestablish communications at the higher frequency. An algorithm is set forth for enabling selecting among a plurality of different speeds.

Abstract: A media detection system that detects an external device coupled to a port of a network device and that establishes a working communication link. The media detection system includes a port connector including first and second contact sets and a physical layer device which includes a transmit output and a receive input. The physical layer device monitors its receive input for communication signals and provides a link detect signal indicative thereof. The media detection system further includes a select circuit that selectively couples the transmit output and the receive input of the physical layer device to the first and second contact sets, respectively, of the port connector in a first state and crosses the connection in a second state.

Abstract: A method and apparatus for "training" high speed telephonic modems to adjust or become corrected to obviate imperfections in the telephone channel or line, such as echoes, phase changes and other effects, while concurrently with voice communication on such simple telephone lines through sending test signals in unoccupied spaces of successive time frames created by compressing concurrent digital voice therein.

Abstract: A transmission system for transmission between end devices (1) and (2) is provided for transmitting information signals at a certain common bit rate. This bit rate depends on a symbol rate and a carrier frequency. Via a processing by a processor (9) which cooperates with an instruction memory (10), the largest possible bit rate is determined for exchanging information signals between end devices.

Abstract: A modem that operates selectively in the voice-band frequency band and higher frequency bands is provided. This modem supports multiple line codes, like DMT and CAP. The modem uses a Digital Signal Processor (DSP), so that different existing ADSL line codes, such as Discrete MultiTone (DMT) and Carrierless AM/PM (CAP), can be implemented on the same hardware platform. The modem employs a method for interfacing the modem hardware with a host operating system. The method calls a defined set of host interface functions for command/control, calls a defined set of host interface functions for link correction management, calls a defined set of host interface functions for data sending/receiving, calls a defined set of host interface functions for synchronization between voice-band audio and above voice-band audio, and calls a defined set of host interface functions to use the voice-band as control channel and above voice-band as a data channel.

Abstract: The present invention provides a method and apparatus for providing program clock reference (PCR) data to various devices in a digital transmission system in a robust manner. According to the present invention, PCR data representative of a snapshot of the system clock is encoded only an existing frequency reference signal. The frequency reference signal is a signal to which all clock dependent components lock to ensure that the proper frequency lock is used. By encoding the frequency reference with PCR data, effectively using the frequency reference as a PCR carrier wave, the PCR is efficiently and robustly delivered to the various devices requiring this PCR data.

Abstract: The system and method of the present invention include a modulator which encodes data on a communication signal using angle modulation. The demodulator, receiving the angle modulated communication signal, angle demodulates the angle modulated communication signal to obtain the data. In this manner, separate frequency bands are not required to transmit both the communication signal and the data. The bandwidth of the transmission from the modulator is reduced to the frequency band of the angle modulated communication signal. Additionally, since angle modulations of an audio signal are inaudible to a listener, when the communication signal is an audio signal, the angle modulated audio signal may be directly output to a listener at the demodulator. A multitude of applications exist for the present invention including Lincompex communication.

Abstract: A power reduction system for a UART system having a controllable oscillator for producing free-running clock signals. A controlled clock synchronizer having an output terminal is coupled to the oscillator and responsive to both a first control signal thereto and application of the free-running clock signals thereto to provide synchronized pulses and is responsive to both a second control signal different from the first control signal thereto and application of the free-running clock signals thereto to cease production of the synchronized pulses at the output terminal. A UART core controls the oscillator and the clock synchronizer and is operated under control of clock signals from the clock synchronizer. The controllable oscillator includes an inverter having a feedback circuit thereacross including a switch responsive to the third control signal to cause the oscillator to cease oscillation.

Abstract: A transmission and receiving system, includes a transmit interface unit, a transmit signal processing unit, a transmit signal converting unit and a microwave transmitting unit all a first location. The system further includes a microwave receiving unit, a receive signal converting unit and a second signal processing unit. The system can transmit information such as an audio/video signal of broadcast quality or file information via satellite from anywhere in the world to anywhere in the world (except the polar caps) in real time.

Abstract: A baud rate mixing transmission system includes a transmission apparatus and a reception apparatus. The transmission apparatus transmits data signals at predetermined different baud rates at time intervals. The transmission apparatus adds a baud rate switching signal indicating a baud rate of a data signal to the data signal. The reception apparatus detects the baud rate switching signal added to the data signal from the transmission apparatus, and receives the data signal in accordance with the detected baud rate switching signal.

Abstract: An electronic apparatus capable of transmitting data at two or more different data rates contains transmitter circuitry, a cable connection mechanism, and an isolation transformer having a primary winding and a secondary winding. The transmitter circuitry low-pass filters digital data which the transmitter circuitry transmits to the primary winding at a first data rate. The transmitter circuitry also transmits digital data to the primary winding at a second data rate different from, typically greater than, the first data rate. The cable connection mechanism provides outgoing data from the secondary winding to the communication cable. Importantly, the transmitter circuitry is operable to generate current-sourced data signals at both data rates and then to convert the current-sourced signals into impedance-produced voltage signals that constitute the outgoing data. Current-source amplifier circuitry normally generates the current-sourced signals.

Abstract: A character programming method (10) whereby a synchronization character (17) can be determined in a determine encoding scheme operation (12) and a determine synchronization character operation (14). The synchronization character (17) can then be programmed into a synch character logic (26) of an integrated circuit (20) or a core (20) thereof. The synch character logic (26) can be programmed through a plurality of program pins (30) on the periphery of the integrated circuit (20) or by more sophisticated means such as by sending the programming from a sending integrated circuit (40) to a receiving integrated circuit (42) through a communications line (44).

Abstract: A peripheral device for use with a computer. The peripheral device includes a data path, a control circuit coupled to the data path for controlling data communication and a port. The port includes a connector used by the data path. The connector includes a first set of pins that are used by the data path and a second set of pins that are not used by the data path. The first set of pins are coupled to the data path for data communication from the data path to the computer, and the second set of pins coupled to the control circuit for providing access to the control circuit from the port.

Abstract: A direct conversion receiver has: an I-low-pass filter 9 which has cut-off frequency switching device, switches over the cut-off frequency in accordance with the transmission rate, and eliminates high-frequency components from a modulated signal mixed with a first local signal; a Q-low-pass filter 10 which eliminates high-frequency components from a modulated signal mixed with the first local signal phase-shifted by 90 degrees; transmission rate detecting device 13 for detecting transmission rate information from transmission data detected by transmission data detecting device 12; and I- and Q-low-pass filter cut-off frequency controlling device 15 and 16 for generating I- and Q-control signals which control the cut-off frequency switching device, from the detected transmission rate. The cut-off frequencies of the low-pass filters are switched over in accordance with the transmission rate of reception.

Abstract: A method and apparatus to enable high-quality digital transmissions to a satellite terminal operating in proximity to a radar source combines interleaving a sequence of channel symbols at a land station before transmission of an RF signal to a satellite, increasing the satellite's EIRP to compensate for the effects of the radar's duty factor on received signal power and code distance, detecting the radar pulses at a satellite terminal, blanking the received RF signal to prevent reception of the signal by the modem at the satellite terminal during the radar's ON time, having the modem recognize and eliminate the effect of the gap in the channel signals on its metric calculation, and de-interleaving the sequence of channel symbols. As a result, satellite terminals operating in proximity to radar sources can provide the same quality of service as if there were no radars operating.

Abstract: A method of determining a rate associated with a received signal including the steps of detecting the received signal (40); decoding the received signal at a first rate, determining a first path metric associated with the first rate, decoding the received signal at a second rate, and determining a second path metric associated with the second rate (44); calculating a plurality of discriminant functions based on the first and second path metrics (46); comparing at least one of the plurality of discriminant functions to a first predetermined value (48); and selecting one of the first and second rates as a determined rate based on the comparison.