Inspecting Printed Circuit Boards Patents (Class 382/147)
  • Patent number: 8036445
    Abstract: A pattern matching method includes: detecting an edge of a pattern in a pattern image obtained by imaging the pattern; segmenting the detected pattern edge to generate a first segment set consisting of first segments; segmenting a pattern edge on reference data which serves as a reference for evaluating the pattern to generate a second segment set consisting of second segments; combining any of the segments in the first segment set with any of the segments in the second segment set to define a segment pair consisting of first and second segments; calculating the compatibility coefficient between every two segment pairs in the defined segment pairs; defining new segment pairs by narrowing down the defined segment pairs by calculating local consistencies of the defined segment pairs on the basis of the calculated compatibility coefficients and by excluding segment pairs having lower local consistencies; determining an optimum segment pair by repeating the calculating the compatibility coefficient and the defini
    Type: Grant
    Filed: October 21, 2005
    Date of Patent: October 11, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Atsushi Onishi, Tadashi Mitsui, Yuichiro Yamazaki
  • Publication number: 20110235896
    Abstract: A burr detection apparatus includes an imaging unit and a detection unit. The imaging unit captures an original image of a stencil. The original comprises black and white pixels. The detection includes a CPU and a memory. The CPU includes an extracting module, a deciding module, a counting module, and a comparing module. The extracting module obtains a matrix image with N*N pixels, wherein N is an odd number. The deciding module decides whether the center pixel of the matrix image is a black pixel. The counting module obtains a black pixel total counted among marginal pixels which position in the margin of the matrix image in a predetermined rule. The comparing module compares the black pixel total with a predetermined threshold number, and determines that the part of the stencil corresponding to the matrix image has a burr when the black pixel total is less than the threshold number.
    Type: Application
    Filed: February 21, 2011
    Publication date: September 29, 2011
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: PEI-CHONG TANG
  • Patent number: 8014587
    Abstract: Disclosed is a pattern test method in which a drawing region is divided into a plurality of deflection regions determined by the deflection width of a deflector of a charged beam lithography apparatus, the charged beam lithography apparatus draws a pattern in each divided deflection region on the basis of pattern design data to obtain a sample, and a defect of the pattern on the sample is tested. The method determines the coordinates of a connecting portion of the deflection regions, divides the pattern design data into boundary region pattern data as the connecting portion of the deflection regions and pattern data except for the boundary region pattern data, and obtains image data of the pattern formed on the sample. The method then compares the boundary region pattern data with the image data.
    Type: Grant
    Filed: August 27, 2007
    Date of Patent: September 6, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Yumi Watanabe
  • Patent number: 8009896
    Abstract: A coplanarity inspection device for a printed circuit board includes a base, a supporting disk, a driver, a printed circuit board, a light source, an image acquisition means, and a controller. The supporting disk is arranged on the base, and the driver rotates the supporting disk. The printed circuit board is placed on the supporting disk, and includes a to-be measured side facing downward. The light source projects light beams on the to-be measured side of the printed circuit board. The image acquisition means aims at a specific area of the to-be measured side for image acquisition. The controller is to control the driver, and to store image taken by the image acquisition means. As such, the coplanarity inspection device for a printed circuit board can be employed to inspect whether the coplanarity of the printed circuit board satisfies the standard of setting values in a certain range.
    Type: Grant
    Filed: March 4, 2008
    Date of Patent: August 30, 2011
    Assignee: King Yuan Electronics Co., Ltd.
    Inventor: Chiu-Fang Chang
  • Patent number: 8000519
    Abstract: A method of evaluating an inline inspection recipe compares the capture rate of metal pattern defects in bounding boxes arising from failed electrical test vectors to the capture rate after the bounding box is shifted. A difference between the first and second capture rates indicates whether the inline inspection recipe is valid for capturing killer defects, or if the inline inspection recipe needs to be adjusted. In a particular example, the electrical test vectors are directed at a selected patterned metal layer of an FPGA (M6), and the metal pattern defect data for the selected patterned metal layer is mapped to the bounding box determined by the electrical test vector.
    Type: Grant
    Filed: April 4, 2007
    Date of Patent: August 16, 2011
    Assignee: Xilinx, Inc.
    Inventors: Yongjun Zheng, David Mark, Joe W. Zhao, Felino Encarnacion Pagaduan
  • Patent number: 7983469
    Abstract: Systems and methods for determining an inconsistency characteristic of a composite structure, such as inconsistency density-per-unit area. In one implementation, a method is disclosed for determining an inconsistency characteristic of a composite structure. The method involves determining a first distance from a first reference point of the composite structure to an inconsistency; determining a second distance from a second reference point of the composite structure to the inconsistency; using the first and second distances to establish a reference area of the composite structure; and considering each inconsistency detected within the reference area and producing therefrom an inconsistency characteristic representative of the composite structure.
    Type: Grant
    Filed: August 2, 2007
    Date of Patent: July 19, 2011
    Assignee: The Boeing Company
    Inventors: Roger W Engelbart, Reed Hannebaum, Steve Schrader
  • Patent number: 7957579
    Abstract: An apparatus for processing a defect candidate image, including: a scanning electron microscope for taking an enlarged image of a specimen by irradiating and scanning a converged electron beam onto the specimen and detecting charged particles emanated from the specimen by the irradiation; an image processor for processing the image taken by the scanning electron microscope to detect defect candidates on the specimen and classify the detected defect candidates into one of plural classes; a memory for storing output from the image processor including images of the detected defect candidates; and a display unit which displays information stored in the memory and an indicator, wherein the display unit displays a distribution of the detected and classified defect candidates in a map format by distinguishing by the classified class, and the display unit also displays an image of a defect candidate stored in the memory together with the map which is indicated on the map by the indicator.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: June 7, 2011
    Assignee: Hitachi, Ltd.
    Inventors: Takashi Hiroi, Masahiro Watanabe, Chie Shishido, Aritoshi Sugimoto, Maki Tanaka, Hiroshi Miyai, Asahiro Kuni, Yasuhiko Nara
  • Patent number: 7957580
    Abstract: A workpiece picking device capable of correctly detecting the size of a workpiece. The picking device has a robot capable of picking the same kind of workpieces contained in a work container, a robot controller for controlling the robot, a video camera positioned above the work container so as to widely image the workpieces and an image processor for processing an image obtained by the video camera. The three-dimensional position and posture of each workpiece is measured by a three-dimensional vision sensor arranged on a wrist element of the robot.
    Type: Grant
    Filed: January 31, 2007
    Date of Patent: June 7, 2011
    Assignee: Fanuc Ltd
    Inventors: Kazunori Ban, Fumikazu Warashina, Keisuke Watanabe
  • Patent number: 7933452
    Abstract: A visual image retrieval system is provided. The system includes an image database for storing images. The system also includes a preprocessor communicatively linked to the image database for segmenting the images and generating based upon segmented images a region-of-interest (ROI) extraction output. Additionally, the system includes an ROI feature extraction module for computing ROI feature vectors based upon the output, and a global feature extraction module for computing global feature vectors based upon the output. The system further includes an ROI feature vectors database for storing the ROI feature vectors, and a global feature vectors database for storing the global feature vectors. The system also includes a perceptually-relevant image search machine (PRISM) interface for displaying query images and retrieved images, the retrieved images being retrieved in response to a user selecting at least one displayed query image.
    Type: Grant
    Filed: December 11, 2007
    Date of Patent: April 26, 2011
    Assignee: Florida Atlantic University
    Inventors: Oge Marques, Liam Mayron
  • Patent number: 7925072
    Abstract: Methods for identifying array areas in dies formed on a wafer and methods for setting up such methods are provided. One method for identifying array areas in dies formed on a wafer includes comparing an array pattern in a template image acquired in one of the array areas to a search area image acquired for the wafer. The method also includes determining areas in the search area image in which a pattern is formed that substantially matches the array pattern in the template image based on results of the comparing step. In addition, the method includes identifying the array areas in the dies formed on the wafer based on results of the determining step.
    Type: Grant
    Filed: March 8, 2007
    Date of Patent: April 12, 2011
    Assignee: KLA-Tencor Technologies Corp.
    Inventors: Chien-Huei (Adam) Chen, Ajay Gupta, Richard Wallingford, Kaustubh (Kaust) Namjoshi, Mike Van Riet, Michael Cook
  • Patent number: 7899237
    Abstract: An embodiment relates generally to a method of testing a mixed signal device. The method includes monitoring multiple parameters of the mixed signal device and scanning the mixed signal device with an optical source. The method also includes forming multiple windows, where each window is assigned to a respective parameter. The method further includes comparing an image from a respective image to a reference image to determine an existence of an anomaly.
    Type: Grant
    Filed: March 8, 2007
    Date of Patent: March 1, 2011
    Assignee: Texas Instruments Incorporated
    Inventors: Dat T. Nguyen, Thao To, David Maxwell, Naweed Anjum
  • Patent number: 7894658
    Abstract: An apparatus for processing a defect candidate image, including: an imager for taking an enlarged image of a specimen; an image processor for processing the image taken by the imager to detect defect candidates existing on the specimen and classify the detected defect candidates into one of plural defect classes; a memory for storing information of the defect candidates including the images of the defect candidates and the classified defect class data outputted from the image processor; and a display unit having a display screen for displaying information stored in the memory, wherein the display unit displays an image of the defect candidates together with the defect class data stored in the memory and the displayed defect class data is changeable on the display screen, and the memory changes the stored defect class data of the displayed defect candidate to the changed defect class data.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: February 22, 2011
    Assignee: Hitachi, Ltd.
    Inventors: Takashi Hiroi, Masahiro Watanabe, Chie Shishido, Aritoshi Sugimoto, Maki Tanaka, Hiroshi Miyai, Asahiro Kuni, Yasuhiko Nara
  • Patent number: 7889909
    Abstract: It is an object of the invention to provide a suitable method for identifying depression/protrusion information in a design data; and a program and an apparatus for the same; for example, even in the case that similar portions are arranged, to provide a method for enabling a pattern matching with high precision between the design data and an image obtained by an image formation apparatus or the like; and a program and an apparatus for the same. To attain the above object, a pattern matching method, wherein, using information concerning a depression and/or a protrusion of the pattern on the design data, or a pattern portion and/or a non-pattern portion on the design data, pattern matching is executed between the pattern on the design data and the pattern on said image; and a program for the same are provided.
    Type: Grant
    Filed: March 21, 2007
    Date of Patent: February 15, 2011
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Hiroyuki Shindo, Akiyuki Sugiyama, Takumichi Sutani, Hidetoshi Morokuma, Hitoshi Komuro
  • Patent number: 7873203
    Abstract: The present invention involves a computationally efficient method of determining the locations of standard cells in an image of an IC layout. The initial step extracts and characterizes points of interest of the image. A coarse localization of possible standard cell locations is performed and is based on a comparison of the points of interest of an instance of an extracted standard cell and the remaining points of interest in the image. A more rigid comparison is made on the list of possible locations comprising a coarse match and a fine match. The coarse match results in a shortlist of possible locations. The fine match performs comparisons between the template and the shortlist. Further filtering is done to remove the effects of noise and texture variations and statistics on the results are generated to achieve the locations of the standard cells on the IC layout.
    Type: Grant
    Filed: August 29, 2008
    Date of Patent: January 18, 2011
    Assignee: Semiconductor Insights Inc.
    Inventors: Vyacheslav L. Zavadsky, Val Gont, Edward Keyes, Jason Abt, Stephen Begg
  • Patent number: 7869644
    Abstract: Inspection apparatus are used to inspect a substrate as solder is printed, components are mounted and the substrate is heated for a soldering process. Images of the substrate are taken both before and after a production process such as the component mounting process and the soldering process and their differences are extracted. Each component on the substrate may be identified by differentiation and binarization processes and setting conditions for windows are determined corresponding to identified components. Windows are set according to determined setting conditions for inspecting the conditions of the substrate by using image data in the set windows and standard inspection data corresponding to component identification data.
    Type: Grant
    Filed: July 20, 2005
    Date of Patent: January 11, 2011
    Assignee: OMRON Corporation
    Inventors: Kiyoshi Murakami, Masato Ishiba, Jun Kuriyama, Teruhisa Yotsuya
  • Patent number: 7869645
    Abstract: Embodiments of the present invention enable image capture and validation. Certain applications of the present invention are its use in various embodiments of a system for inspection of a printed circuit board (“PCB”) substrate. In embodiments, an image capture system comprising a camera and a two-dimensional surface supporting an image may be calibrated based on configuration parameters of an image to be captured and of a simulated reference bitmap based on the image. In embodiments, the position of the image to be captured on the two-dimensional surface is determined based on calibration parameters. In embodiments, consistency of quality of captured images is maintained by validating selected characteristics of each image as it is being captured.
    Type: Grant
    Filed: July 22, 2008
    Date of Patent: January 11, 2011
    Assignee: Seiko Epson Corporation
    Inventor: Ali Zandifar
  • Publication number: 20110002529
    Abstract: An inspection method for inspecting a device mounted on a substrate, includes generating a shape template of the device, acquiring height information of each pixel by projecting grating pattern light onto the substrate through a projecting section, generating a contrast map corresponding to the height information of each pixel, and comparing the contrast map with the shape template. Thus, a measurement object may be exactly extracted.
    Type: Application
    Filed: July 2, 2010
    Publication date: January 6, 2011
    Applicant: KOH YOUNG TECHNOLOGY INC.
    Inventors: Joong-Ki Jeong, Yu-Jin Lee, Seung-Jun Lee
  • Patent number: 7865012
    Abstract: A failure analysis apparatus 10 is composed of an inspection information acquirer 11 for acquiring a failure observed image P2 of a semiconductor device, a layout information acquirer 12 for acquiring layout information, and a failure analyzer 13 for analyzing a failure. The failure analyzer 13 extracts as a candidate interconnection for a failure, an interconnection passing an analysis region, out of a plurality of interconnections, using interconnection information to describe a configuration of interconnections in the semiconductor device by a pattern data group of interconnection patterns in respective layers, and, for extracting the candidate interconnection, it performs an equipotential trace of the interconnection patterns using the pattern data group, thereby extracting the candidate interconnection.
    Type: Grant
    Filed: October 26, 2006
    Date of Patent: January 4, 2011
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Toshiyuki Majima, Akira Shimase, Hirotoshi Terada, Kazuhiro Hotta
  • Patent number: 7853352
    Abstract: A method of self calibrating a positioning system, by positioning a reference device provided with reference markings at different calibration locations, and sensing the positions of the reference markings at each calibration location, is provided. The calibration parameters are selected such that differences in relative positions of the sensed locations, expressed in actual coordinates for different calibration locations are reduced or preferably minimized.
    Type: Grant
    Filed: March 3, 2006
    Date of Patent: December 14, 2010
    Assignee: Mydata Automation AB
    Inventors: Peter Österlund, Roger Jonasson
  • Patent number: 7844099
    Abstract: A method for inspecting a semiconductor wafer fabricated for image sensing operation that has had a transparent protective tape layer applied to a front or active wafer surface. The method includes quantifying chip defects in the image sensor wafer that lie under the protective layer using automatic disposition equipment.
    Type: Grant
    Filed: November 15, 2006
    Date of Patent: November 30, 2010
    Assignee: International Business Machines Corporation
    Inventors: Timothy C. Krywanczyk, Timothy E. Neary, Erik M. Probstfield
  • Patent number: 7844103
    Abstract: An automated optical inspection system includes a pulsed light source illuminating an article to be inspected thereby to generate at least one image thereof, at least one camera having a field of view, and a relative motion provider operative to provide relative motion between the camera and at least one image of at least a portion of the article. The relative motion provider may include a first continuous motion provider and a second, velocity-during-imaging-lessening motion provider. The relative motion is a superposition of a first continuous component of motion provided by the first motion provider and a second, smaller component of motion provided by the second motion provider which lessens the velocity of the at least one image relative to the camera, during imaging.
    Type: Grant
    Filed: October 12, 2006
    Date of Patent: November 30, 2010
    Assignee: Applied Materials Israel, Ltd.
    Inventor: Ehud Tirosh
  • Publication number: 20100290696
    Abstract: In order to measure a measurement target on a PCB, height information of the PCB is acquired by using a first image photographed by illuminating a grating pattern light onto the PCB. Then, a first area protruding on the PCB by greater than a reference height is determined as the measurement target by using the height information. Thereafter, color information of the PCB is acquired by using a second image photographed by illuminating light onto the PCB. Then, the first color information of the first area determined as the measurement target out of the color information of the PCB is set as reference color information. Thereafter, the reference color information is compared with color information of an area except for the first area to judge whether the measurement target is formed in the area except for the first area. Thus, the measurement target may be accurately measured.
    Type: Application
    Filed: May 13, 2010
    Publication date: November 18, 2010
    Applicant: KOH YOUNG TECHNOLOGY INC.
    Inventors: Joong-Ki JEONG, Min-Young KIM, Hee-Wook YOU
  • Patent number: 7835564
    Abstract: Non-destructive, below-surface defect rendering of an IC chip using image intensity analysis is disclosed. One method includes providing an IC chip delayered to a selected layer; determining a defect location below a surface of the selected layer using a first image of the IC chip obtained using an CPIT in a first mode; generating a second image of the IC chip with the CPIT in a second mode, the second image representing charged particle signal from the defect below the surface of the selected layer; and rendering the defect by comparing an image intensity of a reference portion of the second image not including the defect with the image intensity of a defective portion of the second image including the defect, wherein the reference portion and the defective portion are of structures expected to be substantially identical.
    Type: Grant
    Filed: April 30, 2007
    Date of Patent: November 16, 2010
    Assignee: International Business Machines Corporation
    Inventors: Delia R. Bearup, Andrew S. Dalton, James J. Demarest, Loren L. Hahn, Bruce J. Redder, Francis R. Wallingford
  • Patent number: 7831085
    Abstract: According to an aspect of the invention, there is provided a method comprising detecting a defect of a pattern formed on the photo mask, acquiring a pattern image of a first region on the photo mask, extracting a pattern contour from the pattern image to acquire pattern contour extracted data, producing first graphic data based on the pattern contour extracted data and a pixel size, acquiring pattern data including the first region and corresponding to a second region from design data, producing second graphic data from the pattern data, replacing the second graphic data with the first graphic data to produce third graphic data only in a region where the first graphic data is superimposed upon the second graphic data, producing transfer patterns of pattern shapes represented by the second and third graphic data, and comparing the transfer patterns to judge whether or not the defect needs to be corrected.
    Type: Grant
    Filed: October 16, 2008
    Date of Patent: November 9, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takashi Hirano, Eiji Yamanaka
  • Patent number: 7826655
    Abstract: A method of correcting a mask pattern for manufacturing a semiconductor device is disclosed. The method includes extracting a corner portion of a transistor portion. A distance from the corner portion to a line portion is extracted. A distance where the line portion does not overlap a rounding of the corner portion generated after a wafer process is obtained. A correction rule is made for a correction whether the corner portion is notched or not from the obtained distance. A corresponding relationship between the distance and an intersection part is obtained and a correction is made based on the correction rule to the corner portion.
    Type: Grant
    Filed: December 3, 2007
    Date of Patent: November 2, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kei Yoshikawa, Satoshi Usui, Koji Hashimoto
  • Patent number: 7822261
    Abstract: For each teaching image, a plurality of patterns of color pickup regions each include a first region for picking up a color of a first part and a second region for picking up a color of a second part are set, the color of each pixel in the first region and the color of each pixel in the second region are mapped as a target point and an exclusion point respectively, to a color space for each of the patterns of the color pickup regions, a degree in separation between a target point distribution and an exclusion point distribution in the color space is calculated for each of the patterns of the color pickup regions, a pattern of a color pickup region having a maximum degree in separation is selected, a color range which divides the color space and has the largest difference between the number of target points and the number of exclusion points in the selected pattern therein is found, and the found color range is set as a color condition used in a board inspecting process.
    Type: Grant
    Filed: June 21, 2006
    Date of Patent: October 26, 2010
    Assignee: OMRON Corporation
    Inventors: Toshihiro Moriya, Hirotaka Wada, Takako Onishi, Atsushi Shimizu, Akira Nakajima
  • Patent number: 7822301
    Abstract: A printed circuit board with a printed pattern of fiducial marks on a first side of the printed circuit board including a first indicia including a right triangle with its base parallel to a first edge of the board and an alignment mark adjacent thereto, and a second indicia including a right triangle with its base parallel to a second edge of the board opposite said first edge, and an alignment mark adjacent thereto.
    Type: Grant
    Filed: February 6, 2009
    Date of Patent: October 26, 2010
    Assignee: Emcore Corporation
    Inventor: Thomas Whitehead
  • Patent number: 7816062
    Abstract: In an exposure process or etching process, an image feature amount useful for estimating a cross-sectional shape of a target evaluation pattern, process conditions for the pattern, or device characteristics of the pattern is calculated from an SEM image. The image feature amount is compared with learning data that correlates data preliminarily stored in a database, which data includes cross-sectional shapes of patterns, process conditions for the patterns, or device characteristics of the patterns, to the image feature amount calculated from the SEM image. Thereby, the cross-sectional shape of the target evaluation pattern, the process conditions of the pattern, or the device characteristics of the pattern are nondestructively calculated.
    Type: Grant
    Filed: November 3, 2006
    Date of Patent: October 19, 2010
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Wataru Nagatomo, Hidetoshi Morokuma, Atsushi Miyamoto, Hideaki Sasazawa
  • Patent number: 7817847
    Abstract: A robot system having a vision sensor. The robot system includes a robot; a robot controlling section for controlling an operation of the robot; an imaging section provided on the robot and obtaining image data of a working environment of the robot; an image processing section for processing the image data obtained in the imaging section; a vision controlling section for controlling the imaging section and the image processing section to cause execution of obtaining the image data, transmitting the image data thus obtained, and processing the image data; and a communication network to which the robot controlling section, the image processing section and the vision controlling section are connected.
    Type: Grant
    Filed: October 5, 2005
    Date of Patent: October 19, 2010
    Assignee: Fanuc Ltd
    Inventors: Yoshiki Hashimoto, Minoru Enomoto
  • Patent number: 7811427
    Abstract: Permanent or temporary alignment and/or retention structures for receiving multiple components are provided. The structures are preferably formed monolithically via a plurality of deposition operations (e.g. electrodeposition operations). The structures typically include two or more positioning fixtures that control or aid in the positioning of components relative to one another, such features may include (1) positioning guides or stops that fix or at least partially limit the positioning of components in one or more orientations or directions, (2) retention elements that hold positioned components in desired orientations or locations, and/or (3) positioning and/or retention elements that receive and hold adjustment modules into which components can be fixed and which in turn can be used for fine adjustments of position and/or orientation of the components.
    Type: Grant
    Filed: March 12, 2007
    Date of Patent: October 12, 2010
    Assignee: Microfabrica Inc.
    Inventors: Adam L. Cohen, Daniel I. Feinberg, Christopher A. Bang
  • Patent number: 7809180
    Abstract: An image generation method for distinguishing a shape of a component includes: a color image taking step (S101) of taking an image of the component in color, and a conversion step (S102, S104) of converting the color image taken in the color image taking step (S101) into a black-and-white grayscale image in which the shape of the component is shown in black-and-white grayscale.
    Type: Grant
    Filed: July 4, 2005
    Date of Patent: October 5, 2010
    Assignee: Panasonic Corporation
    Inventors: Atsushi Tanabe, Shozo Fukuda, Hirotake Nakayama
  • Patent number: 7801353
    Abstract: Images of areas of a wafer are generated and registered with respect to computer aided design (CAD) data to provide a registered images. Defects in the wafer are then detected by comparing the registered images to one another and defect location information is generated in CAD coordinates.
    Type: Grant
    Filed: January 31, 2007
    Date of Patent: September 21, 2010
    Assignee: Applied Materials Israel, Ltd.
    Inventors: Gilad Almogy, Benyamin Buller
  • Patent number: 7796800
    Abstract: Determining a dimensional change in a surface of an object is described. At a first time, a first image of the surface is acquired at a first spatial window thereon having a first known position relative to a frame of reference. At a second time, a second image of the surface is acquired at a second spatial window thereon having a second known position relative to the frame of reference. The first image and the second image are processed according to an image displacement sensing algorithm to determine a relative translation of a first point on the surface between the first and second times. The relative translation of the first point, the first known position, and the second known position are used to determine the dimensional change in the surface between the first and second times.
    Type: Grant
    Filed: January 28, 2005
    Date of Patent: September 14, 2010
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Carl E. Picciotto, William M. Tong, Jun Gao
  • Patent number: 7793412
    Abstract: A component-embedded board fabrication method includes detecting, before the board is covered with a first insulating layer, the actual position of a first electronic component formed on a surface of the board, calculating a displacement between the design position of the first electronic component on the surface of the board and holding the displacement as first displacement data, and correcting, based on the first displacement data, design data to be used for processing the board after the board is covered with the first insulating layer.
    Type: Grant
    Filed: July 3, 2003
    Date of Patent: September 14, 2010
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Masatoshi Akagawa, Kazunari Sekigawa, Shinichi Wakabayashi
  • Patent number: 7769225
    Abstract: Computer-implemented methods and systems for detecting defects in a reticle design pattern are provided. One computer-implemented method includes acquiring images of a field in the reticle design pattern. The images illustrate how the field will be printed on a wafer at different values of one or more parameters of a wafer printing process. The field includes a first die and a second die. The method also includes detecting defects in the field based on a comparison of two or more of the images corresponding to two or more of the different values. In addition, the method includes determining if individual defects located in the first die have substantially the same within die position as individual defects located in the second die.
    Type: Grant
    Filed: December 20, 2005
    Date of Patent: August 3, 2010
    Assignee: KLA-Tencor Technologies Corp.
    Inventors: Sagar A. Kekare, Ingrid B. Peterson, Moshe E. Preil
  • Patent number: 7760930
    Abstract: The present disclosure provides a system and method for recognizing a defect image associated with a semiconductor substrate. In one example, the method includes collecting defect data of the defect image by testing and measuring the semiconductor substrate, extracting a pattern from the defect data, normalizing a location, orientation, and size of the pattern, and identifying the pattern after the pattern is normalized.
    Type: Grant
    Filed: February 21, 2006
    Date of Patent: July 20, 2010
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Ting Lin, Chih-Cheng Chou, Chih-Hung Wu, Chia-Hua Chang
  • Patent number: 7756661
    Abstract: A method for measuring a dimension of a pattern formed on a semiconductor light-exposure mask includes performing a preparation arranged to form a first relationship between measured values of dimensions of opaque patterns and misalignments of detected edge positions, and a second relationship between measured values of dimensions of clear patterns and misalignments of detected edge positions, performing detection/measurement arranged to detect opposite two edge positions of a measurement target pattern, and to measure a dimension of the measurement target pattern bounded by the two edge positions and dimensions of adjacent patterns respectively adjacent to the two edge positions, and performing correction arranged to respectively correct two detected edge positions of the measurement target pattern, with reference to one or both of the first and second relationships formed in the preparation, and measured values of the dimensions obtained in the detection/measurement.
    Type: Grant
    Filed: February 1, 2007
    Date of Patent: July 13, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Takeshi Yamane
  • Patent number: 7756318
    Abstract: A mask/reticle pattern inspection apparatus capable of readily detecting local critical dimension (CD) errors of a circuit pattern of a testing workpiece is disclosed. This apparatus includes a search unit for finding a plurality of resembling or “look-alike” adjacent patterns around a specific pattern on the workpiece, which have similarity to the specific pattern. The inspection apparatus also includes a calculation unit for obtaining dissimilarity between the specific pattern and look-alike adjacent pattern, a variation evaluation unit which excludes an allowable error from the dissimilarity to thereby obtain a local CD error criterion value, and a CD error decision unit for determining the presence of a local CD error when the criterion value exceeds a threshold value in case the distance between the specific and look-alike patterns increases. A pattern inspection method is also disclosed.
    Type: Grant
    Filed: November 15, 2006
    Date of Patent: July 13, 2010
    Assignee: Advanced Mask Inspection Technology Inc.
    Inventor: Yuichi Nakatani
  • Patent number: 7751610
    Abstract: Provided is an image recognition method in which a first pattern area which is set inside a target to be recognized and a second pattern area which is set outside the target are used as a mask pattern. When a comparison circuit judges that a difference obtained by subtracting, by a differential circuit, the largest luminance value in the target image contained in the first pattern area, which is detected by a largest value detection circuit, from the smallest luminance value in the target image contained in the second pattern area, which is detected by the smallest value detection circuit, is larger than a certain offset amount, the matching judgement that a predetermined pattern is present is made. This recognition judgment is performed with the whole target image being scanned.
    Type: Grant
    Filed: March 11, 2005
    Date of Patent: July 6, 2010
    Assignee: Panasonic Corporation
    Inventor: Shinichi Takarada
  • Patent number: 7751611
    Abstract: An appearance inspection apparatus for inspecting a board is provided with multiple imaging units for capturing respective images of the board. Multiple slave personal computers respectively provided for the multiple imaging units inspect the board by referring to data of images of the board captured by the respective imaging units. Each of the multiple slave personal computers transmits, to other slave personal computers, shared data that are necessary for inspection by other slave personal computers. The shared data is acquired by each of the slave personal computers from data of an image of the inspection piece captured by an associated imaging unit. Each of the slave personal computers inspects an appearance of the board by referring to the shared data received from another slave personal computer.
    Type: Grant
    Filed: December 22, 2005
    Date of Patent: July 6, 2010
    Assignee: Saki Corporation
    Inventors: Yoshihiro Akiyama, Yong Yang, Sakie Akiyama
  • Patent number: 7742071
    Abstract: The present invention relates to apparatus and methods that reliably detect defects on centerplane connectors. The apparatus and methods include a visual inspection system. The visual inspection system includes a control box, an inspection cart, a camera jig, and a vision system. The vision system has a light emitting diode (LED) lighting system that provides the necessary lighting for the camera on the vision system. The vision system is mounted to the camera jig via a spring-loaded mechanism. The camera jig has dimensions similar to a daughter card that is used with the centerplane connectors. The camera jig also includes a motor and worm gear assembly that raise and/or lower the camera's view of the centerplane connectors. The control box is mounted to the inspection cart so that an operator can use it to control the up/down movements of the vision system. A timer/relay may be build into the control box to allow controlled/fixed movements of the vision system.
    Type: Grant
    Filed: January 23, 2003
    Date of Patent: June 22, 2010
    Assignee: Oracle America, Inc.
    Inventors: John F. Kennedy, Chuck V. Ho, John S. Mew, Ricky A. Smith, Thomas E. Roach, Brian T. Evans, Greg I. Henry
  • Patent number: 7742620
    Abstract: A method for identifying potential targets as far away as possible is disclosed. In a simple background scene such as a blue sky, a target may be recognized from a relatively long distance, but for some high clutter situations such as mountains and cities, the detection range is severely reduced. The background clutter may also be non-stationary further complicating the detection of a target. To solve these problems, target detection (recognition) of the present invention is based upon temporal fusion (integration) of sensor data using pre-detection or post-detection integration techniques, instead of using the prior art technique of fusing data from only a single time frame. Also disclosed are double-thresholding and reversed-thresholding techniques which further enhance target detection and avoid the shortcomings of the traditional constant false alarm rate (CFAR) thresholding technique.
    Type: Grant
    Filed: March 18, 2004
    Date of Patent: June 22, 2010
    Assignee: Lockhead Martin Corporation
    Inventors: Hai-Wen Chen, Teresa L. Olson, Surachai Sutha
  • Patent number: 7741601
    Abstract: A system for further enhancing speed, i.e. improving throughput in a SEM-type inspection apparatus is provided. An inspection apparatus for inspecting a surface of a substrate produces a crossover from electrons emitted from an electron beam source 25•1, then forms an image under a desired magnification in the direction of a sample W to produce a crossover. When the crossover is passed, electrons as noises are removed from the crossover with an aperture, an adjustment is made so that the crossover becomes a parallel electron beam to irradiate the substrate in a desired sectional form. The electron beam is produced such that the unevenness of illuminance is 10% or less. Electrons emitted from the sample W are detected by a detector 25•11.
    Type: Grant
    Filed: March 11, 2008
    Date of Patent: June 22, 2010
    Assignee: Ebara Corporation
    Inventors: Nobuharu Noji, Tohru Satake, Hirosi Sobukawa, Toshifumi Kimba, Masahiro Hatakeyama, Shoji Yoshikawa, Takeshi Murakami, Kenji Watanabe, Tsutomu Karimata, Kenichi Suematsu, Yutaka Tabe, Ryo Tajima, Keiichi Tohyama
  • Patent number: 7734083
    Abstract: The present invention relates to a bendable printed board, an image pickup apparatus, and a camera. The bendable printed board is provided with: a first end connected to a moving body movable in an arbitral direction within a predefined plane; a second end connected to fixed body with slack providing movability to the moving body; and a slit formed on at least a part of a slack portion of the printed board.
    Type: Grant
    Filed: June 29, 2006
    Date of Patent: June 8, 2010
    Assignee: Konica Minolta Opto, Inc.
    Inventors: Tougo Teramoto, Masahiro Takashima
  • Patent number: 7729529
    Abstract: Various computer-implemented methods are provided. One method for sorting defects in a design pattern of a reticle includes searching for defects of interest in inspection data using priority information associated with individual defects in combination with one or more characteristics of a region proximate the individual defects. The priority information corresponds to modulation levels associated with the individual defects. The inspection data is generated by comparing images of the reticle generated for different values of a lithographic variable. The images include at least one reference image and at least one modulated image. A composite reference image can be generated from two or more reference images. The method also includes assigning one or more identifiers to the defects of interest. The identifier(s) may include, for example, a defect classification and/or an indicator identifying if the defects of interest are to be used for further processing.
    Type: Grant
    Filed: December 7, 2004
    Date of Patent: June 1, 2010
    Assignee: KLA-Tencor Technologies Corp.
    Inventors: Kenong Wu, David Randall, Kourosh Nafisi, Ramon Ynzunza, Ingrid B. Peterson, Ariel Tribble, Michal Kowalski, Lisheng Gao, Ashok Kulkarni
  • Patent number: 7724941
    Abstract: A defect analysis place specifying device for specifying defect analysis places from an inspection result of produced printed wiring boards in an electronic part mounting device for mounting parts on the printed wiring boards through plural steps, including an accepting unit for accepting plural printed wiring boards as inspection targets every predetermined unit, a defect mode specifying unit for specifying a defect mode having a predetermined frequency or more on the basis of the defect modes of the printed wiring boards and the occurrence frequencies thereof in the last step of the plural steps every unit accepted by the accepting unit, an extracting unit for extracting a combination having the same abnormal phenomenon causing the defect mode specified by the defect mode specifying unit in the other steps than the last step in the plural steps, and an output unit for outputting the combination extracted by the extracting unit.
    Type: Grant
    Filed: October 13, 2006
    Date of Patent: May 25, 2010
    Assignee: Omron Corporation
    Inventors: Hiroyuki Mori, Hisashi Sugihara
  • Patent number: 7724939
    Abstract: Disclosed is an apparatus for analyzing a plurality of image portions of at least a region of a sample. The apparatus includes a plurality of processors arranged to receive and analyze at least one of the image portions, and the processors being arranged to operate in parallel. The apparatus also includes a data distribution system arranged to receive image data, select at least a first processor for receiving a first image from the image data, select at least a second processor for receiving a second image from the image data, and output the first and second image portions to their selected processors.
    Type: Grant
    Filed: August 4, 2006
    Date of Patent: May 25, 2010
    Assignee: KLA-Tencor
    Inventors: Edward M. Goldberg, Erik N. Johnson, Lawrence R. Miller
  • Patent number: 7718912
    Abstract: A outer surface-inspecting method for judging whether a defect of a defective portion (27) extracted from an inspection area in an image (21A) of an object to be inspected through comparison with a template is acceptable or not, including: dividing the inspection area into a plurality of sections (22, 23, 24a, 24b, 25a, 25b, 28a, 28b, 28c) respectively having different acceptable levels (CONDITION 1-6); judging, when at least one extracted defective portion (27) spreads out over some of the sections (28a, 28b, 28c) respectively having different acceptable levels, whether the defect of the defective portion (27) is acceptable or not based on a strictest acceptable level (CONDITION 3) of all the acceptable levels (CONDITION 3-5) respectively set on the plurality of sections (28a, 28b, 28c) on which the defective portion (27) is located.
    Type: Grant
    Filed: December 14, 2005
    Date of Patent: May 18, 2010
    Assignee: Kabushiki Kaisha TOPCON
    Inventor: Shigeyuki Akimoto
  • Patent number: 7720273
    Abstract: In a computer, fixed pattern information indicating respective shapes of fixed pattern elements included in a fixed pattern and respective position vectors of the fixed pattern elements with respect to a reference position in the fixed pattern is prepared and key pattern elements coincident with any of fixed pattern elements are specified from writing pattern elements. Subsequently, a value is added to a position designated by a reverse vector of position vector of a corresponding fixed pattern element with each of the key pattern elements as a starting point in a setting area which corresponds to a writing pattern, and a position is specified to which a value coincident with the number of fixed pattern elements is given, to detect an existing position of the fixed pattern in the writing pattern. It is thereby possible in the computer to extract a fixed pattern from a writing pattern at high speed.
    Type: Grant
    Filed: April 4, 2006
    Date of Patent: May 18, 2010
    Assignee: Dainippon Screen Mfg. Co., Ltd.
    Inventor: Ryo Yamada
  • Patent number: 7706598
    Abstract: A visual inspection apparatus includes an image-data acquisition unit for acquiring plural pieces of image data A to C on an inspection target, image comparison units for comparing the image data A to C with each other thereby to create plural pieces of sign-affixed difference-image data D and E, the image data A to C being acquired by the image-data acquisition unit, difference-image comparison units for determining the difference between the sign-affixed difference-image data D and E created by the image comparison units, and a judgment unit for subjecting, to a threshold-value processing, difference data F between the difference-image data D and E, the difference data F being acquired by the difference-image comparison units, obtaining a detection sensitivity by enlarging the difference between an abnormal signal level of an image of an area where an abnormality exists from the visual inspection.
    Type: Grant
    Filed: September 30, 2004
    Date of Patent: April 27, 2010
    Assignee: Hitachi High-Technologies Corporation
    Inventor: Kei Shimura