Abstract: A method for correcting a layout pattern includes the following steps. A first layout pattern, a second layout pattern, and a mis-alignment value are provided. The first layout pattern includes a first conducting line pattern, and the second layout pattern includes at least one contact via pattern. The contact via pattern at least partially overlaps the first conducting line pattern. The layout pattern is verified whether spacing between the contact via pattern and the first conducting line pattern is smaller than the mis-alignment value by a computing system. A first modified contact via pattern is then obtained by expanding the contact via pattern along a direction away from the spacing smaller than the mis-alignment value.

Abstract: A charged particle beam drawing apparatus has a drawing chamber including a movable stage which supports a mask, the mask being formed by applying a resist to an upper surface of a mask substrate, an optical column for applying a charged particle beam to draw patterns in the resist, a charged particle beam dose correction portion for correcting a dose of the charged particle beam applied from the optical column to the resist on the basis of proximity effect and fogging effect, and a conversion coefficient changing portion for changing a conversion coefficient on the basis of pattern density in the resist and a position in the resist, wherein the conversion coefficient is a ratio of an accumulation energy of the charged particle beam accumulated in the resist, to an accumulation dose of the charged particle beam accumulated in the resist.

Abstract: At least one pattern of a photomask is identified that has a likelihood of causing collapse of a microelectronic device feature that is formed using the photomask, due to surface tension of a solution that is applied to the feature during manufacture of the microelectronic device. The patterns of the photomask are then modified to reduce the likelihood of the collapse. The photomask may be formed and the photomask may be used to manufacture microelectronic devices. Related methods, systems, devices and computer program products are described.

Abstract: A method of forming a semiconductor device can include determining a shot set including a plurality of shots, based on a final pattern used to form a mask. Shots included in the plurality shots can be classified as being in a first pass shot set or in a second pass shot set, where each can include a plurality of non-directly neighboring shots. A first pass exposure can be performed to radiate a reticle to provide the first pass shot set and a second pass exposure can be performed to radiate the reticle to provide the second pass shot set.

Abstract: A method of depicting a photomask using e-beams includes preparing a photomask having an e-beam resist, depicting the e-beam resist and forming an e-beam resist pattern on the photomask. Depicting the e-beam resist includes irradiating e-beams to an e-beam depiction region without irradiating the e-beams to an e-beam non-depiction region disposed in the e-beam depiction region. The e-beam depiction region and the e-beam non-depiction region are formed using an e-beam resist pattern having the same polarity.

Abstract: A method for correcting the critical dimension (CD) of a phase shift mask includes calculating an intensity slope quantifying a slope of an intensity waveform of secondary electrons emitted by scanning an electron beam spot to a hard mask pattern on a phase shift mask on a substrate, extracting a delta critical dimension (CD) value, which is equal to a CD difference between the phase shift pattern and the hard mask pattern, as a delta CD value corresponding to the intensity slope, and correcting the CD of the phase shift mask by using the extracted delta CD value.

Abstract: Provided is a thin film evaluation method for a transfer mask which is adapted to be applied with ArF excimer laser exposure light and comprises a thin film formed with a pattern on a transparent substrate. The method includes intermittently irradiating pulsed laser light onto the thin film to thereby evaluate the irradiation durability of the thin film.

Abstract: A method of generating a mask for fabrication of a physical layer of an integrated circuit is provided. Multiple design layers are provided which comprise a programmable subcomponent configuration layer defining logical configurations of programmable subcomponents. A mask generation procedure transforms a selected design layer into a mask for fabrication of a physical layer. A mask modification procedure amends the mask to ensure that the physical layer will be reliably fabricated when using the mask. A non-functional design layer which does not represent one of said multiple physical layers represents further possible positions for said set of physical structures in said selected physical layer, which are not represented in said programmable subcomponent configuration layer. The mask modification procedure treats the non-functional design layer as a programmable subcomponent configuration layer.

Abstract: The present invention provides a determination method of determining a light intensity distribution to be formed on a pupil plane of an illumination optical system in an exposure apparatus, the method including a step of setting a cut line used to evaluate an image of a pattern of a mask, which is formed on an image plane of a projection optical system, and a target value of a dimension of the image, and a step of obtaining the dimension of the image of the pattern on the cut line, and determining a weight to be applied to each of a plurality of element light sources such that the obtained dimension comes close to the target value of the dimension, thereby determining, as the light intensity distribution, light sources obtained by combining the plurality of element light sources applied with the weights.

Abstract: A method, system, and computer usable program product for fracturing a continuous mask usable in photolithography are provided in the illustrative embodiments. A first origin point is selected from a set of points on an edge in the continuous mask. A first end point is identified on the edge such that a separation metric between the first origin point and the first end point is at least equal to a threshold value. Several alternatives are determined for fracturing using the first origin point and the first end point. A cost associated with each of the several alternatives is computed and one of the alternatives is selected as a preferred fracturing. Several pairs of origin points and end points are formed from the set of points. Each pair has a cost of a preferred fracturing between the pair. The continuous mask is fractured using a subset of the several pairs.

Abstract: A recessed portion forming method for forming a plurality of recessed portions in a thermally deformable heat mode recording material layer is provided, which method includes: a recessed portion forming step of applying condensed light emitted from an optical system including a light source, to the recording material layer to form the recessed portions; an inspection light illumination step of applying inspection light to the recessed portions during or after formation of the recessed portions in the recording material layer; a detection step of detecting a light quantity of the inspection light reflected or diffracted from the recessed portions; and an output regulation step of regulating an output of the light source based upon the light quantity so that the light quantity becomes a predetermined value. Methods for manufacturing a pit-projection product, a light emitting element, and an optical element, using this method are also provided.

Abstract: According to one embodiment, a deviation amount distribution of a two-dimensional shape parameter between a mask pattern formed on a mask and a desired mask pattern is acquired as a mask pattern map. Such that a deviation amount of the two-dimensional shape parameter between a pattern on substrate formed when the mask is subjected to exposure shot to form a pattern on a substrate and a desired pattern on substrate fits within a predetermined range, an exposure is determined for each position in the exposure shot in forming the pattern on substrate based on the mask pattern map.

Abstract: A pattern correcting method of an embodiment computes a distribution of pattern coverages on a design layout of a circuit pattern in the vicinity of a position that becomes an error pattern in a case where an on-substrate pattern is formed. Then, an area on the design layout in which a difference in the distribution of the pattern coverages becomes small by adding an addition pattern is set as an addition area. Next, addition pattern candidates to be added to the addition area are generated, an addition pattern to be added to the design layout is selected from the candidates on the basis of a predetermined selection criterion, and the addition pattern is added to the addition area.

Abstract: An exposure method for exposing a bright-dark pattern onto each exposure region of a substrate via a projection optical system includes a position detection process for detecting positions of a plurality of microscopic regions in a unit exposure field of the substrate, a deformation calculation step of calculating a state of deformation in the unit exposure field based on information related to the positions of the plurality of microscopic regions obtained in the position detection step, and a shape modification step of modifying the shape of the bright-dark pattern to be exposed on the substrate based on the deformation state obtained in the deformation calculation step. The microscopic regions detected in the position detection step include a circuit pattern formed in the unit exposure field.

Abstract: A system and methods are provide for modeling the behavior of a lithographic scanner and, more particularly, a system and methods are provide using thresholds of an image profile to characterize through-pitch printing behavior of a lithographic scanner. The method includes running a lithographic model for a target tool and running a lithographic model on the matching tool for a plurality of different settings using lens numerical aperture, numerical aperture of the illuminator and annular ratio of a pattern which is produced by an illuminator. The method then selects the setting that most closely matches the output of the target tool.

Abstract: Systems and methods for alignment of template and substrate at the edge of substrate are described.

Abstract: A charged particle beam writer system is disclosed comprising a generator for a charged particle beam having a beam blur radius, wherein the beam blur radius may be varied from shot to shot, or between two or more groups of shots. A method for fracturing or mask data preparation or optical proximity correction is also disclosed comprising assigning a beam blur radius variation to each calculated charged particle beam writer shot. A method for forming a pattern on a surface is also disclosed comprising using a charged particle beam writer system and varying the beam blur radius from shot to shot. A method for manufacturing an integrated circuit using optical lithography is also disclosed, comprising using a charged particle beam writer system to form a pattern on a reticle, and varying the beam blur radius of the charged particle beam writer system from shot to shot.

Abstract: The energy distribution of exposure light directed passing through the slit of an exposure apparatus is determined. A photoresist layer on a substrate is exposed over a plurality of shots while changing the intensity of the exposure light for each shot. Then the photoresist layer is developed to form a sample photoresist layer. An image of the developed sample photoresist layer is analyzed for color intensity. Values of the color intensity across a selected one of the shots are correlated with values of the intensity of the exposure light to produce an energy distribution of the exposure light along the length of the slit. The energy distribution is used to change the slit so that a more desirable energy distribution may be realized when the slit is used in a process of manufacturing a semiconductor device.

Abstract: A method for decomposing a designed pattern layout and a method for fabricating an exposure mask using the same. After the designed pattern layout is automatically decomposed to obtain a plurality of mask layouts, a problematic region is determined through simulation of the mask layout, and fed back to correct the designed pattern layout. As a result, problems can be detected in each process and corrected to reduce the process time.

Abstract: A method including providing a present wafer to be processed by a photolithography tool, selecting a processed wafer having a past chip design from a plurality of processed wafers, the processed wafer being previously processed by the photolithography tool, selecting a plurality of critical dimension (CD) data points extracted from a plurality of fields on the processed wafer, modeling the plurality of CD data points with a function relating CD to position on the processed wafer, creating a field layout on the present wafer for a new chip design, creating an initial exposure dose map for the new chip design using the function and the field layout, and controlling the exposure of the photolithography tool according to the initial exposure dose map to form the new chip design on the present wafer.

Abstract: A method for printing a desired periodic or quasi-periodic pattern of dot features into a photosensitive layer disposed on a substrate including the steps of designing a mask pattern having a periodic or quasi-periodic array of unit cells each having a ring feature, forming a mask with said mask pattern, arranging the mask substantially parallel to the photosensitive layer, arranging the distance of the photosensitive layer from the mask and illuminating the mask according to one of the methods of achromatic Talbot lithography and displacement Talbot lithography, whereby the illumination transmitted by the mask exposes the photosensitive layer to an integrated intensity distribution that prints the desired pattern.

Abstract: A mechanism is provided for simultaneous optical proximity correction (OPC) and decomposition for double exposure lithography. The mechanism begins with two masks that are equal to each other and to the target. The mechanism simultaneously optimizes both masks to obtain a wafer image that both matches the target and is robust to process variations. The mechanism develops a lithographic cost function that optimizes for contour fidelity as well as robustness to variation. The mechanism minimizes the cost function using gradient descent. The gradient descent works on analytically evaluating the derivative of the cost function with respect to mask movement for both masks. It then moves the masks by a fraction of the derivative.

Abstract: A plurality of wafer marks on a wafer is detected while a wafer stage moves from a loading position where a wafer is delivered onto the wafer stage to an exposure starting position where exposure of a wafer begins, with a part of an alignment system also moving, using the alignment system. Accordingly, the time required for mark detection can be reduced, therefore, it becomes possible to increase the throughput of the entire exposure process.

Abstract: Correction of CD variation is accomplished with a second exposure, e.g. using a second reticle. Embodiments include exposing a first wafer with a first dose using a first reflective reticle having a pattern corresponding to a wafer target pattern, or measuring and/or inspecting first reticle pattern portions and calculating and/or simulating corresponding first wafer pattern portions obtained with a predetermined first dosage, identifying CD variations between the exposed wafer or the calculated/simulated first wafer pattern and the target pattern for different target pattern features, exposing a second wafer with the first reticle using a second dose, and correcting the CD variations by applying an additional exposure of the second wafer, before or after exposing the second wafer with the first reticle. Embodiments further include using additional exposures to prevent printing unwanted structures on the reticle or to deliberately vary sizes of selected structures on the wafer for development purposes.

Abstract: Correction of critical dimension variation is accomplished with a second exposure, e.g. using a second reticle. Embodiments include exposing a first wafer with a first dose using a first reticle, having a pattern corresponding to a target pattern for a wafer, identifying CD variations between the exposed wafer and the target pattern for different features in the target pattern, exposing a second wafer with the first reticle using a second dose, less than or equal to the first dose, and correcting the CD variations by applying an additional exposure of the second wafer. Embodiments further include using one or more additional exposures to prevent printing unwanted structures on the reticle or to deliberately vary the sizes of selected structures on the wafer for development purposes.

Abstract: A character projection charged particle beam writer system is disclosed comprising a variable magnification reduction lens which will allow different shot magnifications on a shot by shot basis. A method for fracturing or mask data preparation or optical proximity correction is also disclosed comprising assigning a magnification to each calculated charged particle beam writer shot. A method for forming a pattern on a surface is also disclosed comprising using a charged particle beam writer system and varying the magnification from shot to shot. A method for manufacturing an integrated circuit using optical lithography is also disclosed, comprising using a charged particle beam writer system to form a pattern on a reticle, and varying the magnification of the charged particle beam writer system from shot to shot.

Abstract: An exposure system includes an exposure device and an image processing device. The exposure device includes a plurality of cameras. Each of the cameras is configured so as to be selectively set to a full scan mode and a partial scan mode. The camera transmits all of obtained image data in the full scan mode, and extracts part of the obtained image data and transmits the partial image data in the partial scan mode. The image processing device paratactically performs processing using the image data transmitted from the camera and processing using the image data transmitted from the camera.

Abstract: When an alignment mark does not exist within an area of an image obtained by a camera, the coordinate of the alignment mark is calculated based on an identification mark existing in the area of the image and a previously stored positional relationship between the alignment mark and the identification mark. A distance by which a long-sized base material is to be moved for causing the alignment mark to be positioned within the imaging area of the camera is calculated based on the calculated coordinate of the alignment mark, and the long-sized base material is moved by the calculated distance.

Abstract: Aspects of the invention relate to machine-learning-based hotspot detection techniques. These hotspot detection techniques employ machine learning models constructed using two feature encoding schemes. When two-level machine learning methods are also employed, a total four machine learning models are constructed: scheme-one level-one, scheme-one level-two, scheme-two level-one and scheme-two level-two. The four models are applied to test patterns to derive scheme-one hotspot information and scheme-two hotspot information, which are then used to determine final hotspot information.

Abstract: Metrology systems and methods for lithography processes are disclosed. In one embodiment, a method of manufacturing a semiconductor device includes providing a mask having a plurality of corner rounding test patterns formed thereon. A first semiconductor device is provided, and a layer of photosensitive material of the first semiconductor device is patterned with a plurality of corner rounding test features using the mask and a lithography process. An amount of corner rounding of the lithography process is measured by analyzing the plurality of corner rounding test features relative to other of the plurality of corner rounding test features formed on the layer of photosensitive material of the semiconductor device. The lithography process or the mask is altered in response to the amount of corner rounding measured, and a second semiconductor device is provided. The second semiconductor device is affected using the altered lithography process or the altered mask.

Abstract: An overlapping margin of a second pattern for a first pattern is corrected for at least one of the first pattern and the second pattern (S50). Next, a relative distance between the first pattern and the second pattern after the overlapping margin is corrected is calculated (S60). Next, it is determined whether or not the relative distance satisfies a criterion (S70). Thus, the pattern can be verified under the consideration of the overlapping margin.

Abstract: A pattern from a patterning device is applied to a substrate by a lithographic apparatus. The applied pattern includes product features and metrology targets. The metrology targets include large targets and small targets which are for measuring overlay. Some of the smaller targets are distributed at locations between the larger targets, while other small targets are placed at the same locations as a large target. By comparing values measured using a small target and large target at the same location, parameter values measured using all the small targets can be corrected for better accuracy. The large targets can be located primarily within scribe lanes while the small targets are distributed within product areas.

Abstract: According to one embodiment, a monitor pattern is previously exposed together with a device pattern on a resist film, the monitor pattern is developed in a first development condition and a fault occurrence risk is quantified based on a check image. At this time, the range of a second development condition in which the number of faults becomes less than or equal to a permissible value with respect to the quantified fault occurrence risk is determined based on the relationship between fault occurrence risk information and the number of faults. Then, a third development condition in which the pattern dimension becomes a desired value in the second development condition is determined and the device pattern is developed in the thus determined third development condition.

Abstract: An optical arrangement has a laser configured to emit a laser beam, an amplitude mask and a focusing element. The amplitude mask is disposed between the laser and the focusing element in a path of the laser beam such that the laser beam hits the amplitude mask before being modified by the focusing element so as to direct the laser beam to a focal point within a photosensitive material.

Abstract: A system and method determine an approximate structure of an object on a substrate. This may be applied in model based metrology of microscopic structures to assess critical dimension or overlay performance of a lithographic apparatus. A scatterometer is used to determine approximate structure of an object, such as a grating on a stack, on a substrate. The wafer substrate has an upper layer and an underlying layer. The substrate has a first scatterometry target region, including the grating on a stack object. The grating on a stack is made up of the upper and underlying layers. The upper layer is patterned with a periodic grating. The substrate further has a neighboring second scatterometry target region, where the upper layer is absent. The second region has just the unpatterned underlying layers.

Abstract: According to the substrate processing method in the embodiments, as a mask substrate used for forming an EUV mask, a mask substrate in which a first film having a first hydrophilicity is formed on one main surface and a resist is applied to another main surface is exposed from a side of the resist. Then, a hydrophilic treatment is performed on a surface of the first film to make the surface of the first film have a second hydrophilicity larger than the first hydrophilicity. Then, a development treatment of the resist is performed with respect to the mask substrate in which the hydrophilic treatment is performed on the surface of the first film to have the second hydrophilicity.

Abstract: An exposure apparatus includes a controller configured to calculate a position of an alignment mark detected by a detector, to approximate a deformation of a substrate by using an approximation equation, to calculate a correction amount of each of the plurality of shots, and to control driving of a stage in exposing each shot based on a correction amount that is calculated. The approximation equation is defined as a sum of a first term representative of a deformation of the entire substrate, and at least one of a second term representative of a distortion of a shot arrangement and a third term representative of a shot shape.

Abstract: A substrate processing system includes a resist pattern forming apparatus including modules each configured to perform a predetermined process on a substrate with an underlying film formed thereon, an etched pattern forming apparatus including chambers each configured to perform patterning of the underlying film by use of a resist pattern as a mask, and examination devices configured to perform measurement and examination of a pattern attribute rendered on a substrate after a process in the resist pattern forming apparatus and after a process in the etched pattern forming apparatus. A controller is preset to utilize measurement results and transfer data to calculate correction value ranges respectively settable in the modules and the chambers and to determine combinations of the modules and the chambers such that corrections made within the correction value ranges cause a pattern attribute to approximate a predetermined value for each of the substrates.

Abstract: A method for illuminating a mask with a source to project a desired image pattern through a lithographic system onto a photoactive material including: defining a representation of the mask; obtaining a fractional resist shot noise (FRSN) parameter; determining a first relationship between a first set of optical intensity values and an edge roughness metric based on the FRSN parameter; determining a second relationship between a second set of optical intensity values and a lithographic performance metric; imposing a set of metric constraints based on one of the first and second relationships; setting up an objective function of optimization based on the remaining of the two relationships; determining optimum constrained values of the representation of the mask based on the set of metric constraints and the objective function; and outputting these values.

Abstract: An exposure device includes a determining unit determines specific transfer patterns, which are transfer patterns of predetermined portions of a unit pattern, among transfer patterns projected through a photomask including an internal pattern having a plurality of unit patterns that is arranged at a predetermined interval and has the same shape, for two or more unit patterns, an error calculating unit calculates an error between the transfer pattern and the specified transfer pattern on the basis of the comparison between the relative position between the specific transfer patterns and a specified value of it, a correction parameter calculating unit calculates correction parameters for correcting the transfer patterns on the basis of the calculated error, and a correction control unit corrects exposure conditions using the correction parameters such that the transfer patterns are corrected.

Abstract: A substrate processing method includes a first process (step S12 to step S16) of forming a first resist pattern by exposing a substrate having thereon a first resist film to lights, developing the exposed substrate and cleaning the developed substrate; and a second process (step S17 to step S20) of forming a second resist pattern by forming a second resist film on the substrate having thereon the first resist pattern, exposing the substrate having thereon the second resist film to lights, and developing the exposed substrate. A first processing condition is determined based on first data showing a relationship between a first processing condition under which a cleaning process is performed on the substrate in the first process (step S16) and a line width of the second resist pattern, and the first process (step S16) is performed on the substrate under the determined first processing condition.

Abstract: An inspection method for inspecting a device mounted on a substrate, includes generating a shape template of the device, acquiring height information of each pixel by projecting grating pattern light onto the substrate through a projecting section, generating a contrast map corresponding to the height information of each pixel, and comparing the contrast map with the shape template. Thus, a measurement object may be exactly extracted.

Abstract: Methods for patterning integrated circuit (IC) features with varying dimensions are provided. In an example, a method includes forming a first patterned radiation-sensitive resist layer over a device substrate using a first mask, wherein the first patterned radiation-sensitive resist layer includes a first portion of an IC pattern; using the patterned first radiation-sensitive resist layer as a mask to form the first portion of the IC pattern in the device substrate; forming a second patterned radiation-sensitive resist layer over the device substrate using a second mask, wherein the second patterned radiation-sensitive resist layer includes a second portion of the IC pattern; and using the patterned second radiation-sensitive resist layer as a mask to form the second portion of the IC pattern in the device substrate. The combined first and second portions of the IC pattern in the device substrate form an IC feature having a dimension greater than dimensions of the first and second portions.

Abstract: A wafer includes an active region and a kerf region surrounding at least a portion of the active region. The wafer also includes a target region having a rectangular shape with a width and a length greater than the width, the target region including one or more target patterns, at least one of the target patterns being formed by two sub-patterns disposed at opposing corners of a target rectangle disposable within the target region.

Abstract: A lithographic apparatus includes an illuminator for receiving a beam of EUV radiation from a radiation source apparatus and for conditioning the beam to illuminate a target area of a patterning device, such as a reticle. The reticle forms a patterned radiation beam. A projection system transfers the pattern from said patterning device to a substrate by EUV lithography. Sensors are provided for detecting a residual asymmetry in the conditioned beam as the beam approaches the reticle, particularly in a non-scanning direction. A feedback control signal is generated to adjust a parameter of said radiation source in response to detected asymmetry. The feedback is based on a ratio of intensities measured by two sensors at opposite ends of an illumination slit, and adjusts the timing of laser pulses generating an EUV-emitting plasma.

Abstract: In a simulation step of simulating a surface configuration of a substrate which is used for a mask blank and which is set to an exposure apparatus, height information from a reference plane is derived from a plurality of measurement points on a main surface of the substrate. From the height information, a curved surface of fourth, fifth, or sixth order is approximated which is represented by a polynomial specified by a plurality of terms and coefficients of the terms. The coefficients are stored as coefficient information in association with the substrate.

Abstract: There is provided a method of high-sensitively detecting both of a phase defect existing in a mask blank and a phase defect remaining after manufacturing an EUVL mask. When the mask blank is inspected, EUV light having illumination NA to be within an inner NA but a larger value is irradiated. When the EUVL mask is inspected, by using a dark-field imaging optical system including a center shielding portion for shielding EUV light and a linear shielding portion for shielding the EUV light whose width is smaller than a diameter of the center shielding portion, the center shielding portion and the linear shielding portion being included in a pupil plane, the EUV light having illumination NA as large as or smaller than the width of the linear shielding portion is irradiated.

Abstract: The beam measuring apparatus of the present invention includes a detection device including a shield member that has an edge, and a detector configured to detect the beam of which at least a part is not shielded by the shield member; a relative movement mechanism configured to cause a relative movement between the shield member and the beam; and a controller configured to control the detection device and the relative movement mechanism so as to cause one of the edge and the beam to traverse the other with respect to each of a plurality of points on the edge, to sum a plurality of signals, respectively obtained by the detection device with respect to the plurality of points and with respect to relative positions of the relative movement corresponding to one another, so as to obtain a signal sequence, and to obtain the characteristic based on the signal sequence.

Abstract: A TFT array panel includes an insulating substrate, a gate line, a storage electrode line, a gate insulating layer, a semiconductor island formed on the gate insulating layer, and a data line and a drain electrode formed thereon. The data line and drain electrode are covered with a passivation layer. A pixel electrode is formed on the passivation layer and connected to the drain electrode through a contact hole. The TFT array panel is covered with an alignment layer rubbed approximately in a direction from the upper left corner to lower right corner of the TFT array panel or the pixel electrodes. The pixel electrode overlaps the gate line and data line and has an expansion located near the upper left corner of the pixel electrode to increase the width of the corresponding overlapping area between the pixel electrode and the gate line and/or data line.

Abstract: A stencil for character projection (CP) charged particle beam lithography and a method for manufacturing the stencil is disclosed, where the stencil contains two circular characters, where each character is capable of forming patterns on a surface in a range of sizes by using different dosages, and where the size ranges for the two characters is continuous. A method for forming circular patterns on a surface using variable-shaped beam (VSB) shots of different dosages is also disclosed. A method for forming circular patterns on a surface using a set of shots, where all of the shots comprise dosages, is also disclosed.