Abstract: A method for manufacturing a semiconductor device includes providing a substrate having a mask layer formed thereon, providing a first photomask having a first layout pattern and a second photomask having a second layout pattern, the first layout pattern including a plurality of active area portions and at least a neck portion connecting two adjacent active area portions, transferring the first layout pattern from the first photomask to the mask layer to form a plurality of active area patterns and at least a neck pattern connecting two adjacent active area patterns in the mask layer, and transferring the second layout pattern from the second photomask to the mask layer to remove the neck pattern to form a patterned mask. The patterned mask includes the active area patterns. A slot is at least formed between the two adjacent active area patterns.

Abstract: Methods for fabricating integrated circuits are provided. In an embodiment, a method for fabricating an integrated circuit includes forming a mask overlying a material to be etched by forming first hard mask segments overlying the material to be etched, forming sacrificial mandrels overlying the material to be etched and around each hard mask segment, forming second hard mask segments overlying the semiconductor substrate and adjacent each sacrificial mandrel, and removing the sacrificial mandrels to form first gaps surrounding each first hard mask segment, wherein each first gap is bounded by a respective first hard mask segment and an adjacent second hard mask segment. The method includes etching the material to be etched through the mask.

Abstract: A method of processing semiconductor chips includes measuring locations of semiconductor dies placed on a carrier with a scanner to generate die location information, and communicating the die location information to a photolithographic stepper. The method includes aligning the photolithographic stepper with the carrier only one time, and exposing at least one of the dies on the carrier with the photolithographic stepper based on the die location information generated by the scanner.

Abstract: A method embodiment for patterning a semiconductor device includes forming a plurality of mandrels over a substrate, and forming a multilayer spacer layer over the plurality of mandrels. The multilayer spacer layer is formed by conformably depositing a spacer layer over the plurality of mandrels and treating the spacer layer with plasma. The plurality of mandrels is exposed by etching a top portion of the multilayer spacer layer, thereby forming a multilayer spacer.

Abstract: Provided is an actinic-ray- or radiation-sensitive resin composition including a compound that when exposed to actinic rays or radiation, generates any of acids of general formula (I) below.

Abstract: Provided are a high-quality non-polar/semi-polar semiconductor device having reduced defect density of a nitride semiconductor layer and improved internal quantum efficiency and light extraction efficiency, and a manufacturing method thereof. The method for manufacturing a semiconductor device is to form a template layer and a semiconductor device structure on a sapphire, SiC or Si substrate having a crystal plane for a growth of a non-polar or semi-polar nitride semiconductor layer. The manufacturing method includes: forming a nitride semiconductor layer on the substrate; performing a porous surface modification such that the nitride semiconductor layer has pores; forming the template layer by re-growing a nitride semiconductor layer on the surface-modified nitride semiconductor layer; and forming the semiconductor device structure on the template layer.

Abstract: A method includes providing a first mask pattern over a substrate, forming first spacers adjoining sidewalls of the first mask pattern, removing the first mask pattern, forming second spacers adjoining sidewalls of the first spacers, forming a filling layer over the substrate and between the second spacers, and forming a second mask pattern over the substrate.

Abstract: A light field sensor for a 4D light field camera has a layer of nanoscale resonator detector elements, such as silicon nanoshells, below a layer of dielectric microlenses. By taking advantage of photonic nanojets in the microlenses and circulating resonances in nanoshells, the light field camera sensor achieves improved sensitivity, pixel density, and directional resolution even at large angles of incidence.

Abstract: A method of forming a target pattern includes forming a plurality of lines over a substrate with a first mask and forming a spacer layer over the substrate, over the plurality of lines, and onto sidewalls of the plurality of lines. The method further includes removing at least a portion of the spacer layer to expose the plurality of lines and the substrate. The method further includes shrinking the spacer layer disposed onto the sidewalls of the plurality of lines and removing the plurality of lines thereby resulting in a patterned spacer layer over the substrate.

Abstract: An array includes a substrate having a frontside surface and a backside surface. A backside cavity is formed in the backside surface. Backside through vias extend through the substrate from the frontside surface to the backside surface. Embedded component through vias extend through the substrate from the frontside surface to the backside cavity. An embedded component is mounted within the backside cavity and coupled to the embedded component through vias. In this manner, the embedded component is embedded within the substrate.

Abstract: Substrates and methods of forming a pattern on a substrate. The pattern includes a repeating pattern region and a pattern-interrupting region adjacent to the repeating pattern region. A mask is formed on the substrate, with the mask including the repeating pattern region and the pattern-interrupting region and which are formed using two separate masking steps. The mask is used in forming the pattern into underlying substrate material on which the mask is received. Substrates comprising masks are also disclosed.

Abstract: Provided are a high-quality non-polar/semi-polar semiconductor device with reduced defect density and improved internal quantum efficiency and light extraction efficiency, and a manufacturing method thereof. The manufacturing method is a method for manufacturing a semiconductor device, in which a template layer and a semiconductor device structure are formed on a sapphire substrate having a crystal plane for growing a non-polar or semi-polar nitride semiconductor layer. The sapphire substrate is etched to form uneven patterns, and the template layer including a nitride semiconductor layer and a GaN layer is formed on the sapphire substrate in which the uneven patterns are formed.

Abstract: An interconnection structure for a package is disclosed. The interconnection structure includes a substrate body having a conductive portion formed on a surface thereof; a first photosensitive dielectric layer formed on the surface of the substrate body and having a via for exposing the conductive potion; a conductive via formed in the via; a second photosensitive dielectric layer formed on the first photosensitive dielectric layer and having a opening for exposing the conductive via and a portion of the first photosensitive dielectric layer; and a conductive trace layer formed in the opening of the second photosensitive dielectric layer so as to be electrically connected to the conductive portion through the conductive via, thereby simplifying the fabrication process and reducing the fabrication cost and time.

Abstract: A method for making a graphene composite structure includes providing a metal substrate including a first surface and a second surface opposite to the first surface, growing a graphene film on the first surface of the metal substrate by a CVD method, providing a polymer layer on the graphene film and combining the polymer layer with the graphene film, and forming a plurality of stripped electrodes by etching the metal substrate from the second surface.

Abstract: Aspects of the present invention relate to a semiconductor-on-insulator (SOI) deep trench capacitor. One embodiment includes a method of forming a deep trench capacitor structure. The method includes: providing a SOI structure including a first and second trench opening in a semiconductor layer of the SOI structure, forming a doped semiconductor layer covering the semiconductor layer, forming a first dielectric layer covering the doped semiconductor layer, forming a node metal layer over the first dielectric layer, forming a second dielectric layer covering the node metal layer, filling a remaining portion of each trench opening with a metal layer to form an inner node in each of the trench openings, the metal layer including a plate coupling each of the inner nodes, and forming a node connection structure to conductively connect the node metal layer in the first trench opening with the node metal layer in the second trench opening.

Abstract: A combination of gases including at least a fluorocarbon gas, oxygen, and an inert sputter gas is employed to etch at least one opening into an organic photoresist. The amount of oxygen is controlled to a level that limits conversion of a metallic nitride material in an underlying hard mask layer to a metal oxide, and causes organic polymers generated from the organic photoresist to cover peripheral regions of each opening formed in the organic photoresist. The hard mask layer is etched with a taper by the oxygen-limited fluorine-based etch chemistry provided by the combination of gases. The taper angle can be controlled such that a shrink ratio of the lateral dimension by the etch can exceed 2.0.

Abstract: Provided is a photoresist that includes a polymer having a backbone that is breakable and a photo acid generator that is free of bonding from the polymer. Further, provided is a method of fabricating a semiconductor device. The method includes providing a device substrate. A material layer is formed over the substrate. A photoresist material is formed over the material layer. The photoresist material has a polymer that includes a backbone. The photoresist material is patterned to form a patterned photoresist layer. A fabrication process is then performed to the material layer, wherein the patterned photoresist layer serves as a mask in the fabrication process. Thereafter, the patterned photoresist layer is treated in a manner that breaks the backbone of the polymer. The patterned photoresist layer is then removed.

Abstract: Uniform masking for wafer dicing using laser and plasma etch is described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits having bumps or pillars includes uniformly spinning on a mask above the semiconductor wafer, the mask composed of a layer covering and protecting the integrated circuits. The mask is then patterned with a laser scribing process to provide a patterned mask with gaps, exposing regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to singulate the integrated circuits.

Abstract: A substrate for an organic light-emitting device which can improve the light extraction efficiency of an organic light-emitting device while realizing an intended level of transmittance, a method of fabricating the same, and an organic light-emitting device having the same. Light emitted from the OLED is emitted outward through the substrate. The substrate includes a substrate body and a number of crystallized particles disposed inside the substrate body, the number of crystallized particles forming a pattern inside the substrate body.

Abstract: Disclosed are methods for making read sensors using developable bottom anti-reflective coating and amorphous carbon (a-C) layers as junction milling masks. The methods described herein provide an excellent chemical mechanical polishing or planarization (CMP) stop, and improve control in reader critical physical parameters, shield to shield spacing (SSS) and free layer track width (FLTW).

Abstract: A conductive pattern is prepared in a polymeric layer that has (a) a reactive polymer comprising pendant tertiary alkyl ester groups, (b) a compound that provides an acid upon exposure to radiation having a ?max of at least 150 nm and up to and including 450 nm, and (c) a crosslinking agent. The polymeric layer is patternwise exposed to provide a polymeric layer comprising non-exposed regions and exposed regions comprising a polymer comprising carboxylic acid groups. The exposed regions are contacted with electroless seed metal ions to form a pattern of electroless seed metal ions. The pattern of electroless seed metal ions is then reduced to provide a pattern of corresponding electroless seed metal nuclei. The corresponding electroless seed metal nuclei are then electrolessly plated with a conductive metal.

Abstract: There is provided a resist underlayer film forming composition for lithography for forming a resist underlayer film capable of being used as a hardmask. A resist underlayer film forming composition for lithography, includes as a silane compound, a hydrolyzable organosilane, a hydrolysis product thereof, or a hydrolysis-condensation product thereof, wherein the hydrolyzable organosilane is a hydrolyzable organosilane of Formula (1): R1aR2bSi(R3)4?(a+b)??Formula (1) wherein R1 is Formula (2): in which R4 is an organic group, and R5 is a C1-10 alkylene group, a hydroxyalkylene group, a sulfide bond, an ether bond, an ester bond, or a combination thereof, X1 is Formula (3), Formula (4), or Formula (5): R2 is an organic group, and R3 is a hydrolysable group.

Abstract: An object of the present invention is to provide a fabrication method for pattern-formed structure having a smooth three-dimensional structure through a fewer processes. To achieve the object, the present invention provides a fabrication method for pattern-formed structure comprising: a dot modulation pattern forming process of binarizing a shape of a targeted three-dimensional structure to form a dot modulation pattern, a writing process of using the dot modulation pattern to write directly by a writer on a photosensitive resin layer formed on a substrate, and a developing process of developing the photosensitive resin layer after the writing to form a resin layer with three-dimensional structure, wherein the writing process is performed by a writing energy supplying method in which writing energy is supplied to the photosensitive resin layer by an area larger than a minimum dot area in the dot modulation pattern.

Abstract: A flexible multilayer substrate includes a multilayer body including a plurality of laminated resin layers. The multilayer body includes an innermost surface, which is a surface on an inner side when the substrate is bent, and an outermost surface, which is a surface on an outer side when the substrate is bent. Each of the plurality of resin layers includes a skin layer on one surface. Lamination of the multilayer body includes a skin layer joint plane at one location at a central portion in the thickness direction, and the skin layer and other surface come in contact with each other at another location along the central portion in the thickness direction. A skin layer joint plane is arranged on a side closer to the innermost surface than a central plane in the thickness direction of the multilayer body.

Abstract: The present disclosure relates to a method to form a plurality of openings within a substrate with a single photo exposure and a single etch process. A photoresist layer is disposed over a substrate and aligned with a photomask, wherein the photomask comprises a transparent area, a grayscale area, and an opaque area. The photomask and substrate are exposed to radiation comprising a single illumination step to form a first 3-dimensional pattern within the photoresist layer. The 3-dimensional pattern comprises a first opening comprising a first thickness formed by transmitting the radiation through the transparent area with full intensity, and a second opening comprising a second thickness formed by transmitting the radiation through the grayscale area with partial intensity. The 3-dimensional pattern is transferred to form a plurality of openings of varying depths within the substrate through a single etch step.

Abstract: A thiosulfate polymer composition includes an electron-accepting photosensitizer component, either as a separate compound or as an attachment to the thiosulfate polymer. The thiosulfate polymer composition can be applied to various articles and used to form a predetermined polymeric pattern after photothermal reaction to form crosslinked disulfide bonds, removing non-crosslinked polymer, and reaction with a disulfide-reactive material.

Abstract: A method for patterning a layered structure is provided that includes performing photolithography to provide a developed prepattern layer on a horizontal surface of an underlying substrate, modifying the prepattern layer to form spaced apart inorganic material guides, casting and annealing a layer of a self-assembling block copolymer to form laterally-spaced cylindrical features, forming a pattern by selectively removing at least a portion of one block of the self-assembling block copolymer, and transferring the pattern to the underlying substrate. The method is suitable for making sub-50 nm patterned layered structures.

Abstract: The invention provides a patterning process comprises the steps of: (1) forming a positive chemically amplifying type photoresist film on a substrate to be processed followed by photo-exposure and development thereof by using an organic solvent to obtain a negatively developed pattern, (2) forming a silicon-containing film by applying a silicon-containing film composition comprising a solvent and a silicon-containing compound capable of becoming insoluble in a solvent by a heat, an acid, or both, (3) insolubilizing in a solvent the silicon-containing film in the vicinity of surface of the negatively developed pattern, (4) removing the non-insolubilized part of the silicon-containing film to obtain an insolubilized part as a silicon-containing film pattern, (5) etching the upper part of the silicon-containing film pattern thereby exposing the negatively developed pattern, (6) removing the negatively developed pattern, and (7) transferring the silicon-containing film pattern to the substrate to be processed.

Abstract: Embodiments include a silicon-containing antireflective material including a silicon-containing base polymer, a non-polymeric silsesquioxane material, and a photoacid generator. The silicon-containing base polymer may contain chromophore moieties, transparent moieties, and reactive sites on an SiOx background, where x ranges from approximately 1 to approximately 2. Exemplary non-polymeric silsesquioxane materials include polyhedral oligomeric silsesquioxanes having acid labile side groups linked to hydrophilic groups Exemplary acid labile side groups may include tertiary alkyl carbonates, tertiary alkyl esters, tertiary alkyl ethers, acetals and ketals, Exemplary hydrophilic groups may include phenols, alcohols, carboxylic acids, amides, and sulfonamides.

Abstract: An integrated circuit is made by depositing a pinning layer on a substrate. A block copolymer photoresist is formed on the pinning layer. The block copolymer has two blocks A and B that do not self-assemble under at least some annealing conditions. The exposed block copolymer photoresist is processed to cleave at least some block copolymer bonds in the exposed selected regions. The exposed pinning layer is processed to create a chemical epitaxial pattern to direct the local self assembly of the block copolymer.

Abstract: One or more techniques or systems for controlling a profile for photo resist (PR) are provided herein. In some embodiments, a first shield layer is formed on a first PR layer and a second PR layer is formed on the first shield layer. A first window is formed within the second PR layer during a first exposure with a mask. A second window is formed within the first shield layer based on the first window. A third window is formed within the first PR layer during a second exposure without a mask. Because, the third window is formed while the first shield layer and the second PR layer are on the first PR layer, a profile associated with the first PR layer is controlled. Contamination during ion bombardment is mitigated due to the controlled profile.

Abstract: A lithographic material stack including a metal-compound hard mask layer is provided. The lithographic material stack includes a lower organic planarizing layer (OPL), a dielectric hard mask layer, and the metal-compound hard mask layer, an upper OPL, an optional anti-reflective coating (ARC) layer, and a photoresist layer. The metal-compound hard mask layer does not attenuate optical signals from lithographic alignment marks in underlying material layers, and can facilitate alignment between different levels in semiconductor manufacturing.

Abstract: The present invention relates to a hybrid photoresist composition for improved resolution and a pattern forming method using the photoresist composition. The photoresist composition includes a radiation sensitive acid generator, a crosslinking agent and a polymer having a hydrophobic monomer unit and a hydrophilic monomer unit containing a hydroxyl group. At least some of the hydroxyl groups are protected with an acid labile moiety having a low activation energy. The photoresist is capable of producing a hybrid response to a single exposure. The patterning forming method utilizes the hybrid response to form a patterned structure in the photoresist layer. The photoresist composition and the pattern forming method of the present invention are useful for printing small features with precise image control, particularly spaces of small dimensions.

Abstract: A thiosulfate polymer composition includes an electron-accepting photosensitizer component, either as a separate compound or as an attachment to the thiosulfate polymer. The thiosulfate polymer composition can be applied to various articles, or used to form a predetermined polymeric pattern after photothermal reaction to form crosslinked disulfide bonds, removing non-crosslinked polymer, and reaction with a disulfide-reactive material. Such thiosulfate polymer compositions can also be used to sequestering metals.

Abstract: A multi-patterning method includes: patterning at least two first openings in a hard mask layer over a substrate using a first mask; forming spacers within two of the at least two first openings, each spacer having a spacer opening therein for patterning a respective first circuit pattern over the substrate, wherein each spacer defines a pattern-free region adjacent to a respective one of the at least two first circuit patterns, and patterning a second circuit pattern in the hard mask layer using a second mask. The second circuit pattern is located between and excluded from the pattern free regions adjacent the at least two first circuit patterns.

Abstract: A method for forming quarter-pitch patterns is described. Two resist layers are formed. The upper resist layer is defined into first patterns. A coating that contains or generates a reactive material making a resist material dissolvable is formed over the lower resist layer and the first patterns. The reactive material is diffused into a portion of each first pattern and portions of the lower resist layer between the first patterns to react with them. The coating is removed. A development step is performed to remove the portions of the first patterns and the portions of the lower resist layer, so that the lower resist layer is patterned into second patterns. Spacers are formed on the sidewalls of the remaining first patterns and the second patterns. The remaining first patterns are removed, and portions of the second patterns are removed using the spacers on the second patterns as a mask.

Abstract: A method of forming a layered substrate comprising a self-assembled material is provided. The method includes forming a first layer of material on a substrate, forming a layer of a radiation sensitive material on the first layer of material, imaging the layer of the radiation sensitive material with patterned light, heating the layer of the radiation sensitive material to a temperature at or above the cross-linking reaction temperature, developing the imaged layer, and forming the block copolymer pattern. The radiation sensitive material comprises at least one photo-sensitive component selected from (a) a photo-decomposable cross-linking agent, (b) a photo-base generator, or (c) a photo-decomposable base; and a cross-linkable polymer, wherein imaging by the patterned light provides a pattern defined by a first region having substantial portions of a decomposed photo-sensitive component surrounded by regions having substantial portions of intact photo-sensitive component.

Abstract: Disclosed are polymer resins, including polymer resin sheets, having good electroconductivity and a method for manufacturing the same. The polymer resins exhibit flexibility and show electroconductivity on their surface as well as along their thickness, and thus can be used as electromagnetic wave-shielding materials having impact- and vibration-absorbing properties as well as conductivity.

Abstract: In a chemically amplified positive resist composition comprising a base resin and an acid generator in a solvent, the base resin contains both an alkali-insoluble or substantially alkali-insoluble polymer having an acid labile group-protected acidic functional group having a Mw of 1,000-500,000 and an alkyl vinyl ether polymer having a Mw of 10,000-500,000. The composition forms on a substrate a resist film of 5-100 ?m thick which can be briefly developed to form a pattern at a high sensitivity and a high degree of removal or dissolution to bottom.

Abstract: Methodology enabling a generation of an interconnection design utilizing an SIT process is disclosed. Embodiments include: providing a hardmask on a substrate; forming a mandrel layer on the hardmask including: first and second vertical portions extending along a vertical direction and separated by a horizontal distance; and a plurality of horizontal portions extending in a horizontal direction, wherein each of the horizontal portions is positioned between the first and second vertical portions and at a different position along the vertical direction; and forming a spacer layer on outer edges of the mandrel layer.

Abstract: A resist underlayer composition includes a solvent, and an organosilane condensation polymerization product of: a compound represented by the following Chemical Formula 1, a compound represented by the following Chemical Formula 2, and a compound represented by the following Chemical Formula 3, [R1O]3Si—X??[Chemical Formula 1] [R2O]3Si—R3??[Chemical Formula 2] [R4O]3Si—Si[OR5]3.

Abstract: Methods for providing a silicon layer on a photomask substrate surface with minimum defeats for fabricating film stack thereon for EUVL applications are provided. In one embodiment, a method for forming a silicon layer on a photomask substrate includes performing an oxidation process to form a silicon oxide layer on a surface of a first substrate wherein the first substrate comprises a crystalline silicon material, performing an ion implantation process to define a cleavage plane in the first substrate, and bonding the silicon oxide layer to a surface of a second substrate, wherein the second substrate is a quartz photomask.

Abstract: A method of forming at least one curved plate having first and second layers, the first layer being formed of a first material and the second layer being formed of a second material, the method including forming one or more blocks of a fusible material on a surface of a substrate; baking the one or more blocks to deform their shape; and depositing the first and second materials over the one or more deformed blocks to form the first and second layers.

Abstract: The present invention relates to an organic light emitting device and a manufacturing method thereof. The present invention discloses an organic light emitting device including: a plurality of scanning signal lines; a first and second contact assistant; a plurality of data lines crossing the scanning signal lines; a driving voltage line; and a first pixel, a second pixel, and a third pixel alternately arranged, wherein each pixel includes: a switching transistor, a driving transistor including an output terminal, a pixel electrode connected to the output terminal, the pixel electrode including at least two layers including a transflective electrode, an organic light emitting member arranged on the pixel electrode, and a common electrode arranged on the organic light emitting member, wherein the first pixel further includes a supplementary member arranged on the pixel electrode, and wherein the first and second contact assistants include the same material as the supplementary member.

Abstract: A method of forming a patterned film on both a bottom and a top-surface of a deep trench is disclosed. The method includes the steps of: 1) providing a substrate having a deep trench formed therein; 2) growing a film over a bottom and a top-surface of the deep trench; 3) coating a photoresist in the deep trench and over the substrate and baking the photoresist to fully fill the deep trench; 4) exposing the photoresist to form a latent image that partially covers the deep trench in the photoresist; 5) silylating the photoresist with a silylation agent to transform the latent image into a silylation pattern; 6) etching the photoresist to remove a portion of the photoresist not covered by the silylation pattern; and 7) etching the film to form a patterned film on both the bottom and the top-surface of the deep trench.

Abstract: The present invention is a silicon-containing resist underlayer film-forming composition containing a condensation product and/or a hydrolysis condensation product of a mixture comprising: one or more kinds of a compound (A) selected from the group consisting of an organic boron compound shown by the general formula (1) and a condensation product thereof and one or more kinds of a silicon compound (B) shown by the general formula (2). Thereby, there can be provided a silicon-containing resist underlayer film-forming composition being capable of forming a pattern having a good adhesion, forming a silicon-containing film which can be used as a dry-etching mask between a photoresist film which is the upperlayer film of the silicon-containing film and an organic film which is the underlayer film thereof, and suppressing deformation of the upperlayer resist during the time of dry etching of the silicon-containing film; and a patterning process.

Abstract: Resist compositions that can be used in immersion lithography without the use of an additional topcoat are disclosed. The resist compositions comprise a photoresist polymer, at least one photoacid generator, a solvent; and a self-topcoating resist additive. A method of forming a patterned material layer on a substrate using the resist composition is also disclosed.

Abstract: In a multiple patterning techniques, where two or more exposures are used to form a single layer of a device, the splitting of features in a single layer between the multiple exposures is carried out additionally with reference to features of another associated layer and the splitting of that layer into two or more sets of features for separate exposure. The multiple exposure process can be a process involving repeated litho-etch steps desirably, the alignment scheme utilized during exposure of the split layers is optimized with reference to the splitting approach.

Abstract: Some embodiments include methods of patterning a base. First and second masking features are formed over the base. The first and second masking features include pedestals of carbon-containing material capped with silicon oxynitride. A mask is formed over the second masking features, and the silicon oxynitride caps are removed from the first masking features. Spacers are formed along sidewalls of the first masking features. The mask and the carbon-containing material of the first masking features are removed. Patterns of the spacers and second masking features are transferred into one or more materials of the base to pattern said one or more materials. Some embodiments include patterned bases.

Abstract: A first metallic hard mask layer over an interconnect-level dielectric layer is patterned with a line pattern. At least one dielectric material layer, a second metallic hard mask layer, a first organic planarization layer (OPL), and a first photoresist are applied above the first metallic hard mask layer. A first via pattern is transferred from the first photoresist layer into the second metallic hard mask layer. A second OPL and a second photoresist are applied and patterned with a second via pattern, which is transferred into the second metallic hard mask layer. A first composite pattern of the first and second via patterns is transferred into the at least one dielectric material layer. A second composite pattern that limits the first composite pattern with the areas of the openings in the first metallic hard mask layer is transferred into the interconnect-level dielectric layer.