Abstract: The invention relates to a method for producing a matrix of electronic components, comprising a step of producing an active layer on a substrate, and a step of individualizing the components by forming trenches in the active layer at least until the substrate emerges. The method comprises steps of depositing a layer of functional material on the active layer, depositing a photosensitive resin on the layer of material in such a way as to fill said trenches and to form a thin film on the upper face of the components, at least partially exposing the resin to radiation while underexposing the portion of resin in the trenches, developing the resin in such a way as to remove the properly exposed portion thereof, removing the functional material layer portion that shows through after the development step, and removing the remaining portion of resin.

Abstract: Provided are a method for manufacturing a transparent electrode pattern and a method for manufacturing an electro-optic device having the transparent electrode pattern. The method for manufacturing the transparent electrode pattern includes forming a transparent electrode on a light-transmissive substrate, patterning the transparent electrode by removing a portion of the transparent electrode, and forming an insulating protective layer in an edge region of the patterned transparent electrode through a printing process. In accordance with the method, the insulating protective layer is formed in the edge region of the patterned transparent electrode through the printing process so that an apparatus and method for manufacturing the insulating protective layer can be simplified, resulting in a decrease in manufacturing cost.

Abstract: The present invention provides there is provided an electrochemical biosensor electrode structure that includes: a working electrode and a reference electrode used as electrodes for sample measurement being arranged separately from each other in lengthwise direction of a sample insertion path, the working electrode and the reference electrode each having at least one projection and at least one recess alternately arranged on a portion thereof corresponding to the sample insertion path, the projection of the working electrode being correspondingly adjacent to the recess of the reference electrode, the recess of the working electrode being correspondingly adjacent to the projection of the reference electrode; and at least two sample recognition electrodes used as electrodes for sample recognition being separated from each other and arranged adjacent and parallel to the working electrode and the reference electrode.

Abstract: A method of forming a color filter touch sensing substrate integrates touch-sensing structures/elements of a touch panel into the inner side of the color filter substrate, which faces a thin film transistor substrate, and forms patterned assistant electrodes on the surfaces of the transparent sensing pads for decreasing the equivalent resistance of the touch-sensing structures/elements. Moreover, since an adjacent transparent conductive layer and an assistant electrode layer are patterned to form the transparent sensing pads and the patterned assistant electrodes, a simplified pattern-transferring process can be applied to the transparent sensing pads and the patterned assistant electrodes, or bridge structures can be formed from the assistant electrode layer for electrically connecting between some transparent sensing pads. Therefore, the forming process is simplified.

Abstract: The present invention discloses a method of fabricating non-metal substrate having steps of (a) providing a non-metal board having two opposite first and second surfaces; (b) drilling at least one second through hole through the non-metal board; (c) electroplating copper on outsides of non-metal board and an inside of each of at least one second through hole to form copper films outside of the non-metal board and at least one solid copper pole in corresponding to the at lest one second through hole; and (d) patterning the copper films to form line pattern. The non-metal substrate has high thermal conductivity and the solid copper poles therein are integrated with the line pattern formed outside thereof, so the connection strength among the die pad, solid copper poles and heat conduction pad is good.

Abstract: A method of manufacturing an integrated circuit structure forms a first opening in a substrate and lines the first opening with a protective liner. The method deposits a material into the first opening and forms a protective material over the substrate. The protective material includes a process control mark and includes a second opening above, and aligned with, the first opening. The method removes the material from the first opening through the second opening in the protective material. The process control mark comprises a recess within the protective material that extends only partially through the protective material, such that portions of the substrate below the process control mark are not affected by the process of removing the material.

Abstract: To provide a pattern forming method, which contains: forming a first resist pattern on a processing surface using a first resist composition; forming a coating layer using a coating material so as to cover a surface of the first resist pattern; applying a second resist composition over the first resist pattern above which the coating layer has been formed so as not to dissolve the first resist pattern with the second resist composition to thereby form a second resist film; and selectively exposing the second resist film to exposure light and developing the second resist film to thereby expose the first resist pattern to the air, as well as forming a second resist pattern in an area of the processing surface where the first resist pattern has not been formed.

Abstract: A device manufacturing method includes a transfer of a pattern from a patterning device onto a substrate. The device manufacturing method further includes transferring a pattern of a main mark to a base layer for forming an alignment mark; depositing a pattern receiving layer on the base layer; in a first lithographic process, aligning, by using the main mark, a first mask that includes a first pattern and a local mark pattern, and transferring the first pattern and the local mark pattern to the pattern receiving layer; aligning, by using the local mark pattern, a second mask including a second pattern relative to the pattern receiving layer; and in a second lithographic process, transferring the second pattern to the pattern receiving layer; the first and second patterns being configured to form an assembled pattern.

Abstract: A method for fabricating a semiconductor device includes: forming a first photoresist pattern with a first opening over an etch target layer; forming a second photoresist pattern with a plurality of second openings over the first photoresist pattern; and forming a plurality of patterns by etching the etch target layer by using the first photoresist pattern and the second photoresist pattern as an etch barrier.

Abstract: A conductive film producing method includes a metallic silver forming step of exposing and developing a photosensitive material having a 95-?m-thick long support and thereon a silver salt-containing emulsion layer, thereby forming a metallic silver portion to prepare a conductive film precursor, and a smoothing treatment step of subjecting the conductive film precursor to a smoothing treatment to produce a conductive film. In the smoothing treatment, the conductive film precursor is pressed by first and second calender rolls facing each other, and the first calender roll is a resin roll to be brought into contact with the support. The method satisfies the condition of 1/2?P1/P2?1, wherein P1 represents a conveying force applied when the conductive film precursor is introduced to an area where the smoothing treatment step is conducted, and P2 represents a conveying force applied when the smoothing-treated conductive film is discharged from the area.

Abstract: Pitch multiplied and non-pitch multiplied features of an integrated circuit, e.g., features in the array, interface and periphery areas of the integrated circuit, are formed by processing a substrate through a mask. The mask is formed by patterning a photoresist layer which simultaneously defines mask elements corresponding to features in the array, interface and periphery areas of the integrated circuit. The pattern is transferred to an amorphous carbon layer. Sidewall spacers are formed on the sidewalls of the patterned amorphous carbon layer. A layer of protective material is deposited and then patterned to expose mask elements in the array region and in selected parts of the interface or periphery areas. Amorphous carbon in the array region or other exposed parts is removed, thereby leaving a pattern including free-standing, pitch multiplied spacers in the array region.

Abstract: Disclosed are probe card needles manufactured using microfabrication technology, a method for manufacturing the probe card needles, and a probe card having the probe card needles. The probe needles are manufactured by forming, on a ceramic board, probe needle bases made of conductive metal, and a polymeric elastomer layer, by using photolithography and a photoresist, and continuously depositing conductive metal layers on the probe needle bases in such a manner as to be supported by the polymeric elastomer layer. The probe card comprises: a printed circuit board (PCB) which is connected to a test head for transmitting an electrical signal from a tester; a ceramic board located below the PCB and electrically connected to the PCB by a plurality of interface pins; a jig for mechanically holding the interface pins and the multilayer ceramic board to the PCB; and a plurality of probe needles attached to the lower surface of the multilayer ceramic board and making contact with electrical/electronic devices.

Abstract: A method for manufacturing a magnetic write head for perpendicular magnetic recording. The method provides for accurate definition of a device feature such as a write pole flare point. A functional lapping guide is formed to determine when a lapping operation should be terminated to define an air bearing surface of a slider. In order to provide accurate compensation for manufacturing variations in the functional lapping guide, a dummy lapping guide is provided. An amount of variation of a front edge of the dummy lapping guide, which is defined by the same process step as a writer pole flare point, can be calculated by measuring the width (stripe height) of the dummy lapping guide based on its electrical resistance.

Abstract: A method for etching a pattern on a surface is disclosed. A mask layer is disposed over a surface and a resist is disposed over the mask layer. The resist is exposed to light through the mask exposing primary pattern and sidelobe regions. The resist is developed and the mask layer is etched according to the resist pattern. A first material is deposited over the mask layer, wherein a gap is formed beneath the material and over the primary pattern region. The material is etched back so that the gap is exposed, and the primary pattern region is etched using the first material as a mask.

Abstract: A new and novel method utilizing current nano-technological processes for fabricating a range of micro-devices with significantly expanded capabilities, unique functionalities at microscopic levels, enhanced degree of flexibilities, reduced costs and improved performance in the fields of bioscience and medicine is disclosed in the within patent application. Micro-devices fabricated using the disclosed nano-technological techniques have significant improvements in many areas over the existing, conventional methods. Such improvements include, but are not limited to reduced overall costs, early disease detection, targeted drug delivery, targeted disease treatment and reduced degree of invasiveness in treatment. Compared with existing, conventional approaches, the said inventive approach disclosed in this patent application is much more microscopic, sensitive, accurate, precise, flexible and effective.

Abstract: A method of fabrication and device with holes for electrical conduction made by preparing a photosensitive glass substrate comprising at least silica, lithium oxide, aluminum oxide, and cerium oxide, masking a design layout comprising one or more holes to form one or more electrical conduction paths on the photosensitive glass substrate, exposing at least one portion of the photosensitive glass substrate to an activating energy source, exposing the photosensitive glass substrate to a heating phase of at least ten minutes above its glass transition temperature, cooling the photosensitive glass substrate to transform at least part of the exposed glass to a crystalline material to form a glass-crystalline substrate and etching the glass-crystalline substrate with an etchant solution to form the one or more depressions or through holes for electrical conduction in the device.

Abstract: A process forms a phase change memory cell using a resistive element and a memory region of a phase change material. The resistive element has a first thin portion having a first sublithographic dimension in a first direction; and the memory region has a second thin portion having a second sublithographic dimension in a second direction transverse to the first dimension. The first thin portion and the second thin portion are in direct electrical contact and define a contact area of sublithographic extension. The second thin portion is delimited laterally by oxide spacer portions surrounded by a mold layer which defines a lithographic opening. The spacer portions are formed after forming the lithographic opening, by a spacer formation technique.

Abstract: A method for producing a patterned material for electronic or photonic circuits, comprising the steps of: p) providing a substrate; q) coating the substrate with a polymer layer; r) coating a thermal resist solution over the polymer layer to form a thermal resist layer, wherein the polymer layer is substantially immiscible in the thermal resist solution; s) exposing predetermined areas of the thermal resist layer, corresponding to a desired image pattern, using infrared light; t) removing portions of the thermal resist layer corresponding to a desired image pattern, using a developer; u) removing the polymer layer where the thermal resist layer has been previously removed and undercutting a portion of the remaining thermal resist layer by an etching process; v) depositing a material using a substantially anisotropic process; and removing the remaining thermal resist layer and any overlying material with a solvent for the polymer or thermal resist layers leaving the material in a desired pattern.

Abstract: An enhanced process forming a material pattern on a substrate deposits the material anisotropically on resist material patterned to correspond to an image of the material pattern. The material is etched isotropically to remove a thickness of the material on sidewalls of the resist pattern while leaving the material on a top surface of the resist pattern and portions of the surface of the substrate. The resist pattern is removed by dissolution thereby lifting-off the material on the top surface of the resist pattern while leaving the material on the substrate surface as the material pattern. Alternately, a first material layer is deposited on the resist pattern and a second material layer is deposited and planarized. The second material layer is etched exposing the first material while leaving the second material in features of the resist pattern. The first material and the resist are removed leaving the first material pattern.

Abstract: A method of making a device includes forming a first photoresist layer over an underlying layer, patterning the first photoresist layer to form a first photoresist pattern comprising a first grid, rendering the first photoresist pattern insoluble to a solvent, forming a second photoresist layer over the first photoresist pattern, patterning the second photoresist layer to form a second photoresist pattern over the underlying layer, where the second photoresist pattern is a second grid which overlaps the first grid to form a photoresist web, and etching the underlying layer using the photoresist web as a mask.

Abstract: Methods for forming grating profiles in semiconductor laser structures comprise the steps of providing a semiconductor wafer comprising a wafer substrate, an etch stop layer disposed over the wafer substrate, a grating layer disposed over the etch stop layer, an etch mask layer disposed over the grating layer, and a photoresist layer disposed over the etch mask layer, forming a photoresist grating pattern, transferring the photoresist grating pattern into the grating layers via dry etching, and removing the photoresist layer, selectively wet etching the grating layer to form the grating profile in the grating layer. The placement of the grating layer between the etch mask and etch stop layers controls the selective wet etching step. The method also comprises removing the etch mask layer via selective wet etching without altering the grating profile, and regrowing an upper cladding layer to produce the semiconductor laser structure.

Abstract: The process of producing a dual damascene structure used for the interconnect architecture of semiconductor chips. More specifically the use of imprint lithography to fabricate dual damascene structures in a dielectric and the fabrication of dual damascene structured molds.

Abstract: A method is disclosed which includes patterning a photoresist layer on a substrate of a structure, removing a first portion of the photoresist layer to expose a first area of the substrate, etching the first area to form a cavity having a first depth, removing a second portion of the photoresist to expose an additional area of the substrate, and etching the cavity to expose a first conductor in the structure and the additional area to expose a second conductor in the structure.

Abstract: A semiconductor device manufacturing method, a semiconductor device manufacturing equipment and a computer readable medium storing a computer program provide for easily identifying a cause of a deviation of pattern dimensions from the objective dimension. A first storage section stores a relation between a PEB temperature and a photoresist dimension of a post-lithography. A second storage section stores a relation between a PEB temperature and a post-etching dimension. A primary correction section determines a first corrected PEB temperature for conforming the photoresist dimension of a post-lithography to the objective dimension, using the relation data stored in the first storage section. A secondary correction section determines the second corrected PEB temperature for conforming the post-etching dimension using the first corrected PEB temperature to the objective dimension, using the relation data stored in the second storage section.

Abstract: An article includes a polymeric film having a major surface, a discontinuous layer of a catalytic material on the major surface, and a metal pattern on the catalytic material. The discontinuous layer of catalytic material has an average thickness of less than 200 angstroms. Methods of forming these articles are also disclosed.

Abstract: Provided is a photolithography apparatus including a photomask. The photomask includes a pattern having a plurality, of features, in an example, dummy line features. The pattern includes a first region being in the form of a localized on-grid array and a second region where at least one of the features has an increased width. The apparatus may include a second photomask which may define an active region. The feature with an increased width may be adjacent, and outside, the defined active region.

Abstract: A method of implementing sub-lithographic patterning of a semiconductor device includes forming a first set of patterned features with a single lithography step, the initial set of patterned features characterized by a linewidth and spacing therebetween; forming a first set of sidewall spacers on the first set of patterned features, and thereafter removing the first set of patterned features so as to define a second set of patterned features based on the geometry of the first set of sidewall spacers; and performing one or more additional iterations of forming subsequent sets of sidewall spacers on subsequent sets of patterned features, followed by removal of the subsequent sets of patterned features, wherein a given set of patterned features is based on the geometry of an associated set of sidewall spacers formed prior thereto, and wherein a final of the subsequent sets of patterned features is characterized by a sub-lithographic dimension.

Abstract: A method of minimizing etch undercut and providing clean metal liftoff in subsequent metal deposition is provided. In one embodiment a bilayer resist mask is employed and used for etching of underlying substrate material and subsequent metal liftoff. In one embodiment, the top layer resist such as positive photoresist which is sensitive to selected range of energy, such as near UV or violet light, is first patterned by standard photolithography techniques and resist development in a first developer to expose portion of a bottom resist layer which is sensitive to a different selected range of energy, such as deep UV light. The exposed portion of the bottom layer resist is then removed by anisotropic etching such as oxygen reactive ion etching using the top layer resist as the etch mask to expose portion of the underlying substrate. This minimizes the undercut in the bottom resist around the top photoresist opening.

Abstract: A high-precision ceramic substrate preparation process is disclosed to bond a dry film to a metal layer on a ceramic plate, and then to coat a conductive layer on the metal layer and an anti-etching metal layer on the conductive layer after application of an exposing and developing process to form a predetermined circuit pattern in the dry film, and then to remove the dry film and to etch the metal layer, and then to bond an oxygen-free tape, which is prepared from a compound of ceramic powder, glass powder and pasting agent, to the conductive layer, and then to sinter the oxygen-free tape in an oxygen-free sintering furnace into a retaining wall, and then to coat an anti-oxidation bonding layer on the surface of the conductive layer.

Abstract: There is provided a composition for forming anti-reflective coating containing a urea compound substituted by hydroxyalkyl group or alkoxyalkyl group, and preferably a light absorbing compound and/or a light absorbing resin; a method of forming a anti-reflective coating for a semiconductor device by use of the composition; and a process for manufacturing a semiconductor device by use of the composition. The composition according to the present invention exhibits a good light-absorption to a light having a wavelength used for manufacturing a semiconductor device. Therefore, the composition exerts a high protection effect against light reflection, and has a high dry etching rate compared with photoresist layers.

Abstract: A system and a method for self-aligned dual patterning are described. The system includes a platform for supporting a plurality of process chambers. An etch process chamber coupled to the platform. An ultra-violet radiation photo-resist curing process chamber is also coupled to the platform.

Abstract: A method of lithography patterning includes forming a first resist pattern on a substrate, the first resist pattern including at least one opening therein on the substrate; curing the first resist pattern; forming a second resist pattern on the substrate; forming a material layer on the substrate; and removing the first and second resist patterns to expose the substrate.

Abstract: A method of manufacturing a micro-lens array and light-emitting device, comprising forming a first structured polymer film with close packed surface cavities having a mean diameter of less than 20 micrometers and a relatively lower surface energy surface, forming a transparent second structured film with an array of microlenses formed thereon corresponding to the cavities of the first structured film, wherein the second structured film comprises a relatively high surface energy material and has a refractive index greater than 1.45, and wherein the microlenses are randomly distributed, separating the second structured film with the micro-lens array from the first structured polymer film, and attaching the second structured film to a transparent substrate or cover of a light-emitting device through which light is emitted.

Abstract: A method of manufacturing a fine T-shaped electrode includes a step of forming a laminated resist which includes at least a photoresist layer as an uppermost layer; a step of forming an uppermost layer opening by irradiating the laminated resist with light to pattern only the photo resist layer and form an uppermost layer opening; a step of reducing the diameter of the uppermost layer opening by coating a resist pattern thickening material on the photoresist layer; a step of forming a lowermost layer opening by transferring the uppermost layer opening formed in the photoresist layer to a lower layer of the photoresist, and penetrating the laminated resist; a step of reducing the size of the lowermost opening in the lowermost layer of the laminated resist; and a step of forming a T-shaped electrode in the opening part formed through the laminated resist.

Abstract: An inorganic electron beam sensitive oxide layer is formed on a carbon based material layer or an underlying layer. The inorganic electron beam sensitive oxide layer is exposed with an electron beam and developed to form patterned oxide regions. An ultraviolet sensitive photoresist layer is applied over the patterned oxide regions and exposed surfaces of the carbon based material layer, and subsequently exposed with an ultraviolet radiation and developed. The combined pattern of the patterned ultraviolet sensitive photoresist and the patterned oxide regions is transferred into the carbon based material layer, and subsequently into the underlying layer to form trenches. The carbon based material layer serves as a robust mask for performing additional pattern transfer into the underlying layer, and may be easily stripped afterwards. The patterned ultraviolet sensitive photoresist, the patterned oxide regions, and the patterned carbon based material layer are subsequently removed.

Abstract: A method of forming a pattern in a semiconductor device is described. A substrate divided into cell and peripheral regions is provided, and an object layer is formed on a substrate. A buffer pattern is formed on the object layer in the cell region along a first direction. A spacer is formed along a sidewall of the buffer pattern in the cell region, and a hard mask layer remains on the object layer in the peripheral region. The buffer layer is removed, and the spacer is separated along a second direction different from the first direction, thereby forming a cell hard mask pattern. A peripheral hard mask pattern is formed in the peripheral region. A minute pattern is formed using the cell and peripheral hard mask patterns in the substrate. Therefore, a line width variation or an edge line roughness due to the photolithography process is minimized.

Abstract: Novel methods of double patterning a photosensitive resin composition are provided. The methods involve applying the photosensitive composition to a substrate and thermally crosslinking the composition. The crosslinked layer can be used to provide reflection control. Upon exposure to light, the crosslinked polymer (or oligomer or monomer) in the compositions will decrosslink, rendering the light-exposed portions soluble in typical photoresist developing solutions (e.g., alkaline developers). Advantageously, the crosslinked portions of the composition remain insoluble in the solvent used to form the photosensitive composition. As a result, the coating, lithographic, and or developing steps can be repeated multiple times in varying order, depending upon the particular process, without destroying earlier-formed patterns.

Abstract: A method of manufacturing a member with concave portions includes preparing a base material, forming a mask formation film on the base material, forming a number of openings in the mask formation film by laser irradiation treatments using a branching filter, and etching the base material to form the concave portions in the base material. The branching filter branches laser light into first laser beams and second laser beams. Each of irradiation regions of the mask formation film sequentially is subjected to the laser irradiation treatment, so that first openings are formed by the first laser beams and second openings are formed by the second laser beams. Each of the irradiation regions has portions where no opening is formed by the first beams of the laser irradiation treatment for the irradiation region while openings will be formed by the second laser beams in one or more of the subsequent laser irradiation treatments.

Abstract: In one embodiment, a photoresist is lithographically patterned to form an array of patterned photoresist portions having a pitch near twice a minimum feature size. Fluorine-containing polymer spacers are formed on sidewalls of the patterned photoresist portions. The pattern of the fluorine-containing polymer spacers is transferred into an underlying layer to form a pattern having a sublithographic pitch. In another embodiment, a first pattern in a first photoresist is transferred into a first ARC layer underneath to form first ARC portions. A planarizing second optically dense layer, a second ARC layer, and a second photoresist are applied over the first ARC portions. A second pattern in the second photoresist is transferred into the second ARC layer to form second ARC portions. The combination of the first ARC portions and second ARC portions function as an etch mask to pattern an underlying layer with a composite pattern having a sublithographic pitch.

Abstract: The present invention discloses a photomask etching method for a CVD film, which comprises steps: exposing an optical resin layer to an ultraviolet ray through a photomask; baking the optical resin layer to gasify the exposed portion of the optical resin layer with the unexposed portion remaining; using a CVD method to form a film on the substrate filling the gasified area and covering the remaining portion of the optical resin layer; exposing the entire film to the ultraviolet ray, and baking the entire substrate at a high temperature to gasify the remaining optical resin layer and remove the film adhering to the remaining optical resin layer to obtain a patterned film. The present invention can achieve higher accuracy of the patterned film with lower equipment cost and lower manufacturing cost.

Abstract: The presently disclosed invention provides for the fabrication of porous anodic alumina (PAA) films on a wide variety of substrates. The substrate comprises a wafer layer and may further include an adhesion layer deposited on the wafer layer. An anodic alumina template is formed on the substrate. When a rigid substrate such as Si is used, the resulting anodic alumina film is more tractable, easily grown on extensive areas in a uniform manner, and manipulated without danger of cracking. The substrate can be manipulated to obtain free-standing alumina templates of high optical quality and substantially flat surfaces. PAA films can also be grown this way on patterned and non-planar surfaces. Furthermore, under certain conditions, the resulting PAA is missing the barrier layer (partially or completely) and the bottom of the pores can be readily accessed electrically.

Abstract: A method for manufacturing a piezoelectric resonator element from a substrate made of piezoelectric material is provided. The method includes forming a first dry etching mask in a first masking region of a first surface of the substrate in a first mask forming process and performing a first dry etching process to remove a portion of the substrate in areas between the first dry etching mask after the first mask forming process. The method further includes maintaining a first un-etched portion of the substrate between the first dry etching mask after the first dry etching process and removing the first dry etching mask in a mask removing process after the first dry etching process. A wet etching process is performed to remove the first un-etched portion of the substrate after the mask removing process, thereby forming the piezoelectric resonator element.

Abstract: Provided is a method for forming patterns of a semiconductor device. According to the method, first mask patterns may be formed on a substrate, and second mask patterns may be formed on sidewalls of each first mask pattern. Third mask patterns may fill spaces formed between adjacent second mask patterns, and the second mask patterns may be removed. A portion of the substrate may then be removed using the first and third mask patterns as etch masks.

Abstract: For bonding a donor wafer (1) and a system wafer (9) an edge bead (3) of an epitaxial layer (2) on the donor wafer is flattened or completely removed by etching so that a reliable contact after bonding up to the edge region (5, 6) is possible. The etching mask is produced by means of a resist layer (4) as well as by means of removal of resist at the edge, free exposure and developing without a special photomask.

Abstract: Silica dielectric films, whether nanoporous foamed silica dielectrics or nonporous silica dielectrics are readily damaged by fabrication methods and reagents that reduce or remove hydrophobic properties from the dielectric surface. The invention provides for methods of imparting hydrophobic properties to such damaged silica dielectric films present on a substrate. The invention also provides plasma-based methods for imparting hydrophobicity to both new and damaged silica dielectric films. Semiconductor devices prepared by the inventive processes are also provided.

Abstract: Patterning a surface, comprising at least one feature having silicon coupled to a substrate, is described herein. In one embodiment a method is described for patterning a surface which comprises at least one feature having silicon and at least one feature having carbon coupled to a substrate. The surface is coated with 3-(trimethoxysilyl)propyl methacrylate, and a photoresist is applied the 3-(trimethoxysilyl)propyl methacrylate coated surface. The photoresist is imaged and the surface is etched. The photoresist is then removed.

Abstract: Lithography masks, lithography systems, methods of manufacturing lithography masks, methods of altering material layers of semiconductor devices, and methods of manufacturing semiconductor devices are disclosed. In one embodiment, a lithography mask includes a first pattern for at least one material layer of at least one die, the first pattern being oriented in a first position. The lithography mask includes a second pattern for at least one material layer of the at least one die, the second pattern being oriented in a second position. The second position is different than the first position.

Abstract: A method of forming a semiconductor device includes forming a first mask pattern on a target layer, the first mask pattern exposing a first portion of the target layer, forming an intermediate material layer, including depositing an intermediate material layer film on a side of the first mask pattern and the first portion of the target layer, and thinning the intermediate material layer film to form the intermediate material layer, forming a second mask pattern that exposes a second portion of the intermediate material layer, removing the exposed second portion of the intermediate material layer to expose the target layer, and patterning the target layer using the first and second mask patterns as patterning masks.

Abstract: A polymer for immersion lithography comprising a repeating unit represented by Formula 1 and a photoresist composition containing the same. A photoresist film formed by the photoresist composition of the invention is highly resistant to dissolution, a photoacid generator in an aqueous solution for immersion lithography, thereby preventing contamination of an exposure lens and deformation of the photoresist pattern by exposure.

Abstract: A method for forming a fine-pitch pattern on a semiconductor substrate is provided. The method includes patterning the semiconductor substrate to form a plurality of fine lines, forming a thermal oxide layer on the fine lines, polishing the thermal oxide layer to expose a top surface of the fine lines; etching the fine lines using the thermal oxide layer as a mask to expose first portions of the semiconductor substrate, etching a central bottom portion of the thermal oxide layer to expose second portions of the semiconductor substrate, and etching the semiconductor substrate using the etched thermal oxide layer as a mask.