Insulative Or Nonmetallic Dielectric Etched Patents (Class 430/317)
  • Patent number: 8377631
    Abstract: Molecular glass based planarizing compositions for lithographic processing are disclosed. The processes generally include casting the planarizing composition onto a surface comprised of lithographic features, the planarizing composition comprising at least one molecular glass and at least one solvent; and heating the planarizing composition to a temperature greater than a glass transition temperature of the at least one molecular glass. Exemplary molecular glasses include polyhedral oligomeric silsesquioxane derivatives, calixarenes, cyclodextrin derivatives, and other non-polymeric large molecules.
    Type: Grant
    Filed: October 6, 2009
    Date of Patent: February 19, 2013
    Assignee: International Business Machines Corporation
    Inventors: Robert D. Allen, Mark W. Hart, Ratnam Sooriyakumaran
  • Patent number: 8377626
    Abstract: A method of forming a pattern and a negative-type photoresist composition, the method including forming a photoresist film on a substrate by coating a photoresist composition thereon, the photoresist composition including a polymer, a photoacid generator, and a solvent, wherein the polymer includes an alkoxysilyl group as a side chain and is cross-linkable by an acid to be insoluble in a developer; curing a first portion of the photoresist film by exposing the first portion to light, the exposed first portion being cured by a cross-linking reaction of the alkoxysilyl groups therein; and providing a developer to the photoresist film to remove a second portion of the photoresist film that is not exposed to light, thereby forming a photoresist pattern on the substrate.
    Type: Grant
    Filed: March 30, 2010
    Date of Patent: February 19, 2013
    Assignees: Samsung Electronics Co., Ltd., Korea Advanced Institute of Science and Technology
    Inventors: Kyoung-Mi Kim, Jin-Baek Kim, Ji-Young Park, Young-Ho Kim
  • Patent number: 8343713
    Abstract: The invention is directed to a method for patterning a material layer. The method comprises steps of providing a material layer. The material layer has a first hard mask layer and a second hard mask layer successively formed thereon. Then, the second hard mask layer is patterned to form a plurality of openings therein. A patterned photoresist layer is formed to cover the second hard mask layer and the patterned photoresist layer exposes a portion of the openings. The first hard mask layer with the patterned photoresist layer and the patterned second hard mask layer together as a mask. Then, the patterned photoresist layer and the patterned second hard mask layer are removed. The material layer is patterned with the patterned first hard mask layer as a mask.
    Type: Grant
    Filed: November 6, 2008
    Date of Patent: January 1, 2013
    Assignee: MACRONIX International Co., Ltd.
    Inventors: Chih-Hao Huang, Tzong-Hsien Wu, Chin-Cheng Yang, Tien-Chu Yang
  • Patent number: 8338078
    Abstract: A material comprising a novolac resin having a C6-C30 aromatic hydrocarbon group substituted with a sulfo group or an amine salt thereof is useful in forming a photoresist undercoat. The undercoat-forming material has an extinction coefficient sufficient to provide an antireflective effect at a thickness of at least 200 nm, and a high etching resistance as demonstrated by slow etching rates with CF4/CHF3 gas for substrate processing.
    Type: Grant
    Filed: October 19, 2009
    Date of Patent: December 25, 2012
    Assignee: Shin-Etsu Chemical Co., Ltd.
    Inventors: Jun Hatakeyama, Toshihiko Fujii, Takeru Watanabe, Youichi Ohsawa
  • Patent number: 8334090
    Abstract: An inorganic electron beam sensitive oxide layer is formed on a carbon based material layer or an underlying layer. The inorganic electron beam sensitive oxide layer is exposed with an electron beam and developed to form patterned oxide regions. An ultraviolet sensitive photoresist layer is applied over the patterned oxide regions and exposed surfaces of the carbon based material layer, and subsequently exposed with an ultraviolet radiation and developed. The combined pattern of the patterned ultraviolet sensitive photoresist and the patterned oxide regions is transferred into the carbon based material layer, and subsequently into the underlying layer to form trenches. The carbon based material layer serves as a robust mask for performing additional pattern transfer into the underlying layer, and may be easily stripped afterwards. The patterned ultraviolet sensitive photoresist, the patterned oxide regions, and the patterned carbon based material layer are subsequently removed.
    Type: Grant
    Filed: January 28, 2011
    Date of Patent: December 18, 2012
    Assignee: International Business Machines Corporation
    Inventors: Nicholas C. Fuller, Michael A. Guillorn, Balasubramanian S. Pranatharthi Haran, Jyotica V. Patel
  • Patent number: 8323871
    Abstract: An antireflective hardmask composition layer including a polymer having Si—O and non-silicon inorganic units in its backbone. The polymer includes chromophore and transparent moieties and a crosslinking component. The antireflective hardmask composition layer is employed in a method of forming a patterned material on a substrate.
    Type: Grant
    Filed: February 24, 2010
    Date of Patent: December 4, 2012
    Assignee: International Business Machines Corporation
    Inventors: Sean D. Burns, David R. Medeiros, Dirk Pfeiffer
  • Patent number: 8288082
    Abstract: Example embodiments provide a method of fabricating a triode-structure field-emission device. A cathode, an insulating layer, and a gate metal layer may be sequentially formed on a substrate. A first resist pattern having a first opening and a second resist pattern having a second opening smaller than the first opening may be formed to be sequentially laminated on the gate metal layer. Then, the gate metal layer and the insulating layer may be etched using the first resist pattern to form a gate electrode and an insulating layer having a first hole and a second hole corresponding to the first opening. A catalyst layer may be formed on the cathode exposed through the first and second holes using the second resist pattern. After the first resist pattern, second resist pattern, and the catalyst layer on the second resist pattern are removed, an emitter may be formed on the catalyst layer in the second hole.
    Type: Grant
    Filed: November 10, 2008
    Date of Patent: October 16, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chan Wook Baik, Junhee Choi, Seog Woo Hong, Joo Ho Lee
  • Patent number: 8288081
    Abstract: The present disclosure provides a method of making a mask. The method includes providing a substrate having a first attenuating layer on the substrate and a first imaging layer on the first attenuating layer; performing a first exposure to the first imaging layer using a first radiation energy in writing mode; performing a first etching to the first attenuating layer; performing a second etching to the substrate; forming a second imaging layer on the first attenuating layer and the substrate; performing a second exposure to the second imaging layer using a light energy and another mask; and performing a third etching to the first attenuating layer after the second exposure.
    Type: Grant
    Filed: April 2, 2007
    Date of Patent: October 16, 2012
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Ming Chen, Ya-Ping Tseng, Ming-Tao Ho
  • Patent number: 8288074
    Abstract: There is herein described a method and apparatus for photoimaging. In particular, there is described a method and apparatus for photoimaging a substrate covered with a wet curable photopolymer, wherein the photoimaged substrate is used to form images such as electrical circuits.
    Type: Grant
    Filed: July 8, 2009
    Date of Patent: October 16, 2012
    Assignee: Rainbow Technology Systems Limited
    Inventors: Sheila Hamilton, Charles Jonathan Kennett
  • Patent number: 8273519
    Abstract: A hardmask composition includes a solvent and an organosilicon copolymer. The organosilicon copolymer may be represented by Formula A: (SiO1.5—Y—SiO1.5)x(R3SiO1.5)y??(A) wherein x and y may satisfy the following relations: x is about 0.05 to about 0.9, y is about 0.05 to about 0.9, and x+y=1, R3 may be a C1-C12 alkyl group, and Y may be a linking group including a substituted or unsubstituted, linear or branched C1-C20 alkyl group, a C1-C20 group containing a chain that includes an aromatic ring, a heterocyclic ring, a urea group or an isocyanurate group, or a C2-C20 group containing one or more multiple bonds.
    Type: Grant
    Filed: November 21, 2007
    Date of Patent: September 25, 2012
    Assignee: Cheil Industries, Inc.
    Inventors: Mi Young Kim, Sang Kyun Kim, Sang Hak Lim, Sang Ran Koh, Hui Chan Yun, Do Hyeon Kim, Dong Seon Uh, Jong Seob Kim
  • Patent number: 8263312
    Abstract: Antireflective coatings comprising (i) a silsesquioxane resin having the formula (PhSiO(3-x)/2(OH)x)mHSiO(3-x)/2(OH)x)n(MeSiO(3-x)/2(OH)x)p where Ph is a phenyl group, Me is a methyl group, x has a value of 0, 1 or 2; m has a value of 0.01 to 0.99, n has a value of 0.01 to 0.99, p has a value of 0.01 to 0.99, and m+n+p=1; (ii) a polyethylene oxide fluid; and (iii) a solvent; and a method of forming said antireflective coatings on an electronic device.
    Type: Grant
    Filed: December 7, 2006
    Date of Patent: September 11, 2012
    Assignee: Dow Corning Corporation
    Inventors: Peng-Fei Fu, Eric Scott Moyer
  • Patent number: 8257908
    Abstract: [Object] To provide a coating-type underlayer coating forming composition that is applied for multi-ply coating process by thin film resist in order to prevent collapse of resist pattern after development with miniaturization of resist pattern, and that shows a sufficient etching resistance against a semiconductor substrate to be processed on processing of the substrate by having a low dry etching rate compared with the photoresist and substrate. [Means for solving problems] A coating-type underlayer coating forming composition that is used for lithography process by multi-ply coating, comprising a polymer containing a vinylnaphthalene based structural unit and an acrylic acid based structural unit containing an aromatic hydroxy group or a hydroxy-containing ester. A coating-type underlayer coating forming composition further comprising an acrylic acid based structural unit containing an aliphatic cyclic compound-containing ester or an aromatic compound-containing ester.
    Type: Grant
    Filed: August 15, 2006
    Date of Patent: September 4, 2012
    Assignee: Nissan Chemical Industries, Ltd.
    Inventors: Takahiro Sakaguchi, Tomoyuki Enomoto
  • Patent number: 8241837
    Abstract: Provided are a mask pattern including a silicon-containing self-assembled molecular layer, a method of forming the same, and a method of fabricating a semiconductor device. The mask pattern includes a resist pattern formed on a semiconductor substrate and the self-assembled molecular layer formed on the resist pattern. The self-assembled molecular layer has a silica network formed by a sol-gel reaction. To form the mask pattern, first, the resist pattern is formed with openings on an underlayer covering the substrate to expose the underlayer to a first width. Then, the self-assembled molecular layer is selectively formed only on a surface of the resist pattern to expose the underlayer to a second width smaller than the first width. The underlayer is etched by using the resist pattern and the self-assembled molecular layer as an etching mask to obtain a fine pattern.
    Type: Grant
    Filed: November 16, 2010
    Date of Patent: August 14, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-Hwan Hah, Jin Hong, Hyun-Woo Kim, Hata Mitsuhiro, Kolake Mayya Subramanya, Sang-Gyun Woo
  • Patent number: 8241823
    Abstract: Provided is a photolithography apparatus including a photomask. The photomask includes a pattern having a plurality of features, in an example, dummy line features. The pattern includes a first region being in the form of a localized on-grid array and a second region where at least one of the features has an increased width. The apparatus may include a second photomask which may define an active region. The feature with an increased width may be adjacent, and outside, the defined active region.
    Type: Grant
    Filed: September 29, 2011
    Date of Patent: August 14, 2012
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ming-Feng Shieh, Shinn-Sheng Yu, Anthony Yen, Shao-Ming Yu, Chang-Yun Chang, Jeff J. Xu, Clement Hsingjen Wann
  • Patent number: 8227181
    Abstract: A method of preparing a patterned film on a substrate includes applying a silicone composition onto a substrate to form a film of the silicone composition. A portion of the film is exposed to radiation to produce a partially exposed film having an exposed region and a non-exposed region. The partially exposed film is heated for a sufficient amount of time and at a sufficient temperature to substantially insolubilize the exposed region in a developing solvent that includes a siloxane component. The non-exposed region of the partially exposed film is removed with the developing solvent to reveal a film-free region on the substrate and to form the patterned film including the exposed region that remains on the substrate. The film-free regions is substantially free of residual silicone due to the presence of the siloxane component in the developing solvent.
    Type: Grant
    Filed: August 8, 2007
    Date of Patent: July 24, 2012
    Assignee: Dow Corning Corporation
    Inventors: Herman C. G. D. C. Meynen, Brian Harkness
  • Patent number: 8227180
    Abstract: An anti-reflective coating material, a microelectronic structure that includes an anti-reflective coating layer formed from the anti-reflective coating material and a related method for exposing a resist layer located over a substrate while using the anti-reflective coating layer provide for attenuation of secondary reflected vertical alignment beam radiation when aligning the substrate including the resist layer located thereover. Such enhanced vertical alignment provides for improved dimensional integrity of a patterned resist layer formed from the resist layer, as well as additional target layers that may be fabricated while using the resist layer as a mask.
    Type: Grant
    Filed: June 13, 2011
    Date of Patent: July 24, 2012
    Assignee: International Business Machines Corporation
    Inventors: Timothy Allan Brunner, Sean David Burns, Kuang-Jung Chen, Wu-Song Huang, Kafai Lai, Wai-Kin Li, Bernhard R. Liegl
  • Patent number: 8222075
    Abstract: A plurality of bit lines s arranged crossing a plurality of first word lines. A first diode is arranged at each cross point of the first word lines and the bit lines. A cathode of the first diode is connected to one of the first word lines. A first variable resistance film configuring the first diode is provided between the anodes of the first diodes and the bit lines, and configures a first memory cell together with each of the first diodes, and further, is used in common to the first diodes.
    Type: Grant
    Filed: March 17, 2009
    Date of Patent: July 17, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Eiji Ito
  • Patent number: 8221961
    Abstract: The present invention relates to a method of manufacturing semiconductor devices. According to the method, an etch target layer, a chemically amplified photoresist layer, and an Anti-Reflective Coating (ARC) layer are first sequentially formed over a semiconductor substrate. An exposure process is performed in order to form exposure portions in the photoresist layer. A thermal process is performed so that a decrosslinking reaction is generated in the ARC layer on the exposure portions. A development process is performed in order to form photoresist layer patterns and ARC layer patterns by removing the ARC layer at portions in which the decrosslinking reaction has occurred and the exposure portions. A silylation process is performed in order to form silylation patterns on sidewalls of each of the photoresist layer patterns. The ARC layer patterns and the photoresist layer patterns are removed. The etch target layer is patterned using the silylation patterns as an etch mask.
    Type: Grant
    Filed: December 30, 2008
    Date of Patent: July 17, 2012
    Assignee: Hynix Semiconductor Inc.
    Inventor: Guee Hwang Sim
  • Patent number: 8198014
    Abstract: To provide a material including: a silicon-containing polymer having at least an alkali-soluble group and is represented by the following general formula (1); and an organic solvent capable of dissolving the silicon-containing polymer. (SiO4/2)a(R1tSiO(4-t)/2)b(O1/2R2)c??general formula (1) where R1 represents at least one of a monovalent organic group, hydrogen atom and hydroxyl group, R2 represents at least one of a monovalent organic group and hydrogen atom (where R1 and R2 each may appear twice or more, and at least one of R1 and R2 contains an alkali-soluble group), “t” represents an integer of 1 to 3, “a,” “b,” and “c” represent the relative proportions of their units (where a?0, b?0 and c?0, and “a,” “b,” and “c” are not 0 at the same time), and (R1tSiO(4-t)/2)b may appear twice or more.
    Type: Grant
    Filed: July 31, 2007
    Date of Patent: June 12, 2012
    Assignee: Fujitsu Limited
    Inventors: Miwa Kozawa, Koji Nozaki, Takahisa Namiki
  • Patent number: 8198016
    Abstract: The present invention provides a patterning process, in which a resistance with regard to an organic solvent used for a composition for formation of a reverse film is rendered to a positive pattern to the degree of necessity and yet solubility into an alkaline etching liquid is secured, thereby enabling to finally obtain a negative image by a positive-negative reversal by performing a wet etching using an alkaline etching liquid. A resist patterning process of the present invention using a positive-negative reversal comprises at least a step of forming a resist film by applying a positive resist composition; a step of obtaining a positive pattern by exposing and developing the resist film; a step of crosslinking the positive resist pattern thus obtained; a step of forming a reverse film; and a step of reversing the positive pattern to a negative pattern by dissolving into an alkaline wet-etching liquid for removal.
    Type: Grant
    Filed: May 4, 2009
    Date of Patent: June 12, 2012
    Assignee: Shin-Etsu Chemical Co., Ltd.
    Inventors: Jun Hatakeyama, Tsutomu Ogihara, Mutsuo Nakashima, Kazuhiro Katayama
  • Patent number: 8178405
    Abstract: A memory cell device has a bottom electrode and a top electrode, a plug of memory material in contact with the bottom electrode, and a cup-shaped conductive member having a rim that contacts the top electrode and an opening in the bottom that contacts the memory material. Accordingly, the conductive path in the memory cells passes from the top electrode through the conductive cup-shaped member, and through the plug of phase change material to the bottom electrode.
    Type: Grant
    Filed: April 7, 2010
    Date of Patent: May 15, 2012
    Assignee: Macronix International Co., Ltd.
    Inventors: Erh-Kun Lai, ChiaHua Ho, Kuang Yeu Hsieh
  • Patent number: 8178284
    Abstract: A method of forming a pattern including: forming an underlayer film on a support using an underlayer film-forming material, forming a hard mask on the underlayer film using a silicon-based hard mask-forming material, forming a first resist film by applying a chemically amplified positive resist composition to the hard mask, forming a first resist pattern by selectively exposing the first resist film through a first mask pattern and then performing developing, forming a first pattern by etching the hard mask using the first resist pattern as a mask, forming a second resist film by applying a chemically amplified positive silicon-based resist composition to the first pattern and the underlayer film, forming a second resist pattern by selectively exposing the second resist film through a second mask pattern and then performing developing, and forming a second pattern by etching the underlayer film using the first pattern and the second resist pattern as a mask.
    Type: Grant
    Filed: September 21, 2007
    Date of Patent: May 15, 2012
    Assignee: Tokyo Ohka Kogyo Co., Ltd.
    Inventors: Shinichi Kohno, Hisanobu Harada
  • Patent number: 8173357
    Abstract: The method of forming an etching mask includes: forming a mask layer on an object layer that is to be etched, to form an etching mask used in etching the object layer; forming a first mask layer on the mask layer, the first mask layer having a first pattern that is to be transferred onto the mask layer; forming a second mask layer on the first mask layer, the second mask layer having a second pattern that is to be transferred onto the mask layer; obtaining a third mask layer having the first pattern and the second pattern, by transferring the second pattern of the second mask layer onto the first mask layer; and forming the etching mask used in the etching of the object layer, by etching the mask layer using the third mask layer.
    Type: Grant
    Filed: March 19, 2009
    Date of Patent: May 8, 2012
    Assignee: Tokyo Electron Limited
    Inventor: Eiichi Nishimura
  • Patent number: 8173358
    Abstract: A method of forming fine patterns of a semiconductor device includes forming a plurality of first mask patterns on a substrate such that the plurality of first mask patterns are separated from one another by a space located therebetween, in a direction parallel to a main surface of the substrate, forming a plurality of capping films formed of a first material having a first solubility in a solvent on sidewalls and a top surface of the plurality of first mask patterns. The method further includes forming a second mask layer formed of a second material having a second solubility in the solvent, which is less than the first solubility, so as to fill the space located between the plurality of first mask patterns, and forming a plurality of second mask patterns corresponding to residual portions of the second mask layer which remain in the space located between the plurality of first mask patterns, after removing the plurality of capping films and a portion of the second mask layer using the solvent.
    Type: Grant
    Filed: April 29, 2009
    Date of Patent: May 8, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyoung-hee Kim, Yool Kang, Seong-woon Choi, Jin-young Yoon
  • Patent number: 8168375
    Abstract: Disclosed is a patterning method including: forming a first film on a substrate; forming a multi-layered film including a resist film on the first film; forming a patterned resist film having a preset pattern by patterning the resist film by photolithography; forming a silicon oxide film different from the first film on the patterned resist film and the first film by alternately supplying a first gas containing organic silicon and a second gas containing an activated oxygen species to the substrate; etching the silicon oxide film to thereby form a sidewall spacer on a sidewall of the patterned resist film; removing the patterned resist film; and processing the first film by using the sidewall spacer as a mask.
    Type: Grant
    Filed: June 6, 2008
    Date of Patent: May 1, 2012
    Assignee: Tokyo Electron Limited
    Inventors: Shigeru Nakajima, Kazuhide Hasebe, Pao-Hwa Chou, Mitsuaki Iwashita, Reiji Niino
  • Patent number: 8168372
    Abstract: Novel, developer-soluble, hard mask compositions and methods of using those compositions to form microelectronic structures are provided. The composition comprises the compound a compound for controlling development rate, and a crosslinking agent in a solvent system. The methods involve applying the composition to a substrate and curing the composition. An imaging layer is applied to the composition, followed by light exposure and developing, during which the light-exposed portions of the imaging layer are removed, along with portions of the hard mask composition adjacent said light-exposed portions. The size of the hard mask composition structures are controlled by the development rate, and they yield feature sizes that are a fraction of the imaging layer feature sizes, to give a pattern that can ultimately be transferred to the substrate.
    Type: Grant
    Filed: September 20, 2007
    Date of Patent: May 1, 2012
    Assignee: Brewer Science Inc.
    Inventor: Sam X. Sun
  • Patent number: 8163466
    Abstract: A method forms a first patterned mask (comprising rectangular features and/or rounded openings) on a planar surface and forms a second patterned mask on the first patterned mask and the planar surface. The second patterned mask covers protected portions of the first patterned mask and the second patterned mask reveals exposed portions of the first patterned mask. The method treats the exposed portions of the first patterned mask with a chemical treatment that reduces the size of the exposed portions to create an altered first patterned mask.
    Type: Grant
    Filed: February 17, 2009
    Date of Patent: April 24, 2012
    Assignee: International Business Machines Corporation
    Inventors: Kuang-Jung Chen, Wai-Kin Li
  • Patent number: 8158334
    Abstract: An underlayer to be patterned with a composite pattern is formed on a substrate. The composite pattern is decomposed into a first pattern and a second pattern, each having reduced complexity than the composite pattern. A hard mask layer is formed directly on the underlying layer. A first photoresist is applied over the hard mask layer and lithographically patterned with the first pattern, which is transferred into the hard mask layer by a first etch. A second photoresist is applied over the hard mask layer. The second photoresist is patterned with the second pattern to expose portions of the underlying layer. The exposed portions of the underlying layer are etched employing the second photoresist and the hard mask layer, which contains the first pattern so that the composite pattern is transferred into the underlying layer.
    Type: Grant
    Filed: January 14, 2008
    Date of Patent: April 17, 2012
    Assignee: International Business Machines Corporation
    Inventors: Allen H. Gabor, Scott D. Halle, Helen Wang
  • Patent number: 8153349
    Abstract: A polymer composition includes an aromatic ring-containing polymer represented by Formula 1: wherein m and n satisfy the relations 1?m<190, 0?n<190, and 1?m+n<190.
    Type: Grant
    Filed: December 23, 2008
    Date of Patent: April 10, 2012
    Assignee: Cheil Industries, Inc.
    Inventors: Hwan Sung Cheon, Jong Seob Kim, Kyong Ho Yoon, Min Soo Kim, Jin Kuk Lee, Jee Yun Song
  • Patent number: 8155427
    Abstract: A system for the long-term storage and high-speed retrieval of images stored on silicon wafers. The images are stored by utilizing semiconductor fabrication techniques. These images are organized and managed using metadata in the form of a barcode. Each barcode is a unique identifier that contains the location information for each specific image on the silicon wafer substrate. The system further provides an identifier in an electronic database that references the appropriate barcode and describes the contents of the image. The images and barcodes are transferred to specific predetermined locations on the silicon wafer. The stored images are retrieved by use of a software program that searches for a user's queries in the electronic database and outputs the specific barcode to the image reader. The image reader translates the barcode information for the desired image and drives the optics or the silicon wafer to the appropriate location.
    Type: Grant
    Filed: December 14, 2007
    Date of Patent: April 10, 2012
    Assignee: Nanoark Corporation
    Inventor: Ajay Pasupuleti
  • Patent number: 8142250
    Abstract: A method of forming a color filter touch sensing substrate integrates touch-sensing structures/elements of a touch panel into the inner side of the color filter substrate, which faces a thin film transistor substrate, and forms patterned assistant electrodes on the surfaces of the transparent sensing pads for decreasing the equivalent resistance of the touch-sensing structures/elements. Moreover, since an adjacent transparent conductive layer and an assistant electrode layer are patterned to form the transparent sensing pads and the patterned assistant electrodes, a simplified pattern-transferring process can be applied to the transparent sensing pads and the patterned assistant electrodes, or bridge structures can be formed from the assistant electrode layer for electrically connecting between some transparent sensing pads. Therefore, the forming process is simplified.
    Type: Grant
    Filed: September 27, 2011
    Date of Patent: March 27, 2012
    Assignee: AU Optronics Corp.
    Inventors: Yu-Feng Chien, Chau-Shiang Huang, Tun-Chun Yang, Seok-Lyul Lee
  • Patent number: 8137893
    Abstract: A new lithographic process comprises reducing the linewidth of an image while maintaining the lithographic process window, and using this process to fabricate pitch split structures comprising nm order (e.g., about 22 nm) node semiconductor devices. The process comprises applying a lithographic resist layer on a surface of a substrate and patterning and developing the lithographic resist layer to form a nm order node image having an initial line width. Overcoating the nm order node image with an acidic polymer produces an acidic polymer coated image. Heating the acidic polymer coated image gives a heat treated coating on the image, the heating being conducted at a temperature and for a time sufficient to reduce the initial linewidth to a subsequent narrowed linewidth. Developing the heated treated coating removes it from the image resulting in a free-standing trimmed lithographic feature on the substrate. Optionally repeating the foregoing steps further reduces the linewidth of the narrowed line.
    Type: Grant
    Filed: January 1, 2011
    Date of Patent: March 20, 2012
    Assignee: International Business Machines Corporation
    Inventors: Sean David Burns, Matthew E. Colburn, Steven John Holmes, Wu-Song Huang
  • Patent number: 8133659
    Abstract: This invention provides methods of creating via or trench structures on a developer-soluble hardmask layer using a multiple exposure-development process. The hardmask layer is patterned while the imaging layer is developed. After the imaging layer is stripped using organic solvents, the same hardmask can be further patterned using subsequent exposure-development processes. Eventually, the pattern can be transferred to the substrate using an etching process.
    Type: Grant
    Filed: January 29, 2009
    Date of Patent: March 13, 2012
    Assignee: Brewer Science Inc.
    Inventors: Sam X. Sun, Hao Xu, Tony D. Flaim
  • Patent number: 8110340
    Abstract: A pattern for a gate line is formed using a first photoresist pattern and a first BARC layer. A pad and patterns for a select line, which has a width that is larger than that of the gate line, are formed using a second photoresist pattern and a second BARC layer. The gate line, the pad and the select line can be formed at a same time.
    Type: Grant
    Filed: June 3, 2008
    Date of Patent: February 7, 2012
    Assignee: Hynix Semiconductor Inc.
    Inventor: Woo Yung Jung
  • Patent number: 8084186
    Abstract: The present invention relates to a process for forming an reverse tone image on a device comprising; a) forming an optional absorbing organic underlayer on a substrate; b) forming a coating of a photoresist over the underlayer; c) forming a photoresist pattern; d) forming a polysilazane coating over the photoresist pattern from a polysilazane coating composition, where the polysilazane coating is thicker than the photoresist pattern, and further where the polysilazane coating composition comprises a silicon/nitrogen polymer and an organic coating solvent; e) etching the polysilazane coating to remove the polysilazane coating at least up to a level of the top of the photoresist such that the photoresist pattern is revealed; and, f) dry etching to remove the photoresist and the underlayer which is beneath the photoresist, thereby forming an opening beneath where the photoresist pattern was present.
    Type: Grant
    Filed: February 10, 2009
    Date of Patent: December 27, 2011
    Assignee: AZ Electronic Materials USA Corp.
    Inventors: David Abdallah, Ralph R. Dammel, Yusuke Takano, Jin Li, Kazunori Kurosawa
  • Patent number: 8084184
    Abstract: A composition for removing a photoresist includes a) an amine compound having a cyclic amine and/or a diamine, b) a glycol ether compound, c) a corrosion inhibitor and d) a polar solvent. The composition further includes a stripping promoter. Further disclosed is a method of manufacturing an array substrate using the composition for removing a photoresist.
    Type: Grant
    Filed: November 26, 2008
    Date of Patent: December 27, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-Hyun Choung, Hong-Sick Park, Sun-Young Hong, Bong-Kyun Kim, Byeoung-Jin Lee, Byung-Uk Kim, Jong-Hyun Jeong, Suk-Il Yoon, Sung-Gun Shin, Soon-Beom Huh, Se-Hwan Jung, Doo-Young Jang
  • Patent number: 8084185
    Abstract: The present invention relates to planarization materials and methods of using the same for substrate planarization in photolithography. A planarization layer of a planarization composition is formed on a substrate. The planarization composition contains at least one aromatic monomer and at least one non-aromatic monomer. A substantially flat surface is brought into contact with the planarization layer. The planarization layer is cured by exposing to a first radiation or by baking. The substantially flat surface is then removed. A photoresist layer is formed on the planarization layer. The photoresist layer is exposed to a second radiation followed by development to form a relief image in the photoresist layer. The relief image is then transferred into the substrate.
    Type: Grant
    Filed: January 8, 2009
    Date of Patent: December 27, 2011
    Assignee: International Business Machines Corporation
    Inventors: Sean D. Burns, Colin J. Brodsky, Ryan L. Burns
  • Patent number: 8080366
    Abstract: An in-line process for making a thin film electronic device on a substrate is described comprising the steps of: a) depositing a structurable layer onto a substrate; b) depositing a patternable material onto the structurable layer in a first pattern; and c) etching the structurable layer in areas uncovered by the patternable material. The steps are carried out without intermediate exposure of the substrate to ambient air.
    Type: Grant
    Filed: February 23, 2007
    Date of Patent: December 20, 2011
    Assignee: OTB Solar B.V.
    Inventors: Ronaldus Joannes Cornelis Maria Kok, Marinus Franciscus Johannes Evers, Franciscus Cornelius Dings
  • Publication number: 20110287369
    Abstract: There is provided a resist underlayer film forming composition for lithography for forming a resist underlayer film capable of being used as a hardmask. A resist underlayer film forming composition for lithography comprising a silane compound containing an anion group, wherein the silane compound containing an anion group is a hydrolyzable organosilane in which an organic group containing an anion group is bonded to a silicon atom and the anion group forms a salt structure, a hydrolysis product thereof, or a hydrolysis-condensation product thereof. The anion group may be a carboxylic acid anion, a phenolate anion, a sulfonic acid anion, or a phosphonic acid anion. The hydrolyzable organosilane may be a compound of Formula (1): R1aR2bSi(R3)4?(a+b) (1).
    Type: Application
    Filed: December 16, 2009
    Publication date: November 24, 2011
    Applicant: NISSAN CHEMICAL INDUSTRIES, LTD.
    Inventors: Wataru Shibayama, Makoto Nakajima, Yuta Kanno
  • Patent number: 8053164
    Abstract: The present invention relates to a resist composition with a hardener and a solvent, and a method for forming a pattern using the resist composition. The hardener has a thermal-decomposable core part, and a first photosensitive bond art. The solvent has a low-molecular resin, and a second photosensitive bond part.
    Type: Grant
    Filed: January 30, 2009
    Date of Patent: November 8, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Bo-Sung Kim, Seung-Jun Lee, Jung-Mok Bae
  • Patent number: 8053171
    Abstract: The invention provides a manufacturing method of a substrate having a film pattern including an insulating film, a semiconductor film, a conductive film and the like by simple steps, and also a manufacturing method of a semiconductor device which is low in cost with high throughput and yield. According to the invention, after forming a first protective film which has low wettability on a substrate, a material which has high wettability is applied or discharged on an outer edge of a first mask pattern, thereby a film pattern and a substrate having the film pattern are formed.
    Type: Grant
    Filed: January 3, 2005
    Date of Patent: November 8, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shinji Maekawa, Gen Fujii, Hiroko Shiroguchi, Masafumi Morisue
  • Patent number: 8048615
    Abstract: There is provided an underlayer coating that is used as an underlayer of photoresists in lithography process of the manufacture of semiconductor devices and that has a high dry etching rate in comparison to the photoresists depending on the type of etching gas, does not intermix with the photoresists, and is capable of flattening the surface of a semiconductor substrate having holes of a high aspect ratio; and an underlayer coating forming composition for forming the underlayer coating. The underlayer coating forming composition for forming by light irradiation an underlayer coating used as an underlayer of a photoresist in a lithography process of the manufacture of semiconductor devices, includes a polymerizable compound containing 5 to 45% by mass of silicon atom (A), a photopolymerization initiator (B), and a solvent (C).
    Type: Grant
    Filed: December 1, 2006
    Date of Patent: November 1, 2011
    Assignee: Nissan Chemical Industries, Ltd.
    Inventors: Satoshi Takei, Yusuke Horiguchi, Keisuke Hashimoto, Makoto Nakajima
  • Patent number: 8048614
    Abstract: A circuit pattern having a size finer than a half of a wavelength of an exposure beam is transferred on a semiconductor wafer plane with an excellent accuracy by means of a mask whereupon an integrated circuit pattern is formed and a reduction projection aligner. The accuracy of transferring the circuit pattern on the semiconductor wafer is improved by synergic effects of super-resolution exposure, wherein a mask cover made of a transparent medium is provided on a pattern side of the integrated circuit mask so as to suppress the aberration of reduction projection alignment, and a method of increasing the number of actual apertures of the optical reduction projection lens system provided with the wafer cover made of the transparent medium on a photoresist side of the semiconductor wafer to which planarizing process is performed.
    Type: Grant
    Filed: August 9, 2006
    Date of Patent: November 1, 2011
    Inventors: Yoshihiko Okamoto, Masami Ogita
  • Patent number: 8043794
    Abstract: A method of double patterning is disclosed. The method includes forming a first photosensitive layer; exposing the first photosensitive layer using a first reticle; developing the first photosensitive layer thereby forming a first image pattern including first elements; forming a second photosensitive layer; exposing the second photosensitive layer using the first reticle; and developing the second photosensitive layer thereby forming a second image pattern.
    Type: Grant
    Filed: February 1, 2008
    Date of Patent: October 25, 2011
    Assignee: Qimonda AG
    Inventors: Christoph Noelscher, Yi-Ming Chiu, Yuan-Hsun Wu
  • Patent number: 8039196
    Abstract: A method of patterning a substrate includes processing first regions of the substrate to form a first pattern, the first regions defining a second region between adjacent first regions, arranging a block copolymer on the first and second regions, the block copolymer including a first component and a second component, the first component of the block copolymer being aligned on the first regions, and selectively removing one of the first component and the second component of the block copolymer to form a second pattern having a pitch that is less than a pitch of a first region and an adjacent second region.
    Type: Grant
    Filed: March 19, 2008
    Date of Patent: October 18, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyoung Taek Kim, Hyun Woo Kim, Sang Ouk Kim, Shi Yong Yi, Seong Woon Choi
  • Patent number: 8029974
    Abstract: There is disclosed a thermosetting metal oxide-containing film-forming composition for forming a metal oxide-containing film to be formed in a multilayer resist process used in lithography, the thermosetting metal oxide-containing film-forming composition comprising, at least: (A) a metal oxide-containing compound obtained by hydrolytic condensation of a hydrolyzable silicon compound and a hydrolyzable metal compound; (B) a thermal crosslinking accelerator; (C) a monovalent, divalent, or higher organic acid having 1 to 30 carbon atoms; (D) a trivalent or higher alcohol; and (E) an organic solvent.
    Type: Grant
    Filed: August 21, 2009
    Date of Patent: October 4, 2011
    Assignee: Shin-Etsu Chemical Co., Ltd.
    Inventors: Tsutomu Ogihara, Takafumi Ueda, Toshiharu Yano
  • Patent number: 8026038
    Abstract: A metal oxide-containing film is formed from a heat curable composition comprising (A) a metal oxide-containing compound obtained through hydrolytic condensation between a hydrolyzable silicon compound and a hydrolyzable metal compound, (B) a hydroxide or organic acid salt of Li, Na, K, Rb or Cs, or a sulfonium, iodonium or ammonium compound, (C) an organic acid, and (D) an organic solvent. The metal oxide-containing film ensures effective pattern formation.
    Type: Grant
    Filed: November 20, 2008
    Date of Patent: September 27, 2011
    Assignee: Shin-Etsu Chemical Co., Ltd.
    Inventors: Tsutomu Ogihara, Takafumi Ueda, Toshiharu Yano, Mutsuo Nakashima
  • Patent number: 8017309
    Abstract: A method of manufacturing a wiring circuit board includes: preparing an insulating layer; forming conductive thin films on the upper surface and the side end surface of the insulating layer; covering the conductive thin films formed on the upper surface and the side end surface of the insulating layer with photoresists; arranging a photomask so that an end portion and a portion to be provided with a conductive layer in the conductive thin film formed on the upper surface of the insulating layer are shaded and exposing the photoresist covering the conductive thin film formed on the upper surface of the insulating layer from above through the photomask; exposing the photoresist covering the conductive thin film formed on the side end surface of the insulating layer from below; forming plating resists by removing unexposed portions of the photoresists so as to form exposed portions into patterns; forming an end portion conductive layer on the end portion of the conductive thin film formed on the upper surface of
    Type: Grant
    Filed: April 10, 2009
    Date of Patent: September 13, 2011
    Assignee: Nitto Denko Corporation
    Inventor: Keiji Takemura
  • Patent number: 8003307
    Abstract: A method for fabricating an image sensor includes forming an insulation layer over a substrate in a logic circuit region and a pixel region, forming a photoresist over the insulation layer, patterning the photoresist to form a photoresist pattern where the insulation layer in the pixel region is exposed and the insulation layer in the logic circuit region is not exposed, wherein a thickness of the photoresist pattern is gradually decreased in an interfacial region between the pixel region and the logic circuit region in a direction of the logic circuit region to the pixel region, and performing an etch back process over the insulation layer and the photoresist pattern in conditions that an etch rate of the photoresist pattern are substantially the same as that of the insulation layer.
    Type: Grant
    Filed: March 17, 2008
    Date of Patent: August 23, 2011
    Assignee: Crosstek Capital, LLC
    Inventors: Hyun-Hee Nam, Jeong-Lyeol Park
  • Patent number: 8003293
    Abstract: A deliberately engineered placement and size constraint (molecular weight distribution) of photoacid generators, solubility switches, photoimageable species, and quenchers forms individual pixels within a photoresist. Upon irradiation, a self-contained reaction occurs within each of the individual pixels that were irradiated to pattern the photoresist. These pixels may take on a variety of forms including a polymer chain, a bulky cluster, a micelle, or a micelle formed of several polymer chains. Furthermore, these pixels may be designed to self-assemble onto the substrate on which the photoresist is applied.
    Type: Grant
    Filed: September 30, 2004
    Date of Patent: August 23, 2011
    Assignee: Intel Corporation
    Inventors: Robert P. Meagley, Michael D. Goodner, Bob E. Leet, Michael L. McSwiney