Abstract: An antireflection film composition, wherein an etching speed is fast, thus, when used as a resist lower layer, a film loss of a resist pattern and deformation of the pattern during etching can be minimized, and because of a high crosslinking density, a dense film can be formed after thermal crosslinking, thus, mixing with an upper layer resist can be prevented and the resist pattern after development is good is provided. The antireflection film composition comprising; at least a polymer having a repeating unit represented by the following general formula (I).

Abstract: A multilayer resist process comprises forming in sequence an undercoat film, an intermediate film, and a photoresist film on a patternable substrate, and effecting etching in multiple stages. A silicon-containing film forming composition is useful in forming the intermediate film serving as an etching mask, comprising a silicon-containing polymer obtained through hydrolytic condensation of at least one Si—Si bond-containing silane compound having formula: R(6-m)Si2Xm wherein R is a monovalent hydrocarbon group, X is alkoxy, alkanoyloxy or halogen, and m is 3 to 6. The composition allows the overlying photoresist film to be patterned to a satisfactory profile and has a high etching selectivity relative to organic materials.

Abstract: The present invention provides a method of processing a substrate, comprising a reflow process for forming a desired pattern by dissolving a resist pattern, whereby occurrence of defectives, such as disconnection, can be prevented, and a pattern having an appropriate uniformity can be formed efficiently on each predetermined area desired to be masked. From a photoresist pattern 206 including thicker film portions and thinner film portions, the thinner film portions are removed by a re-developing process. Next, the photoresist so formed by the re-developing process on a backing layer 205 is dissolved such that it passes through a stepped portion 205a formed at each edge portion 205b of the backing layer 205, thereby masking a predetermined area Tg.

Abstract: A pattern transfer method includes first through third steps. In the first step, a desired pattern is transferred onto a resin layer formed on a substrate, a release layer being disposed between the substrate and the resin layer. In the second step, which is executed after the first step, the pattern having been transferred onto the resin layer is transferred to the substrate and the release layer is partially exposed. In the third step, which is executed after the second step, the release layer present between the substrate and the resin layer is dissolved and is thus removed from the substrate.

Abstract: A method for forming an opening is disclosed. First, a semiconductor substrate is provided, in which the semiconductor substrate includes at least one metal interconnects therein. A stacked film is formed on the semiconductor substrate, in which the stacked film includes at least one dielectric layer and one hard mask. The hard mask is used to form an opening in the stacked film without exposing the metal interconnects, and the hard mask is removed thereafter. A barrier layer is later deposited on the semiconductor substrate to cover a portion of the dielectric layer and the surface of the metal interconnects.

Abstract: A naphthalene-backbone polymer represented by Formula 1: wherein n and m are independently at least 1 and less than about 190, R1 is a hydrogen, a hydroxyl, a hydrocarbon group of about 10 carbons or less, or a halogen, R2 is methylene or includes an aryl linking group, R3 is a conjugated diene group, and R4 is an unsaturated dienophile group.

Abstract: An antireflective hardmask composition includes an organic solvent, and at least one polymer represented by Formulae A, B or C: In Formulae A and B, the fluorene group is unsubstituted or substituted, in Formula C, the naphthalene group is unsubstituted or substituted, n is at least 1 and is less than about 750, m is at least 1, and m+n is less than about 750, G is an aromatic ring-containing group having an alkoxy group, and R1 is methylene or includes a non-fluorene-containing aryl linking group.

Abstract: Antireflective hardmask compositions and techniques for the use of antireflective hardmask compositions for processing of semiconductor devices are provided. In one aspect of the invention, an antireflective hardmask layer for lithography is provided. The antireflective hardmask layer comprises a carbosilane polymer backbone comprising at least one chromophore moiety and at least one transparent moiety; and a crosslinking component. In another aspect of the invention, a method for processing a semiconductor device is provided. The method comprises the steps of: providing a material layer on a substrate; forming an antireflective hardmask layer over the material layer. The antireflective hardmask layer comprises a carbosilane polymer backbone comprising at least one chromophore moiety and at least one transparent moiety; and a crosslinking component.

Abstract: There is disclosed a rework process for a photoresist film over a substrate having at least a first antireflection silicone resin film and the photoresist film over the first silicone resin film comprising: at least removing the photoresist film with a solvent while leaving the first silicone resin film unremoved; forming a second antireflection silicone resin film over the first silicone resin film; and forming a photoresist film again over the second silicone resin film. There can be provided a rework process for a photoresist film that can be conducted more easily at lower cost and provide more certainly an excellent resist pattern.

Abstract: A stencil mask includes a membrane forming thin layer having membrane areas and a border area that limits the membrane areas. The membrane areas have a plurality of pattern areas which include an aperture through which particle beams can permeate and non-pattern areas interposed between the pattern areas. A main strut supports the membrane areas and is formed on the border area of the membrane forming thin layer. An auxiliary strut is formed in the non-pattern areas inside the membrane pattern area such that the auxiliary strut divides the membrane areas into plural divided membrane areas. The auxiliary strut supports the divided membrane areas.

Abstract: A method for manufacturing a semiconductor device is provided. The method includes forming a polysilicon layer on a semiconductor substrate, forming an anti-reflection coating on the polysilicon layer, forming a photoresist (PR) layer pattern on the anti-reflection coating, etching the anti-reflection coating using the PR layer pattern as a mask in capacitive coupled plasma (CCP) equipment using CF4, Ar, and O2, so as to cause a reaction by-product generated by etching the anti-reflect coating to be deposited on sidewalls of the PR layer pattern, thereby forming spacers, and etching the polysilicon layer using the PR layer pattern and the spacers as a mask.

Abstract: An anti-reflective coating composition includes a solvent and about 20 to about 35 percent by weight of a polymer prepared by a condensation reaction of an acrylate polymer including a hydroxyl group with a derivative of muramic acid and a derivative of mandelic acid.

Abstract: The present invention discloses a composition suitable for use as a top antireflective coating and barrier layer for immersion lithography. The inventive composition is soluble in aqueous base solutions and insoluble in water. The inventive composition comprises a polymer having at least one hydrophobic moiety, at least one acidic moiety with a pKa of 1 or less, and at least one aqueous base soluble moiety. The present invention also discloses a method of forming a patterned layer on a substrate by using the inventive composition in lithography.

Abstract: A photoresist composition includes about 10 to about 70% by weight of a binder resin including a phenol-based polymer, about 0.5 to about 10% by weight of a photo-acid generator, about 1 to about 20% by weight of a cross-linker, about 0.1 to about 5% by weight of a dye and about 10 to about 80% by weight of a solvent. The photoresist composition may be applied to, for example, a method of manufacturing a TFT substrate.

Abstract: A method for forming a gate and a method for etching a conductive layer are provided. First, a substrate is provided, including a dielectric layer and a conductive layer on its surface in order. Subsequently, a patterned silicon nitride layer is formed on the conductive layer as a hard mask, and the hydrogen concentration of the patterned silicon nitride layer is more than 1022 atoms/cm3. Thereafter, the conductive layer and the dielectric layer are etched utilizing the hard mask as a mask. Finally, an etching solution is utilized to remove the hard mask.

Abstract: There is disclosed an antireflection film composition used for lithography comprising: at least a light absorbing silicone resin with mass average molecular weight of 30,000 or less in which components having molecular weight of less than 600 account for 5% or less of the whole resin; a first acid generator that is decomposed at a temperature of 200 degrees C. or less; and an organic solvent. There can be provided an antireflection film composition that prevents intermixing in the vicinity of the antireflection film/photoresist film interface, that provides a resist pattern over the antireflection film with almost vertical wall profile, and that provides less damage to an underlying layer of the antireflection film.

Abstract: A double exposure method for enhancing the image resolution in a lithographic system, is presented herein. The invention comprises decomposing a desired pattern to be printed on the substrate into at least two constituent sub-patterns that are capable of being optically resolved by the lithographic system, coating the substrate with a first positive tone resist layer and a thin second positive tone resist layer on top of a target layer which is to be patterned with the desired dense line pattern. The second resist material is absorbing exposure radiation during a first patterning exposure and after development during a second patterning exposure to prevent exposure above energy-to-clear of at least a portion of the first resist material underneath exposed portions of the second resist material layer.

Abstract: Methods of forming arrays of small, densely spaced holes or pillars for use in integrated circuits are disclosed. Various pattern transfer and etching steps can be used, in combination with pitch-reduction techniques, to create densely-packed features. Conventional photolithography steps can be used in combination with pitch-reduction techniques to form superimposed patterns of crossing elongate features with pillars at the intersections. Spacers are simultaneously applied to sidewalls of both sets of crossing lines to produce a pitch-doubled grid pattern. The pillars facilitate rows of spacers bridging columns of spacers.

Abstract: The wiring line structure comprises a transparent substrate, a barrier layer, a metal layer, and a photosensitive protecting layer. The barrier layer and a metal layer are successively disposed on the transparent substrate. The photosensitive protecting layer is formed on the barrier layer and both sides of the metal layer. A method for fabricating the wiring line structure is also disclosed.

Abstract: The present invention discloses an antireflective coating composition for applying between a substrate surface and a positive photoresist composition. The antireflective coating composition is developable in an aqueous alkaline developer. The antireflective coating composition comprises a polymer, which comprises at least one monomer unit containing one or more moieties selected from the group consisting of a lactone, maleimide, and an N-alkyl maleimide; and at least one monomer unit containing one or more absorbing moieties. The polymer does not comprise an acid labile group. The present invention also discloses a method of forming and transferring a relief image by using the inventive antireflective coating composition in photolithography.

Abstract: A resist polymer that has nano-scale patterns located therein that are in the form of sub lithographic hollow pores (or openings) that are oriented in a direction that is substantially perpendicular with that of its major surfaces (top and bottom) is provided. Such a resist polymer having the nano-scale patterns is used as an etch mask transferring nano-scale patterns to an underlying substrate such as, for example, dielectric material. After the transferring of the nano-scale patterns into the substrate, nano-scale voids (or openings) having a width of less than 50 nm are created in the substrate. The presence of the nano-scale voids in a dielectric material lowers the dielectric constant, k, of the original dielectric material.

Abstract: A method of improving high aspect ratio etching by reverse masking to provide a more uniform mask height between the array and periphery is presented. A layer of amorphous carbon is deposited over a substrate. An inorganic hard mask is deposited on the amorphous carbon followed by a layer of photodefinable material which is deposited over the array portion of the substrate. The photodefinable material is removed along with the inorganic hard mask overlaying the periphery. A portion of the amorphous carbon layer is etched in the exposed periphery. The inorganic hard mask is removed and normal high aspect ratio etching continues. The amount of amorphous carbon layer remaining in the periphery results in a more uniform mask height between the array and periphery at the end of high aspect ratio etching. The more uniform mask height mitigates twisting at the edge of the array.

Abstract: Provided is a method of manufacturing a metal interconnection of a semiconductor device. According to the method, a first dielectric is formed on a semiconductor substrate having a device thereon, and a second dielectric and a metal layer pattern are formed on the first dielectric. Then, a first polymer pattern surrounding a photoresist pattern is formed on the second dielectric, and a via hole is formed in the second dielectric by etching using the first polymer pattern as a mask. The photoresist pattern and the polymer pattern are removed, and a contact is formed by filling the via hole.

Abstract: Provided is a method of manufacturing a nano size-gap electrode device. The method includes the steps of: disposing a floated nano structure on a semiconductor layer; forming a mask layer having at least one opening pattern to intersect the nano structure; and depositing a metal on the semiconductor layer exposed through the opening pattern to form an electrode, such that a nano size-gap is provided under the nano structure by the nano structure.

Abstract: With the damascene process in which an interconnection is formed using a conventional chemically amplified positive photoresist composition, there arises a problem that the photoresist within the via hole (as well as in its vicinity) may remain even after the exposure and the development are carried out. The present invention relates to a chemically amplified resist composition comprising, at least, a photo acid generator, a quencher and a salt having a buffering function for an acid which is generated from the acid generator by irradiation, wherein the salt having the buffering function for the acid generated from the acid generator is a salt derived from a long chain alkylbenzenesulfonic acid or a long chain alkoxybenzenesulfonic acid and an organic amine that is a basic compound.

Abstract: A method of forming a self aligned pattern on an existing pattern on a substrate including applying a coating of a solution containing a masking material in a carrier, the masking material being either photo or thermally sensitive; performing a blanket exposure of the substrate; and allowing at least a portion of the masking material to preferentially develop in a fashion that replicates the existing pattern of the substrate. The existing pattern includes a first set of regions of the substrate having a first reflectivity and a second set of regions of the substrate having a second reflectivity different from the first composition. The first set of regions can include one or more metal elements and the second set of regions can include one or more dielectrics. Structures made in accordance with the method. A low resolution mask is used to block out regions over the substrate. Additionally, the resist can be applied over another masking layer that contains a separate pattern.

Abstract: When a hole pattern is formed on a film to be processed, a matching deviation margin at a lithography step is reserved by making a diameter of a bottom of a hole substantially equal to a diameter of an aperture of the hole. The method for manufacturing the semiconductor apparatus includes the steps of: forming a (first) mask material film on a film to be processed; forming a tapered open pattern on the (first) mask material film; and etching the film to be processed by using the (first) mask material film as a mask.

Abstract: According to an aspect of an embodiment, a resist composition for immersion exposure includes a matrix resin so that the matrix resin is turned alkali-soluble by an acid. The resist composition further includes a resin having a side chain containing silicon, the resin being capable of being turned alkali-soluble by an acid, the content of the silicon with respect to the total amount of the matrix resin and the resin being 1% by mass or less.

Abstract: In the case in which a film for a resist is formed by spin coating, there is a resist material to be wasted, and the process of edge cleaning is added as required. Further, when a thin film is formed on a substrate using a vacuum apparatus, a special apparatus or equipment to evacuate the inside of a chamber vacuum is necessary, which increases manufacturing cost. The invention is characterized by including: a step of forming conductive layers on a substrate having a dielectric surface in a selective manner with a CVD method, an evaporation method, or a sputtering method; a step of discharging a compound to form resist masks so as to come into contact with the conductive layer; a step of etching the conductive layers with plasma generating means using the resist masks under the atmospheric pressure or a pressure close to the atmospheric pressure; and a step of ashing the resist masks with the plasma generating means under the atmospheric pressure or a pressure close to the atmospheric pressure.

Abstract: A board interconnection structure having a first printed wiring board in which a first conductive circuit is arranged on a first insulating layer, the first conductive circuit having, on an end portion thereof, a first connection terminal in which an upper surface width is narrower than a bottom surface width; a second printed wiring board in which a second conductive layer having a second connection terminal is arranged on a second insulating layer; and a connection layer that forms fillets along longitudinal side surfaces of the first connection terminal, and interconnects the first connection terminal and the second connection terminal. The first connection terminal may have a projection portion.

Abstract: In performing an anisotropic etching process after a taper etching process of a gate conductive layer of a two-layer or three-layer laminated structure, a portion that is not etched is left at an edge of a second conductive film to shorten an LDD region. It is an object to make the LDD region longer by reducing or removing the left portion that is not etched. After a taper etching process of a gate conductive layer of a two-layer or three-layer laminated structure, an argon plasma treatment is performed. With this argon plasma treatment, a reactive organism in the taper etching process is removed, and it becomes possible to reduce or remove the left portion that is not etched in the anisotropic etching to be performed next.

Abstract: There is disclosed a resist lower layer film material for a multilayer-resist film used in lithography which contains, at least, a polymer having a repeating unit represented by the following general formula (1). Thereby, there can be provided a resist lower layer film material for a multilayer-resist process, especially for a two-layer resist process, which functions as an excellent antireflection film especially for exposure with a short wavelength, namely has higher transparency, and has the optimal n value and k value, and is excellent in an etching resistance in substrate processing, and a method for forming a pattern on a substrate by lithography using it.

Abstract: An inorganic resist material is provided, which is an incomplete oxide of a phase-change material. The oxygen content in the inorganic resist material is lower than the stoichiometric oxygen content of a complete oxide of the phase-change material, and a general formula of the inorganic resist material is A1-xOx, in which A represents the phase-change material, and x is between 5 at. % and 65 at. %. The inorganic resist material can be used to form line patterns or recording pits with size smaller than the exposure light spot by using the laser of conventional lithography process as an exposure source.

Abstract: A periodic poling structure comprises a ferroelectric substrate including a plurality of tunnels, a plurality of first domains positioned in the ferroelectric substrate between the tunnels and a plurality of second domains interleaved between the first domains in the ferroelectric substrate. Each first domain has a first polarization direction, and each second domain has a second polarization direction different from the first polarization direction. The tunnels are disposed on a top surface and on a bottom surface of the ferroelectric substrate in an equal interval manner or in a variant interval manner. Particularly, the second polarization direction is opposite to the first polarization direction. The periodic poling structure further comprises a plurality of conductive blocks covering the entire base surfaces of the tunnels, or separated from the sidewalls of the tunnels by insulation gaps such that the conductive blocks cover only a portion of the base surfaces of the tunnels.

Abstract: A positive type resist composition having an alkali-soluble siloxane polymer expressed by the following Formula (1), a photosensitive compound, and a 1 ?m thick resist film formed of the positive type resist composition which has 5% to 60% of transmittance to i-line radiation; in the Formula (1), R1 and R2 express a monovalent organic group, and may be identical or different; “A” is a group expressed by the following Formula (2) having at least one phenolic hydroxyl group; and “a”, “b,” and “c” satisfy the following relation; a+b+c=1, in the Formula (2), R3, R4, and R5 express one of a hydrogen atom and a monovalent organic group, and may be identical or different, “m” expresses an integer, and “n” expresses an integer of 1 to 5. Preferably, 0.25?a?0.60, and 0?c?0.25. The composition is preferably used in a resist film undergoing oxygen plasma etching.

Abstract: The present invention discloses a composition suitable for use as a top antireflective coating and barrier layer for 193 nm lithography. The inventive composition is soluble in aqueous base solutions and has low refractive index at 193 nm. The inventive composition comprises an aqueous base-soluble polymer having a backbone and a fluorinated half ester moiety. The fluorinated half ester moiety is pendant from the backbone. The present invention also discloses a method of forming a patterned layer on a substrate by using the inventive composition in lithography.

Abstract: A composition for forming anti-reflective coating for use in a lithographic process in manufacture of a semiconductor device, comprising as a component a resin containing cyanuric acid or a derivative thereof, or a resin containing a structural unit derived from cyanuric acid or a derivative thereof. The structural unit is preferably represented by formula (1): and can be contained in a main chain or a side chain, or both main chain and side chain of a resin. The anti-reflective coating for lithography obtained from the composition has a high reflection reducing effect and does not cause intermixing with a resist layer to give an excellent resist pattern. It has a higher selectivity in dry-etching compared with the resists.

Abstract: A near-field photoresist for formation of a fine pattern with by near-field exposure includes an alkali-soluble novalac resin, a diazyde-type photosensitizer which is photoreactive by near-field exposure, a photoacid generator which generates acid by the near-field exposure, and a solvent.

Abstract: An undercoat-forming material comprising a copolymer derived from an indene and a compound having a hydroxyl or epoxy group and a double bond, an organic solvent, an acid generator, and a crosslinker, optionally combined with an intermediate layer having an antireflective effect, has an absorptivity coefficient sufficient to provide an antireflective effect at a thickness of at least 200 nm and a high etching resistance as demonstrated by slow etching rates with CF4/CHF3 and Cl2/BCl3 gases for substrate processing.

Abstract: Method for fabricating a semiconductor device in which a by-product of etching is deposited on a photoresist film for using as a mask. The method for fabricating a semiconductor device includes the steps of depositing a polysilicon, and a bottom anti-refection coating on an entire surface of a substrate in succession, forming a photoresist film pattern on a predetermined portion of the bottom anti-refection coating, etching the bottom anti-refection coating by using the photoresist film pattern to deposit by-product of the etching on sidewalls of the photoresist pattern to form spacers, and etching the polysilicon by using the photoresist film pattern and the spacers, to form a line.

Abstract: The present invention provides a method for forming a stepped structure on a substrate that features transferring, into the substrate, an inverse shape of the stepped structure disposed on the substrate.

Abstract: After forming a resist film including a hygroscopic compound, pattern exposure is performed by selectively irradiating the resist film with exposing light while supplying water onto the resist film. After the pattern exposure, the resist film is developed so as to form a resist pattern.

Abstract: An integrated circuit semiconductor device including a cell region formed in a first portion of a silicon substrate, the cell region including a first trench formed in the silicon substrate, a first buried insulating layer filled in the first trench, a first insulating pattern formed over the silicon substrate, and a first conductive pattern formed over the first insulating pattern. An overlay key region is formed in a second portion of the silicon substrate and includes a second trench formed in the silicon substrate, a second insulating pattern formed over the silicon substrate and used as an overlay key, and a second conductive pattern formed over the second insulating pattern and formed by correcting overlay and alignment errors using the second insulating pattern.

Abstract: A method of photoresist processing includes forming a first photoresist layer over composite layers of dielectric insulation and a top insulating layer and patterning a via hole pattern in the first photoresist layer by exposing to radiation of a first sensitivity. A second photoresist layer is formed over via patterned and the first photoresist layer. A trench line pattern is formed in the second photoresist layer by exposing to radiation of a second sensitivity. The layers are then etched and the trench line and via hole openings are filled with metal.

Abstract: In a method for forming a photoresist pattern, a method for forming a capacitor, and a capacitor manufactured using the same, a light is selectively irradiated onto a selected portion of a photoresist film formed on a substrate. An interfered light generated from the irradiated light is transmitted through other portions of the photoresist film except a ring-shaped portion of the photoresist film having a predetermined width along a boundary of the selected portion. The photoresist film is exposed using the interfered light and the light irradiated onto the selected portion. A cylindrical photoresist pattern having a minute width may be formed through developing the photoresist film. With the cylindrical pattern, the capacitor can be easily formed.

Abstract: A method of forming an integrated circuit using an amorphous carbon film. The amorphous carbon film is formed by thermally decomposing a gas mixture comprising a hydrocarbon compound and an inert gas. The amorphous carbon film is compatible with integrated circuit fabrication processes. In one integrated circuit fabrication process, the amorphous carbon film is used as a hardmask. In another integrated circuit fabrication process, the amorphous carbon film is an anti-reflective coating (ARC) for deep ultraviolet (DUV) lithography. In yet another integrated circuit fabrication process, a multi-layer amorphous carbon anti-reflective coating is used for DUV lithography.

Abstract: A method for forming a patterned amorphous carbon layer in a semiconductor stack, including forming an amorphous carbon layer on a substrate and forming a silicon containing photoresist layer on top of the amorphous carbon layer. Thereafter, the method includes developing a pattern transferred into the resist layer with a photolithographic process and etching through the amorphous carbon layer in at least one region defined by the pattern in the resist layer, wherein a resist layer hard mask is formed in an outer portion of the photoresist layer during etching.

Abstract: A process of producing an electroluminescent element is provided. The production process comprises repeating at least twice a step of forming an electroluminescent layer comprising a buffer layer and a luminescent layer by patterning using a photolithographic process, thereby producing an electroluminescent element comprising a patterned electroluminescent layer. The method includes the steps of forming a first pattern part comprising a first buffer layer as the lowermost layer, and coating a solution for forming a second buffer layer in a region including the first pattern part. The first buffer layer is immiscible with the solution for forming the second buffer layer.

Abstract: A new underlayer composition that exhibits high etch resistance and improved optical properties is disclosed. The underlayer composition comprises a vinyl or acrylate polymer, such as a methacrylate polymer, the polymer comprising at least one substituted or unsubstituted naphthalene or naphthol moiety, including mixtures thereof. The compositions are suitable for use as a planarizing underlayer in a multilayer lithographic process, including a trilayer lithographic process.

Abstract: A process and related structure are disclosed for using photo-definable layers that may be selectively converted to insulative materials in the manufacture of semiconductor devices, including for example dynamic random access memories (DRAMs), synchronous DRAMs (SDRAMs), static RAMs (SRAMs), FLASH memories, and other memory devices. One possible photo-definable material for use with the present invention is plasma polymerized methylsilane (PPMS), which may be selectively converted into photo-oxidized siloxane (PPMSO) through exposure to deep ultra-violet (DUV) radiation using standard photolithography techniques. According to the present invention, structures may be formed by converting exposed portions of a photo-definable layer to an insulative material and by using the non-exposed portions in a negative pattern scheme, or the exposed portions in a positive pattern scheme, to transfer a pattern into to an underlying layer.