Insulative Or Nonmetallic Dielectric Etched Patents (Class 430/317)
  • Patent number: 7989142
    Abstract: An exemplary method for fabricating a TFT array substrate includes providing an insulating substrate (201); coating a gate metal layer (202) on the substrate; forming a plurality of gate electrodes (212) using a first photo-mask process; forming a gate insulating layer (203), a semiconducting layer (205), and a source/drain metal layer (206) on the substrate having the gate electrodes; forming a plurality of source electrodes (217) and a plurality of drain electrodes (218) using a second photo-mask process; forming a passivation material layer (209) and a photo resist layer on the gate insulating layer, the source electrodes and the drain electrodes; forming a passivation layer (219) and the photo resist pattern (234) using a third photo-mask process; forming a transparent conductive metal layer (204) on the photo resist pattern, the drain electrode and the gate insulating layer; and forming a pixel electrode (214) through removing the photo resist pattern.
    Type: Grant
    Filed: March 19, 2007
    Date of Patent: August 2, 2011
    Assignee: Chimel Innolux Corporation
    Inventor: Jian-Jhong Fu
  • Patent number: 7982312
    Abstract: The process of producing a dual damascene structure used for the interconnect architecture of semiconductor chips. More specifically the use of imprint lithography to fabricate dual damascene structures in a dielectric and the fabrication of dual damascene structured molds.
    Type: Grant
    Filed: August 7, 2008
    Date of Patent: July 19, 2011
    Assignee: International Business Machines Corporation
    Inventors: Matthew E. Colburn, Kenneth Raymond Carter, Gary M. McClelland, Dirk Pfeiffer
  • Patent number: 7960095
    Abstract: Resist compositions having good footing properties even on difficult substrates are obtained by using a combination of base additives including a room temperature solid base, and a liquid low vapor pressure base. The compositions are especially useful on metal substrates such as chromium-containing layers commonly used in mask-making.
    Type: Grant
    Filed: February 11, 2004
    Date of Patent: June 14, 2011
    Assignee: International Business Machines Corporation
    Inventors: Wayne M. Moreau, Marie Angelopoulos, Wu-Song Huang, David R. Medeiros, Karen E. Petrillo
  • Patent number: 7960090
    Abstract: A pattern forming method includes a step of forming a pattern of a resist on a surface of a thin film formed on the base material; a step of forming a reverse layer on the pattern of the resist; a step of forming a reverse pattern, of the reverse layer complementary to the pattern of the resist by removing the resist after removing the reverse layer to expose a surface of the resist; a step of forming a hard mask layer including the thin film, on which the reverse layer is formed, by etching the thin film through the reverse pattern of the reverse layer as a mask; and a step of etching the base material through, as a mask, the hard mask layer on which the reverse layer remains or the hard mask layer on which the reverse layer has been removed.
    Type: Grant
    Filed: May 21, 2008
    Date of Patent: June 14, 2011
    Assignee: Canon Kabushiki Kaisha
    Inventors: Atsunori Terasaki, Junichi Seki
  • Patent number: 7955784
    Abstract: A photoresist composition includes about 100 parts by weight of resin mixture including novolak resin and acryl resin and about 10 parts to about 50 parts by weight of naphthoquinone diazosulfonic acid ester. A weight-average molecular weight of the novolak resin is no less than about 30,000. A weight-average molecular weight of the acryl resin is no less than about 20,000. The acryl resin makes up about 1% to about 15% of the total weight of the resin mixture. When a photoresist film formed using the photoresist composition is heated, a profile variation of the photoresist composition is relatively small. Therefore, a residual photoresist film has a uniform thickness, and a short circuit and/or an open defect in a TFT substrate may be reduced.
    Type: Grant
    Filed: October 30, 2006
    Date of Patent: June 7, 2011
    Assignees: Samsung Electronics Co., Ltd., AZ Electronic Materials (Japan) K.K.
    Inventors: Hi-Kuk Lee, Woo-Seok Jeon, Doo-Hee Jung, Jeong-Min Park, Deok-Man Kang, Si-Young Jung, Jae-Young Choi
  • Patent number: 7947434
    Abstract: The process of forming a plated film according to the invention is designed such that the surface asperities of the inorganic film formed by the tracing of a standing wave occurring at the inner wall surface of the first opening in the resist at the resist pattern-formation step are reduced or eliminated. It is thus possible to form, efficiently yet in a short period of time, a high aspect-ratio plated film portion having an aspect ratio of greater than 1. In addition, the formed plated film quality is extremely improved for the absence of pores (cavities).
    Type: Grant
    Filed: February 6, 2007
    Date of Patent: May 24, 2011
    Assignee: TDK Corporation
    Inventors: Akifumi Kamijima, Hitoshi Hatate, Hideyuki Yatsu
  • Patent number: 7943288
    Abstract: A method of manufacturing a thin-film magnetic head structure comprises the steps of preparing an insulating layer 10; forming a first resist layer 51 provided with a first slit pattern 51a corresponding to a very narrow groove part and a second slit pattern 51b corresponding to a temporary groove part integrally extending from the very narrow groove part along outer edges of a main depression onto the insulating layer 10; etching the insulating layer 10 while using the first resist layer 51 as a mask; eliminating the first resist layer 51; forming a second resist layer having an opening pattern corresponding to the main depression onto the insulating layer 10; and etching the insulating layer 10 while using the second resist layer as a mask.
    Type: Grant
    Filed: September 23, 2008
    Date of Patent: May 17, 2011
    Assignees: Headway Technologies, Inc., SAE Magnetics (H.K.) Ltd.
    Inventors: Yoshitaka Sasaki, Hiroyuki Ito, Takehiro Kamigama, Tatsushi Shimizu, Hironori Araki, Shigeki Tanemura, Kazuo Ishizaki
  • Patent number: 7935310
    Abstract: Devices, systems and methods of using same where hybrid substrate materials are provided with a substantially uniform surface to provide uniformity of properties, including interaction with their environments. Uniform surfaces are applied as coatings over, e.g., hybrid metal/silica, metal/polymer, metal/metal surfaces to mask different chemical properties of differing regions of the surface and to afford a protective surface for the hybrid structure.
    Type: Grant
    Filed: November 27, 2006
    Date of Patent: May 3, 2011
    Assignee: Pacific Biosciences of California, Inc.
    Inventor: Jonas Korlach
  • Patent number: 7932035
    Abstract: Devices, systems and methods of using same where hybrid substrate materials are provided with a substantially uniform surface to provide uniformity of properties, including interaction with their environments. Uniform surfaces are applied as coatings over, e.g., hybrid metal/silica, metal/polymer, metal/metal surfaces to mask different chemical properties of differing regions of the surface and to afford a protective surface for the hybrid structure.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: April 26, 2011
    Assignee: Pacific Biosciences of California, Inc.
    Inventor: Jonas Korlach
  • Patent number: 7931867
    Abstract: Devices, systems and methods of using same where hybrid substrate materials are provided with a substantially uniform surface to provide uniformity of properties, including interaction with their environments. Uniform surfaces are applied as coatings over, e.g., hybrid metal/silica, metal/polymer, metal/metal surfaces to mask different chemical properties of differing regions of the surface and to afford a protective surface for the hybrid structure.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: April 26, 2011
    Assignee: Pacific Biosciences of California, Inc.
    Inventor: Jonas Korlach
  • Patent number: 7932013
    Abstract: There are provided a coating material which improves an etching resistance of a pattern in an etching process using a pattern formed on a substrate as a mask. The material is a pattern coating material for an etching process using a pattern formed on a substrate as a mask, including a metal compound (W) which can produce a hydroxyl group on hydrolysis.
    Type: Grant
    Filed: June 16, 2006
    Date of Patent: April 26, 2011
    Assignee: Tokyo Ohka Kogyo Co., Ltd.
    Inventors: Shogo Matsumaru, Toshiyuki Ogata, Kiyoshi Ishikawa, Hideo Hada, Shigenori Fujikawa, Toyoki Kunitake
  • Patent number: 7932014
    Abstract: A photosensitive compound has two or more structural units, in a molecule, represented by the following general formula (1): wherein R1 to R8 are selected from the group consisting of a hydrogen atom, a halogen atom, an alkyl group, an alkoxy group, an acetoxy group, a phenyl group, a naphthyl group, and an alkyl group in which some or all of the hydrogen atoms are optionally replaced by fluorine atoms; R9 is a hydrogen atom or a hydroxyl group; X is a substituted or unsubstituted phenylene group or a substituted or unsubstituted naphthalene group; and Y is an oxygen atom or a single bond.
    Type: Grant
    Filed: February 14, 2008
    Date of Patent: April 26, 2011
    Assignee: Canon Kabushiki Kaisha
    Inventor: Toshiki Ito
  • Patent number: 7914970
    Abstract: An inorganic electron beam sensitive oxide layer is formed on a carbon based material layer or an underlying layer. The inorganic electron beam sensitive oxide layer is exposed with an electron beam and developed to form patterned oxide regions. An ultraviolet sensitive photoresist layer is applied over the patterned oxide regions and exposed surfaces of the carbon based material layer, and subsequently exposed with an ultraviolet radiation and developed. The combined pattern of the patterned ultraviolet sensitive photoresist and the patterned oxide regions is transferred into the carbon based material layer, and subsequently into the underlying layer to form trenches. The carbon based material layer serves as a robust mask for performing additional pattern transfer into the underlying layer, and may be easily stripped afterwards. The patterned ultraviolet sensitive photoresist, the patterned oxide regions, and the patterned carbon based material layer are subsequently removed.
    Type: Grant
    Filed: October 4, 2007
    Date of Patent: March 29, 2011
    Assignee: International Business Machines Corporation
    Inventors: Nicholas C. Fuller, Michael A. Guillorn, Balasubramanian S. Pranatharthi Haran, Jyotica V. Patel
  • Patent number: 7906274
    Abstract: A method of forming a lithographic template, the method including, inter alia, creating a multi-layered structure, by forming, on a body, a conducting layer, and forming on the conducting layer, a patterned layer having protrusions and recessions, the recessions exposing portions of the conducting layer; depositing a hard mask material anisotropically on the multi-layered structure covering a top surface of the patterned layer and the portions of the conducting layer; removing the patterned layer by a lift-off process, with the hard mask material remaining on the portions of the conducting layer; positioning a resist pattern on the multi-layered structure to define a region of the multi-layered structure; and selectively removing portions of the multi-layered structure in superimposition with the region using the hard mask material as an etching mask.
    Type: Grant
    Filed: November 21, 2007
    Date of Patent: March 15, 2011
    Assignee: Molecular Imprints, Inc.
    Inventors: Gerard M. Schmid, Douglas J. Resnick, Michael N. Miller
  • Patent number: 7887996
    Abstract: Pattern transfer is achieved by forming a first patterned hard mask layer with a circuit pattern and a plurality of dummy patterns on a substrate, forming a second pattern mask layer on the substrate, exposing the circuit pattern of the first pattern mask layer, and removing a portion of the substrate exposed by the first patterned mask layer, so as to transfer the circuit pattern to the substrate.
    Type: Grant
    Filed: November 6, 2007
    Date of Patent: February 15, 2011
    Assignee: Nanya Technology Corp.
    Inventors: Hung-Jen Liu, Cheng-Ku Chiang
  • Patent number: 7883829
    Abstract: In one embodiment, a photoresist is lithographically patterned to form an array of patterned photoresist portions having a pitch near twice a minimum feature size. Fluorine-containing polymer spacers are formed on sidewalls of the patterned photoresist portions. The pattern of the fluorine-containing polymer spacers is transferred into an underlying layer to form a pattern having a sublithographic pitch. In another embodiment, a first pattern in a first photoresist is transferred into a first ARC layer underneath to form first ARC portions. A planarizing second optically dense layer, a second ARC layer, and a second photoresist are applied over the first ARC portions. A second pattern in the second photoresist is transferred into the second ARC layer to form second ARC portions. The combination of the first ARC portions and second ARC portions function as an etch mask to pattern an underlying layer with a composite pattern having a sublithographic pitch.
    Type: Grant
    Filed: August 1, 2008
    Date of Patent: February 8, 2011
    Assignees: International Business Machines Corporation, Freescale Semiconductors, Inc.
    Inventors: Steven J. Holmes, Xuefeng Hua, Willard E. Conley
  • Patent number: 7879526
    Abstract: Provided herein are hardmask compositions for resist underlayer films, wherein according to some embodiments of the invention, hardmask compositions include a polymer prepared by the reaction of a compound of Formula 1 with a compound of Formula 2 (R)m—Si—(OCH3)4-m??(2) in the presence of a catalyst, wherein R is a monovalent organic group, n is an integer from 3 to 20, and m is 1 or 2; and an organic solvent. Also provided herein are methods for producing a semiconductor integrated circuit device using a hardmask composition according to an embodiment of the invention. Further provided are semiconductor integrated circuit devices produced by a method embodiment of the invention.
    Type: Grant
    Filed: August 22, 2006
    Date of Patent: February 1, 2011
    Assignee: Cheil Industries, Inc.
    Inventors: Dong Seon Uh, Chang Il Oh, Do Hyeon Kim, Hui Chan Yun, Jin Kuk Lee, Irina Nam, Jong Seob Kim
  • Patent number: 7879533
    Abstract: An etching residue removal method includes a cleaning sequence. Preferably, the cleaning sequence has a first washing processing, first drying processing, stripper processing, rinsing processing, second washing processing and second drying processing. In the first washing processing, an insulation film and metal lines thereon are washed by pure water. In the first drying processing, the insulation film and metal lines are dried in a nitrogen atmosphere at room temperature, for example. In the stripper processing, the etching residue on the insulation film and metal lines are stripped by amine stripper, for example. In the rinsing processing, the insulation film and metal lines are rinsed with an IPA rinse solution, for example. In the second washing processing, the insulation film and metal lines are washed with pure water. In the second drying processing, the insulation film and metal lines are dried in the nitrogen atmosphere at room temperature, for example.
    Type: Grant
    Filed: May 8, 2006
    Date of Patent: February 1, 2011
    Assignee: Oki Semiconductor Co., Ltd.
    Inventor: Takeshi Itou
  • Patent number: 7875417
    Abstract: A silicon-containing film is formed from a heat curable composition comprising (A-1) a silicon-containing compound obtained through hydrolytic condensation of a hydrolyzable silicon compound in the presence of an acid catalyst, (A-2) a silicon-containing compound obtained through hydrolytic condensation of a hydrolyzable silicon compound in the presence of a base catalyst, (B) a hydroxide or organic acid salt of Li, Na, K, Rb or Ce, or a sulfonium, iodonium or ammonium compound, (C) an organic acid, (D) a cyclic ether-substituted alcohol, and (E) an organic solvent. The silicon-containing film ensures effective pattern formation, effective transfer of a photoresist pattern, and accurate processing of a substrate.
    Type: Grant
    Filed: June 27, 2008
    Date of Patent: January 25, 2011
    Assignee: Shin-Etsu Chemical Co., Ltd.
    Inventors: Tsutomu Ogihara, Toshiharu Yano, Koji Hasegawa
  • Publication number: 20110014574
    Abstract: Methods of forming electrically conductive and/or semiconductive features for use in integrated circuits are disclosed. Various pattern transfer and etching steps can be used, in combination with pitch-reduction techniques, to create densely-packed features. The features can have a reduced pitch in one direction and a wider pitch in another direction. Conventional photo-lithography steps can be used in combination with pitch-reduction techniques to form elongate, pitch-reduced features such as bit-line contacts, for example.
    Type: Application
    Filed: September 30, 2010
    Publication date: January 20, 2011
    Applicant: Micron Technology, Inc.
    Inventor: Luan C. Tran
  • Patent number: 7867693
    Abstract: Methods for forming device structures on a wafer are provided. One method includes transferring approximately an inverse of patterned features formed in a positive resist layer on the wafer to a device material on the wafer to form the device structures in the device material. Another method includes transferring approximately an inverse of patterned features formed in a sacrificial layer on the wafer to a device material on the wafer to form the device structures in the device material.
    Type: Grant
    Filed: March 1, 2007
    Date of Patent: January 11, 2011
    Assignee: KLA-Tencor Technologies Corp.
    Inventor: Walter D. Mieher
  • Patent number: 7862982
    Abstract: A new lithographic process comprises reducing the linewidth of an image while maintaining the lithographic process window, and using this process to fabricate pitch split structures comprising nm order (e.g., about 22 nm) node semiconductor devices. The process comprises applying a lithographic resist layer on a surface of a substrate and patterning and developing the lithographic resist layer to form a nm order node image having an initial line width. Overcoating the nm order node image with an acidic polymer produces an acidic polymer coated image. Heating the acidic polymer coated image gives a heat treated coating on the image, the heating being conducted at a temperature and for a time sufficient to reduce the initial linewidth to a subsequent narrowed linewidth. Developing the heated treated coating removes it from the image resulting in a free-standing trimmed lithographic feature on the substrate. Optionally repeating the foregoing steps further reduces the linewidth of the narrowed line.
    Type: Grant
    Filed: June 12, 2008
    Date of Patent: January 4, 2011
    Assignee: International Business Machines Corporation
    Inventors: Sean David Burns, Matthew E. Colburn, Steven John Holmes, Wu-Song Huang
  • Patent number: 7855045
    Abstract: A topcoat material for applying on top of a photoresist material is disclosed. The topcoat material comprises at least one solvent and a polymer which has a dissolution rate of at least 3000 ?/second in aqueous alkaline developer. The polymer contains a hexafluoroalcohol monomer unit comprising one of the following two structures: wherein n is an integer. The topcoat material may be used in lithography processes, wherein the topcoat material is applied on a photoresist layer. The topcoat material is preferably insoluble in water, and is therefore particularly useful in immersion lithography techniques using water as the imaging medium.
    Type: Grant
    Filed: October 5, 2007
    Date of Patent: December 21, 2010
    Assignee: International Business Machines Corporation
    Inventors: Robert David Allen, Phillip Joe Brock, Dario Gil, William Dinan Hinsberg, Carl Eric Larson, Linda Karin Sundberg, Gregory Michael Wallraff
  • Patent number: 7855043
    Abstract: A silicon-containing film is formed from a heat curable composition comprising (A-1) a silicon-containing compound obtained by effecting hydrolytic condensation of a hydrolyzable silicon compound in the presence of an acid catalyst and removing the acid catalyst, (A-2) a silicon-containing compound obtained by effecting hydrolytic condensation of a hydrolyzable silicon compound in the presence of a basic catalyst and removing the basic catalyst, (B) a hydroxide or organic acid salt of lithium, sodium, potassium, rubidium or cesium, or a sulfonium, iodonium or ammonium compound, (C) an organic acid, and (D) an organic solvent. The silicon-containing film allows an overlying photoresist film to be patterned effectively.
    Type: Grant
    Filed: June 6, 2007
    Date of Patent: December 21, 2010
    Assignee: Shin-Etsu Chemical Co., Ltd.
    Inventors: Tsutomu Ogihara, Takafumi Ueda, Takeshi Asano, Motoaki Iwabuchi
  • Patent number: 7851138
    Abstract: Patterning a surface, comprising at least one feature having silicon coupled to a substrate, is described herein. In one embodiment a method is described for patterning a surface which comprises at least one feature having silicon and at least one feature having carbon coupled to a substrate. The surface is coated with 3-(trimethoxysilyl)propyl methacrylate, and a photoresist is applied the 3-(trimethoxysilyl)propyl methacrylate coated surface. The photoresist is imaged and the surface is etched. The photoresist is then removed.
    Type: Grant
    Filed: July 19, 2007
    Date of Patent: December 14, 2010
    Assignee: Hitachi Global Storage Technologies, Netherlands, B.V.
    Inventors: Cherngye Hwang, Dennis R. McKean, Gary J. Suzuki
  • Patent number: 7851125
    Abstract: Provided are a mask pattern including a silicon-containing self-assembled molecular layer, a method of forming the same, and a method of fabricating a semiconductor device. The mask pattern includes a resist pattern formed on a semiconductor substrate and the self-assembled molecular layer formed on the resist pattern. The self-assembled molecular layer has a silica network formed by a sol-gel reaction. To form the mask pattern, first, the resist pattern is formed with openings on an underlayer covering the substrate to expose the underlayer to a first width. Then, the self-assembled molecular layer is selectively formed only on a surface of the resist pattern to expose the underlayer to a second width smaller than the first width. The underlayer is etched by using the resist pattern and the self-assembled molecular layer as an etching mask to obtain a fine pattern.
    Type: Grant
    Filed: July 21, 2005
    Date of Patent: December 14, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-Hwan Hah, Jin Hong, Hyun-Woo Kim, Hata Mitsuhiro, Kolake Mayya Subramanya, Sang-Gyun Woo
  • Patent number: 7846849
    Abstract: A method for fabricating a semiconductor mask is described. A semiconductor stack having a sacrificial mask comprised of a series of lines is first provided. A spacer mask having spacer lines adjacent to the sidewalls of the series of lines of the sacrificial mask is then formed. The spacer mask also has interposed lines between the spacer lines. Finally, the sacrificial mask is removed to provide only the spacer mask. The spacer mask having interposed lines triples the frequency of the series of lines of the sacrificial mask.
    Type: Grant
    Filed: October 19, 2007
    Date of Patent: December 7, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Christopher D. Bencher, Keiji Horioka
  • Patent number: 7842450
    Abstract: A method of forming a semiconductor device includes forming a first mask pattern on a target layer, the first mask pattern exposing a first portion of the target layer, forming an intermediate material layer, including depositing an intermediate material layer film on a side of the first mask pattern and the first portion of the target layer, and thinning the intermediate material layer film to form the intermediate material layer, forming a second mask pattern that exposes a second portion of the intermediate material layer, removing the exposed second portion of the intermediate material layer to expose the target layer, and patterning the target layer using the first and second mask patterns as patterning masks.
    Type: Grant
    Filed: February 28, 2007
    Date of Patent: November 30, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Doo-youl Lee, Suk-joo Lee, Yool Kang, Han-ku Cho, Chang-jin Kang, Jae-ok Yoo, Sung-chan Park
  • Patent number: 7838201
    Abstract: A polymer for immersion lithography comprising a repeating unit represented by Formula 1 and a photoresist composition containing the same. A photoresist film formed by the photoresist composition of the invention is highly resistant to dissolution, a photoacid generator in an aqueous solution for immersion lithography, thereby preventing contamination of an exposure lens and deformation of the photoresist pattern by exposure.
    Type: Grant
    Filed: April 8, 2009
    Date of Patent: November 23, 2010
    Assignee: Hynix Semiconductor Inc.
    Inventors: Jae Chang Jung, Cheol Kyu Bok, Chang Moon Lim, Seung Chan Moon
  • Patent number: 7816068
    Abstract: A composition suitable for use as a planarizing underlayer in a multilayer lithographic process is disclosed. The inventive composition comprises a polymer containing heterocyclic aromatic moieties. In another aspect, the composition further comprises an acid generator. In yet another aspect, the composition further comprises a crosslinker. The inventive compositions provide planarizing underlayers having outstanding optical, mechanical and etch selectivity properties. The present invention also encompasses lithographic structures containing the underlayers prepared from the compositions of the present invention, methods of making such lithographic structures, and methods of using such lithographic structures to pattern underlying material layers on a substrate.
    Type: Grant
    Filed: October 26, 2007
    Date of Patent: October 19, 2010
    Assignee: International Business Machines Corporation
    Inventors: Wu-Song S. Huang, Karen Temple, Pushkara R. Varanasi
  • Patent number: 7816067
    Abstract: To provide a coating-type underlayer coating forming composition containing a naphthalene resin derivative. A coating-type underlayer coating forming composition for lithography comprising a compound of formula (1): wherein A is an organic group having an aromatic group, R1 is hydroxy group, an alkyl group, an alkoxy group, a halogen group, a thiol group, an amino group or an amide group, m1 is the number of A substituted on the naphthalene ring and is an integer of 1 to 6, m2 is the number of R1 substituted on the naphthalene ring and is an integer of 0 to 5, a sum of m1 and m2 (m1+m2) is an integer of 1 to 6, in cases where the sum is an integer other than 6, the reminder is hydrogen atom, and n is the number of repeating units ranging from 2 to 7000.
    Type: Grant
    Filed: May 24, 2006
    Date of Patent: October 19, 2010
    Assignee: Nissan Chemical Industries, Ltd.
    Inventors: Tomoyuki Enomoto, Takahiro Kishioka, Takahiro Sakaguchi
  • Patent number: 7803517
    Abstract: A method of forming a contact hole includes forming a plurality of lower patterns on a substrate. An insulation layer is formed on the lower patterns. A self-assemble induction layer is formed on the insulation layer. A recess is formed in the self-assemble induction layer in alignment with the lower patterns. A block copolymer layer is formed in the recess to form a polymer domain at a distance from a sidewall of the recess and a polymer matrix surrounding the polymer domain. The polymer domain is removed. The self-assemble induction layer is etched using the polymer matrix as a mask to form an opening through the self-assemble induction layer to expose the insulation layer. The insulation layer exposed by the opening is etched using the self-assemble induction layer as a mask so as to form a contact hole.
    Type: Grant
    Filed: October 31, 2006
    Date of Patent: September 28, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-chan Park, Chang-jin Kang
  • Patent number: 7803519
    Abstract: A method for manufacturing a semiconductor device using a photoresist polymer comprising a fluorine component, a photoresist composition containing the photoresist polymer and an organic solvent to reduce surface tension, by forming a photoresist film uniformly on the whole surface of an underlying layer pattern to allow a subsequent ion-implanting process to be stably performed.
    Type: Grant
    Filed: April 8, 2009
    Date of Patent: September 28, 2010
    Assignee: Hynix Semiconductor Inc.
    Inventor: Jae Chang Jung
  • Patent number: 7803521
    Abstract: A photoresist composition and methods using the photoresist composition in multiple exposure/multiple layer processes. The photoresist composition includes a polymer comprising repeat units having a hydroxyl moiety; a photoacid generator; and a solvent. The polymer when formed on a substrate is substantially insoluble to the solvent after heating to a temperature of about 150° C. or greater. One method includes forming a first photoresist layer on a substrate, patternwise exposing the first photoresist layer, forming a second non photoresist layer on the substrate and patterned first photoresist layer. Another method includes forming a first photoresist layer on a substrate, patternwise exposing the first photoresist layer, forming a second photoresist layer on the substrate and patterned first photoresist layer and patternwise exposing the second photoresist layer.
    Type: Grant
    Filed: November 19, 2007
    Date of Patent: September 28, 2010
    Assignee: International Business Machines Corporation
    Inventors: Kuang-Jung Chen, Wu-Song Huang, Wai-Kin Li, Pushkara R. Varanasi
  • Patent number: 7799604
    Abstract: A semiconductor device includes a support body, a first substrate provided on a surface at one side of the support body, a second substrate provided on a surface at the other side of the support body, and a semiconductor chip provided on the first substrate exposed to an opening part piercing the support body and the second substrate. The first substrate includes a first dielectric layer and a wiring layer, a plurality of first electrodes connected to the semiconductor chip which first electrodes are provided on a first surface of the first substrate exposed to an inside of the opening part, and the second substrate includes a second dielectric layer made of a material substantially the same as the first dielectric layer.
    Type: Grant
    Filed: July 2, 2007
    Date of Patent: September 21, 2010
    Assignee: Fujitsu Limited
    Inventors: Tomoyuki Abe, Motoaki Tani
  • Patent number: 7786019
    Abstract: Methods for etching quartz are provided herein. In one embodiment, a method of etching quartz includes providing a film stack on a substrate support disposed in a processing chamber, the film stack having a quartz layer partially exposed through a patterned layer; and etching the quartz layer of the film stack in a multi-step process including a first step of etching the quartz layer utilizing a first process gas comprising at least one fluorocarbon process gas and a chlorine-containing process gas; and a second step of etching the quartz layer utilizing a second process gas comprising at least one fluorocarbon process gas.
    Type: Grant
    Filed: December 18, 2006
    Date of Patent: August 31, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Renee Koch, Scott A. Anderson
  • Patent number: 7781153
    Abstract: A polymer resin composition, a method for forming a pattern using the polymer resin composition, and a method for fabricating a capacitor using the polymer resin composition are disclosed. The polymer resin composition includes about 75 to 93 percent by weight of a copolymer prepared from benzyl methacrylate, methacrylic acid, and hydroxyethyl methacrylate; about 1 to 7 percent by weight of a cross-linking agent; about 0.01 to 0.5 percent by weight of a thermal acid generator; about 0.01 to 1 percent by weight of a photoacid generator; about 0.00001 to 0.001 percent by weight of an organic base; and a solvent.
    Type: Grant
    Filed: March 30, 2007
    Date of Patent: August 24, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyong-Rim Kang, Sun-Yul Ahn, Young-Ho Kim, Jae-Hyun Kim, Joo-Hyung Yang, Tae-Sung Kim
  • Patent number: 7781154
    Abstract: A method for forming a damascene structure utilizes dual hard mask layers and a thin etch stop layer, and does not require a sacrificial layer within the via. A floating etch stop layer can additionally be used. The dual hard masks may be formed of dielectric and neither of the hard masks is required to contain metal. The thin etch stop layer reduces capacitance problems.
    Type: Grant
    Filed: March 28, 2006
    Date of Patent: August 24, 2010
    Assignee: Applied Materials, Inc.
    Inventor: Suketu Arun Parikh
  • Patent number: 7776509
    Abstract: A photosensitive compound has two or more structural units, in a molecule, represented by the following general formula (1): wherein R1 to R10 are selected from the group consisting of hydrogen atom, halogen atom, alkyl group, alkoxy group, phenyl group, naphthyl group, and alkyl group in which a part or all of hydrogen atoms are substituted with fluorine atom; and X is a substituted or unsubstituted phenylene group or a substituted or unsubstituted naphthylene group.
    Type: Grant
    Filed: January 28, 2008
    Date of Patent: August 17, 2010
    Assignee: Canon Kabushiki Kaisha
    Inventors: Toshiki Ito, Takako Yamaguchi
  • Patent number: 7776516
    Abstract: A method of forming a device using a graded anti-reflective coating is provided. One or more amorphous carbon layers are formed on a substrate. An anti-reflective coating (ARC) is formed on the one or more amorphous carbon layers wherein the ARC layer has an absorption coefficient that varies across the thickness of the ARC layer. An energy sensitive resist material is formed on the ARC layer. An image of a pattern is introduced into the layer of energy sensitive resist material by exposing the energy sensitive resist material to patterned radiation. The image of the pattern introduced into the layer of energy sensitive resist material is developed.
    Type: Grant
    Filed: July 18, 2006
    Date of Patent: August 17, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Wendy H. Yeh, Martin J. Seamons, Matthew Spuller, Sum-Yee Betty Tang, Kwangduk Douglas Lee, Sudha Rathi
  • Patent number: 7776515
    Abstract: A composition for the organic hard mask includes a polyamic acid compound, and a method for forming a pattern is used in a manufacturing process of semiconductor devices by coating the composition for organic hard mask film on an underlying layer, and depositing a second hard mask film with a silicon nitride SiON film thereon to form a double hard mask film having an excellent etching selectivity, thereby obtaining a uniform pattern.
    Type: Grant
    Filed: March 23, 2010
    Date of Patent: August 17, 2010
    Assignee: Hynix Semiconductor Inc.
    Inventor: Jae Chang Jung
  • Publication number: 20100181678
    Abstract: A structure is provided with a self-aligned resist layer on a surface of metal interconnects for use in forming air gaps in an insulator material and method of fabricating the same. The non-lithographic method includes applying a resist on a structure comprising at least one metal interconnect formed in an insulator material. The method further includes blanket-exposing the resist to energy and developing the resist to expose surfaces of the insulator material while protecting the metal interconnects. The method further includes forming air gaps in the insulator material by an etching process, while the metal interconnects remain protected by the resist.
    Type: Application
    Filed: January 20, 2009
    Publication date: July 22, 2010
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Daniel C. Edelstein, Elbert E. Huang, Robert D. Miller
  • Patent number: 7749680
    Abstract: A photoresist composition includes a base resin, a copolymer of acrylic acid or methacrylic acid and 3,3-dimethoxypropene, a photoacid generator, an organic base, and an organic solvent, and is used for forming a fine (micro) pattern in a semiconductor device by double patterning. The invention method can markedly reduce the number of steps in etching and hard mask deposition processes, so that work hours and manufacturing costs may be reduced, contributing to an increase in yield of semiconductor devices.
    Type: Grant
    Filed: June 26, 2007
    Date of Patent: July 6, 2010
    Assignee: Hynix Semiconductor Inc.
    Inventors: Jae Chang Jung, Sung Koo Lee
  • Patent number: 7736822
    Abstract: There is provided a resist underlayer coating forming composition used in processes for manufacturing a mask blank and a mask, and a mask blank and a mask manufactured from the composition. The resist underlayer coating forming composition comprises a polymer compound having a halogen atom-containing repeating structural unit and a solvent. In a mask blank including a thin film for forming transfer pattern and a chemically-amplified type resist coating on a substrate in that order, the composition is used for forming a resist underlayer coating between the thin film for forming transfer pattern and the resist coating. The polymer compound is preferably a compound containing a halogen atom in an amount of at least 10 mass %.
    Type: Grant
    Filed: February 8, 2007
    Date of Patent: June 15, 2010
    Assignees: Hoya Corporation, Nissan Chemical Industries, Ltd.
    Inventors: Masahiro Hashimoto, Tomoyuki Enomoto, Takahiro Sakaguchi, Rikimaru Sakamoto, Masaki Nagai
  • Patent number: 7737227
    Abstract: A composition for the organic hard mask includes a polyamic acid compound, and a method for forming a pattern is used in a manufacturing process of semiconductor devices by coating the composition for organic hard mask film on an underlying layer, and depositing a second hard mask film with a silicon nitride SiON film thereon to form a double hard mask film having an excellent etching selectivity, thereby obtaining a uniform pattern.
    Type: Grant
    Filed: December 7, 2005
    Date of Patent: June 15, 2010
    Assignee: Hynix Semiconductor Inc.
    Inventor: Jae Chang Jung
  • Patent number: 7723009
    Abstract: A mask having features formed by self-organizing material, such as diblock copolymers, is formed on a partially fabricated integrated circuit. Initially, a copolymer template, or seed layer, is formed on the surface of the partially fabricated integrated circuit. To form the seed layer, diblock copolymers, composed of two immiscible blocks, are deposited in the space between copolymer alignment guides. The copolymers are made to self-organize, with the guides guiding the self-organization and with each block aggregating with other blocks of the same type, thereby forming the seed layer. Next, additional, supplemental diblock copolymers are deposited over the seed layer. The copolymers in the seed layer guide self-organization of the supplemental copolymers, thereby vertically extending the pattern formed by the copolymers in the seed layer.
    Type: Grant
    Filed: June 2, 2006
    Date of Patent: May 25, 2010
    Assignee: Micron Technology, Inc.
    Inventors: Gurtej S. Sandhu, Steve Kramer
  • Patent number: 7718345
    Abstract: A composite photoresist structure includes a first organic layer disposed over a substrate to be etched, a sacrificial layer disposed on the first organic layer, and a second organic layer disposed on the sacrificial layer. The thickness of the first organic layer and the thickness of the second organic layer are both larger than the thickness of the sacrificial layer.
    Type: Grant
    Filed: April 14, 2008
    Date of Patent: May 18, 2010
    Assignee: United Microelectronics Corp.
    Inventor: Jui-Tsen Huang
  • Patent number: 7718989
    Abstract: A memory cell device has a bottom electrode and a top electrode, a plug of memory material in contact with the bottom electrode, and a cup-shaped conductive member having a rim that contacts the top electrode and an opening in the bottom that contacts the memory material. Accordingly, the conductive path in the memory cells passes from the top electrode through the conductive cup-shaped member, and through the plug of phase change material to the bottom electrode.
    Type: Grant
    Filed: December 28, 2006
    Date of Patent: May 18, 2010
    Assignee: Macronix International Co., Ltd.
    Inventors: Erh-Kun Lai, ChiaHua Ho, Kuang Yeu Hsieh
  • Patent number: 7700269
    Abstract: A method of forming a stacked structure in an electronic device, where a photoresist for performing multi-patterning processes is used. Also, a method of manufacturing a FED in which different structures can be multi-patterned by using a single photoresist mask. The photoresist has a solubility to a solvent by heat-treatment after exposure, and a complicated structure can be formed using the photoresist.
    Type: Grant
    Filed: May 17, 2006
    Date of Patent: April 20, 2010
    Assignees: Samsung SDI Co., Ltd., E. I. du Pont de Nemours and Company
    Inventors: Shang-Hyeun Park, Hang-Woo Lee, Young-Hwan Kim
  • Patent number: 7695897
    Abstract: The present invention relates to improved methods and structures for forming interconnect patterns in low-k or ultra low-k (i.e., having a dielectric constant ranging from about 1.5 to about 3.5) interlevel dielectric (ILD) materials. Specifically, reduced lithographic critical dimensions (CDs) (i.e., in comparison with target CDs) are initially used for forming a patterned resist layer with an increased thickness, which in turn allows use of a simple hard mask stack comprising a lower nitride mask layer and an upper oxide mask layer for subsequent pattern transfer. The hard mask stack is next patterned by a first reactive ion etching (RIE) process using an oxygen-containing chemistry to form hard mask openings with restored CDs that are substantially the same as the target CDs. The ILD materials are then patterned by a second RIE process using a nitrogen-containing chemistry to form the interconnect pattern with the target CDs.
    Type: Grant
    Filed: May 8, 2006
    Date of Patent: April 13, 2010
    Assignee: International Business Machines Corporation
    Inventors: James J. Bucchignano, Gerald W. Gibson, Mary B. Rothwell, Roy R. Yu