Effecting Frontal Radiation Modification During Exposure, E.g., Screening, Masking, Stenciling, Etc. Patents (Class 430/396)
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Patent number: 6451511Abstract: Multiple exposure of a photoresist layer having an exposure depth depending upon the amount of exposure energy applied are executed at different respective exposure energy amounts through a plurality of respective photomasks with different respective opening patterns. The photoresist layer is then processed for image reversal.Type: GrantFiled: July 30, 1999Date of Patent: September 17, 2002Assignee: TDK CorporationInventor: Yuji Asanuma
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Publication number: 20020127501Abstract: A method and apparatus (100) for patterning the surface of a semiconductor wafer (130). A stage (148) is coupled to a motor (150) that is adapted to move the stage (148) and a semiconductor wafer (130) in a horizontal direction at a first speed A. A mask (140) is disposed above the semiconductor wafer (130), the mask (140) being coupled to a motor (142) that is adapted to move the mask (140) in a horizontal direction at a second speed B. The ratio of the first and second speeds is different than the magnification factor, which may be other than 1:1 if a lens (120) is used. The mask (140) and the wafer (130) may be moved in the same horizontal direction simultaneously during the exposure process at different speeds B and A, respectively, to provide a magnification or demagnification of the mask (140) pattern onto the wafer (130) surface.Type: ApplicationFiled: March 8, 2001Publication date: September 12, 2002Inventors: Oliver Genz, Jurgen Preuninger, Gerhard Kunkel
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Patent number: 6444398Abstract: A lithographic mask (FIG. 9 or FIG. 10) that is primarily used for SCALPEL processing has a substrate (100). Layers (102, 104, 106, 108, 110, and 112) are formed and selectively patterned and etched to form E-beam exposure windows (118) and skirt regions (120) framing the windows (118). The skirt regions (120) and some portions of the patterned features (124) within the window (118) are formed having thicker/thinner regions of material or formed of different material whereby different regions of the mask (FIG. 9) scatter energy to differing degrees. The different scattering regions on the mask allow SCALPEL patterns to be formed on the wafer with improved critical dimension (CD) control, reduced aberrant feature formation, and improved yield.Type: GrantFiled: July 12, 2000Date of Patent: September 3, 2002Assignee: Motorola, Inc.Inventor: Kevin David Cummings
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Publication number: 20020119402Abstract: The present invention provides a shift multi-exposure method for defining a regular pattern by a photomask. The method comprises the following steps. First, a photoresist layer comprising a first region and a second region is formed on a substrate. Then, a first pattern is defined on the first region by the photomask. Next, the photomask is moved a predetermined distance, and a second pattern is defined on the second region by the photomask. Finally, development is performed to display the first pattern and the second pattern on the photoresist layer.Type: ApplicationFiled: December 13, 2001Publication date: August 29, 2002Applicant: NANYA TECHNOLOGY CORPORATIONInventors: Chung-Wei Hsu, Ron-Fu Chu
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Publication number: 20020119399Abstract: The invention relates to methods of manufacturing a printing screen that is operable for use in a rotary screen printing process, wherein a metallic sheet having a generally cylindrical shape is positioned adjacent a laser. The metallic sheet is rotated about its longitudinal axis, and the laser is moved along a path parallel to the longitudinal axis. The laser directs focused radiation to the metallic sheet such that holes are formed therethrough. Portions of the metallic sheet are vaporized, which leaves the metallic sheet substantially free of slag. In this regard, the metallic sheet can be formed from a single layer having at least one exposed surface, such that the focused radiation contacts only the metallic sheet.Type: ApplicationFiled: February 26, 2001Publication date: August 29, 2002Inventor: Jesse E. Leskanic
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Publication number: 20020119401Abstract: A light exposure method in which, when a resist layer is selectively exposed to one of X-rays containing soft X-rays, vacuum ultraviolet light rays and ultraviolet rays containing extreme ultraviolet light rays for patterning the resist layer to a pre-set shape, a high molecular material having pre-set oxygen content ratio (n0) and density (&rgr;) is applied to form a resist layer having a film thickness not less than 250 nm. Since the high molecular material having the pre-set oxygen content ratio (n0) and density (&rgr;) is used, a resist pattern of a better shape may be obtained even if the resist layer is of an increased thickness of not less than 250 nm. Since the film thickness of the resist layer is not less than 250 nm, it is possible to construct a lithographic process superior in etching resistance to realize ultra-fine machining than was heretofore possible.Type: ApplicationFiled: July 17, 2001Publication date: August 29, 2002Inventors: Nobuyuki Matsuzawa, Shigeo Irie
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Patent number: 6440644Abstract: A method and system for planarization is disclosed. The system includes a mask including a medium density, sub-resolution region which allows less than the full intensity of the exposing radiation through to a resist layer. By including multiple density regions, improved planarization can be achieved.Type: GrantFiled: November 10, 1999Date of Patent: August 27, 2002Assignee: Kabushiki Kaisha ToshibaInventors: Takashi Sato, Katsuya Okumura, Junichiro Iba
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Publication number: 20020110765Abstract: A lithography process for producing gates and connections thereof, which can reduce the pitch of gate end connections is provided. The process comprises the steps of forming a photoresist layer on the substrate; exposing the photoresist layer by using a phase shifter mask to form a gates pattern in the photoresist layer in the device region; exposing the photoresist layer by using a trimming mask to form a conductive lines pattern connected to the gates pattern in the photoresist layer in the isolation region; and developing the photoresist layer.Type: ApplicationFiled: February 9, 2001Publication date: August 15, 2002Applicant: United Microelectronics Corp.Inventors: Chien-Wen Lai, Chien-Ming Wang, Chuen-Huei Yang, Andersen Chang
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Publication number: 20020110762Abstract: A photolithographic process for patterning a photoresist layer over a substrate. A positive photoresist layer is formed over the substrate. The positive photoresist layer contains a photoacid generator and a photobase generator. The positive photoresist layer is exposed to light through a photomask so that the photoacid generator in the photoresist layer is changed into photoacid and the photobase generator is changed to photobase. The photomask has a first pattern region and a second pattern region that correspond with a first region and a second region of the photoresist layer. The first pattern region has a duty ratio greater than the second pattern region so that the first region is exposed to a higher light intensity than the second region. Finally, the positive photoresist layer is developed. The reaction threshold for turning the photobase generator into photobase is adjusted according to the exposure strength between the first region and the second region.Type: ApplicationFiled: February 9, 2001Publication date: August 15, 2002Applicant: United Microelectronics Corp.Inventor: Chih-Yung Lin
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Patent number: 6432619Abstract: A method for forming a photomask including applying photoresist to a semiconductor substrate, exposing a first area of the photoresist to a first dosage of radiation, and exposing a second area of the photoresist to a second dosage of radiation. The first and second areas may be concurrently exposed. First and second regions of the photoresist are then removed to form first and second openings that have different depths in the photoresist. Such removal may be effected by developing the first and second areas of the photoresist. One of the openings may extend down to an insulating layer formed on the semiconductor substrate. A contact and/or trench etch may be performed to remove. a portion of the insulating layer. Conductive material may then be deposited in the opening so formed to form a contact, a via, or another electrically conductive element that communicates with a structure underlying the insulating layer.Type: GrantFiled: August 30, 2001Date of Patent: August 13, 2002Assignee: Micron Technology, Inc.Inventors: Nanseng Jeng, Christophe Pierrat
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Publication number: 20020106588Abstract: The invention provides a lithography process for forming openings. The method comprises forming a negative photoresist layer. A first mask is used to transfer a first strip pattern to the negative photoresist layer, so that a plurality of first strips, parallel to each other, are formed. A second mask is used to transfer a second strip pattern to the negative photoresist layer, forming a plurality of second strips, parallel to each other. Because the second strip pattern is perpendicular to the first strip pattern, the combined exposure of these two patterns forms a plurality of opening patterns. A trim mask is used to transfer a pattern to the negative photoresist layer for shielding the opening patterns in specific regions and exposing the opening patterns outside the specific regions to light. The negative photoresist layer is then developed.Type: ApplicationFiled: February 12, 2001Publication date: August 8, 2002Inventors: Chien-Wen Lai, Chien-Ming Wang, Andersen Chang, Hui-Ling Huang
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Publication number: 20020106580Abstract: The invention discloses a photolithographic patterning method of a photoresist layer for the formation of a patterned resist layer on a substrate surface having a fine hole pattern. The inventive method comprises the steps of forming a patterned resist layer by using a specific chemical-amplification positive-working photoresist composition compounded with a di- or polyvinyloxy compound such as cyclohexanedimethonol divinyl ether as a crosslinking agent of the resinous ingredient and subjecting the patterned resist layer on the substrate to a heat treatment for the so-called thermal flow treatment to effect pattern size reduction of the resist pattern.Type: ApplicationFiled: November 15, 2001Publication date: August 8, 2002Inventors: Kazuyuki Nitta, Satoshi Shimatani, Kazufumi Sato
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Publication number: 20020097385Abstract: In a lithographic projection apparatus, a grating spectral filter is used to filter an EUV projection beam. The grating spectral filter is preferably a blazed, grazing incidence, reflective grating. Cooling channels may be provided in or on the rear of the grating spectral filter. The grating spectral filter may be formed of a material effectively invisible to the desired radiation.Type: ApplicationFiled: October 9, 2001Publication date: July 25, 2002Applicant: ASM Lithography B.V.Inventors: Jan Van Elp, Martinus Hendrikus Antonius Leenders, Vadim Yevgenyevich Banine, Hugo Matthieu Visser, Levinus Pieter Bakker
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Publication number: 20020094492Abstract: A method of double-exposure photolithography of a semiconductor wafer in the manufacture of integrated circuits is disclosed. The two exposures of the same positive photoresist layer are carried out using a binary photomask (25) having chrome regions (22) that define non-critical dimension features (6c) and also serve as protection for phase shift exposure of critical dimension features (6g). The phase shift photomask (23) includes apertures 200, 20&pgr;, that expose the sides of the critical dimension feature (6g) with opposite phase light. The phase shift photomask (23) also includes an additional aperture (30) for double exposure of a region exposed by the binary photomask, for example as between a non-critical dimension feature (6c) and the end of a critical dimension feature (6g).Type: ApplicationFiled: November 30, 2000Publication date: July 18, 2002Inventors: John N. Randall, Gene E. Fuller
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Patent number: 6420075Abstract: The present invention relates to a microminiaturization technique to achieve the miniaturization and higher integration of IC chip and to the improvement of a mask used in its manufacturing process. In other words, the phases of lights transmitted through the mask is controlled within one mask pattern. Specifically, a transparent film is formed in such a manner that it covers a mask pattern along a pattern formed by magnifying or demagnifying the mask pattern or otherwise a groove is formed in a mask substrate. A phase difference of 180° is generated between the lights transmitted through the mask substrate and the transparent film or the groove, causing interference with each light to offset each other. Therefore, the pattern transferred onto a wafer has an improved resolution, being used in the invention.Type: GrantFiled: December 13, 2001Date of Patent: July 16, 2002Assignee: Hitachi, Ltd.Inventor: Yoshihiko Okamoto
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Patent number: 6420094Abstract: An optical exposure method in photolithography applied for precise processing when semiconductor devices are produced. A pattern on a photomask is projected and exposed on a register on a base plate with an exposure device including a deformation illumination system, a photomask and a projection lens. The deformation illumination system is composed of a light source, a diaphragm and a condenser lens, and the diaphragm is provided with a linear through-hole. The optical exposure method uses a ray of linear light for illumination or two rays of linear light for illumination that are parallel with the pattern. The two rays of linear light are symmetrical with respect to an optical axis. These rays are parallel with the pattern in a position separate from the optical axis of the exposure device when the photomask pattern is a line and space pattern.Type: GrantFiled: February 9, 2000Date of Patent: July 16, 2002Assignee: Fujitsu LimitedInventors: Tamae Haruki, Kenji Nakagawa, Satoru Asai, Isamu Hanyu
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Patent number: 6410211Abstract: A method for manufacturing an LCD including at least two stacked thin layers in which the upper thin film smoothly and completely covers the lower thin film includes the steps of coating a photo-resist on a patterned layer, patterning the photo-resist by exposing and developing the photo-resist with a mask which has lines and spaces in which a distance between the lines is smaller than a resolution of an exposure system used and etching the metal layer using the patterned photo-resist as a mask. The resulting photo-resist pattern has a comb shape.Type: GrantFiled: November 25, 1998Date of Patent: June 25, 2002Assignee: LG Electronics, Inc.Inventor: Sung Joon Bae
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Patent number: 6410213Abstract: Fabrication of arbitrary profile micro-optical structures (lenses, gratings, etc.) and, if desired, with optomechanical alignment marks simultaneously during fabrication is based upon the use of low-contrast photosensitive material that, when exposed to a spatially variable energy dosage of electromagnetic radiation, can be processed to achieve multi-level or continuous surface-relief microstructures. By varying the exposure dose spatially based upon predetermined contrast curves of the photosensitive material, arbitrary one-dimensional (1-D) or two-dimensional (2-D) surface contours, including spherical, aspherical, toroidal, hyperbolic, parabolic, and ellipsoidal, can be achieved with surface sags greater than 15 &mgr;m. Surface profiles with advanced phase correction terms (e.g., Zernike polynomials) can be added to increase the alignment tolerance and overall system performance of the fabricated structure can also be fabricated.Type: GrantFiled: June 9, 1998Date of Patent: June 25, 2002Assignee: Corning IncorporatedInventors: Daniel H. Raguin, G. Michael Morris, Peter M. Emmel
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Publication number: 20020076654Abstract: In order to shorten time for fabricating semiconductor integrated circuit devices, a wafer is exposed as a chip area with defects of a mask is covered with a masking blade for light shielding.Type: ApplicationFiled: November 30, 2001Publication date: June 20, 2002Inventors: Norio Hasegawa, Toshihiko Tanaka
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Patent number: 6406834Abstract: A method of projecting an image onto a plurality of target areas on a substrate whereby use is made of a lithographic projection apparatus comprising: a radiation system for supplying a projection beam of radiation; a mask table provided with a mask holder for holding a mask; a substrate table provided with a substrate holder for holding a substrate; a projection system for imaging an irradiated portion of the mask onto a target area of the substrate, whereby the substrate is to be irradiated with images from at least two different masks, characterized by the following steps: (a) providing a batch of substrates, each at least partially coated with a layer of radiation-sensitive material; (b) providing storage means for temporary storage of the batch; (c) providing a first mask on the mask table; (d) irradiating a first set of target areas of a first substrate with an image from the first mask, and then placing that substrate in the storage means; (e) repeating step (d) for each of the other substratType: GrantFiled: June 7, 2000Date of Patent: June 18, 2002Assignee: ASML Netherlands B.V.Inventors: Jan Jaap Kuit, Jan A. M. Smits, Judocus M. D. Stoeldraijer
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Patent number: 6403291Abstract: A multiple exposure method includes a step of exposing a photosensitive material with a first pattern having a periodic pattern, and a step of exposing the photosensitive material with a second pattern different from the first pattern by using a projection optical system, wherein the step of exposing the photosensitive material with the second pattern is performed in each of a plurality of positions of the photosensitive material in an optical axis direction of the projection optical system relative to a focus position of an image of the second pattern, and wherein a desired pattern is formed in the photosensitive material by a multiple exposure including the step of exposing the photosensitive material with the first pattern and the step of exposing the photosensitive material with the second pattern.Type: GrantFiled: June 28, 1999Date of Patent: June 11, 2002Assignee: Canon Kabushiki KaishaInventors: Miyoko Kawashima, Akiyoshi Suzuki, Kenji Saitoh
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Patent number: 6403431Abstract: The present invention provides a method of forming in an insulating layer a trench that has a minimum feature size exceeding photolithographic resolution limits. The trench is formed by a two-step photolithographic process. The two-step photolithographic process defines a trench mask pattern with a rectangular or/and square shape. The first step photolithographic process defines a plurality of first patterns parallel with each other on the insulating layer. The second step photolithographic process defines a plurality of second patterns on the first patterns and on the insulating layer. The second patterns intersect the first patterns, defining the trench mask pattern. The trench mask pattern is partially etched to form a trench mask pattern with reduced feature sizes exceeding the photolithographic resolution limits.Type: GrantFiled: August 7, 2000Date of Patent: June 11, 2002Assignee: Samsung Electronics Co., Ltd.Inventors: Tae-Young Chung, Hyung-Soo Uh
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Patent number: 6403285Abstract: A stepper device and method of using the stepper device in which a light source in the stepper generates an annular or multipole pattern of light having a relatively large coherency value that is used to expose inner fields of a photoresist-coated wafer. The light source generates an annular or multipole pattern of light having a relatively small coherency that is used to expose outer fields of the wafer adjacent its edge. The use of light having a relatively small coherence value to expose the outer fields of the wafer causes the exposure width of isolated features to be relatively large compared to the exposure width of dense features. As a result, after etching, the isolated features and the dense features can have the same width since etching is more effective for dense features.Type: GrantFiled: December 17, 1999Date of Patent: June 11, 2002Assignee: Micron Technology, Inc.Inventors: Richard D. Holscher, Linda K. Somerville
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Patent number: 6399283Abstract: An aligning method includes steps of partitioning an original mask into a plurality of areas in which respective types of patterns are formed, providing respective exposure information corresponding to the patterns in different areas, on a pattern-by-pattern basis, and exposing a substrate to one type of pattern of the original mask after exposing the substrate to another type of pattern of the original mask, on the basis of the respective exposure information.Type: GrantFiled: June 21, 1999Date of Patent: June 4, 2002Assignee: Canon Kabushiki KaishaInventor: Tai Hoshi
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Patent number: 6395456Abstract: A semiconductor device achieving higher integration without deterioration of electrical characteristics thereof, a method of manufacturing the semiconductor device, and a method of forming a resist pattern used for that can be obtained. According to the method of forming a resist pattern used for the method of manufacturing a semiconductor device, light is directed via a mask onto a resist film surface formed on a substrate to project a first optical image having a width equal to or less than the wavelength of the light onto the resist surface. The mask is shifted relative to the substrate. Via the shifted mask, light is directed onto the resist film surface to project a second optical image having a width equal to or less than the wavelength of the light onto the resist surface such that the second optical image partially overlaps faith a region where the first optical image is projected.Type: GrantFiled: June 29, 1999Date of Patent: May 28, 2002Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Naohisa Tamada, Yoshiaki Yamada
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Patent number: 6395457Abstract: A method for manufacturing a liquid crystal display, includes the steps of forming a first metal layer on a transparent substrate, forming a first photo-resist pattern on the first metal layer by using a first mask with a predetermined pattern, forming a gate electrode by etching the first metal layer using the first photo-resist pattern, forming a second metal layer over the gate electrode, forming a second photo-resist pattern on the second metal layer by using a second mask having a line-and-space pattern whose space width is smaller than a resolution of an-exposure system, forming source and drain electrodes by etching the second metal layer using the second photo-resist pattern, and forming a transparent conductive material layer for electrically connecting the drain electrode with a pixel electrode.Type: GrantFiled: January 14, 2000Date of Patent: May 28, 2002Assignee: LG Electronics, Inc.Inventors: Yong-Seok Park, Jong-Woo Son
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Publication number: 20020061469Abstract: The quantity of ultraviolet light (IL) incident on a projection optical system (PL) is measured by means of an integrator sensor (9), and the quantity of ultraviolet pulse light (IL) that has passed through the projection optical system (PL) is measured by means of an irradiation monitor (32). The quantity of transmitted light is divided by the quantity of incident light to calculate the proportion at which the ultraviolet pulse light (IL) is attenuated in the projection optical system (PL), or an attenuation factor. The attenuation factor is determined as a function of the integrated value of the quantity of incident light. During exposure, the integrated value as quantity measured by means of the integrator sensor (9) is substituted into the function to estimate the transmissivity (attenuation factor) of the projection optical system (PL).Type: ApplicationFiled: January 11, 2002Publication date: May 23, 2002Applicant: NIKON CORPORATIONInventor: Yasuaki Tanaka
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Publication number: 20020061472Abstract: Two programmable masks are used for the exposure of three-dimensional patterns in a photosensitive material. This exposure technique takes advantages of symmetries and repeating structures in the exposure pattern to reduce the exposure time, while maintaining the flexibility to produce complicated three-dimensional shapes.Type: ApplicationFiled: November 19, 2001Publication date: May 23, 2002Applicant: Pixelligent Technologies LLC.Inventors: Gregory D. Cooper, Erin F. Fleet
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Patent number: 6387593Abstract: A polymer material is exposed to radiation of a type that changes some aspect of the polymer's radiation passing properties. The radiation that caused the property change is then contained by the material. The property change can be self-focusing or self-trapping light can be used. In that case, the same light that causes the photopolymerization is contained by the change in index of refraction that is caused by the polymerization.Type: GrantFiled: November 18, 1999Date of Patent: May 14, 2002Assignee: California Institute of TechnologyInventors: Anthony S. Kewitsch, Amnon Yariv
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Patent number: 6383719Abstract: Fine feature lithography is enhanced by selectively providing exposures to correct for effects such as foreshortening, corner rounding, nested to isolated print bias, feature size dependent bias, and other image biases in semiconductor processing. These results are achieved by increasing the local exposure dose in critical areas of specific images, such as line ends and corners. The general process incorporates techniques which tailor the exposure dose as a function of position to achieve the desired final image shape. The techniques include contrast enhancement layers (CEL), scanning optical beams, and exposures with different masks. In one embodiment the process of forming a pattern comprises the steps of providing a substrate having a photosensitive coating, exposing the center area of the pattern on the photosensitive coating with one mask, and exposing ends of the pattern on the photosensitive coating without exposing the center area with a second mask.Type: GrantFiled: May 19, 1998Date of Patent: May 7, 2002Assignee: International Business Machines CorporationInventors: Orest Bula, Daniel Cole, Edward W. Conrad, Stephen E. Knight, Robert K. Leidy
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Patent number: 6383691Abstract: A photomask for lithographic processing, in accordance with the present invention, includes a plurality of features for providing an image pattern. The features are arranged in a column on a mask substrate. Each feature is dimensioned to provide an individual image separate from all other images provided by the photomask when exposed to light. A line feature is formed on the mask substrate and extends between and intersects with each of the plurality of features in the column. The line feature extends a length of images produced by the plurality of features arranged in the column when exposed to light wherein the images produced by each of the plurality of features and the line feature remain separate from each other.Type: GrantFiled: June 26, 2000Date of Patent: May 7, 2002Assignee: Infineon Technologies AGInventors: Mihel Seitz, Gerhard Kunkel
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Patent number: 6379868Abstract: A lithographic apparatus and process that utilizes dark-field imaging of mask features to introduce an image of those features into an energy sensitive resist material is disclosed. Dark field imaging is accomplished by utilizing off-axis illumination in combination with one or more masks. The zero-order off-axis illumination is lost from the system and is not captured from the downstream imaging optics. The mask or mask contains both lithographic features and non-imaged features. The non-imaged features are too small to be resolved by the imaging optics used to introduce the image into the energy sensitive material. The lithographic features and non-imaged features associated with a particular pattern feature are either present on the same mask, or decoupled where the non-imaged features are on one mask and the lithographic features are on a second mask.Type: GrantFiled: April 1, 1999Date of Patent: April 30, 2002Assignee: Agere Systems Guardian Corp.Inventor: Donald Lawrence White
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Patent number: 6379867Abstract: A photolithography system and method for providing a mask image to a subject such as a wafer is provided. The mask images are divided into sub-patterns and sequentially provided to a pixel panel, such as a deformable mirror device or a liquid crystal display. The pixel panel converts each sub-pattern into a plurality of pixel elements. Each of the pixel elements is then simultaneously focused to discrete, non-contiguous portions of the subject through a microlense array. The subject and pixel elements are then moved (e.g., one or both may be moved) and the next sub-pattern in the sequence is provided to the pixel panel. As a result, light can be projected on the subject, according to the pixel elements, to create a contiguous image on the subject.Type: GrantFiled: January 10, 2000Date of Patent: April 30, 2002Assignee: Ball Semiconductor, Inc.Inventors: Wenhui Mei, Takashi Kanatake, Akira Ishikawa
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Publication number: 20020048341Abstract: An X-ray exposure apparatus extracts exposure X-rays from light called synchrotron radiation from a synchrotron radiation source by an optical path including an X-ray mirror and performs exposure using the extracted X-rays. The X-ray mirror contains a material having an absorption edge in at least one of a wavelength range of less than 0.45 nm and a wavelength range exceeding 0.7 nm, thereby implementing exposure using the X-ray in the range of 0.45 nm to 0.7 nm. The X-ray mirror contains at least one material selected from the group consisting of iron, cobalt, nickel, copper, manganese, chromium, and their alloys, nitrides, carbides, and borides.Type: ApplicationFiled: September 14, 2001Publication date: April 25, 2002Inventors: Kenji Itoga, Shunichi Uzawa, Yutaka Watanabe, Toyoki Kitayama
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Publication number: 20020048730Abstract: An electrode, for a plasma display panel, adapted for provision on a front or back plate of a plasma display panel, the electrode comprising a conductive paste.Type: ApplicationFiled: November 1, 2001Publication date: April 25, 2002Applicant: DAI NIPPON PRINTING CO., LTD.Inventors: Sakurako Hatori, Yasunori Kurima, Nobuaki Kimura, Yozo Kosaka, Satoru Kuramochi
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Publication number: 20020048707Abstract: A photolithographic method, involving the illuminating of a mask with ray angles of light, the illumination passing through an annular aperture prior to contacting the mask, the illumination passing through to the mask capable of imaging the surface below, the mask comprising a primary photolithographic mask having a pattern thereon, the pattern comprising at least two portions, each portion requiring an individual optimal energy to image the pattern, each optimal energy of each portion dissimilar to at least one of the at least two portions;Type: ApplicationFiled: December 22, 1999Publication date: April 25, 2002Inventors: REBECCA D. MIH, KEVIN S. PETRARCA, DONALD C. WHEELER
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Publication number: 20020045134Abstract: On the occasion of the aligning process to transfer a predetermined pattern to a semiconductor wafer by irradiating a photoresist on the semiconductor wafer with an aligning laser beam of the modified lighting via a photomask MK, the photomask MK allocating, to provide periodicity, the main apertures to transfer the predetermined pattern as the apertures formed by removing a part of the half-tone film on the mask substrate and the auxiliary apertures not resolved on the semiconductor wafer as the apertures formed by removing a part of the half-tone film is used to improve the resolution of the pattern.Type: ApplicationFiled: September 28, 2001Publication date: April 18, 2002Inventors: Osamu Inoue, Norio Hasegawa, Shuji Ikeda
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Patent number: 6372391Abstract: For lithographic patterning a plurality of identical structures (24) onto a target substrate (14), a template mask (13) is produced which bears a template structure pattern comprising a plurality of identical template structures each consisting of a set of at least one structure element (C) of circular shape. Starting from a primary mask (11) bearing a primary structure pattern consisting of at least one structure element having a circular shape, the production of the template mask is done in at least one lithographic mask structuring step (b, c) wherein in each mask structuring step by means of a broad beam (31) of energetic radiation the mask is illuminated and a structure pattern on the mask (11,12) is imaged onto an intermediate substrate (12a,13a); in these mask structuring steps the pattern image imaged from the structure pattern is moved over the intermediate substrate to a number of different locations.Type: GrantFiled: September 25, 2000Date of Patent: April 16, 2002Assignee: The University of HoustonInventors: John Charles Wolfe, Paul Ruchhoeft
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Patent number: 6369398Abstract: A method of vacuum ultraviolet (VUV) lithography in which an irradiating wavelength is selected to be in a region of low absorption in air, e.g., one in the vicinity of a local minimum in an oxygen absorption spectrum. In one embodiment, a lithographic exposure wavelength is advantageously selected between 121.0 nm to 122.0 nm, preferably at about 121.6 nm, corresponding to an absorption window in the oxygen spectrum. This method relaxes the otherwise stringent vacuum and inert gas purge requirement imposed on a VUV lithographic tool.Type: GrantFiled: March 29, 1999Date of Patent: April 9, 2002Inventor: Barry Gelernt
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Publication number: 20020037481Abstract: The present invention relates generally to a method and apparatus for converting a precursor material, preferably organometallic, to a film, preferably metal-containing, that is adherent to at least a portion of a substrate. Both method and apparatus include a pre-conversion step or section, and a step or section for substantial conversion of a portion of material from the pre-conversion step or section into the form of a predetermined pattern, wherein this substantial conversion results in a metal-containing patterned layer on the substrate.Type: ApplicationFiled: June 6, 2001Publication date: March 28, 2002Inventors: Wai M. Lee, David J. Maloney, Paul J. Roman, Michael A. Fury, Ross H. Hill, Clifford Henderson, Sean Barstow
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Patent number: 6361909Abstract: A design method, based on the principle of superposition, is presented for complex apertures used to form a filter for condenser lens illumination in an optical reduction system. The method is relatively simple to implement and achieves near optimum results without the need to perform long and error prone calculations. Both OPE and DOF are simultaneously optimized over a wide range of duty ratios.Type: GrantFiled: December 6, 1999Date of Patent: March 26, 2002Assignee: Industrial Technology Research InstituteInventors: Tsai-Sheng Gau, Chin-Chiu Hsia
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Publication number: 20020031732Abstract: In order to imprint wafer-identifying information on a wafer on which a plurality of thin-film devices are formed in a batch, utilizing a patterned resist layer, an exposure apparatus exposes a resist layer formed on the wafer to light for forming a latent image of the wafer-identifying information. The exposure apparatus allows a mask storage controller and a mask transfer device to select a mask, on which the pattern of a numeral or symbol to be imprinted is drawn, for each digit of the wafer-identifying information and carries out exposure. The exposure apparatus also allows a mask shift controller to change the positional relationship between the wafer and the mask for each digit of the wafer-identifying information so that the numeral or symbol of each digit of the wafer-identifying information is imprinted at a mutually different position.Type: ApplicationFiled: August 10, 2001Publication date: March 14, 2002Applicant: TDK CORPORATIONInventor: Shigeru Shoji
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Publication number: 20020028391Abstract: A shielding film is formed on the surface of a substrate and a pair of aperture patterns for light transmission with substantially the same line width are formed in the above shielding film so as to run parallel to each other with a gap and to be isolated from other aperture patterns for light transmission. The exposure amount (exposure energy to sufficiently large aperture pattern) at the time a photoresist is exposed by using this photo mask is 4 or more times and 20 or less times as large as the exposure amount on the border where the photoresist is converted from soluble to insoluble through the exposure or the exposure amount on the border from insoluble to soluble. Thereby, it becomes possible to form a microscopic pattern without using an auxiliary pattern method or a phase shift mask and the default inspection of a mask can be made easy.Type: ApplicationFiled: February 14, 2001Publication date: March 7, 2002Applicant: Mitsubishi Denki Kabushiki KaishaInventor: Shuji Nakao
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Publication number: 20020028411Abstract: A gate wire including a plurality of gate lines and gate electrodes in the display area, and gate pads in the peripheral area is formed on a substrate having a display area and a peripheral area. A gate insulating layer, a semiconductor layer, an ohmic contact layer and a conductor layer are sequentially deposited, and the conductor layer and the ohmic contact are patterned to form a data wire including a plurality of data lines, a source electrode and a drain electrode of the display area and data pads of the peripheral area, and an ohmic contact layer pattern thereunder. A passivation layer is deposited and a positive photoresist layer is coated thereon. The photoresist layer is exposed to light through one or more masks having different transmittance between the display area and the peripheral area. The photoresist layer is developed to form a photoresist pattern having the thickness that varies depending on the position.Type: ApplicationFiled: October 2, 2001Publication date: March 7, 2002Inventors: Woon-Yong Park, Bum-Ki Baek
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Patent number: 6348357Abstract: A semiconductor device manufacturing method includes the steps of providing a projection exposure apparatus, exposing a wafer by using the projection exposure apparatus, the exposing step including projecting a circuit pattern onto the wafer through the projection optical system using light from a first laser, and developing the exposed wafer. Before the providing step, an optical performance of the projection optical system is measured by producing an interference fringe, bearing information related to aberration of the projection optical system, by use of a harmonic of a second laser having a coherency higher than that of the first laser, and then by analyzing the interference fringe. A wavelength of the light from the first laser is registered with that of the harmonic of the second laser.Type: GrantFiled: April 5, 1999Date of Patent: February 19, 2002Assignee: Canon Kabushiki KaishiaInventor: Naoto Sano
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Publication number: 20020012852Abstract: The present invention relates to a stencil mask for non-optical lithography and a method for fabricating such a mask. The disclosed stencil mask includes a frame for supporting the whole structure; a membrane disposed on the frame for equalizing stresses resulting from the electron beam; and a scattering layer pattern disposed on the membrane for scattering the electron beam. The scattering layer pattern includes regions of varying thickness and/or scattering performance that permit the exposure to be adjusted for areas having greater or lesser pattern density. These adjustments can reduce defects resulting from proximity effects, improve the uniformity of critical features, and improve the yield and reliability of the resulting devices.Type: ApplicationFiled: July 2, 2001Publication date: January 31, 2002Inventor: Cheol Kyun Kim
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Publication number: 20020009676Abstract: A phase shifting mask set and method of suing the phase shifting mask set to pattern a layer of negative photoresist. The mask set comprises a first phase shifting mask and a second phase shifting mask. The first phase shifting mask has regions of 90° phase shift and −90° phase shift in the contact hole regions of the mask. The second phase shift mask also has regions of 90° phase shift and −90° phase shift in the contact hole regions of the mask. In the second phase shift mask the 90° phase shift regions are rotated 90° spatially with respect to the 90° phase shift regions of the first phase shift mask and the −90° phase shift regions are rotated 90° spatially with respect to the −90° phase shift regions of the first phase shift mask. A layer of negative photoresist is exposed with the first and second phase shift masks and developed to form the photoresist pattern used to form contact holes.Type: ApplicationFiled: September 6, 2001Publication date: January 24, 2002Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANYInventor: Hua-Tai Lin
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Publication number: 20020006587Abstract: A method for manufacturing a multidomain liquid crystal display panel, including the steps of forming a photo-alignment layer on a substrate, positioning a mask having a plurality of regions with different photo-transmittances; and forming different alignment directions in different domains of the photo-alignment layer corresponding to each of the plurality of regions by irradiating the photo-alignment layer with light through the mask.Type: ApplicationFiled: September 24, 2001Publication date: January 17, 2002Applicant: LG ELECTRONICS INC.Inventors: Soon Bum Kwon, Young Seok Choi, Yuriy Reznikov, Oleg Yaroshchuk
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Patent number: 6337172Abstract: A semiconductor wafer having a first layer and overlying insulating layer receives a photoresist layer. A first photoresist area is exposed to light having a first dosage, while a second, adjacent photoresist area is concurrently exposed to light having a second dosage. The first area and second area then are concurrently developed to partially expose the photoresist layer. The partial exposure removes photoresist within the first area to one depth and within the second area to a second depth. The second depth differs from the first depth. In one embodiment, the second depth extends through the photoresist down to the insulating layer. After subsequently performing a contact and/or trench etch through the exposed insulating layer and removing excess photoresist above the insulating layer, conductive material is deposited in the contact/trench opening and over the insulating layer. The result is an upper conductive layer coupled to the first layer via a contact or other conductive connection.Type: GrantFiled: September 29, 2000Date of Patent: January 8, 2002Inventors: Nanseng Jeng, Christophe Pierrat
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Publication number: 20020001779Abstract: A method for generating a photoresist pattern on top of an object that includes a layer of material that is opaque to light of a predetermined wavelength. The object is first covered with a layer of photoresist material. The layer of photoresist material is then irradiated with light of the predetermined wavelength from a position under the object such that the object casts a shadow into the layer of photoresist. The photoresist material is then developed to generate the photoresist pattern. The layer of photoresist material is irradiated from below the object by providing a reflecting surface below the object and a light source above the object. A mask is positioned between the object and the light source such that the mask casts a shadow that covers the object and a portion of the area surrounding the object.Type: ApplicationFiled: August 16, 2001Publication date: January 3, 2002Inventors: Tetsuya Hidaka, Yawara Kaneko