Effecting Frontal Radiation Modification During Exposure, E.g., Screening, Masking, Stenciling, Etc. Patents (Class 430/396)
  • Patent number: 6335148
    Abstract: Disclosed is a method for manufacturing a thin film transistor LCD device, in which a counter and a gate bus line are made in a single photolithography process, and a channel of a thin film transistor, a source electrode, a drain electrode, ohmic contacts for the source and drain electrodes are made in a single photolithography process.
    Type: Grant
    Filed: December 19, 2000
    Date of Patent: January 1, 2002
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventors: Seok Lyul Lee, Jung Mok Jun, Seung Min Lee
  • Publication number: 20010055733
    Abstract: An exposure method which irradiates a slit-shaped illumination light IL on a reticle Ri and a substrate while moving them synchronously so as to sequentially transfer images of patterns formed on the reticle Ri to the substrate 4, wherein a density filter Fj having an attenuating part for gradually reducing the distribution of illuminance of the illumination light IL is moved in synchronization with the movement of the reticle Ri.
    Type: Application
    Filed: April 9, 2001
    Publication date: December 27, 2001
    Applicant: Nikon Corporation
    Inventors: Nobuyuki Irie, Nobutaka Magome
  • Publication number: 20010055104
    Abstract: An unwanted deposited film is removed from the surface of a photomask in which a desired pattern has been formed. Then, a resist film is exposed to extreme ultraviolet radiation through the photomask, from which the deposited film has been removed, thereby transferring the desired pattern onto the resist film.
    Type: Application
    Filed: June 26, 2001
    Publication date: December 27, 2001
    Inventor: Shigeo Irie
  • Patent number: 6322957
    Abstract: A method of exposure to a light pattern containing a first strip-shaped portion extending in a first direction and a second strip-shaped portion extending in a second direction comprises steps of placing, on a light-receiving face, a first mask having a strip-shaped slit corresponding to the first strip-shaped portion extending in a first direction of the pattern, projecting, to the first mask, a first linearly polarized light beam polarized in the second direction to irradiate the light-receiving face through the slit of the first mask, removing the first mask from the light-receiving face, and placing, on the light-receiving face, a second mask having a strip-shaped slit corresponding to the second strip-shaped portion extending in a second direction of the pattern and projecting, to the second mask, a second linearly polarized light beam polarized in the first direction to irradiate the light-receiving face through the slit of the second mask.
    Type: Grant
    Filed: March 24, 1999
    Date of Patent: November 27, 2001
    Assignee: Canon Kabushiki Kaisha
    Inventors: Masakuni Yamamoto, Koichiro Nishikawa
  • Publication number: 20010043318
    Abstract: Disclosed is an illumination optical system for illuminating a surface, to be illuminated, with use of light from a light source, which includes a diffractive optical element for forming a desired light intensity distribution upon a predetermined plane, and an angular distribution transforming unit for transforming an angular distribution of light incident or to be incident on the diffractive optical element into a desired distribution.
    Type: Application
    Filed: April 3, 2001
    Publication date: November 22, 2001
    Inventor: Kenichiro Mori
  • Publication number: 20010041310
    Abstract: A method for manufacturing an LCD including at least two stacked thin layers in which the upper thin film smoothly and completely covers the lower thin film includes the steps of coating a photo-resist on a patterned layer, patterning the photo-resist by exposing and developing the photo-resist with a mask which has lines and spaces in which a distance between the lines is smaller than a resolution of an exposure system used and etching the metal layer using the patterned photo-resist as a mask.
    Type: Application
    Filed: November 25, 1998
    Publication date: November 15, 2001
    Inventor: SUNG JOON BAE
  • Patent number: 6312875
    Abstract: A method for manufacturing a multidomain liquid crystal display panel, including the steps of forming a photo-alignment layer on a substrate, positioning a mask having a plurality of regions with different photo-transmittances; and forming different alignment directions in different domains of the photo-alignment layer corresponding to each of the plurality of regions by irradiating the photo-alignment layer with light through the mask.
    Type: Grant
    Filed: October 11, 2000
    Date of Patent: November 6, 2001
    Assignee: LG Electronics Inc.
    Inventors: Soon Bum Kwon, Young Seok Choi, Yuriy Reznikov, Oleg Yaroshchuk
  • Publication number: 20010036604
    Abstract: Disclosed is an exposure method in which a multiple exposure process including a first exposure for a first pattern and a second exposure for a second pattern is performed by use of a projection optical system to thereby resolve a desired pattern, wherein a numerical aperture NA1 of the projection optical system for the first pattern exposure and a numerical aperture NA2 of the projection optical system for the second pattern exposure are made different from each other.
    Type: Application
    Filed: March 2, 2001
    Publication date: November 1, 2001
    Inventor: Miyoko Kawashima
  • Patent number: 6309800
    Abstract: Herein disclosed is an exposure technology for a semiconductor integrated circuit device which has a pattern as fine as that of an exposure wavelength. The technology contemplates to improve the resolution characteristics of the pattern by making use of the mutual interference of exposure luminous fluxes.
    Type: Grant
    Filed: May 9, 2000
    Date of Patent: October 30, 2001
    Assignee: Hitachi, Ltd.
    Inventor: Yoshihiko Okamoto
  • Publication number: 20010033995
    Abstract: A method of manufacturing an electron device provided with minute structure such as a semiconductor integrated circuit using projection exposure technique and phase shift mask technique, maintaining a high yield is disclosed. In an electron device manufacturing method according to the invention, a desired electron device is manufactured by printing a light shielding film pattern on a photosensitive film provided on the surface of a workpiece by a projection tool using a mask where a phase shifter having predetermined thickness is partially formed on the flat surface of a transparent plate and a light shielding film having a predetermined pattern and made of non-metal is partially provided with the film covering the end of the shifter and developing the photosensitive film.
    Type: Application
    Filed: March 19, 2001
    Publication date: October 25, 2001
    Inventors: Toshihiko Tanaka, Norio Hasegawa, Hiroshi Shiraishi, Hidetoshi Satoh
  • Patent number: 6300020
    Abstract: A circuit pattern surface curving in correspondence with the surface shape of a ball-like semiconductor device material such as a silicon ball is formed in a reticle. A resist-applied surface of the device material is so exposed as to move the ball-like semiconductor device material close to the circuit pattern surface. In this manner, a circuit pattern is formed on the surface of the ball-like device material.
    Type: Grant
    Filed: March 12, 1998
    Date of Patent: October 9, 2001
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hideki Ina, Setsuo Minami
  • Patent number: 6300042
    Abstract: A method of contact printing on a device using a partially transparent mask (18) having first and second surfaces, comprises the steps of applying a layer of low surface energy polymeric material (22) to the first surface of the mask; placing the first surface (24) of the mask contiguous to the device (10), the layer of low surface energy polymeric material being substantially in contact with the device; and applying radiation (32) to the second surface of the mask for affecting a pattern in the device.
    Type: Grant
    Filed: November 24, 1998
    Date of Patent: October 9, 2001
    Assignee: Motorola, Inc.
    Inventors: David P. Mancini, Douglas J. Resnick
  • Publication number: 20010026358
    Abstract: In a lithographic projection apparatus, a reflective-type mask MA is attached to a compliant membrane 110 on a mask table MT. The backside of the membrane is in turn attached to a plurality of actuators 140 which are operable to deform the membrane. A mask level sensor can be used to detect the level of the mask and the actuators operate to keep the mask at a constant level. Additionally, the actuators may also serve to keep the mask flat and in the correct planar orientation. FIG.
    Type: Application
    Filed: March 21, 2001
    Publication date: October 4, 2001
    Inventor: Antonius J.J. Van Dijsseldonk
  • Publication number: 20010026907
    Abstract: A process for crosslinking polyacrylate compositions, wherein, by selective irradiation of the pressure-sensitive adhesive composition with electron beams, the polymer is cured only in certain structures and, as a result, structured pressure-sensitive adhesive compositions can be prepared.
    Type: Application
    Filed: February 20, 2001
    Publication date: October 4, 2001
    Inventors: Marc Husemann, Stephan Zollner
  • Patent number: 6294315
    Abstract: A method of forming a metal wiring using a dual damascene process is provided. A photosensitive polymer having low permittivity is used as an etch mask. Though the etch mask remains in the final structure, its low permittivity reduces parasitic capacitance effects. In this method, a photosensitive polymer pattern having a first hole with a first width is formed on a first interlayer dielectric film. A second interlayer dielectric film is formed on the photosensitive polymer pattern. A mask pattern, having a second hole, above the first hole, with a second width larger than the first width, is formed on the second interlayer dielectric film. A wiring region is formed by dry-etching the second interlayer dielectric film using the mask pattern as an etch mask. A via hole region is formed by dry-etching the first interlayer dielectric film using the photosensitive polymer pattern as an etch mask.
    Type: Grant
    Filed: January 19, 2001
    Date of Patent: September 25, 2001
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hong-jae Shin, Byeong-jun Kim
  • Publication number: 20010022652
    Abstract: An intermediate substrate holder for use in a lithographic projection apparatus, which holder can itself be held by a standard substrate holder in said lithographic projection apparatus and in turn can hold a non-standard substrate. The means for holding the non-standard substrate may be comprised of one of or both of a vacuum holding means and mechanical clamping means. The vacuum holding means may be comprised of: a vacuum space on which the non-standard substrate is placed; a barrier means around the edge of the vacuum space that closes off the vacuum space and that makes a sealing contact with the non-standard substrate; and a means for exposing the vacuum space to vacuum. The mechanical clamping means may be comprised of: two or more stationary positioning pins opposed by a slidable mechanism which is provided with at least one sliding positioning pin mounted thereon and which is biased to move the sliding positioning pin towards the stationary pins.
    Type: Application
    Filed: March 14, 2001
    Publication date: September 20, 2001
    Inventors: Frank van Schaik, Gerardus J.J. Keijsers
  • Publication number: 20010021490
    Abstract: A photomask having small pitch images of openings for fabricating an opening of a semiconductor memory device includes a plurality of images of openings arranged in a row direction with a predetermined pitch to be used to transfer the images of openings onto a photoresist layer, and is used for a photolithographic process employing a photoresist flow process. The distance between the centers of the images of openings arranged in the photomask is larger than the pitch. A photolithographic method for fabricating reduced size openings and a semiconductor memory device having openings fabricated using the same method is also provided.
    Type: Application
    Filed: February 14, 2001
    Publication date: September 13, 2001
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jung-woo Lee, Hak Kim
  • Publication number: 20010021487
    Abstract: A system of etching using quantum entangled particles to get shorter interference fringes. An interferometer is used to obtain an interference fringe. N entangled photons are input to the interferometer. This reduces the distance between interference fringes by n, where again n is the number of entangled photons.
    Type: Application
    Filed: March 27, 2001
    Publication date: September 13, 2001
    Applicant: California Institute of Technology
    Inventors: Colin Williams, Jonathan Dowling, Giovanni della Rossa
  • Patent number: 6281967
    Abstract: An object of the invention is to provide an illumination apparatus and exposure apparatus and method employing this, whereby the illumination distribution on a mask or wafer can be compensated to a desired distribution, and whereby it is possible to independently alter the pupil shape (coherence factor) of illuminating light in respect of various image heights above the wafer.
    Type: Grant
    Filed: March 15, 2000
    Date of Patent: August 28, 2001
    Assignee: Nikon Corporation
    Inventor: Yuji Kudo
  • Patent number: 6278123
    Abstract: A method and apparatus for printing vertically and horizontally aligned features having reduced, substantially equal, critical dimensions on a photoresist-coated semiconductor wafer are disclosed. Radiant energy is passed through a pattern transfer tool to irradiate a first region of the wafer when the wafer is at a first position relative to the pattern transfer tool. The wafer is then positioned at a second position relative to the pattern transfer tool offset from the first position by a first distance along an axis aligned with the horizontal features and by a second distance along an axis aligned with the vertical features. The second distance is different from the first distance by a compensation distance. Radiant energy is then passed through the pattern transfer tool to irradiate a second region of the wafer region defining a second side of each of the horizontally and vertically aligned features.
    Type: Grant
    Filed: April 7, 1999
    Date of Patent: August 21, 2001
    Assignee: Intel Corporation
    Inventors: Bernie B. Hu, Robert F. Hainsey, Jeffrey G. Lewis
  • Patent number: 6274288
    Abstract: A polymer material is exposed to radiation of a type that changes some aspect of the polymer's radiation passing properties. The radiation that caused the property change is then contained by the material. The property change can be self-focusing or self-trapping light can be used. In that case, the same light that causes the photopolymerization is contained by the change in index of refraction that is caused by the polymerization.
    Type: Grant
    Filed: July 16, 1998
    Date of Patent: August 14, 2001
    Assignee: California Institute of Technology
    Inventors: Anthony S. Kewitsch, Amnon Yariv
  • Patent number: 6270947
    Abstract: The non-uniformity edge effect that can affect the quality of chips near the edge of a semiconductor wafer of various steps in the manufacture of integrated circuits is reduced. This is achieved by increasing the field area exposed by a step and repeat printer only when printing squares for chips located near the wafer edge. As a result there is also printed for processing an additional non-functional area outside the functional area to reduce the non-uniformity effect. This increases throughput of the printing apparatus.
    Type: Grant
    Filed: April 30, 1999
    Date of Patent: August 7, 2001
    Assignees: Infineon Technologies AG, International Business Machines Corporation
    Inventors: Steffen Schulze, Franz Zach
  • Patent number: 6265137
    Abstract: A reticle pattern is split into a first pattern which defines a configuration in the shorter dimension (X direction) and a second pattern which defines a configuration in the longer dimension (Y direction). The length in the longer dimension of each light-blocking pattern element of the first pattern is set longer than the length in the Y direction of the original reticle pattern. The second pattern has two opening pattern elements arrayed in the Y direction at a predetermined interval. The interval is set to a distance which is not shorter than the length in the Y direction of the original reticle pattern and is shorter than the length of each light-blocking pattern element. The image of the first pattern and the image of the second pattern are superimposed on one another by overlay exposure.
    Type: Grant
    Filed: April 7, 1998
    Date of Patent: July 24, 2001
    Assignee: Nikon Corporation
    Inventor: Shigeru Hirukawa
  • Patent number: 6258611
    Abstract: A method for determining translation portion of misalignment error in a stepper. In one embodiment, the method comprises a series of steps in a stepper, starting with the step of receiving a wafer in the stepper. In another step a first pattern, including an error-free fine alignment target, is created on the wafer. Next, the wafer is realigned in the stepper using the error-free fine alignment target. Then a second pattern is created on the wafer overlaying said first pattern. In another step, the translational error between the first pattern and the second pattern is measured.
    Type: Grant
    Filed: October 21, 1999
    Date of Patent: July 10, 2001
    Assignee: VLSI Technology, Inc.
    Inventor: Pierre Leroux
  • Publication number: 20010006763
    Abstract: Provided in the present invention are methods and apparatuses for transporting a substrate plate efficiently, for positioning the substrate plate to enable to minimize mechanical motions and generation of vibration associated with conventional substrate positioning, and for holding the substrate. For example, the present exposure apparatus has a plurality of electrodes arranged along the baseplate and a transport apparatus having a control apparatus to impress a voltage on each electrode to first generate static charges in the substrate plate, then to impress a voltage on each of the plurality of electrodes so that the charge code of the electrodes is the same as the charge code of the substrate plate, and to switch the voltage on the electrodes in accordance with the time interval required to produce dielectric polarization in the substrate plate. The substrate plate can be transported by electrostatic forces at high speed without contacting the baseplate.
    Type: Application
    Filed: December 26, 2000
    Publication date: July 5, 2001
    Applicant: Nikon Corporation
    Inventor: Keiichi Tanaka
  • Publication number: 20010006762
    Abstract: A balanced positioning apparatus comprises a balance mass which is supported so as to be moveable in the three degrees of freedom, such as X and Y translations and rotation about the Z-axis. Drive forces in these degrees of freedom act directly between the positioning body and the balance mass. Reaction forces arising from positioning movements result in corresponding movement of the balance mass and all reaction forces are kept within the balanced positioning system. The balance mass may be a rectangular balance frame having the stators of two linear motors forming the uprights of an H-drive mounted on opposite sides. The cross-piece of the H-drive spans the frame and the positioned object is positioned within the central opening of the frame.
    Type: Application
    Filed: December 19, 2000
    Publication date: July 5, 2001
    Inventors: Yim Bun P. Kwan, Wilhelmus J.T.P. van de Wiel
  • Publication number: 20010006764
    Abstract: The present invention aims at reducing the number of scanning exposure and at enhancing throughput.
    Type: Application
    Filed: December 22, 2000
    Publication date: July 5, 2001
    Inventors: Yasunori Nishimura, Taimi Oketani, Tsuyoshi Naraki
  • Patent number: 6255038
    Abstract: A double exposure process is disclosed whereby a first exposure produced by conventional photolithographic techniques generates a latent negative image in a photoresist etch mask layer (22), the image subsequently employed to modulate a second exposure generated by the multiple beam interferometric lithography technique. Periodic surface relief structures (80) patterned by the second exposure and formed after development of the exposed photoresist material, are restricted to regions (52) defined by the initial exposure, with the photoresist material (54) outside these regions remaining unmodulated, or devoid of the periodic structures (80), and suitable for use as a mask in a subsequent etching process.
    Type: Grant
    Filed: February 16, 1999
    Date of Patent: July 3, 2001
    Assignee: Optical Switch Corporation
    Inventor: Douglas S. Hobbs
  • Patent number: 6255040
    Abstract: Provided is a method of manufacturing a thin film magnetic head which can precisely control a pole width and obtain sufficient overwrite properties even when the pole width is reduced. A top pole has a step along the width, which is changed substantially perpendicularly, at a coupling portion between an intermediate portion and an end portion for defining a track width. A photoresist pattern functioning as a mask for forming the top pole is formed by using a negative photoresist. A photomask for forming this photoresist pattern has a concave pattern at a corner of the step along the width. Thus, the corner at the coupling portion between the intermediate and end portions of the top pole has a sharp edge. Thus, even if a throat height is changed, a write track width is not changed. Thus, a stable write track width can be obtained, and the write track width can be narrowed.
    Type: Grant
    Filed: March 23, 2000
    Date of Patent: July 3, 2001
    Assignee: TDK Corporation
    Inventor: Yoshitaka Sasaki
  • Patent number: 6251566
    Abstract: A cylindrical lenticular image is made possible by the interlacing of multiple views of an object. The interlaced views are then printed on a substrate and the substrate formed into a cylinder. A lenticular lens is then properly aligned with the substrate. The result is a three dimensional image that can be rotated to reveal a full three-hundred and sixty degree perspective of the imaged object.
    Type: Grant
    Filed: October 14, 1997
    Date of Patent: June 26, 2001
    Inventors: Scott Brosh, Phil Gottfried
  • Patent number: 6248509
    Abstract: A maskless exposure system for selectively exposing a photosensitive work surface, such as a photoresist layer, includes a semiconductor substrate having an elongated aperture. A series of shutters and associated guides are formed upon the substrate using conventional wafer processing methods. The shutters move between a first position covering the aperture and a second position exposing the aperture. A corresponding series of computer-controlled actuators, in the form of electromagnetic coils, cooperate with the shutters for selectively sliding each shutter between its first and second positions. A light beam is directed toward the aperture, and the shutters create a patterned light beam exiting the aperture. A computer-controlled stepper is synchronized with the shutter actuators and adjusts the relationship between the patterned light beam and the photosensitive work surface to direct the patterned light beam at different portions of the work material.
    Type: Grant
    Filed: July 27, 1999
    Date of Patent: June 19, 2001
    Inventor: James E. Sanford
  • Patent number: 6248508
    Abstract: The present invention provides a method of manufacturing a circuit element which includes a step of performing first exposure for transferring a pattern having a narrowed portion for forming a particular pattern, onto an exposure-target substrate, and a step of moving the pattern in a direction not parallel to a segment forming an outer circumference of the narrowed portion and performing second exposure for transferring the pattern onto the exposure-target substrate.
    Type: Grant
    Filed: March 17, 1998
    Date of Patent: June 19, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Ken-ichi Murooka, Hitoshi Higurashi
  • Patent number: 6248510
    Abstract: A motion picture intermediate film has on one side of a support material, in order, an antihalation undercoat and at least one silver halide emulsion layer; and on the opposite side of the support a transparent, process surviving antistatic backing layer. The transparent, antistatic backing layer retains its antistatic properties after photographic film processing so that the motion picture intermediate film is protected from the generation of static charge during high speed printing of, for example, motion picture print films. The antistatic backing layer of the invention has a resistivity of less than about 1×1011 &OHgr;/□ after film processing. In a most preferred embodiment, the motion picture intermediate film of the invention is used to print images onto a motion picture print film that has a transparent antistatic backing layer.
    Type: Grant
    Filed: April 10, 2000
    Date of Patent: June 19, 2001
    Assignee: Eastman Kodak Company
    Inventors: Charles C. Anderson, Eugene A. Armour, Robert J. Wilson, Robert P. Bouvy
  • Patent number: 6245487
    Abstract: Methods are provided for producing relief images having improved fidelity and resolution. The methods comprise positioning an image-bearing negative transparency closely adjacent and substantially parallel to a layer of a photocurable material; positioning on the other side of the negative from the photocurable material and in substantially parallel relationship thereto; providing a collimator that has first and second opposing major faces and comprises at least one cell that extends from said first collimator face to said second collimator face and is defined by at least one surface that substantially absorbs actinic radiation incident upon said surface; positioning said collimator opposite a photographic negative that is adjacent a layer of photocurable material; and passing actinic radiation through said collimator for a time sufficient to form a latent relief image in the photocurable material.
    Type: Grant
    Filed: August 26, 1999
    Date of Patent: June 12, 2001
    Assignee: Polyfibron Technologies, Inc.
    Inventor: Alvin Varnard Randall
  • Publication number: 20010003033
    Abstract: The non-uniformity edge effect that can affect the quality of chips near the edge of a semiconductor wafer of various steps in the manufacture of integrated circuits is reduced. This is achieved by increasing the field area exposed by a step and repeat printer only when printing squares for chips located near the wafer edge. As a result there is also printed for processing an additional non-functional area outside the functional area to reduce the non-uniformity effect. This increases throughput of the printing apparatus.
    Type: Application
    Filed: April 30, 1999
    Publication date: June 7, 2001
    Inventors: STEFFEN SCHULZE, FRANZ ZACH
  • Patent number: 6238852
    Abstract: A maskless lithography system that provides large-area, seamless patterning using a reflective spatial light modulator such as a Deformable Micromirror Device (DMD) directly addressed by a control system so as to provide a first pattern, via a first projection subsystem, on a first photoresist-coated substrate panel, while simultaneously providing a duplicate pattern, which is a negative of the pattern on the first substrate panel, via a second projection subsystem, onto a second photosensitive substrate panel, thus using the normally-rejected non-pattern “off” pixel radiation reflected by the “off” pixel micromirrors of the DMD, to pattern a second substrate panel. Since the “off” pixel reflections create a pattern which is complementary to the “on” pixel pattern, using a complementary photoresist coating on the second substrate panel provides for a duplicate pattern, as is usually desired.
    Type: Grant
    Filed: January 4, 1999
    Date of Patent: May 29, 2001
    Assignee: Anvik Corporation
    Inventor: Marc A. Klosner
  • Patent number: 6232051
    Abstract: The resist to be used for the method of this invention in producing a semiconductor device is patterned by a procedure which comprises the steps of disposing in the direction of a semiconductor wafer a first mask having circuit patterns repeatedly formed at a plurality of positions, then shielding those of said plurality of circuit patterns which overlap the edge of the semiconductor wafer with a blind to an extent such that the remaining circuit patterns are not shielded, exposing a resist overlying the semiconductor wafer by using the first mask held in a state partially shielded by the blind, projecting light through a second mask provided with a light passing pattern defined by a shielding film to an area of the resist to which the edge of the blind is transferred, and developing the resist
    Type: Grant
    Filed: July 29, 1998
    Date of Patent: May 15, 2001
    Assignee: Fujitsu Limited
    Inventor: Kazuaki Suzuki
  • Patent number: 6228564
    Abstract: A method for patterning a layer of photoresist includes the steps of 1) exposing the photoresist through a standard precision mask to define all possible patterns and features, and 2) selecting desired patterns and features with a non-precision targeting energy beam or mask. Consequently, no custom precision masks are required to pattern the various layers of photoresist during the fabrication of application specific integrated circuits (ASICs), thereby reducing both the lead-time and costs for manufacturing ASICs.
    Type: Grant
    Filed: August 18, 1999
    Date of Patent: May 8, 2001
    Assignee: Clear Logic
    Inventor: Alan H. Huggins
  • Patent number: 6218081
    Abstract: The invention relates to a method of manufacturing a nozzle member, having the step of splitting light from a light source by amplitude splitting to form a plurality of illumination beams, and the step of illuminating a plurality of mask patterns formed on a mask with the corresponding split illumination beams so as to expose a workpiece via the mask patterns, and a work apparatus using the method.
    Type: Grant
    Filed: June 6, 1997
    Date of Patent: April 17, 2001
    Assignee: Canon Kabushiki Kaisha
    Inventor: Masayuki Nishiwaki
  • Patent number: 6218089
    Abstract: Photolithographic methods and apparatus for reducing or eliminating the proximity effect. Multiple exposures using different exposure parameters are used to reduce or to eliminate the proximity effect.
    Type: Grant
    Filed: May 22, 1998
    Date of Patent: April 17, 2001
    Assignee: Micron Technology, Inc.
    Inventor: Christophe Pierrat
  • Patent number: 6218079
    Abstract: A method of forming a metal wiring using a dual damascene process is provided. A photosensitive polymer having low permittivity is used as an etch mask. Though the etch mask remains in the final structure, its low permittivity reduces parasitic capacitance effects. In this method, a photosensitive polymer pattern having a first hole with a first width is formed on a first interlayer dielectric film. A second interlayer dielectric film is formed on the photosensitive polymer pattern. A mask pattern, having a second hole, above the first hole, with a second width larger than the first width, is formed on the second interlayer dielectric film. A wiring region is formed by dry-etching the second interlayer dielectric film using the mask pattern as an etch mask. A via hole region is formed by dry-etching the first interlayer dielectric film using the photosensitive polymer pattern as an etch mask.
    Type: Grant
    Filed: July 9, 1999
    Date of Patent: April 17, 2001
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hong-jae Shin, Byeong-jun Kim
  • Patent number: 6187513
    Abstract: It is to provide a process for forming a mask pattern and a process for producing a thin film magnetic head, in which burr is not formed on removing a resist. The process for forming a mask pattern comprises a first coating step of coating a first resist on a surface, on which the mask pattern is formed; a first exposure step of forming a pattern latent image by exposing the first resist; a second coating step of coating a second resist on the first resist; a second exposure step of forming a pattern latent image by exposing the second resist; a first development step of forming an upper layer mask pattern by developing the second resist; and a second development step of forming a lower layer mask pattern by developing the first resist, the upper layer mask pattern having a resist bridge part, and a space being present between the resist bridge part and the surface, on which the mask pattern is formed.
    Type: Grant
    Filed: May 21, 1999
    Date of Patent: February 13, 2001
    Assignee: Sony Corporation
    Inventor: Toru Katakura
  • Patent number: 6187485
    Abstract: A method of forming raised and recessed patterns comprising: the first step of forming over a substrate a photosensitive resin layer including an alkali-insoluble resin and a negative type photosensitive resin, or the first step of forming over a substrate a photosensitive resin layer including a thermosetting resin and a negative type photosensitive resin and then heat-treating the photosensitive resin layer to harden at least a part of the thermosetting resin; the second step of exposing the photosensitive resin layer; and the third step of developing the photosensitive resin layer and hardening it to form a raised and recessed pattern including raised portions representing an exposed region and recessed portions representing an unexposed region. Liquid crystal display color filters which comprises over the substrate a colored layer, and a transparent protective layer and transparent columnar raised portions formed by one of the above two methods.
    Type: Grant
    Filed: February 25, 1999
    Date of Patent: February 13, 2001
    Assignee: Dai Nippon Printing Co., Ltd.
    Inventors: Kinji Matsushima, Tomonobu Sumino, Yukihiro Andou
  • Patent number: 6185727
    Abstract: A checking routine verifies a phase shifted mask (PSM) design based on fundamental principles of PSM and utilizing only basic shape manipulation functions and Boolean operations found in most computer aided design (CAD) systems. The design verification system checks complete chip designs for the two possible design errors that can cause defective masks by eliminating the phase transition; namely, placing a 180° phase region on both sides of a critical feature or completely omitting the phase region adjacent to certain critical features.
    Type: Grant
    Filed: December 12, 1995
    Date of Patent: February 6, 2001
    Assignee: International Business Machines Corporation
    Inventor: Lars Wolfgang Liebmann
  • Patent number: 6180325
    Abstract: A method for exposing photo-sensitive printing plates comprises applying a patterned coating to the printing plate to form a mask. The coating may be sprayed onto the printing plate and patterned by laser ablation. The method avoids the need to stock printing plates with integral masking layers. In preferred implementations the printing plate is exposed to actinic radiation without dismounting it from the apparatus in which the coating is applied. This minimizes the likelihood that the coating could be damaged in handling. The coating may be a thin sprayed on layer of carbon in a suitable binder.
    Type: Grant
    Filed: June 23, 1999
    Date of Patent: January 30, 2001
    Assignee: Creo SRL
    Inventor: Daniel Gelbart
  • Patent number: 6180321
    Abstract: A method for patterning a thin film layer into a predetermined configuration improves resolution thereof by exposing a partial depth “d” of a photoresist layer to a light beam. The patterning method includes the steps of: (a) preparing a semiconductor substrate with the thin film layer, an intermediate layer and a photoresist layer formed thereon, successively; (b) exposing a partial depth of the photoresist layer to a light beam; (c) removing the portion of the photoresist layer exposed to the light beam by using a solution to thereby obtain a patterned photoresist layer; (d) etching the intermediate layer by using the patterned photoresist layer as a mask; and (e) patterning the thin film layer into the predetermined configuration by using the etched intermediate layer as a mask.
    Type: Grant
    Filed: September 4, 1998
    Date of Patent: January 30, 2001
    Assignee: Daewoo Electronics Co., Ltd.
    Inventor: Jae-Woo Roh
  • Patent number: 6177233
    Abstract: A method of forming a resist pattern comprising the steps of depositing a resist on a semiconductor substrate, performing a first exposure on the resist using a reticle with a certain pattern formed on it as a mask to change the degree of polymerization at the exposed area in the resist, causing diffusion of a silicon compound to silylate selectively a part of the surface of the resist, performing a second exposure on the resist so that light passing through the silylated area and the unsilylated area become inverse in phase, and developing the resist for forming a micropattern on the resist.
    Type: Grant
    Filed: August 30, 1999
    Date of Patent: January 23, 2001
    Assignee: Sony Corporation
    Inventor: Fumikatsu Uesawa
  • Patent number: 6177237
    Abstract: A method for fabricating a substantially transparent polymer substrate for an anti-scatter x-ray grid for medical diagnostic radiography includes positioning a phase mask between the substrate and a high power laser; providing a laser beam from the laser; conditioning the laser beam; ablating a first portion the substrate through the phase mask with the conditioned laser beam; and moving the substrate; and ablating a second portion of the substrate through the phase mask with the conditioned laser beam.
    Type: Grant
    Filed: June 26, 1998
    Date of Patent: January 23, 2001
    Assignee: General Electric Company
    Inventors: Renato Guida, James Wilson Rose, Kenneth Paul Zarnoch, Gary John Thumann
  • Patent number: 6168904
    Abstract: An improved method of integrated circuit fabrication is described with a photolithographic step involving pattern decomposition. A desired final pattern is decomposed into two or more component patterns for photoresist imaging, leading to improvements in image fidelity.
    Type: Grant
    Filed: September 29, 1997
    Date of Patent: January 2, 2001
    Assignee: Lucent Technologies Inc.
    Inventors: John David Cuthbert, Chong-Cheng Fu
  • Patent number: 6162589
    Abstract: A process for creating and an apparatus employing shaped orifices in a semiconductor substrate. A first layer of material is applied on the semiconductor substrate then a second layer of material is then applied upon the first layer of material. An orifice image is then transferred to the first layer of material and a fluid-well image is transferred to the second layer of material. That portion of the second layer of material where the orifice image is located is then developed along with that portion of the first layer of material where the fluid well is located to define an orifice in the substrate.
    Type: Grant
    Filed: March 2, 1998
    Date of Patent: December 19, 2000
    Assignee: Hewlett-Packard Company
    Inventors: Chien-Hau Chen, Donald E. Wenzel, Qin Liu, Naoto Kawamura, Richard W. Seaver, Carl Wu, Colby Van Vooren, Jeffery S. Hess, Colin C. Davis