Abstract: An active matrix organic light emitting display (AM-OLED) and a method of forming the same. The AM-OLED has a plurality of pixel areas arranged in a matrix form. Each pixel area has at least two amorphous silicon TFTs, a display area and a light-shielding layer. The amorphous silicon TFT has an amorphous silicon layer serving as a channel region. The display area is formed by a transparent-conductive layer. The light-shielding layer covers at least the amorphous silicon layer of the amorphous silicon TFT and exposes the display area.

Abstract: A method for forming a transistor having an elevated source/drain structure is described. A gate electrode is formed overlying a substrate and isolated from the substrate by a gate dielectric layer. Isolation regions are formed in and on the substrate wherein the isolation regions have a stepped profile wherein an upper portion of the isolation regions partly overlaps and is offset from a lower portion of the isolation regions in the direction away from the gate electrode. Ions are implanted into the substrate between the gate electrode and the isolation regions to form source/drain extensions. Dielectric spacers are formed on sidewalls of the gate electrode and the isolation regions.

Abstract: Protrusions called ridges are formed on the surface of a crystalline semiconductor film formed by a laser crystallization method or the like. A heat absorbing layer are formed below a semiconductor film. When the semiconductor film is crystallized by laser, a temperature difference is produced between a semiconductor film 1010 positioned above a heat absorbing layer 1011 and a semiconductor film 1013 of the other region to produce a difference in thermal expansion at the boundary of the outside end 1015 of the heat absorbing layer. This difference produces a strain to form a surface wave. The surface wave starting at the outer periphery of the heat absorbing layer is formed in the vicinity of the heat absorbing layer. When the semiconductor layer is solidified after it is melted, the protrusions of the surface wave remain as protrusions after the semiconductor film is solidified.

Abstract: A method for making a transistor device includes embossing to separate parts of a layer of electrically-conducting material, thereby separating a source and a drain. The gap between the source and the drain is filled with a semiconductor material, and the source and drain are operatively coupled to a gate to make a transistor. The electrically-conducting material and the semiconductor material may be deposited using printing processes, and the various steps in the method of making the device may be performed in one or more row-to-row operations.

Abstract: A liquid crystal display device in the prior art has been high in its manufacturing cost for the reason that TFTs have been fabricated using, at least, five photo-masks. A liquid crystal display device which includes a pixel TFT portion having an n-channel TFT of inverse stagger type, and a retention capacitor, can be realized by three photolithographic steps in such a way that a pixel electrode 119, a source region 117 and a drain region 116 are formed by a third photo-mask.

Abstract: A Thin Film Transistor (TFT) manufacture method, comprising manufacture of a gate, a gate isolation layer, a channel layer, and a source/drain. Wherein, the manufacture of the channel layer comprises: forming a first a-Si layer by using a low deposition rate (LDR) (Chemical Vapor Deposition, CVD); forming a second a-Si layer by using a high deposition rate (HDR); and forming an N+Mixed a-Si layer. When the first a-Si layer is formed in the present invention, the flux ratio of H2/SiH4 is adjusted to a range from 0.40 to 1.00 to increase the number of defects in the first a-Si layer. When the TFT is irradiated by the light, the photo leakage current generated in the channel layer is trapped in the defects in the first a-Si layer. Therefore, the TFT photo leakage current can be significantly reduced.

Abstract: The present invention provides a thin-film transistor (TFT) and its production method which enables an arrangement restraining bipolar transistor type behavior, in order to stabilize saturation current and to provide a TFT that can improve reliability. The TFT includes a channel region facing a gate electrode through a gate insulating film, a source electrode connected to the channel region and a drain region connected to the channel region on the side opposite this source region are formed in a polycrystal semiconductor film that was patterned in island forms. In the channel region, a recombination center is formed for capturing a small number of carriers (holes) by introducing impurities, such as inert gases, metals, Group III elements, Group IV elements and Group V elements after a crystallization process is carried out on a semiconductor film 100.

Abstract: Field-effect transistors, and methods of their fabrication, having channel regions formed separately from their source/drain regions and having monocrystalline material interposed between the channel regions and the source/drain regions. The monocrystalline material includes monocrystalline silicon and silicon-germanium alloy.

Abstract: A method for forming one or more FinFET devices includes forming a source region and a drain region in an oxide layer, where the oxide layer is disposed on a substrate, and etching the oxide layer between the source region and the drain region to form a group of oxide walls and channels for a first device. The method further includes depositing a connector material over the oxide walls and channels for the first device, forming a gate mask for the first device, removing the connector material from the channels, depositing channel material in the channels for the first device, forming a gate dielectric for first device over the channels, depositing a gate material over the gate dielectric for the first device, and patterning and etching the gate material to form at least one gate electrode for the first device.

Abstract: An amorphous semiconductor film is etched so that a width of a narrowest portion thereof is 100 &mgr;m or less, thereby forming island semiconductor regions. By irradiating an intense light such as a laser into the island semiconductor regions, photo-annealing is performed to crystallize it. Then, of end portions (peripheral portions) of the island semiconductor regions, at least a portion used to form a channel of a thin film transistor (TFT), or a portion that a gate electrode crosses is etched, so that a region that the distortion is accumulated is removed. By using such semiconductor regions, a TFT is produced.

Abstract: A method for crystallizing an amorphous silicon thin-film is provided, in which amorphous silicon thin-films on a large-area glass substrate for use in a TFT-LCD (TFT-Liquid Crystal Display) are crystallized uniformly and quickly by a scanning method using a linear lamp to prevent deforming of the glass substrate. The crystallization method includes the steps of forming an amorphous silicon thin-film on a glass substrate, and illuminating a linear light beam on the amorphous silicon thin-film from the upper portion of the glass substrate according to a scanning method. The crystallization method is applied to a polycrystalline silicon thin-film transistor manufacturing method including the steps of forming an amorphous silicon thin-film on a glass substrate, and crystallizing the amorphous silicon of the thin-film transistor according to a scanning method using a linear light beam.

Abstract: Conventionally, when a TFT provided with an LDD structure or a TFT provided with a GOLD structure is to be formed, there is a problem in that the manufacturing process becomes complicated, which leads to the increase in the number of steps. An electrode formed of a lamination of a first conductive layer (18b) and a second conductive layer (17c), which have different widths from each other, is formed. After the first conductive layer (18b) is selectively etched to form a first conductive layer (18c), a low concentration impurity region (25a) overlapping the first conductive layer (18c) and a low concentration impurity region (25b) not overlapping the first conductive layer 18c are formed by doping an impurity element at a low concentration.

Abstract: A gate insulating layer, an amorphous silicon layer, an n+ amorphous silicon layer and a metal layer are deposited in sequence after a gate line, a gate electrode and a gate pad are formed on a substrate, using a first mask. The metal layer is etched to form a data line, a source electrode, a drain electrode and a data pad through a photolithography process, using a second mask, and the n+ amorphous silicon layer is etched, using the patterned data line, the source electrode, the drain electrode and the data pad as the mask. A light shielding film and a passivation film, or a passivation film also having a function of the light shielding film are deposited, and is etched through the photolithography process, using a third mask which leaves a portion covering the gate line, the gate electrode, the gate pad and the data line, the source electrode, and the drain electrode.

Abstract: A method of producing a top gate thin-film transistor comprises the steps of forming doped silicon source and drain regions (6a,8a) on an insulating substrate (2) and subjecting the face of the substrate (2) on which the source and drain regions (6a,8a) are formed to plasma treatment to form a doped surface layer. An amorphous silicon layer (12) is formed on the doped surface layer over at least the spacing between the source and drain regions (6a,8a) and an insulated gate structure (14, 16) is formed over the amorphous silicon layer (12). Laser annealing of areas of the amorphous silicon layer not shielded by the gate conductor is carried out to form polysilicon portions (12a, 12b) having the impurities diffused therein. In the method of the invention, doped silicon source and drain regions underlie the silicon layer to be crystallized using the laser annealing process. It has been found that the laser annealing process can then result in crystallization of the full thickness of the amorphous silicon layer.

Abstract: A method for fabricating a dual gate thin film transistor (TFT) device provides for forming a pair of source/drain layers self-aligned with respect to a first gate electrode and forming a second gate electrode self-aligned with respect to both the pair of source/drain layers and the first gate electrode. Thus, the dual gate TFT device is fabricated with enhanced alignment. In addition, the dual gate TFT device (or a single gate TFT device) may be fabricated with source/drain layers formed of a silicon-germanium alloy material, such as to provide the TFT device with enhanced performance with respect to a kink effect.

Abstract: An electronic device is formed from electronic elements deposited on a substrate. The electronic elements are deposited on the substrate by advancing the substrate through a plurality of deposition vacuum vessels, with each deposition vacuum vessel having at least one material deposition source and a shadowmask positioned therein. The material from at least one material deposition source positioned in each deposition vacuum vessel is deposited on the substrate through the shadowmask positioned in the deposition vacuum vessel to form on the substrate a circuit comprised of an array of electronic elements. The circuit is formed solely by the successive deposition of materials on the substrate.

Abstract: A thin film transistor and method of making the same is disclosed in which a contact hole is formed with a flattened interface between openings in an inorganic material passivation layer and an organic material interlayer insulating film thereabove. The method includes etching an opening in the interlayer insulating film, using that opening as a mask for subsequently etching a self-aligned opening in the passivation layer, and again etching the interlayer insulating film in a develop back process to obtain a contact hole having a flattened inner sidewall.

Abstract: A method for manufacturing an x-ray detector comprises the steps of: preparing an insulating substrate; forming a gate and a pad on the insulating substrate; forming a gate insulating film, an amorphous silicon layer and an etch stopper over the insulating substrate, inclusive of the gate and the pad; simultaneously forming a channel layer, an ohmic contact layer and a source/drain over the gate insulating film, inclusive of the etch stopper, and a common electrode over a proper portion of the gate insulating film; forming a first storage electrode over the gate insulating film, inclusive of the common electrode; forming a protective layer over the entire structure of the insulating substrate on which the source/drain and the first storage electrode have been formed, and subsequently forming a contact hole and via holes over a proper portion of the protective layer; and forming a second storage electrode over the protective layer.

Abstract: A method of fabricating an electronic device comprising a thin-film transistor, which addresses a problem of increased off-state current and reduced carrier mobility in self-aligned thin-film transistors. According to the method, a gate layer (2,46) is etched back underneath a mask layer (20,48). Following an implantation step using the mask layer as an implantation mask, the etch-back exposes implant damage which is then annealed by an energy beam (42).

Abstract: A method of manufacturing a semiconductor device includes the steps of, (1) preparing an SOI substrate, (2) forming a metal layer on the SOI substrate, (3) performing a first anneal treatment to the metal layer at a relatively low temperature in order to transform the metal layer to a first silicide layer, (4) forming an insulating layer on the first silicide layer, and (5) forming a contact hole, which reaches the first silicide layer, in the insulating layer; and (6) performing a second anneal treatment to the silicide layer at a relatively high temperature in order to transform the first silicide layer to a second silicide layer.

Abstract: A method for forming ohmic contacts for semiconductor devices, in accordance with the present invention, includes forming a layer containing metal which includes dopants integrally formed therein. The layer containing metal is patterned to form components for a semiconductor device, and a semiconductor layer is deposited for contacting the layer containing metal. The semiconductor device is annealed to outdiffuse dopants from the layer containing metal into the semiconductor layer to form ohmic contacts therebetween.

Abstract: An array substrate for a transflective liquid crystal display device, including a substrate; at least one gate line and at least one gate electrode formed on the transparent substrate; a gate-insulating layer formed over the at least one gate line and the at least one gate electrode; a silicon layer formed on the gate-insulating layer, the silicon layer being positioned above the at least one gate electrode; a source electrode and a drain electrode formed on the silicon layer and spaced apart from each other with the silicon layer overlapped therebetween, wherein the at least one gate electrode, the source electrode, the drain electrode, and the silicon layer define a thin film transistor (TFT); at least one data line; a first passivation layer covering the at least one data line; a transparent electrode formed on the first passivation layer; and a reflective electrode formed on the transparent electrode.

Abstract: A method for producing a surface mounting optoelectronic component having comprises the following steps: readying a base body with the optoelectronic transmitter and/or receiver arranged in a recess of the base body, filling the recess of the base body with a transparent, curable casting compound, and placing the optical device onto the base body, so whereby the optical device comes into contact with the casting compound.

Abstract: A method for forming single crystalline silicon-on-insulator (SOI) structures over a silicon substrate includes forming an amorphous silicon layer over an insulating layer and contacting the substrate through the insulating layer. An excimer laser having operating conditions and a wavelength chosen to selectively melt amorphous silicon irradiates the entire substrate surface and is largely non-absorbed by materials other than silicon when incident upon them. Heating of the substrate and other materials is therefore minimal. After a blanket radiation process selectively melts the amorphous silicon layer, cooling conditions are chosen such that a single crystal silicon film is formed during the solidification process due to contact to the single crystal silicon substrate which acts as a seed layer. Various devices may be formed on the SOI islands as well as on exposed portions of the substrate not covered by the SOI islands.

Abstract: In a monolithic active matrix circuit that uses offset-gate TFTs in which the gate electrode is offset from the source and drain regions or TFTs whose gate insulating film is formed by vapor deposition, not only an active matrix circuit but also a drive circuit therefor is formed by using P-channel TFTs.

Abstract: A method of forming a field effect transistor includes forming a channel region within bulk semiconductive material of a semiconductor substrate. Source/drain regions are formed on opposing sides of the channel region. An insulative dielectric region is formed within the bulk semiconductive material proximately beneath at least one of the source/drain regions. A method of forming a field effect transistor includes providing a semiconductor-on-insulator substrate, said substrate comprising a layer of semiconductive material formed over a layer of insulative material. All of a portion of the semiconductive material layer and all of the insulative material layer directly beneath the portion are removed thereby creating a void in the semiconductive material layer and the insulative material layer. Semiconductive channel material is formed within the void. Opposing source/drain regions are provided laterally proximate the channel material. A gate is formed over the channel material.

Abstract: A microcrystal silicon film is formed on a substrate by using a silicide gas, a hydrogen gas, and a source gas that enables introduction of a metal element for accelerating crystallization of silicon in a capacitance-coupling plasma CVD apparatus. The action of the metal element provides a high film forming rate. Therefore, a technique for forming a microcrystal silicon film with high quality and high film forming rate can be provided.

Abstract: A TFT array for a liquid crystal display device in which inferiority due to electrification or abnormal discharge during fabrication process can be decreased. The TFT array comprises TFTs for display each connected to a respective one of pixel electrodes disposed in a matrix, gate wirings, signal lines, a common conductor line on the gate wiring side, a common conductor line on the signal line side, nonlinear elements respectively disposed between the gate wirings and the common conductor line on the gate wiring side and between the signal lines and the common conductor line on the signal line side. A gate electrode of a TFT in each of the nonlinear elements is formed separately from the corresponding common conductor line and is electrically coupled thereto via contact holes and a third conductor layer.

Abstract: This invention provides an inverted staggered type thin-film transistor element wherein the n-doped amorphous silicon film (14) present in the region where the amorphous silicon film (13) does not overlap with the source-drain electrodes (15) is modified into an insulating film (17) by exposure to a plasma containing ions or radicals of oxygen and/or nitrogen, so that the undesired n-doped amorphous silicon film above a channel region need not be removed and the amorphous silicon film can be made thinner. Moreover, the aperture ratio of a liquid crystal display can be enhanced by utilizing such elements.

Abstract: There is provided a semiconductor device using a TFT structure of high reliability. A gate electrode of a TFT includes a first conductive layer, a second conductive layer, and a third conductive layer. An LDD region has a part which overlaps the gate electrode via a gate insulating film and a part which does not overlap the gate electrode. As a result, this can prevent the deterioration when the TFT is on and can reduce a leakage current when the TFT is off.

Abstract: A ferroelectric transistor is disclosed which has two source/drain regions and a channel region disposed in between in a semiconductor substrate. A metallic intermediate layer is disposed on the surface of the channel region and forms a Schottky diode with the semiconductor substrate, and a ferroelectric layer and a gate electrode are disposed on its surface. The ferroelectric transistor is fabricated using steps appertaining to silicon process technology.

Abstract: A novel and very useful method for forming a crystal silicon film by introducing a metal element which promotes crystallization of silicon to an amorphous silicon film and for eliminating or reducing the metal element existing within the crystal silicon film thus obtained is provided. The method for fabricating a semiconductor device comprises steps of intentionally introducing the metal element which promotes crystallization of silicon to the amorphous silicon film and crystallizing the amorphous silicon film by a first heat treatment to obtain the crystal silicon film; eliminating or reducing the metal element existing within the crystal silicon film by implementing a second heat treatment within an oxidizing atmosphere; eliminating a thermal oxide film formed in the previous step; and forming another thermal oxide film on the surface of the region from which the thermal oxide film has been eliminated by implementing another thermal oxidation.

Abstract: An electronic device which comprises a gate electrode on one surface of a substrate and a gate insulating film covering the substrate and the gate electrode therewith is described. The device further comprises a semiconductor active layer formed above the gate electrode and having a width smaller than the gate electrode, and a source electrode and a drain electrode formed on the semiconductor active layer through an ohmic contact layer wherein the space between the source electrode and the drain electrode kept away from each other is wider than the space between the spaced ohmic contact layers, and the substrate is irradiated with light from the other surface on which the gate electrode is not formed. A method for making the device is also described.

Abstract: In a method of manufacturing a TFT using a crystalline silicon film in which defects are compensated by a thermal oxidation step, the roughness of a thermal oxidation film formed by thermal oxidation is made small. In the method, first, an amorphous silicon film to which an impurity for suppressing crystallization, such as nitrogen, oxygen, or carbon, is formed on a crystalline silicon film used as an active layer. Since crystallization of this amorphous silicon film is suppressed, it can be thermally oxidized in the state of an amorphous or microcrystalline, and the thermal oxidation film with small roughness can be obtained. By using this thermal oxidation step, it is possible to suppresses generation of a gate leak, to suppresses fluctuation of TFT characteristics in the same substrate to the minimum, and to manufacture a semiconductor device capable of operating at high speed.

Abstract: Disadvantageous roughness of interfaces between electrically conductive NiSi layers and n-doped Si interfaces arising during conventional salicide processing for forming shallow-depth source and drain junction regions of NMOS transistors and/or CMOS devices is avoided, or at least substantially reduced, by substituting implanted non-As-containing n-type dopant ions, such as P and/or Sb ions, for the conventionally utilized implanted As n-type dopant ions. If desired, shallow-depth source and drain extensions may be formed by implantation of As-containing n-type dopant ions above the region comprising the non-As-containing dopant ions without causing roughness of the NiSi/n-doped Si interface.

Abstract: Substrates suitable to manufacture and products of a thin film semiconductor device are provided, by at first preparing a manufacturing substrate having a characteristic capable of enduring a process for forming a thin film transistor and a product substrate having a characteristic suitable to direct mounting of the thin film transistor in a preparatory step, then applying a bonding step to bond the manufacturing substrate to the product substrate for supporting the product substrate at the back, successively applying a formation step to form at least a thin film transistor to the surface of the product substrate in a state reinforced with the manufacturing substrate and, finally, applying a separation step to separate the manufacturing substrate after use from the product substrate.

Abstract: In one aspect, the invention provides a method of forming an electrical connection in an integrated circuitry device. According to one preferred implementation, a diffusion region is formed in semiconductive material. A conductive line is formed which is laterally spaced from the diffusion region. The conductive line is preferably formed relative to and within isolation oxide which separates substrate active areas. The conductive line is subsequently interconnected with the diffusion region. According to another preferred implementation, an oxide isolation grid is formed within semiconductive material. Conductive material is formed within the oxide isolation grid to form a conductive grid therein. Selected portions of the conductive grid are then removed to define interconnect lines within the oxide isolation grid. According to another preferred implementation, a plurality of oxide isolation is regions are formed over a semiconductive substrate.

Abstract: A method of manufacturing an active matrix device (10) comprising a row and column array of active elements wherein each element comprises a transparent pixel electrode (12) associated with a self-aligned, top gate transistor (14, R2) having a transparent gate electrode (26). The method comprising the steps of forming opaque source (22) and drain (22′) electrodes on a transparent substrate (51); forming a semiconductor channel layer (23) so as to join source (22) and drain (22′) electrodes; forming a gate insulating (24, 25) layer; and depositing a transparent conductive layer and forming both the transparent gate electrode (26) and the pixel electrode (32) therefrom.

Abstract: To obtain a TFT, in which an off-current value is low and the fluctuation is suppressed, and an electronic equipment provided with the TFT. A film deposition temperature is set to substantially the same between a base insulating film and an amorphous semiconductor film to improve flatness of the semiconductor film. Then, laser light irradiation is conducted.

Abstract: A thin film transistor and a semiconductor device and a method for forming the same. A silicon thin film formed on an insulating substrate is heated at 550 to 800° C. so that it has crystallinity, and a thin film transistor is formed using the crystalline silicon film thus obtained. Thermal contraction of the insulating substrate is set in a range of 30 to 500 ppm in the heating process, so that the thin film transistor has high mobility, low threshold voltage and high off-resistance. Thermal contraction of the insulating substrate may be also set 100 ppm or less in a heating process after a patterning treatment in a thin film transistor producing process.

Abstract: A method of manufacturing an integrated circuit utilizes solid phase epitaxy to form a channel region. The method includes providing an amorphous semiconductor material including germanium, crystallizing the amorphous semiconductor material via solid phase epitaxy, and doping to form a source location and a drain location. The semiconductor material containing germanium can increase the charge mobility associated with the transistor.

Abstract: A thin-film transistor is provided, which has a simple configuration and improved off-characteristic, operational reliability, and fabrication yield. This transistor includes a substrate and a layered structure formed on the substrate. The layered structure includes a semiconductor film, a gate insulating film located on a first side of the semiconductor film to be overlapped with the semiconductor film, a gate electrode located on the gate insulating film on the first side of the semiconductor film to be selectively overlapped with the semiconductor film, a source electrode located on a second side of the semiconductor film to be electrically connected to the semiconductor film, and a drain electrode located on the second side of the semiconductor film to be electrically connected to the semiconductor film and to be apart from the source electrode. The semiconductor film has a back channel section between opposite ends of the source and drain regions.

Abstract: A method of manufacturing a thin film transistor (TFT) is disclosed comprising source and drain electrodes joined by a semiconductor channel layer, a gate insulating layer formed from at least two sublayers and a gate electrode. The method comprising the steps of forming the gate insulating layer by depositing a thin film sublayer using a thin film technique; and depositing a printed sublayer by printing, wherein the thin film sublayer is located adjacent the semiconductor channel layer.

Abstract: The present invention relates to a thin film transistor and a fabricating method thereof wherein a source/drain region and a gate electrode are formed in the same layer, which improves the degree of planarization. Because source/drain electrodes and a gate electrode are formed by patterning the same layer with a single mask, the invention reduces the number of fabrication steps. The TFT includes an insulated substrate which is transparent, a source electrode and a drain electrode on the insulated substrate. The source and drain electrodes are separated each other, and a gate electrode is between the source and drain electrodes on the insulated substrate. A gate insulating layer covers the source and drain electrodes and the gate electrodes on the gate insulating layer. An active layer is then formed on the gate insulating layer. Source and drain regions are formed at each end of the active layer corresponding to the gate electrode and a channel region is formed between the source and drain regions.

Abstract: The present invention provides a thin film transistor (TFT) and a fabrication method thereof which suppresses the back channel effects in which a leakage current flows between a source electrode and a drain electrode at times during a turn off state of the TFT. A thin silicon oxynitride film 90 having a thickness preferably equal to or less than 50 Å is formed between an amorphous silicon layer 40 and a channel passivation film 50 (a silicon nitride film) above a back channel region 100 between a source electrode and a drain electrode of an inverted staggered type TFT to cause Si—O bonds to exist in an upper interface of the amorphous silicon layer. The Si—O bonds increase the Density of States in the back channel region and has an effect for suppressing the leakage current through the back channel region 100 at times during the turn off of the TFT.

Abstract: A thin-film circuit element such as a top-gate TFT has good quality electrical contacts formed between an electrode (151, 152, 155) of chromium nitride and the semiconductor film (50) of the circuit element and/or another conductive film such as a connection track (37,39,40) of, for example, aluminium. Chromium nitride has a particularly advantageous combination of propertied for use as such an electrode material, including, for example, low affinity for oxide growth even during deposition thereon of semiconductor, insulating and/or metal films, a doping potential to enhance ohmic contact to semiconductors, a barrier function against potential impurities, good thin-film processing compatibility, and hillock prevention in an underlying aluminium conductor.

Abstract: This invention relates to a TFT-LCD and a manufacturing method therefor which etches triple layer patterns in a single process step. As a result, the number of masking processes is reduced and a high quality device is produced with less defects.

Abstract: A method of forming a thin film transistor comprises providing first electrode layers (42) over a transparent substrate (40), the first electrode layers comprising a lower transparent layer (42a), and an upper opaque layer (42b). The first electrode layers are patterned to define a first electrode pattern in which an edge region of the transparent layer (42a) extends beyond an edge region of the opaque layer (42b). A transistor body region comprising a semiconductor layer (16) defining the channel area of the transistor and a gate insulator layer (18) is provided over the first electrode pattern (42). A transparent second electrode layer (46) is also provided. A negative resist (70) is exposed through the substrate (40), with regions of the negative resist layer (70) shadowed by the opaque layer (42b) of the first electrode pattern (42) remaining unexposed.

Abstract: A manufacturing process OF a thin film transistor is provided, in which occurrence of a dry spot and occurrence of an etch residue of an ohmic contact layer (n+a-Si:H film) due to the dry spot are prevented in photoengraving process for patterning a semiconductor layer and the ohmic contact layer into an island, without any further treatment by any other apparatus. After forming the a-Si:H film 4a which forms the semiconductor layer of the TFT and the n+a-Si:H film 5a which forms the ohmic contact layer, a N2 gas plasma discharge is continuously performed using the same plasma CVD apparatus, thereby forming a very thin silicon nitride film 6 having a hydrophilic property on a surface layer of the n+a-Si:H film 5a.

Abstract: To provide a method of fabricating a thin film transistor which is capable of achieving a good ohmic contact between source and drain electrodes and a semiconductor layer, thereby solving problems of the conventional method. A first semiconductor layer containing impurities is formed on substantially oxygen-free metal source and drain electrodes. The impurities contained in the first semiconductor layer are allowed to diffuse into a substrate and the source and drain electrodes. An H2 plasma etching processing is performed to selectively etch the first semiconductor layer and a region of the substrate containing the impurities. A second semiconductor layer is formed on the source and drain electrodes. The impurities contained in the source and drain electrodes are allowed to diffuse into the second semiconductor layer, thus forming an ohmic contact layer.