Groove Formation Patents (Class 438/42)
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Patent number: 8525221Abstract: A light emitting device and method for making the same is disclosed. The light-emitting device includes an active layer sandwiched between a p-type semiconductor layer and an n-type semiconductor layer. The active layer emits lights when holes from the p-type semiconductor layer combine with electrons from the n-type semiconductor layer therein. The active layer includes a number of sub-layers and has a plurality of pits in which the side surfaces of a plurality of the sub-layers are in contact with the p-type semiconductor material such that holes from the p-type semiconductor material are injected into those sub-layers through the exposed side surfaces without passing through another sub-layer. The pits can be formed by utilizing dislocations in the n-type semiconductor layer and etching the active layer using an etching atmosphere in the same chamber used to deposit the semiconductor layers without removing the partially fabricated device.Type: GrantFiled: November 25, 2009Date of Patent: September 3, 2013Assignee: Toshiba Techno Center, Inc.Inventors: Steven Lester, Jeff Ramer, Jun Wu, Ling Zhang
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Patent number: 8525201Abstract: A light emitting device may include a substrate, an n-type clad layer, an active layer, and a p-type clad layer. A concave-convex pattern having a plurality of grooves and a mesa between each of the plurality of grooves may be formed on the substrate, and a reflective layer may be formed on the surfaces of the plurality of grooves or the mesa between each of the plurality of grooves. Therefore, light generated in the active layer may be reflected by the reflective layer, and extracted to an external location.Type: GrantFiled: May 27, 2010Date of Patent: September 3, 2013Assignee: Samsung Electronics Co., Ltd.Inventors: Jae-won Lee, Bok-ki Min, Jun-youn Kim, Young-jo Tak, Hyung-su Jeong
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Publication number: 20130223462Abstract: A laser diode includes a substrate and a junction layer disposed on the substrate. The junction layer forms a quantum well of the laser diode. The laser diode includes a junction surface having at least one channel that extends through the junction layer to the substrate. The at least one channel defines an anode region and a cathode region. A cathode electrical junction is disposed on the junction surface at the cathode region, and an anode electrical junction is disposed on the junction surface and coupled to the junction layer at the anode region. A cathode metal layer is disposed in at least a trench region of the channel. The cathode metal layer couples the substrate to the cathode electrical junction.Type: ApplicationFiled: March 13, 2013Publication date: August 29, 2013Applicant: Seagate Technology LLCInventor: Seagate Technology LLC
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Publication number: 20130221387Abstract: The present invention provides an LED and the manufacturing method thereof, and a light emitting device. The LED includes a first electrode, for connecting the LED to a negative electrode of a power supply; a substrate, located on the first electrode; and an LED die, located on the substrate; in which a plurality of contact holes are formed extending through the substrate, the diameter of upper parts of the contact holes is less than the diameter of lower parts of the contact holes, and the contact holes are filled with electrode plugs connecting the first electrode to the LED die. The light emitting device includes the LED, and further includes a susceptor and an LED mounted on the susceptor.Type: ApplicationFiled: December 31, 2010Publication date: August 29, 2013Applicant: ENRAYTEK OPTOELECTRONICS CO., LTD.Inventors: Richard Rugin Chang, Deyuan Xiao
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Patent number: 8519412Abstract: A semiconductor light-emitting device and a method for manufacturing the same is disclosed, which improves light extraction efficiency by forming a plurality of protrusions on a surface of a substrate for growing a nitride semiconductor material thereon, the semiconductor light-emitting device comprising a substrate; one or more first protrusions on the substrate, each first protrusion having a recess through which a surface of the substrate is exposed planarly; a first semiconductor layer on the substrate including the first protrusions; an active layer on the first semiconductor layer; a second semiconductor layer on the active layer; a first electrode on a predetermined portion of the first semiconductor layer, wherein the active layer and second semiconductor layer are not formed on the predetermined portion of the first semiconductor layer; and a second electrode on the second semiconductor layer.Type: GrantFiled: July 15, 2010Date of Patent: August 27, 2013Assignee: LG Display Co., Ltd.Inventors: Su Hyoung Son, Kyoung Jin Kim, Eun Mi Ko, Ung Lee
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Publication number: 20130217166Abstract: A light-emitting device comprises an active-region sandwiched between an n-type layer and a p-type layer, that allows lateral carrier injection into the active-region so as to reduce heat generation in the active-region and to minimize additional forward voltage increase associated with bandgap discontinuity. In some embodiments, the active-region is a vertically displaced multiple-quantum-well (MQW) active-region. A method for fabricating the same is also provided.Type: ApplicationFiled: March 18, 2013Publication date: August 22, 2013Applicant: INVENLUX CORPORATIONInventor: INVENLUX CORPORATION
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Publication number: 20130214320Abstract: In a method for producing a semiconductor light emitting device: a semiconductor lamination of first and second semiconductor layers having different conductive types is formed; a portion of the semiconductor lamination is removed to expose an area of a surface of the first semiconductor layer; a conductor layer connecting the first and second semiconductor layers is formed; a first electrode is formed on the exposed areas of the first semiconductor layer and a second electrode is formed on an upper surface of the second semiconductor layer; a barrier layer covering at least one of the first and second electrodes is formed; and a connection part in the conductor layer connecting the first and second semiconductor layers is removed.Type: ApplicationFiled: February 21, 2013Publication date: August 22, 2013Applicant: NICHIA CORPORATIONInventor: NICHIA CORPORATION
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Patent number: 8513039Abstract: A method for fabricating a semiconductor lighting chip includes steps of: providing a substrate; forming a first etching layer on the substrate; forming a connecting layer on the first etching layer; forming a second etching layer on the connecting layer; forming a lighting structure on the second etching layer; and etching the first etching layer, the connecting layer, the second etching layer and the lighting structure, wherein an etching rate of the first etching layer and the second etching layer is lager than that of the connecting layer and the lighting structure, thereby to form the connecting layer and the lighting structure each with an inverted frustum-shaped structure.Type: GrantFiled: August 24, 2011Date of Patent: August 20, 2013Assignee: Advanced Optoelectronic Technology, Inc.Inventors: Po-Min Tu, Shih-Cheng Huang, Tzu-Chien Hung, Ya-Wen Lin
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Patent number: 8513035Abstract: The present invention relates to illuminating field, especially relates to LED chip, LED and a method of manufacturing LED chip, the method of manufacturing LED chip comprises: forming a first semiconductor layer, a luminous layer and a second semiconductor layer sequentially on a substrate; forming a phosphor powder layer on the second semiconductor layer; removing a part of the phosphor powder layer and a part of the second semiconductor layer to form at least one groove which exposes a part of the second semiconductor layer; removing a part of the phosphor powder layer, a part of the second semiconductor layer, a part of the luminous layer and a part of the first semiconductor layer to form at least one unfilled corner which exposes a part of the first semiconductor layer; forming a first electrode in the unfilled corner, and forming a second electrode in the groove.Type: GrantFiled: September 23, 2011Date of Patent: August 20, 2013Assignee: Shenzhen Refond Optoelectronics Co., Ltd.Inventor: Zhaoxin Xiao
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Patent number: 8506830Abstract: A pattern is formed by: forming a first imprint mask layer on a processed member; forming a first imprint pattern of the first imprint mask layer using a first template; forming a second imprint mask layer made of a material having a different etching rate from the first imprint mask layer on the first imprint pattern; forming a second imprint pattern of the second imprint mask layer using a second template different from the first template; and etching the processed member using as a mask the second imprint mask layer on which the second imprint pattern is formed and the first imprint mask layer on which the first imprint pattern is formed.Type: GrantFiled: March 3, 2011Date of Patent: August 13, 2013Assignee: Kabushiki Kaisha ToshibaInventor: Kenji Furusho
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Publication number: 20130200358Abstract: The invention describes an OLED device (1) comprising an active layer (13) between a first electrode (11) and a second electrode (12); a contact means (3, 34, 35) for connecting the electrodes (11, 12) to a power supply (2); and a brightness distribution controlling means (20, 21, 21?, 24, 24?, 25, 25?), which brightness distribution controlling means (20, 21, 21?, 24, 24?, 25, 25?) comprises a plurality of openings (20), wherein an opening (20) extends through the second electrode (12) and the active layer (13) to expose an area (21, 21?) of the first electrode (11); and a plurality of selectively addressable current distribution lines (24, 24?, 25, 25?), wherein a current distribution line (24, 24?, 25, 25?) is arranged to extend between a contact means (3, 34, 35) and an exposed area (21, 21) such that an electrical connection can be established between the power supply (2) and the first electrode (11) to (specifically) regulate the brightness of the active layer (13) in the vicinity of the exposed area (2Type: ApplicationFiled: October 13, 2011Publication date: August 8, 2013Applicant: KONINKLIJKE PHILIPS ELECTRONICS N.V.Inventors: Sören Hartmann, Pieter Gijsbertus Maria Kruijt
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Patent number: 8501511Abstract: Manufacturing a laser diode includes growing an active layer, a first InP layer, and a diffraction grating layer; forming an alignment mark having a recess by etching the diffraction grating layer and the first InP layer; forming a first etching mask; forming a diffraction grating in the diffraction grating layer using the first etching mask; forming a modified layer containing InAsP on a surface of the alignment mark recess by supplying a first source gas containing As and a second source gas containing P; growing a second InP layer on the diffraction grating layer and on the alignment mark; forming a second etching mask on the second InP layer; selectively etching the second InP layer embedded in the recess of the alignment mark through the second etching mask by using the modified layer serving as an etching stopper; and forming a waveguide structure using the alignment mark.Type: GrantFiled: September 2, 2011Date of Patent: August 6, 2013Assignee: Sumitomo Electric Industries Ltd.Inventor: Yukihiro Tsuji
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Patent number: 8502249Abstract: A semiconductor light-emitting device capable of improving current distribution, and a method for manufacturing the same is disclosed, wherein the semiconductor light-emitting device comprises a substrate; an N-type nitride semiconductor layer on the substrate; an active layer on the N-type nitride semiconductor layer; a P-type nitride semiconductor layer on the active layer; a groove in the P-type nitride semiconductor layer to form a predetermined pattern in the P-type nitride semiconductor layer; a light guide of transparent non-conductive material in the groove; and a transparent electrode layer on the P-type nitride semiconductor layer with the light guide.Type: GrantFiled: November 18, 2010Date of Patent: August 6, 2013Assignee: LG Display Co., Ltd.Inventors: Ung Lee, Yoon Seok Park, Won Keun Cho, So Young Jang
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Patent number: 8501510Abstract: An optoelectronic component with three-dimension quantum well structure and a method for producing the same are provided, wherein the optoelectronic component comprises a substrate, a first semiconductor layer, a transition layer, and a quantum well structure. The first semiconductor layer is disposed on the substrate. The transition layer is grown on the first semiconductor layer, contains a first nitride compound semiconductor material, and has at least a texture, wherein the texture has at least a first protrusion with at least an inclined facet, at least a first trench with at least an inclined facet and at least a shoulder facet connected between the inclined facets. The quantum well structure is grown on the texture and shaped by the protrusion, the trench and the shoulder facet.Type: GrantFiled: May 17, 2012Date of Patent: August 6, 2013Assignee: Hermes-Epitek Corp.Inventors: Benson Chao, Chung-Hua Fu, Shih-Chieh Jang
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Patent number: 8501508Abstract: Embodiments described include straining transistor quantum well (QW) channel regions with metal source/drains, and conformal regrowth source/drains to impart a uni-axial strain in a MOS channel region. Removed portions of a channel layer may be filled with a junction material having a lattice spacing different than that of the channel material to causes a uni-axial strain in the channel, in addition to a bi-axial strain caused in the channel layer by a top barrier layer and a bottom buffer layer of the quantum well.Type: GrantFiled: May 23, 2012Date of Patent: August 6, 2013Assignee: Intel CorporationInventors: Prashant Majhi, Mantu Hudait, Jack T. Kavalieros, Ravi Pillarisetty, Marko Radosavljevic, Gilbert Dewey, Titash Rakshit, Willman Tsai
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Patent number: 8492186Abstract: The present invention is a method for producing a group III nitride semiconductor layer in which a single crystal group III nitride semiconductor layer (103) is formed on a substrate (101), the method including: a substrate processing step of forming, on the (0001) C-plane of the substrate (101), a plurality of convex parts (12) of surfaces (12c) not parallel to the C-plane, to thereby form, on the substrate, an upper surface (10) that is composed of the convex parts (12) and a flat surface (11) of the C-plane; and an epitaxial step of epitaxially growing the group III nitride semiconductor layer (103) on the upper surface (10), to thereby embed the convex parts (12) in the group III nitride semiconductor layer (103).Type: GrantFiled: December 19, 2007Date of Patent: July 23, 2013Assignee: Toyoda Gosei Co., Ltd.Inventors: Hironao Shinohara, Hiromitsu Sakai
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Publication number: 20130181193Abstract: Provided is an organic light emitting device. The organic light emitting devices includes: a light emitting part where a first electrode, an organic light emitting layer, and a second electrode are stacked ; and a thin film layer having a plurality of holes and micro-resonating the light emitted from the organic light emitting layer.Type: ApplicationFiled: December 3, 2012Publication date: July 18, 2013Applicant: Electronics and Telecommunications Research InstituteInventor: Electronics and Telecommunications Research In
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Patent number: 8476085Abstract: The present invention discloses a method of fabricating dual trench isolated epitaxial diode array. This method starts with the formation of heavily-doped first conductivity type regions and heavily-doped second conductivity type regions on the substrate, followed by epitaxial growth, then the formation of the isolations between diode array word lines by deep trench etch and the formation of the isolations between bit lines vertical to deep trenches by shallow trench etch, and finally the formation of separate diode array cells in the regions enclosed by deep and shallow trench isolations by ion implantation. This invention also provides a method of preventing the crosstalk current between adjacent word lines and bit lines of epitaxial diode arrays isolated by foregoing dual shallow trenches.Type: GrantFiled: June 23, 2011Date of Patent: July 2, 2013Assignee: Shanghai Institute of Microsystem and Information Technology, Chinese Academy of SciencesInventors: Chao Zhang, Zhitang Song, Xudong Wan, Bo Liu, Guanping Wu, Ting Zhang, Zuoya Yang, Zhifeng Xie
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Patent number: 8476094Abstract: A method for making light emitting diode, the method includes the following steps. First, a substrate having an epitaxial growth surface is provided. Second, a carbon nanotube layer is suspended above the epitaxial growth surface. Third, a first semiconductor layer, an active layer and a second semiconductor layer are grown on the epitaxial growth surface in that order. Fourth, a portion of the second semiconductor layer and the active layer is etched to expose a portion of the first semiconductor layer. Fifth, a first electrode is prepared on the first semiconductor layer and a second electrode is prepared on the second semiconductor layer.Type: GrantFiled: November 3, 2011Date of Patent: July 2, 2013Assignees: Tsinghua University, Hon Hai Precision Industry Co., Ltd.Inventors: Yang Wei, Shou-Shan Fan
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Patent number: 8476093Abstract: A method of manufacturing a display substrate includes forming a common electrode line, a gate line, a data line and a switching element connected to the gate and data lines on an insulation substrate. A first pixel electrode and an insulation layer are sequentially formed on the insulation substrate. A first photoresist pattern having a first hole and a second hole is formed from a first photoresist layer on the insulation substrate. A first transparent electrode layer is coated on the insulation substrate. A second photoresist layer is coated on the insulation substrate. The second photoresist layer is exposed and developed to form a second photoresist pattern remaining in the first hole and the second hole. The first transparent electrode layer is patterned using the second photoresist pattern, to form a second pixel electrode.Type: GrantFiled: June 22, 2011Date of Patent: July 2, 2013Assignee: Samsung Display Co., Ltd.Inventors: Jung-Soo Lee, Jeong-Min Park, Ji-Hyun Kim
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Patent number: 8476089Abstract: A method for manufacturing an LED package, comprising steps of: providing a substrate, the substrate forming a plurality of spaced rough areas on a surface thereof, each of the rough areas forming a rough structure thereon, a block layer being provided on a remaining part of the surface of the substrate relative to the rough areas; forming a metal layer on a top surface of each rough structure; forming a reflector on the substrate, the reflector defining a cavity and surrounding two adjacent metal layers; arranging an LED chip in the cavity, the LED chip electrically connecting to the two adjacent metal layers; forming an encapsulation layer in the cavity to seal the LED; and separating the substrate from the metal layers, the encapsulation layer and the reflector.Type: GrantFiled: April 23, 2012Date of Patent: July 2, 2013Assignee: Advanced Optoelectronic Technology, Inc.Inventor: Pin-Chuan Chen
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Publication number: 20130161584Abstract: A method is provided for fabricating a light emitting diode (LED) using three-dimensional gallium nitride (GaN) pillar structures with planar surfaces. The method forms a plurality of GaN pillar structures, each with an n-doped GaN (n-GaN) pillar and planar sidewalls perpendicular to the c-plane, formed in either an m-plane or a-plane family. A multiple quantum well (MQW) layer is formed overlying the n-GaN pillar sidewalls, and a layer of p-doped GaN (p-GaN) is formed overlying the MQW layer. The plurality of GaN pillar structures are deposited on a first substrate, with the n-doped GaN pillar sidewalls aligned parallel to a top surface of the first substrate. A first end of each GaN pillar structure is connected to a first metal layer. The second end of each GaN pillar structure is etched to expose the n-GaN pillar second end and connected to a second metal layer.Type: ApplicationFiled: February 6, 2012Publication date: June 27, 2013Inventors: Mark Albert CROWDER, Changqing ZHAN, Paul J. SCHUELE
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Patent number: 8460089Abstract: A triggering method for a win outcome on a gaming device includes determining an amount of credit on commencement of game play. A number of symbols displayed in the game is adjusted as a function of the amount bet, to thereby affect the probability of a win outcome being generated.Type: GrantFiled: April 27, 2009Date of Patent: June 11, 2013Assignee: Aristocrat Technologies Australia PTY LimitedInventor: Claudio Daniel Dias Pires
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Patent number: 8461040Abstract: A method of forming a shielded gate field effect transistor includes: forming a plurality of active gate trenches in a silicon region; lining lower sidewalls and bottom of the active gate trenches with a shield dielectric; using a CMP process, filling a bottom portion of the active gate trenches with a shield electrode comprising polysilicon; forming an interpoly dielectric (IPD) over the shield electrode in the active gate trenches; lining upper sidewalls of the active gate trenches with a gate dielectric; and forming a gate electrode over the IPD in an upper portion of the active gate trenches.Type: GrantFiled: March 7, 2011Date of Patent: June 11, 2013Assignee: Fairchild Semiconductor CorporationInventors: Thomas E. Grebs, Rodney S. Ridley, Nathan Lawrence Kraft
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Patent number: 8455282Abstract: A semiconductor light emitting diode (LED) and a manufacturing method thereof are disclosed. The method for manufacturing a semiconductor light emitting diode (LED) includes: forming a light emission structure including a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer on a substrate with prominences and depressions; removing the substrate from the light emission structure to expose a first concavoconvex portion corresponding to the prominences and depressions; forming a protection layer on the first concavoconvex portion; removing a portion of the protection layer to expose a convex portion of the first concavoconvex portion; and forming a second concavoconvex portion on the convex portion of the first concavoconvex portion.Type: GrantFiled: June 16, 2011Date of Patent: June 4, 2013Assignee: Samsung Electronics Co., Ltd.Inventors: Ki Sung Kim, Gi Bum Kim, Tae Hun Kim, Young Chul Shin, Young Sun Kim
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Patent number: 8440485Abstract: A method of making a LED includes following steps. A substrate is provided, and the substrate includes an epitaxial growth surface. A carbon nanotube layer is placed on the epitaxial growth surface. A first semiconductor layer, an active layer, and a second semiconductor layer are grown in that order on the substrate. A reflector and a first electrode are deposited on the second semiconductor layer in that order. The substrate is removed. A second electrode is deposited on the first semiconductor layer.Type: GrantFiled: November 3, 2011Date of Patent: May 14, 2013Assignees: Tsinghua University, Hon Hai Precision Industry Co., Ltd.Inventors: Yang Wei, Shou-Shan Fan
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Patent number: 8438710Abstract: A structure with an integrated circuit (IC) and a silicon condenser microphone mounted thereon includes a substrate having a first area and a second area. The IC is fabricated on the first area in order to form a conducting layer and an insulation layer. Both the conducting layer and the insulation layer further extend to the second area. The insulation layer is removed under low temperature in order to expose the conducting layer on which the silicon condenser microphone is fabricated. The silicon condenser microphone includes a first film layer, a connecting layer and a second film layer under a condition that the connecting layer connects the first and the second film layers. The first film layer and the second film layer act as two electrodes of a variable capacitance.Type: GrantFiled: August 11, 2009Date of Patent: May 14, 2013Inventor: Gang Li
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Patent number: 8440477Abstract: A method for manufacturing an LED (light emitting diode) includes following steps: providing a first electrode, a second electrode and a Zener diode, the Zener diode being electrically connected to the first and second electrodes; providing a mold; the first electrode, the second electrode and the Zener diode being received in the mold; injecting a liquid molding material into the mold, thereby integrally forming a base, a dam, and a reflective cup, the Zener diode being encapsulated in the dam; setting first and second LED chips respectively on the first and second electrodes; filling an encapsulation material in the reflective cup to encapsulate the first and second LED chips. The first and second LED chips are separated from each other by the dam.Type: GrantFiled: August 15, 2012Date of Patent: May 14, 2013Assignee: Advanced Optoelectronic Technology, Inc.Inventor: Hsing-Fen Lo
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Patent number: 8435815Abstract: A manufacturing method of a surface-emitting semiconductor laser includes the steps of: forming a stacked structure having a lower-multilayer film reflector including a lower oxidizable layer having at least one layer, an active layer having a light emitting region, an upper-multilayer film reflector including an upper oxidizable layer and an upper layer on a substrate in this order; providing a first groove in the upper layer; and providing a second groove including a portion overlapping the first groove in a planar shape and a portion not overlapping the first groove in the stacked structure.Type: GrantFiled: December 17, 2010Date of Patent: May 7, 2013Assignee: Sony CorporationInventors: Masaki Shiozaki, Osamu Maeda, Takahiro Arakida, Susumu Sato
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Patent number: 8435820Abstract: A circuit structure includes a substrate and a film over the substrate and including a plurality of portions allocated as a plurality of rows. Each of the plurality of rows of the plurality of portions includes a plurality of convex portions and a plurality of concave portions. In each of the plurality of rows, the plurality of convex portions and the plurality of concave portions are allocated in an alternating pattern.Type: GrantFiled: March 12, 2012Date of Patent: May 7, 2013Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chen-Hua Yu, Ding-Yuan Chen
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Patent number: 8435819Abstract: A method for making a light emitting diode, the method includes the following steps. First, a substrate having an epitaxial growth surface is provided. Second, a carbon nanotube layer is placed on the epitaxial growth surface. Third, a first semiconductor layer, an active layer and a second semiconductor layer are grown on the epitaxial growth surface. Fourth, a portion of the second semiconductor layer and the active layer is etched to expose a portion of the first semiconductor layer. Fifth, a first electrode is prepared on the first semiconductor layer and a second electrode is prepared on the second semiconductor layer. Sixth, the carbon nanotube layer is removed.Type: GrantFiled: November 3, 2011Date of Patent: May 7, 2013Assignees: Tsinghua University, Hon Hai Precision Industry Co., Ltd.Inventors: Yang Wei, Shou-Shan Fan
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Patent number: 8436395Abstract: According to one embodiment, a semiconductor light emitting device includes a stacked structure unit, a transparent, p-side and n-side electrodes. The unit includes n-type semiconductor layer, a light emitting portion provided on a part of the n-type semiconductor layer and p-type semiconductor layer provided on the light emitting portion. The transparent electrode is provided on the p-type semiconductor layer. The p-side electrode is provided on the transparent electrode. The n-side electrode is provided on the n-type semiconductor layer. The transparent electrode has a hole provided between the n-side and p-side electrodes. A width of the hole along an axis perpendicular to an axis from the p-side electrode toward the n-side electrode is longer than widths of the n-side and p-side electrodes. A distance between the hole and the n-side electrode is not longer than a distance between the hole and the p-side electrode.Type: GrantFiled: February 27, 2012Date of Patent: May 7, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Takahiro Sato, Shigeya Kimura, Taisuke Sato, Toshihide Ito, Koichi Tachibana, Shinya Nunoue
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Patent number: 8436389Abstract: The present invention relates to a light emitting device having a plurality of non-polar light emitting cells and a method of fabricating the same. Nitride semiconductor layers are disposed on a Gallium Nitride substrate having an upper surface. The upper surface is a non-polar or semi-polar crystal and forms an intersection angle with respect to a c-plane. The nitride semiconductor layers may be patterned to form light emitting cells separated from one another. When patterning the light emitting cells, the substrate may be partially removed in separation regions between the light emitting cells to form recess regions. The recess regions are filled with an insulating layer, and the substrate is at least partially removed by using the insulating layer.Type: GrantFiled: May 29, 2012Date of Patent: May 7, 2013Assignee: Seoul Opto Device Co., Ltd.Inventors: Kwang Choong Kim, Won Cheol Seo, Dae Won Kim, Dae Sung Kal, Kyung Hee Ye
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Patent number: 8435818Abstract: A method of fabricating a light emitting diode includes following steps. A substrate is provided, and the substrate includes an epitaxial growth surface. A carbon nanotube layer is located on the epitaxial growth surface. A first semiconductor layer, an active layer, and a second semiconductor layer grow in that order on the substrate. An upper electrode is deposited on the second semiconductor layer. The substrate is removed. A lower electrode is deposited on the first semiconductor layer.Type: GrantFiled: November 3, 2011Date of Patent: May 7, 2013Assignees: Tsinghua University, Hon Hai Precision Industry Co., Ltd.Inventors: Yang Wei, Shou-Shan Fan
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Publication number: 20130087759Abstract: Carbon-based light emitting diodes (LEDs) and techniques for the fabrication thereof are provided. In one aspect, a LED is provided. The LED includes a substrate; an insulator layer on the substrate; a first bottom gate and a second bottom gate embedded in the insulator layer; a gate dielectric on the first bottom gate and the second bottom gate; a carbon material on the gate dielectric over the first bottom gate and the second bottom gate, wherein the carbon material serves as a channel region of the LED; and metal source and drain contacts to the carbon material.Type: ApplicationFiled: October 11, 2011Publication date: April 11, 2013Applicant: International Business Machines CorporationInventors: Dechao Guo, Shu-Jen Han, Keith Kwong Hon Wong, Jun Yuan
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Patent number: 8415181Abstract: Provided is a light emitting element, a light emitting device including the same, and fabrication methods of the light emitting element and light emitting device. The light emitting device comprises a substrate, a light emitting structure including a first conductive layer of a first conductivity type, a light emitting layer, and a second conductive layer of a second conductivity type which are sequentially stacked, a first electrode which is electrically connected with the first conductive layer; and a second electrode which is electrically connected with the second conductive layer and separated apart from the first electrode, wherein at least a part of the second electrode is connected from a top of the light emitting structure, through a sidewall of the light emitting structure, and to a sidewall of the substrate.Type: GrantFiled: January 4, 2012Date of Patent: April 9, 2013Assignee: Samsung Electronics Co., Ltd.Inventors: Yu-Sik Kim, Seong-Deok Hwang, Seung-Jae Lee, Sun-Pil Youn
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Patent number: 8405068Abstract: A reflecting light emitting structure includes a substrate having a plurality of grooves formed in a first face of the substrate is disclosed. The first face is in a first crystallographic plane. Each of the plurality of grooves includes a first sidewall that is coplanar with a second crystallographic plane and a second sidewall that is coplanar with a third crystallographic plane. A buffer layer is provided on the substrate to reduce mechanical strain between the substrate and a light emitting diode (LED) fabricated on the buffer layer.Type: GrantFiled: July 22, 2010Date of Patent: March 26, 2013Assignee: RFMD (UK) LimitedInventor: Matthew Francis O'Keefe
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Publication number: 20130062657Abstract: A light-emitting diode structure is disclosed. A substrate has a first semiconductor layer, a light-emitting layer and a second semiconductor layer formed thereon. The first and second semiconductor layers are of opposite conductivity types. A first contact electrode is disposed between the first semiconductor layer and the substrate, and has a protruding portion extending into the second semiconductor layer. A barrier layer is conformally formed on the first contact electrode and exposes a top surface of the protruding portion. A current blocking member is disposed on the barrier layer and around at least a sidewall of the protruding portion. A second contact electrode is disposed between the first semiconductor layer and the first contact electrode, and in direct contact with the first semiconductor layer, wherein the second contact electrode is electrically insulated from the first contact electrode by the barrier layer.Type: ApplicationFiled: September 13, 2012Publication date: March 14, 2013Applicant: LEXTAR ELECTRONICS CORPORATIONInventors: Kuo-Lung Fang, Jui-Yi Chu, Jun-Rong Chen, Chi-Wen Kuo
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Patent number: 8389303Abstract: A method of manufacturing an organic EL element having a corrugated structure, the organic EL element comprising a transparent supporting substrate, a transparent electrode, an organic layer, and a metal electrode, the method comprises the steps of: laminating on the transparent supporting substrate a curable-resin layer having concavity and convexity formed thereon in a periodic arrangement in a way that a curable resin is applied onto the transparent supporting substrate, the curable resin is then cured with a master block being pressed thereto, and thereafter the master block is detached; and obtaining an organic EL element by laminating on the curable-resin layer the transparent electrode, the organic layer, and the metal electrode individually so that a shape of the concavity and convexity formed on a surface of the curable-resin layer can be maintained.Type: GrantFiled: July 25, 2008Date of Patent: March 5, 2013Assignees: Tokyo Institute of Technology, Nippon Oil CorporationInventors: Hideo Takezoe, Fumito Araoka, Soon Moon Jeong, Suzushi Nishimura, Goro Suzaki
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Publication number: 20130049015Abstract: A light emitting diode (LED) is disclosed. The LED includes a substrate, a first semiconductor layer, an active layer, a second semiconductor layer, and a patterned structure. The first semiconductor layer having first and second regions is positioned on the substrate, wherein the first region is thicker than the second region. The active layer is positioned on the first region of the first semiconductor layer. The second semiconductor layer is positioned on the active layer, wherein the first and second semiconductor layers have opposite conductivities. The patterned structure is formed on a sidewall of the first region of the first semiconductor layer or on a sidewall of the second semiconductor layer.Type: ApplicationFiled: August 22, 2012Publication date: February 28, 2013Applicant: LEXTAR ELECTRONICS CORPORATIONInventors: Kuo-Lung Fang, Jui-Yi Chu
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Patent number: 8381387Abstract: An ultrasonic transducer fabrication method including: depositing a conductive material on an insulating layer, partially etching the conductive material to form lower electrodes; depositing an insulating material to cover the lower electrodes to form a first insulating layer and depositing a sacrificial material thereon, performing etching, to create cavities and a channel-shaped sacrificial layer to communicate the cavities; depositing an insulating material on the first insulating layer to form a second insulating layer; partially etching the second insulating layer to form holes; etching and removing the sacrificial layer through the holes to form the cavities and channels; depositing a conductive material on the second insulating layer to plug the holes and form a conductive film; partially etching the conductive film to form upper electrodes and sealing portions which plug the holes; and forming a protective film on the second insulating layer to cover the upper electrodes and the sealing portions.Type: GrantFiled: October 28, 2010Date of Patent: February 26, 2013Assignees: Olympus Medical Systems Corp., Olympus CorporationInventors: Kazuya Matsumoto, Ryo Ohta, Mamoru Hasegawa, Hideo Adachi, Katsuhiro Wakabayashi
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Patent number: 8384112Abstract: A light emitting chip includes a substrate, a reflective layer, a light emitting structure and a first electrode having a base formed between the reflective layer and the substrate. The light emitting structure includes a first semiconductor layer, an active layer and a second semiconductor layer. The first electrode further includes a connecting section extending upwardly from the base. An electrically insulating ion region is defined in the light emitting structure and extends from an upper surface of the base to the first semiconductor layer. A receiving groove is defined in the ion region and extends upwardly from the upper surface of the base to the first semiconductor layer. The connecting section is positioned in the receiving groove and electrically connects with the first semiconductor layer.Type: GrantFiled: October 28, 2011Date of Patent: February 26, 2013Assignee: Hon Hai Precision Industry Co., Ltd.Inventor: Jian-Shihn Tsang
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Publication number: 20130045556Abstract: A device includes a textured substrate having a trench extending from a top surface of the textured substrate into the textured substrate, wherein the trench comprises a sidewall and a bottom. A light-emitting device (LED) includes an active layer over the textured substrate. The active layer has a first portion parallel to the sidewall of the trench and a second portion parallel to the bottom of the trench.Type: ApplicationFiled: October 1, 2012Publication date: February 21, 2013Applicant: TSMC Solid State Lighting Ltd.Inventor: TSMC Solid State Lighting Ltd.
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Patent number: 8377796Abstract: A method of forming a circuit structure includes providing a substrate; forming recesses in the substrate; forming a mask layer over the substrate, wherein the mask layer covers non-recessed portions of the substrate, with the recesses exposed through openings in the mask layer; forming a buffer/nucleation layer on exposed portions of the substrate in the recesses; and growing a group-III group-V (III-V) compound semiconductor material from the recesses until portions of the III-V compound semiconductor material grown from the recesses join each other to form a continuous III-V compound semiconductor layer.Type: GrantFiled: August 11, 2009Date of Patent: February 19, 2013Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chia-Lin Yu, Chen-Hua Yu, Ding-Yuan Chen, Wen-Chih Chiou
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Patent number: 8375560Abstract: A method for manufacturing a condenser microphone includes forming a diaphragm module using microelectromechanical system (MEMS) techniques. The diaphragm module includes a diaphragm that is deformable by energy of sound waves, and a diaphragm spacer that extends from one side of the diaphragm and controls a tension of the diaphragm. The method further includes providing a backplate with vent holes, aligning the vent holes of the backplate with a central region of the diaphragm, and connecting the backplate to the diaphragm spacer to construct a transducer unit. The diaphragm spacer, the diaphragm and the backplate cooperate to form an air chamber in fluid communication with an environment external to the condenser microphone. The backplate and the diaphragm cooperate to form a condenser. The method further includes enclosing the transducer unit in a housing that includes a shell and a circuit board to form the condenser microphone.Type: GrantFiled: February 22, 2011Date of Patent: February 19, 2013Assignee: Taiwan Carol Electronics Co., Ltd.Inventors: Jean-Yih Tsai, Chung-Ching Lai, Chao-Chih Chang
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Patent number: 8368087Abstract: A light emitting device having a vertical structure and a method for manufacturing the same, which are capable of increasing light extraction efficiency, are disclosed. The method includes forming a light extraction layer on a substrate, forming a plurality of semiconductor layers on the light extraction layer, forming a first electrode on the semiconductor layers, forming a support layer on the first electrode, removing the substrate, and forming a second electrode on a surface from which the substrate is removed.Type: GrantFiled: March 16, 2010Date of Patent: February 5, 2013Assignees: LG Electronics Inc., LG Innotek Co., Ltd.Inventors: Jun Ho Jang, Yong Tae Moon
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Patent number: 8368183Abstract: A nitride semiconductor device is provided that prevents development of cracks, that has nitride semiconductor thin films with uniform thicknesses and good growth surface flatness, and is thus consistent in characteristics, and that can be fabricated at a satisfactory yield. In this nitride semiconductor device, the nitride semiconductor thin films are grown on a substrate having an off-angle between a direction normal to the surface of ridges and the crystal direction <0001>. This helps either reduce or intentionally promote diffusion or movement of the atoms or molecules of a source material of the nitride semiconductor thin films through migration thereof. As a result, a nitride semiconductor growth layer with good surface flatness can be formed, and thus a nitride semiconductor device with satisfactory characteristics can be obtained.Type: GrantFiled: November 1, 2005Date of Patent: February 5, 2013Assignee: Sharp Kabushiki KaishaInventors: Eiji Yamada, Takeshi Kamikawa, Masahiro Araki
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Patent number: 8367447Abstract: A method for making a light emitting diode comprises the following steps. First, a substrate having an epitaxial growth surface is provided. Second, a carbon nanotube layer is located on the epitaxial growth surface. Third, a first semiconductor layer, an active layer, and a second semiconductor layer is grown on the epitaxial growth surface. Fourth, a portion of the second semiconductor layer and the active layer is etched to expose a portion of the first semiconductor layer. Fifth, a first electrode is electrically connected to the first semiconductor layer, and a second electrode electrically is connected to the second semiconductor layer.Type: GrantFiled: November 3, 2011Date of Patent: February 5, 2013Assignees: Tsinghua University, Hon Hai Precision Industry Co., Ltd.Inventors: Yang Wei, Shou-Shan Fan
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Patent number: 8367446Abstract: A method for preparing patterned substrate by using nano- or micro-particles is disclosed, which comprises the following steps: (A) providing a substrate with a photoresist layer formed thereon; (B) coating a surface of the photoresist layer with plural nano- or micro-particles, to form a particle layer; (C) exposing and developing the photoresist layer to obtain a patterned photoresist layer; and (D) removing the particle layer. In addition, after the particle layer is removed, the method of the present invention further comprises: (E1) using the patterned photoresist layer as an etching template to etch the substrate; and (E2) removing the patterned photoresist layer to obtain a patterned substrate with plural cavities formed thereon.Type: GrantFiled: May 18, 2010Date of Patent: February 5, 2013Assignee: National Central UniversityInventors: Chia-Hua Chan, Chia-Hung Hou, Tsing-Jen Chen, Chii-Chang Chen
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Patent number: 8357557Abstract: One aspect of the present invention provides a semiconductor light-emitting device improved in luminance, and also provides a process for production thereof. The process comprises a procedure of forming a relief structure on the light-extraction surface of the device by use of a self-assembled film. In that procedure, the light-extraction surface is partly covered with a protective film so as to protect an area for an electrode to be formed therein. The electrode is then finally formed there after the procedure. The process thus reduces the area incapable, due to thickness of the electrode, of being provided with the relief structure. Between the electrode and the light-extraction surface, a contact layer is formed so as to establish ohmic contact between them.Type: GrantFiled: March 4, 2010Date of Patent: January 22, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Akira Fujimoto, Ryota Kitagawa, Koji Asakawa, Hidefumi Yasuda, Yasuhiko Akaike, Takeyuki Suzuki