Groove Formation Patents (Class 438/42)
  • Patent number: 8354289
    Abstract: A method for manufacturing a gallium nitride (GaN) wafer is provided. In the method for manufacturing the GaN wafer according to an embodiment, an etch stop layer is formed on a substrate, and a first GaN layer is formed on the etch stop layer. A portion of the first GaN layer is etched with a silane gas, and a second GaN layer is formed on the etched first GaN layer. A third GaN layer is formed on the second GaN layer.
    Type: Grant
    Filed: February 1, 2011
    Date of Patent: January 15, 2013
    Assignee: LG Siltron Inc.
    Inventors: Yong-Jin Kim, Dong-Kun Lee, Doo-Soo Kim, Ho-Jun Lee, Kye-Jin Lee
  • Publication number: 20130005065
    Abstract: Solid state lighting (“SSL”) devices with cellular arrays and associated methods of manufacturing are disclosed herein. In one embodiment, a light emitting diode includes a semiconductor material having a first surface and a second surface opposite the first surface. The semiconductor material has an aperture extending into the semiconductor material from the first surface. The light emitting diode also includes an active region in direct contact with the semiconductor material, and at least a portion of the active region is in the aperture of the semiconductor material.
    Type: Application
    Filed: September 12, 2012
    Publication date: January 3, 2013
    Applicant: Micron Technology, Inc.
    Inventors: Scott Sills, Lifang Xu, Scott Schellhammer, Thomas Gehrke, Zaiyuan Ren, Anton De Villiers
  • Publication number: 20130001508
    Abstract: An LED comprises a substrate, a buffer layer, an epitaxial layer and a conductive layer. The epitaxial layer comprises a first N-type epitaxial layer, a second N-type epitaxial layer, and a blocking layer with patterned grooves sandwiched between the first and second N-type epitaxial layers. The first and second N-type epitaxial layers make contact each other via the patterned grooves. Therefore, the LED enjoys a uniform current distribution and a larger light emitting area. A manufacturing method for the LED is also provided.
    Type: Application
    Filed: February 19, 2012
    Publication date: January 3, 2013
    Applicant: ADVANCED OPTOELECTRONIC TECHNOLOGY, INC.
    Inventors: YA-WEN LIN, SHIH-CHENG HUANG, PO-MIN TU, CHIA-HUNG HUANG, SHUN-KUEI YANG
  • Patent number: 8343424
    Abstract: A device includes first and second material facing towards each other as to form at least one focusing microstructure with a focal point located outside of the first material.
    Type: Grant
    Filed: December 15, 2006
    Date of Patent: January 1, 2013
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Peter Dirksen, Yuri Aksenov, Fredericus Christiaan Van Den Heuvel, Johannes Arnoldus Jacobus Maria Kwinten
  • Patent number: 8344392
    Abstract: A light-emitting element includes a light-emitting stack includes: a first semiconductor layer; an active layer formed on the first semiconductor layer; and a second semiconductor layer formed on the active layer; a recess structure formed through the second semiconductor layer, the active layer, and extended in the first semiconductor layer, wherein the first semiconductor layer includes a contact region defined by the recess structure; a first electrode structure including a first contact portion on the contact region of the first semiconductor layer, and a second contact portion laterally extended from the first contact portion into the first semiconductor layer; and a dielectric layer formed on side surfaces of the second semiconductor layer and the active layer to insulate the second semiconductor layer and the active layer from the first contact portion.
    Type: Grant
    Filed: May 12, 2011
    Date of Patent: January 1, 2013
    Assignee: Epistar Corporation
    Inventors: Jui Hung Yeh, Chun Kai Wang, Wei Yu Yen, Yu Yao Lin, Chien Fu Shen, De Shan Kuo, Ting Chia Ko
  • Publication number: 20120319081
    Abstract: The present invention relates to a multi-luminous element and a method for manufacturing the same. The present invention provides the multi-luminous element comprising: a buffer layer disposed on a substrate; a first type semiconductor layer disposed on the buffer layer; a first active layer which is disposed on the first type semiconductor layer and is patterned to expose a part of the first type semiconductor layer; a second active layer disposed on the first type semiconductor layer which is exposed by the first active layer; and a second type semiconductor layer disposed on the first active layer and the second active layer, the first and second active layers being repeatedly disposed in the horizontal direction, and the method for manufacturing the same.
    Type: Application
    Filed: March 15, 2011
    Publication date: December 20, 2012
    Applicant: KOREA PHOTONICS TECHNOLOGY INSTITUTE
    Inventors: Seong Ran Jeon, Jae Bum Kim, Seung Jae Lee
  • Patent number: 8329481
    Abstract: A manufacturing method of nitride semiconductor light emitting elements, which can reliably form a mechanically stable wiring electrode leading from a light emitting element surface. A structure protective sacrifice layer is formed around a first electrode layer on a device structure layer beforehand, and after separation of the device structure layer into respective portions for the light emitting elements, the resultant is stuck to a support substrate. Subsequently, forward tapered grooves reaching the structure protective sacrifice layer are formed, and the inverse tapered portion formed outward of the forward tapered groove is lifted off in a lift-off step. Thus, an insulating layer is formed on the forward tapered side walls of the light emitting element, and a wiring electrode layer electrically connected to the second electrode layer on the principal surface of the light emitting element is formed on the insulating layer.
    Type: Grant
    Filed: February 9, 2012
    Date of Patent: December 11, 2012
    Assignee: Stanley Electric Co., Ltd.
    Inventor: Mamoru Miyachi
  • Patent number: 8324083
    Abstract: A method for producing a Group III nitride compound semiconductor element includes growing an epitaxial layer containing a Group III nitride compound semiconductor using a different kind of substrate as an epitaxial growth substrate, adhering a supporting substrate to the top surface of the epitaxial growth layer through a conductive layer, and then removing the epitaxial growth substrate by laser lift-off. Before adhesion of the epitaxial layer and the supporting substrate, a first groove that at least reaches an interface between the bottom surface of the epitaxial layer and the epitaxial growth substrate from the top surface of the epitaxial layer formed on the epitaxial growth substrate and acts as an air vent communicating with the outside of a wafer when the epitaxial layer and the supporting substrate are joined to each other.
    Type: Grant
    Filed: September 29, 2009
    Date of Patent: December 4, 2012
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Toshiya Uemura, Masanobu Ando, Tomoharu Shiraki, Masahiro Ohashi, Naoki Arazoe, Ryohei Inazawa
  • Patent number: 8319249
    Abstract: A semiconductor light emitting device and corresponding method of manufacture, where the semiconductor light emitting device includes a light emitting structure, a second electrode layer, an insulating layer, and a protrusion. The light emitting structure comprises a second conductive semiconductor layer, an active layer under the second conductive semiconductor layer, and a first conductive semiconductor layer under the active layer. The second electrode layer is formed on the light emitting structure. The insulating layer is formed along the circumference of the top surface of the light emitting structure. The protrusion protrudes from the undersurface of the insulating layer to the upper part of the first conductive semiconductor layer.
    Type: Grant
    Filed: December 16, 2010
    Date of Patent: November 27, 2012
    Assignee: LG Innotek Co., Ltd.
    Inventor: Hwan Hee Jeong
  • Patent number: 8314443
    Abstract: A device includes a semiconductor structure comprising a light emitting layer disposed between an n-type region and a p-type region. The semiconductor structure includes an n-contact region and a p-contact region. A cross section of the n-contact region comprises a plurality of first regions wherein portions of the light emitting layer and p-type region are removed to expose the n-type region. The plurality of first regions are separated by a plurality of second regions wherein the light emitting layer and p-type region remain in the device. The device further includes a first metal contact formed over the semiconductor structure in the p-contact region and a second metal contact formed over the semiconductor structure in the n-contact region. The second metal contact is in electrical contact with at least one of the second regions in the n-contact region.
    Type: Grant
    Filed: May 2, 2012
    Date of Patent: November 20, 2012
    Assignees: Koninklijke Philips Electronics N.V., Philips Lumileds Lighting Company LLC
    Inventor: John E Epler
  • Patent number: 8309381
    Abstract: A method for producing a light-emitting device including a growth substrate made of Group III nitride semiconductor, and a Group III nitride semiconductor layer stacked on the top surface of the growth substrate, includes forming, between the growth substrate and the semiconductor layer, a stopper layer exhibiting resistance to a wet etchant, and wet-etching the bottom surface of the growth substrate until the stopper layer is exposed.
    Type: Grant
    Filed: September 30, 2009
    Date of Patent: November 13, 2012
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Miki Moriyama, Koichi Goshonoo
  • Patent number: 8309972
    Abstract: Aspects include electrodes that provide specified reflectivity attributes for light generated from an active region of a Light Emitting Diode (LED). LEDs that incorporate such electrode aspects. Other aspects include methods for forming such electrodes, LEDs including such electrodes, and structures including such LEDs.
    Type: Grant
    Filed: January 25, 2012
    Date of Patent: November 13, 2012
    Assignee: Bridgelux, Inc.
    Inventors: Frank T. Shum, William W. So, Steven D. Lester
  • Patent number: 8304273
    Abstract: The present invention provides a method to eliminate undesired parallel conductive paths of nanogap devices for aqueous sensing. The method involves the electrical insulation of an electrode pair, except for the nanogap region wherein electrical response is measured. The magnitude of undesired ionic current in a measurement is reduced by two orders of magnitude. The process to accomplish the present invention is self-aligned and avoids fabrication complexity. The invention has a great potential in nanogap device applications.
    Type: Grant
    Filed: January 23, 2009
    Date of Patent: November 6, 2012
    Assignee: Massachusetts Institute of Technology
    Inventors: Francesco Stellacci, J Robert Barsotti, Jr., Zhang Huijuan, John Thong
  • Patent number: 8304334
    Abstract: Favorable-quality III-V crystals are easily obtained at low cost without causing cracks, even when using a variety of substrates, and can be used to manufacture semiconductor devices with good quality and at high yields. The III-V crystals are characterized by the following properties: the carrier concentration, resistivity, and dislocation density of the III-V compound crystal are uniform to within ±30% variation along the surface; the III-V compound crystal is misoriented from the c-plane such that the crystal surface does not include any region where its off-axis angle with the c-plane is 0°; and the full width at half-maximum in XRD at the crystal center of the III-V compound is not greater than 150 arcsec.
    Type: Grant
    Filed: February 7, 2012
    Date of Patent: November 6, 2012
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Seiji Nakahata, Koji Uematsu, Ryu Hirota
  • Patent number: 8304800
    Abstract: A light emitting device includes a substrate, a light emitting structure including a first conductive semiconductor layer having an exposed region, an active layer, and a second conductive semiconductor layer on the substrate, a first electrode on the exposed region of the first conductive semiconductor layer, and a second electrode on the second conductive semiconductor layer, wherein a side of the light emitting structure includes a first sloped side sloped from a reference plane, the first sloped side includes a concave-convex pattern having a concave-convex structure in which a first direction length is greater than a second direction length, the reference plane is a plane perpendicular to a direction in which the substrate faces the light emitting structure, and the first direction is a sloped direction of the first sloped side and the second direction is a lateral direction of the first sloped side.
    Type: Grant
    Filed: April 8, 2011
    Date of Patent: November 6, 2012
    Assignee: LG Innotek Co., Ltd.
    Inventors: Hee Young Beom, Sung Kyoon Kim
  • Publication number: 20120276672
    Abstract: A method for making a light emitting diode comprises the following steps. First, a substrate having an epitaxial growth surface is provided. Second, a carbon nanotube layer is located on the epitaxial growth surface. Third, a first semiconductor layer, an active layer, and a second semiconductor layer is grown on the epitaxial growth surface. Fourth, a portion of the second semiconductor layer and the active layer is etched to expose a portion of the first semiconductor layer. Fifth, a first electrode is electrically connected to the first semiconductor layer, and a second electrode electrically is connected to the second semiconductor layer.
    Type: Application
    Filed: November 3, 2011
    Publication date: November 1, 2012
    Applicants: HON HAI PRECISION INDUSTRY CO., LTD., TSINGHUA UNIVERSITY
    Inventors: YANG WEI, SHOU-SHAN FAN
  • Publication number: 20120276670
    Abstract: A method of fabricating a light emitting diode includes following steps. A substrate is provided, and the substrate includes an epitaxial growth surface. A carbon nanotube layer is located on the epitaxial growth surface. A first semiconductor layer, an active layer, and a second semiconductor layer grow in that order on the substrate. An upper electrode is deposited on the second semiconductor layer. The substrate is removed. A lower electrode is deposited on the first semiconductor layer.
    Type: Application
    Filed: November 3, 2011
    Publication date: November 1, 2012
    Applicants: HON HAI PRECISION INDUSTRY CO., LTD., TSINGHUA UNIVERSITY
    Inventors: YANG WEI, SHOU-SHAN FAN
  • Publication number: 20120276673
    Abstract: A method for making a light emitting diode, the method includes the following steps. First, a substrate having an epitaxial growth surface is provided. Second, a carbon nanotube layer is placed on the epitaxial growth surface. Third, a first semiconductor layer, an active layer and a second semiconductor layer are grown on the epitaxial growth surface. Fourth, a portion of the second semiconductor layer and the active layer is etched to expose a portion of the first semiconductor layer. Fifth, a first electrode is prepared on the first semiconductor layer and a second electrode is prepared on the second semiconductor layer. Sixth, the carbon nanotube layer is removed.
    Type: Application
    Filed: November 3, 2011
    Publication date: November 1, 2012
    Applicants: HON HAI PRECISION INDUSTRY CO., LTD., TSINGHUA UNIVERSITY
    Inventors: YANG WEI, SHOU-SHAN FAN
  • Publication number: 20120276671
    Abstract: A method of making a LED includes following steps. A substrate with an epitaxial growth surface is provided. A carbon nanotube layer is placed on the epitaxial growth surface. A semiconductor epitaxial layer is grown on the epitaxial growth surface, and the semiconductor epitaxial layer includes an N-type semiconductor layer, an active layer, a P-type semiconductor layer. The semiconductor epitaxial layer is etched to expose part of the carbon nanotube layer. A first electrode is formed on a surface of the semiconductor epitaxial layer which is away from the substrate. A second electrode is formed to electrically connect with the part of the carbon nanotube layer which is exposed.
    Type: Application
    Filed: November 3, 2011
    Publication date: November 1, 2012
    Applicants: HON HAI PRECISION INDUSTRY CO., LTD., TSINGHUA UNIVERSITY
    Inventors: YANG WEI, SHOU-SHAN FAN
  • Patent number: 8294171
    Abstract: Disclosed are a light emitting device having a plurality of non-polar light emitting cells and a method of fabricating the same. This method comprises preparing a first substrate of sapphire or silicon carbide having an upper surface with an r-plane, an a-plane or an m-plane. The first substrate has stripe-shaped anti-growth patterns on the upper surface thereof, and recess regions having sidewalls of a c-plane between the anti-growth patterns. Nitride semiconductor layers are grown on the substrate having the recess regions, and the nitride semiconductor layers are patterned to form the light emitting cells separated from one another. Accordingly, there is provided a light emitting device having non-polar light emitting cells with excellent crystal quality.
    Type: Grant
    Filed: January 6, 2012
    Date of Patent: October 23, 2012
    Assignee: Seoul Opto Device Co., Ltd.
    Inventors: Won Cheol Seo, Kwang Choong Kim, Kyung Hee Ye
  • Patent number: 8288185
    Abstract: Provided are a semiconductor device and a method of forming the same. According to the method, a first buried oxide layer is locally formed in a semiconductor substrate and a core semiconductor pattern of a line form, a pair of anchor-semiconductor patterns and a support-semiconductor pattern are formed by patterning a semiconductor layer on the first buried oxide layer to expose the first buried oxide layer. The pair of anchor-semiconductor patterns contact both ends of the core semiconductor pattern, respectively, and the support-semiconductor pattern contacts one sidewall of the core semiconductor pattern, the first buried oxide layer below the core semiconductor pattern is removed. At this time, a portion of the first buried oxide layer below each of the anchor-semiconductor patterns and a portion of the first buried oxide layer below the support-semiconductor pattern remain. A second buried oxide layer is formed to fill a region where the first buried oxide layer below the core semiconductor pattern.
    Type: Grant
    Filed: May 27, 2010
    Date of Patent: October 16, 2012
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: In Gyoo Kim, Dae Seo Park, Jun Taek Hong, Gyungock Kim
  • Publication number: 20120258558
    Abstract: Provided is a semiconductor laser, wherein (?a??w) >15 (nm) and Lt<25 (?m), where ?w is the wavelength of light corresponding to the band gap of the active layer disposed at a position within a distance of 2 ?m from one end surface in a resonator direction, ?a is the wavelength of light corresponding to the band gap of the active layer disposed at a position that is spaced a distance of equal to or more than ( 3/10)L and ?( 7/10)L from the one end surface in a resonator direction, “L” is the resonator length, and “Lt” is the length of a transition region provided between the position of the active layer with a band gap corresponding to a light wavelength of ?w+2 (nm) and the position of the active layer with a band gap corresponding to a light wavelength of ?a?2 (nm) in the resonator direction.
    Type: Application
    Filed: June 19, 2012
    Publication date: October 11, 2012
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Kentaro TADA, Kenji ENDO, Kazuo FUKAGAI, Tetsuro OKUDA, Masahide KOBAYASHI
  • Patent number: 8283677
    Abstract: A nitride semiconductor light-emitting device includes a substrate (101) made of silicon, a mask film (102) made of silicon oxide, formed on a principal surface of the substrate (101), and having at least one opening (102a), a seed layer (104) made of GaN selectively formed on the substrate (101) in the opening (102a), an LEG layer (105) formed on a side surface of the seed layer (104), and an n-type GaN layer (106), an active layer (107), and a p-type GaN layer (108) which are formed on the LEG layer (105). The LEG layer (105) is formed by crystal growth using an organic nitrogen material as a nitrogen source.
    Type: Grant
    Filed: February 2, 2009
    Date of Patent: October 9, 2012
    Assignee: Panasonic Corporation
    Inventors: Toshiyuki Takizawa, Tetsuzo Ueda, Manabu Usuda
  • Patent number: 8273584
    Abstract: A semiconductor device including a wafer-level LED includes a semiconductor structure coupled to first and second electrodes. The semiconductor includes a P-doped portion of a first layer to an N-doped portion of a second layer. The first layer includes a surface configured to emit light. The first electrode is electrically coupled to the P-doped portion of the first layer on a first side of the semiconductor structure. The first side is adjacent to the surface that is configured to emit the light. The second electrode is electrically coupled to the N-doped portion of the second layer on a second side of the semiconductor structure. The second side is also adjacent to the surface that configured to emit light.
    Type: Grant
    Filed: December 22, 2010
    Date of Patent: September 25, 2012
    Assignee: Infineon Technologies AG
    Inventors: Chiang Chau Fatt, Kuek Hsieh Ting
  • Publication number: 20120236895
    Abstract: A split ring-resonator includes a substrate, an inner-trench or cavity formed into the substrate, the inner trench or cavity including a split, and an outer trench or cavity formed into the substrate around the inner trench or cavity, the outer trench or cavity including another split disposed at an opposite end of the split in the inner trench or cavity, wherein the inner trench or cavity and the outer trench or cavity are configured to receive an electrically conductive gas and/or plasma to form a split-ring resonator,
    Type: Application
    Filed: March 15, 2011
    Publication date: September 20, 2012
    Applicant: MILES TECHNOLOGIES, LLC
    Inventor: Patrick Allen Miles
  • Patent number: 8269306
    Abstract: A dielectric liner is formed in first and second trenches respectively in first and second portions of a substrate. A layer of material is formed overlying the dielectric liner so as to substantially concurrently substantially fill the first trench and partially fill the second trench. The layer of material is removed substantially concurrently from the first and second trenches to expose substantially all of the dielectric liner within the second trench and to form a plug of the material in the one or more first trenches. A second layer of dielectric material is formed substantially concurrently on the plug in the first trench and on the exposed portion of the dielectric liner in the second trench. The second layer of dielectric material substantially fills a portion of the first trench above the plug and the second trench.
    Type: Grant
    Filed: October 11, 2010
    Date of Patent: September 18, 2012
    Assignee: Micron Technology, Inc.
    Inventor: Sukesh Sandhu
  • Publication number: 20120228599
    Abstract: This invention relates to an organic electroluminescent device (1) produced with less effort comprising a substrate (2), a substrate electrode (3) on top of the substrate (2), an electroluminescent layer stack (4) with at least one organic light emitting layer on top of the substrate electrode (3), a counter electrode (5) at least covering the electroluminescent layer stack (4), and a short prevention layer (6) covering the counter electrode (5) establishing a double layer (DL) of counter electrode (5) and short prevention layer (6), and an electrically isolating layer at least partly on top of the short prevention layer, where a tensile stress (TS) is induced to the double layer (DL) by the short prevention layer (5) suitable to roll-up (10) the double layer (DL) after deposition of the electrically isolating layer (8) adjacent to a cut introduced at least to the double layer (DL) in an area, where the double layer (DL) is arranged on top of the electroluminescent layer stack (4) suitable to electrically dis
    Type: Application
    Filed: November 17, 2010
    Publication date: September 13, 2012
    Applicant: KONINKLIJKE PHILIPS ELECTRONICS, N.V.
    Inventor: Herbert F. Boerner
  • Patent number: 8258537
    Abstract: Provided is a technique of effectively extracting the beams of light excited in an LED light emitter other than the light beams emitted from a light-emitting region in the direction of a light-extraction surface. A pit with a tapered sidewall is formed in a substrate. A thin-film semiconductor element is attached to the pit. Light beams emitted from a side surface of the thin-film semiconductor element are reflected by the sidewall of the thin-film semiconductor element. Achieved thereby is effective extraction of light beams other than the light beams emitted from the light-emitting region in the direction of the light-extraction surface.
    Type: Grant
    Filed: March 4, 2009
    Date of Patent: September 4, 2012
    Assignee: Oki Data Corporation
    Inventors: Tomoki Igari, Tomohiko Sagimori, Mitsuhiko Ogihara, Takahito Suzuki, Hiroyuki Fujiwara, Hironori Furuta, Yusuke Nakai
  • Patent number: 8260151
    Abstract: An integrated circuit die has a transistor circuitry section for implementing information handling operations. Optical circuitry is within the single semiconductor die. The optical circuitry includes a laser transmitter and is operably coupled to the transistor circuitry section. The transistor circuitry section originates information. The optical circuitry transmits the information in a laser beam through a wave guide to the edge of the integrated circuit die.
    Type: Grant
    Filed: April 18, 2008
    Date of Patent: September 4, 2012
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Perry H. Pelley, Dennis C. Hartman
  • Publication number: 20120213241
    Abstract: A broad stripe laser (1) comprising an epitaxial layer stack (2), which contains an active, radiation-generating layer (21) and has a top side (22) and an underside (23). The layer stack (2) has trenches (3) in which at least one layer of the layer stack (2) is at least partly removed and which lead from the top side (22) in the direction of the underside (23). The layer stack (2) has on the top side ridges (4) each adjoining the trenches (3), such that the layer stack (2) is embodied in striped fashion on the top side. The ridges (4) and the trenches (3) respectively have a width (d1, d2) of at most 20 ?m.
    Type: Application
    Filed: June 28, 2010
    Publication date: August 23, 2012
    Applicant: OSRAM OPTO SEMICONDUCTORS GMBH
    Inventors: Alfred Lell, Stefanie Rammelsberger
  • Publication number: 20120196396
    Abstract: A method for fabricating a light emitting diode (LED) chip is provided. First, a substrate is provided. A buffer layer is formed on the substrate. The buffer layer is patterned to form a plurality of recesses on a surface thereof. A first type semiconductor layer is formed on the surface of the buffer layer. A portion of the surface where the first type semiconductor layer and the buffer layer are in contact constitutes a bonding surface, and voids exist between the buffer layer and the first type semiconductor layer. An active layer and a second type semiconductor layer are formed on the first type semiconductor layer in sequence. A second electrode is formed on the second type semiconductor layer. A lift-off process is performed to separate the first type semiconductor layer and the buffer layer.
    Type: Application
    Filed: January 19, 2012
    Publication date: August 2, 2012
    Applicant: WALSIN LIHWA CORP
    Inventors: Ming-Teng Kuo, Chang-Ho Chen
  • Publication number: 20120194103
    Abstract: Solid state lighting (SSL) devices (e.g., devices with light emitting diodes) with reduced dimensions (e.g., thicknesses) and methods of manufacturing are disclosed herein. In one embodiment, an SSL device includes an SSL structure having a first region and a second region laterally spaced apart from the first region and an insulating material between and electrically isolating the first and second regions. The SSL device also includes a conductive material between the first and second regions and adjacent the insulating material to electrically couple the first and second regions in series.
    Type: Application
    Filed: January 28, 2011
    Publication date: August 2, 2012
    Applicant: MICRON TECHNOLOGY, INC.
    Inventor: Vladimir Odnoblyudov
  • Patent number: 8232571
    Abstract: Disclosed are a light emitting device having a plurality of light emitting cells and a method of fabricating the same. The light emitting device comprises a plurality of light emitting cells positioned on a substrate to be spaced apart from one another. Each of the light emitting cells comprises a first conductive-type upper semiconductor layer, an active layer and a second conductive-type lower semiconductor layer. Electrodes are positioned between the substrate and the light emitting cells, and each of the electrodes has an extension extending toward adjacent one of the light emitting cells. An etching prevention layer is positioned in regions between the light emitting cells and between the electrodes. Each wire has one end connected to the upper semiconductor layer and the other end connected to the electrode through the etching prevention layer.
    Type: Grant
    Filed: November 23, 2009
    Date of Patent: July 31, 2012
    Assignee: Seoul Opto Device Co., Ltd.
    Inventor: Won Cheol Seo
  • Patent number: 8227277
    Abstract: A method of fabricating a group-III nitride semiconductor laser device includes: preparing a substrate of a hexagonal group-III nitride semiconductor, where the substrate has a semipolar primary surface; forming a substrate product having a laser structure, an anode electrode and a cathode electrode, where the laser structure includes the substrate and a semiconductor region, and where the semiconductor region is formed on the semipolar primary surface; scribing a first surface of the substrate product in part in a direction of the a-axis of the hexagonal group-III nitride semiconductor; and carrying out breakup of the substrate product by press against a second surface of the substrate product, to form another substrate product and a laser bar.
    Type: Grant
    Filed: October 20, 2011
    Date of Patent: July 24, 2012
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Yusuke Yoshizumi, Yohei Enya, Takashi Kyono, Masahiro Adachi, Katsushi Akita, Masaki Ueno, Takamichi Sumitomo, Shinji Tokuyama, Koji Katayama, Takao Nakamura, Takatoshi Ikegami
  • Patent number: 8227820
    Abstract: A semiconductor light-emitting diode, and method of fabricating same, wherein an indium (In)-containing light-emitting layer, as well as subsequent device layers, is deposited on a textured surface. The resulting device is a phosphor-free white light source.
    Type: Grant
    Filed: February 9, 2005
    Date of Patent: July 24, 2012
    Assignee: The Regents of the University of California
    Inventors: Rajat Sharma, Paul Morgan Pattison, John Francis Kaeding, Shuji Nakamura
  • Patent number: 8222662
    Abstract: An LED package structure includes a transparent substrate having a supporting face and a light-emergent face opposite to the supporting face, a housing disposed on the supporting face, two electrodes disposed on the housing, an LED chip disposed on the supporting face and electrically connected to the two electrodes, a reflecting layer covering the LED chip to reflect light emitted by the LED chip toward the transparent substrate, and a phosphor layer formed on the light-emergent face of the substrate. The phosphor layer includes a plurality of layers each having a specific light wavelength conversion range to generate a light with a predetermined color.
    Type: Grant
    Filed: December 21, 2010
    Date of Patent: July 17, 2012
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Chia-Hui Shen, Tzu-Chien Hung, Jian-Shihn Tsang
  • Patent number: 8218919
    Abstract: A MEMS-based display device is described, wherein an array of interferometric modulators are configured to reflect light through a transparent substrate. The transparent substrate is sealed to a backplate and the backplate may contain electronic circuitry fabricated on the backplane. The electronic circuitry is placed in electrical communication with the array of interferometric modulators and is configured to control the state of the array of interferometric modulators.
    Type: Grant
    Filed: January 3, 2012
    Date of Patent: July 10, 2012
    Assignee: QUALCOMM MEMS Technologies, Inc.
    Inventor: Karen Tyger
  • Patent number: 8211724
    Abstract: The present invention relates to a light emitting device having a plurality of non-polar light emitting cells and a method of fabricating the same. Nitride semiconductor layers are disposed on a Gallium Nitride substrate having an upper surface. The upper surface is a non-polar or semi-polar crystal and forms an intersection angle with respect to a c-plane. The nitride semiconductor layers may be patterned to form light emitting cells separated from one another. When patterning the light emitting cells, the substrate may be partially removed in separation regions between the light emitting cells to form recess regions. The recess regions are filled with an insulating layer, and the substrate is at least partially removed by using the insulating layer.
    Type: Grant
    Filed: November 23, 2009
    Date of Patent: July 3, 2012
    Assignee: Seoul Opto Device Co., Ltd.
    Inventors: Kwang Choong Kim, Won Cheol Seo, Dae Won Kim, Dae Sung Kal, Kyung Hee Ye
  • Patent number: 8211722
    Abstract: A flip-chip LED fabrication method includes the steps of (a) providing a GaN epitaxial wafer, (b) forming a first groove in the GaN epitaxial layer, (c) forming a second groove in the GaN epitaxial layer to expose a part of the N-type GaN ohmic contact layer of the GaN epitaxial layer, (d) forming a translucent conducting layer on the epitaxial layer, (e) forming a P-type electrode pad and an N-type electrode pad on the translucent conducting layer, (f) forming a first isolation protection layer on the P-type electrode pad, the N-type electrode pad, the first groove and the second groove, (g) forming a metallic reflection layer on the first isolation protection layer, (h) forming a second isolation protection layer on the first isolation protection layer and the metallic reflection layer, (i) forming a third groove to expose one lateral side of the N-type electrode pad, (j) separating the processed GaN epitaxial wafer into individual GaN LED chips, and (k) bonding at least one individual GaN LED chip thus obt
    Type: Grant
    Filed: June 21, 2011
    Date of Patent: July 3, 2012
    Inventor: Lien-Shine Lu
  • Publication number: 20120153339
    Abstract: A light-emitting diode chip structure including a conductive substrate, a semiconductor stacking layer and a patterned seed crystal layer is provided. The conductive substrate has a surface. The surface has a first region and a second region alternately distributed over the surface. The semiconductor stacking layer is disposed on the conductive substrate, and the surface of the conductive substrate faces the semiconductor stacking layer. The patterned seed crystal layer is disposed on the first region of the surface of the conductive substrate and between the conductive substrate and the semiconductor stacking layer. The patterned seed crystal layer separates the semiconductor stacking layer from the first region. The semiconductor stacking layer covers the patterned seed crystal layer and the second region, and is electrically connected to the conductive substrate through the second region. A fabrication method of the light-emitting diode chip structure is also provided.
    Type: Application
    Filed: March 17, 2011
    Publication date: June 21, 2012
    Applicant: Lextar Electronics Corporation
    Inventors: JUN-RONG CHEN, CHI-WEN KUO, KUN-FU HUANG, JUI-YI CHU, KUO-LUNG FANG
  • Patent number: 8198177
    Abstract: Seeds are implanted in a regular pattern upon an undersubstrate. An AlxInyGa1-x-yN (0?x?1, 0?y?1, 0<x+y?1) mixture crystal is grown on the seed implanted undersubstrate by a facet growth method. The facet growth makes facet pits above the seeds. The facets assemble dislocations to the pit bottoms from neighboring regions and make closed defect accumulating regions (H) under the facet bottoms. The closed defect accumulating regions (H) arrest dislocations permanently. Release of dislocations, radial planar defect assemblies and linear defect assemblies are forbidden. The surrounding accompanying low dislocation single crystal regions (Z) and extra low dislocation single crystal regions (Y) are low dislocation density single crystals.
    Type: Grant
    Filed: October 25, 2011
    Date of Patent: June 12, 2012
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Seiji Nakahata, Ryu Hirota, Kensaku Motoki, Takuji Okahisa, Kouji Uematsu
  • Publication number: 20120142133
    Abstract: A method for fabricating a semiconductor lighting chip includes steps of providing a substrate with an epitaxial layer thereon. The epitaxial layer comprises a first semiconductor layer, an active layer and a second semiconductor layer successively grown on the substrate. The epitaxial layer has dislocation defects traversing the first semiconductor layer, the active layer and the second semiconductor layer. The epitaxial layer is then subjected to an etching process which remove parts of the second semiconductor layer and the active layer along the dislocation defects to form recesses recessing from the second semiconductor layer to the active layer. Thereafter a first electrode and a second electrode are formed on the first semiconductor layer and the second semiconductor layer, respectively.
    Type: Application
    Filed: August 17, 2011
    Publication date: June 7, 2012
    Applicant: ADVANCED OPTOELECTRONIC TECHNOLOGY, INC.
    Inventors: PO-MIN TU, SHIH-CHENG HUANG
  • Patent number: 8193479
    Abstract: An image sensor formed in a semiconductor stack of a lower region of a first conductivity type and of an upper region of a second conductivity type, including: a photodiode formed of a first portion of the stack; a read area formed of a second portion of the stack; a trench with insulated walls filled with a conductive material, the trench surrounding the photodiode and the read area and being interrupted, all along its height, on a portion facing the photodiode and the read area; and first connection mechanism associated with the conductive material of the trench and capable of being connected to a reference bias voltage.
    Type: Grant
    Filed: April 24, 2009
    Date of Patent: June 5, 2012
    Assignee: STMicroelectronics (Crolles 2) SAS
    Inventors: François Roy, Benoît Ramadout
  • Patent number: 8193018
    Abstract: A method of patterning a substrate that includes locating a single mask film over the substrate and forming first opening portions in first locations in the mask film. First electrical materials are deposited over the substrate and mask film to form patterned areas in the first locations. Second opening portions are formed in second locations different from the first locations in the mask film. Subsequently, second electrical materials are deposited over the substrate and mask film to form patterned areas in the first and second locations.
    Type: Grant
    Filed: January 10, 2008
    Date of Patent: June 5, 2012
    Assignee: Global OLED Technology LLC
    Inventor: Ronald S. Cok
  • Patent number: 8188508
    Abstract: A device includes a semiconductor structure comprising a light emitting layer disposed between an n-type region and a p-type region. The semiconductor structure includes an n-contact region and a p-contact region. A cross section of the n-contact region comprises a plurality of first regions wherein portions of the light emitting layer and p-type region are removed to expose the n-type region. The plurality of first regions are separated by a plurality of second regions wherein the light emitting layer and p-type region remain in the device. The device further includes a first metal contact formed over the semiconductor structure in the p-contact region and a second metal contact formed over the semiconductor structure in the n-contact region. The second metal contact is in electrical contact with at least one of the second regions in the n-contact region.
    Type: Grant
    Filed: December 6, 2011
    Date of Patent: May 29, 2012
    Assignees: Koninklijke Philips Electronics N.V., Philips Lumileds Lighting Company, LLC
    Inventor: John E. Epler
  • Patent number: 8188487
    Abstract: A surface emitting laser includes a lower multilayer mirror, an active layer, and an upper multilayer mirror stacked onto a substrate. A first current confinement layer having a first electrically conductive region and a first insulating region is formed above or below the active layer using a first trench structure. A second current confinement layer having a second electrically conductive region and a second insulating region is formed above or below the first current confinement layer using a second trench structure. The first and second trench structures extend from a top surface of the upper multilayer mirror towards the substrate such that the second trench structure surrounds the first trench structure. When the surface emitting laser is viewed in an in-plane direction of the substrate, a boundary between the first electrically conductive region and the first insulating region is disposed inside the second electrically conductive region.
    Type: Grant
    Filed: July 15, 2010
    Date of Patent: May 29, 2012
    Assignee: Canon Kabushiki Kaisha
    Inventor: Mitsuhiro Ikuta
  • Patent number: 8183072
    Abstract: Disclosed are a light emitting device having a plurality of non-polar light emitting cells and a method of fabricating the same. This method comprises preparing a first substrate of sapphire or silicon carbide having an upper surface with an r-plane, an a-plane or an m-plane. The first substrate has stripe-shaped anti-growth patterns on the upper surface thereof, and recess regions having sidewalls of a c-plane between the anti-growth patterns. Nitride semiconductor layers are grown on the substrate having the recess regions, and the nitride semiconductor layers are patterned to form the light emitting cells separated from one another. Accordingly, there is provided a light emitting device having non-polar light emitting cells with excellent crystal quality.
    Type: Grant
    Filed: November 23, 2009
    Date of Patent: May 22, 2012
    Assignee: Seoul Opto Device Co., Ltd.
    Inventors: Won Cheol Seo, Kwang Choong Kim, Kyung Hee Ye
  • Publication number: 20120119246
    Abstract: The present disclosure relates to structures of LED components that integrate thermoelectric devices with LEDs on LED emitter substrates for cooling the LEDs. The present disclosure also related to methods for integrating LED dies with thermoelectric elements. The LED component includes an LED emitter substrate with a cavity in a downward facing surface of the LED emitter substrate and thermal vias that extend from a bottom of the cavity to an area close to an upward facing surface of the LED emitter substrate. The device also includes thermoelectric elements disposed in the cavity where the thermoelectric elements connect with their corresponding thermal vias. The device further includes a thermoelectric substrate in the cavity to electrically connect to the thermoelectric elements. The device further includes an LED die on the upward facing surface of the LED emitter substrate such that the LED die is opposite the cavity.
    Type: Application
    Filed: November 15, 2010
    Publication date: May 17, 2012
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chih-Kuang Yu, Hsing-Kuo Hsia
  • Patent number: 8168457
    Abstract: A shaped article comprising a plurality of semiconductor nanocrystals. Devices incorporating shaped articles are also provided. Methods of manufacturing shaped articles by various molding processes are also provided.
    Type: Grant
    Filed: January 8, 2009
    Date of Patent: May 1, 2012
    Assignee: Nanoco Technologies, Ltd.
    Inventor: Jennifer Z. Gilles
  • Patent number: 8159000
    Abstract: Disclosed is a light emitting diode (LED) package having an array of light emitting cells coupled in series. The LED package comprises a package body and an LED chip mounted on the package body. The LED chip has an array of light emitting cells coupled in series. Since the LED chip having the array of light emitting cells coupled in series is mounted on the LED package, it can be driven directly using an AC power source.
    Type: Grant
    Filed: June 14, 2011
    Date of Patent: April 17, 2012
    Assignee: Seoul Semiconductor Co., Ltd.
    Inventors: Chung Hoon Lee, Keon Young Lee, Hong San Kim, Dae Won Kim, Hyuck Jung Choi