Assembly Of Plural Semiconductor Substrates Patents (Class 438/67)
  • Publication number: 20140290719
    Abstract: A method of manufacturing a solar module is described. The method enables a semiconductor element to be mounted onto a load-bearing member early on in the manufacturing process without any undesired effects during later processing.
    Type: Application
    Filed: July 26, 2012
    Publication date: October 2, 2014
    Inventors: Guy Beaucarne, Ann Walstrom Norris, Jonathan Govaerts, Frederic Dross
  • Publication number: 20140261628
    Abstract: A solar receiver includes at least two electrically independent photovoltaic cells which are stacked. An inter-cell interface between the photovoltaic cells includes a multi-layer dielectric stack. The multi-layer dielectric stack includes at least two dielectric layers having different refractive indices. Related devices and fabrication methods are also discussed.
    Type: Application
    Filed: March 14, 2014
    Publication date: September 18, 2014
    Applicant: Semprius, Inc.
    Inventors: Matthew Meitl, Etienne Menard, Christopher Bower
  • Patent number: 8837141
    Abstract: An electronic module comprises: a multilayer circuit board having a bifurcated area along one edge and a plurality of electronic components mounted on at least one surface; a plurality of electrode pads functionally connected to the electronic components and positioned on the inner surfaces of the bifurcated area so that when the two legs of the bifurcated area are spread apart by about 180° the electrode pads align with respective contacts on a motherboard, and are connectable thereto, so that a secure connection may be created between the circuit board and the motherboard; and, two metal, heat spreading covers lockably enclosing the circuit board, one on either side, the covers further providing mating surfaces upon which a mechanical clamping device can engage and secure the module to a motherboard.
    Type: Grant
    Filed: October 17, 2012
    Date of Patent: September 16, 2014
    Assignee: Microelectronics Assembly Technologies
    Inventors: James E. Clayton, Zakaryae Fathi
  • Publication number: 20140251409
    Abstract: A solar cell module in the present invention includes: a wiring member electrically connecting solar cell elements to each other; and a structure in which a solder bonding portion is formed by bonding a collecting electrode, which is provided on a light receiving surface of the solar cell element, extends in a first direction parallel to the wiring member, and has a width smaller than that of the wiring member in a cross section vertical to the first direction, and the wiring member together by melting solder, a cross-sectional shape of the solder bonding portion vertical to the first direction has a shape that gradually narrows toward the collecting electrode from a lower surface of the wiring member, and a side surface of the solder bonding portion and a side surface of the wiring member are covered with a thermosetting resin.
    Type: Application
    Filed: October 17, 2012
    Publication date: September 11, 2014
    Applicant: Mitsubishi Electric Corporation
    Inventors: Tsuneo Hamaguchi, Yoshimi Yabugaki, Daisuke Echizenya, Jun Fujita, Tomoo Takayama, Shinsuke Miyamoto
  • Patent number: 8828778
    Abstract: A method of forming a longitudinally continuous photovoltaic (PV) module includes arranging strips of thin-film PV material to be spaced apart from and substantially parallel to each other. The method also includes laminating a bottom layer to a first surface of the strips of thin-film PV material, the bottom layer including multiple bottom layer conductive strips. The method also includes laminating a top layer to a second surface of the strips of thin-film PV material opposite the first surface, the top layer including multiple top layer conductive strips. Laminating the bottom layer to the first surface and laminating the top layer to the second surface includes serially and redundantly interconnecting the strips of thin-film PV material together by connecting each one of the strips of thin-film PV material to a different one of the bottom layer conductive strips and a different one of the top layer conductive strips.
    Type: Grant
    Filed: May 31, 2012
    Date of Patent: September 9, 2014
    Assignee: Tenksolar, Inc.
    Inventor: Dallas W. Meyer
  • Patent number: 8829333
    Abstract: A highly reliable solar cell module and method for manufacturing same are disclosed. The solar cell module is provided with first and second solar cell elements, each of which has a semiconductor substrate and an output taking out electrode; a circuit film which electrically connects together the first solar cell element and the second solar cell element; and a sealing material disposed between the circuit film and the second surface of the first and the second solar cell elements. The sealing material has a through hole, and the circuit film has: a base sheet having a protruding section which protrudes toward the second surface of the solar cell element; and a wiring conductor which electrically connects the output taking out electrode of the first solar cell element and the output taking out electrode of the second solar cell element.
    Type: Grant
    Filed: February 24, 2011
    Date of Patent: September 9, 2014
    Assignee: KYOCERA Corporation
    Inventors: Mitsuo Yamashita, Takeshi Kyouda
  • Patent number: 8822325
    Abstract: A chip package and a fabrication method thereof are provided according to an embodiment of the invention. The chip package includes a semiconductor substrate containing a chip and having a device area and a peripheral bonding pad area. A plurality of conductive pads is disposed at the peripheral bonding pad area and a passivation layer is formed over the semiconductor substrate to expose the conductive pads. An insulating protective layer is formed on the passivation layer at the device area. A packaging layer is disposed over the insulating protective layer to expose the conductive pads and the passivation layer at the peripheral bonding pad area. The method includes forming an insulating protective layer to cover a plurality of conductive pads during a cutting process and removing the insulating protective layer on the conductive pads through an opening of a packaging layer.
    Type: Grant
    Filed: August 2, 2013
    Date of Patent: September 2, 2014
    Inventors: Ching-Yu Ni, Chia-Ming Cheng, Nan-Chun Lin
  • Publication number: 20140230878
    Abstract: The invention relates to a method for metallizing and connecting solar cell substrates and to a photovoltaic module made of several metallized solar cells that are electrically connected to one another. According to the invention, a solar cell substrate, in which second metal layers forming electrical metal contacts are optionally provided, is attached to a carrier substrate, on the surface of which at least one first metal layer is formed in a suitable pattern. By localized irradiation of the metal layer with laser radiation through the solar cell substrate or the carrier substrate, energy is introduced such that the metal layer is heated by absorbed laser radiation for an irreversible bonding to the adjacent surface of the solar cell substrate. By the laser bonding of the metal layer on the carrier substrate to the solar cell substrate, solar cells can be connected to form a photovoltaic module.
    Type: Application
    Filed: June 13, 2012
    Publication date: August 21, 2014
    Applicant: INSTITUT FÜR SOLARENERGIEFORSCHUNG GMBH
    Inventors: Henning Schulte-Huxel, Susanne Blankemeyer, Rolf Brendel, Robert Bock, Thorsten Dullweber, Nils-Peter Harder, Carsten Hampe, Yevgeniya Larionova
  • Patent number: 8809078
    Abstract: A self-powered circuit package includes a substrate and an integrated circuit (IC). The IC is mounted on a surface of the substrate. An electrical interconnector electrically couples the IC to the substrate. A solar cell is provided having opposing first and second main surfaces. A portion of the first main surface of the solar cell is configured to receive light from an external source. The solar cell converts energy of the received light into electrical power. The solar cell is disposed above the IC and electrically connected to the IC by way of the substrate to supply the generated power to the IC. A clear mold compound encapsulates a surface of the substrate, the IC, the electrical interconnector, and the solar cell.
    Type: Grant
    Filed: February 13, 2013
    Date of Patent: August 19, 2014
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Teck Beng Lau, Wai Yew Lo, Boon Yew Low, Chin Teck Siong
  • Publication number: 20140225212
    Abstract: An optical sensor chip device and a corresponding production method. The optical sensor chip device includes a substrate having a front side and a rear side; at least one first optical sensor chip for acquiring a first optical spectral range, the chip being attached to the substrate; and a first sealed cavern fashioned above an upper side of the first optical sensor chip. The first optical sensor chip is situated on a first side of the first cavern, and a first optical device is situated on an opposite, second side of the first cavern.
    Type: Application
    Filed: February 11, 2014
    Publication date: August 14, 2014
    Applicant: ROBERT BOSCH GMBH
    Inventors: Axel KASCHNER, Michael KRUEGER
  • Patent number: 8796066
    Abstract: Substrates for solar cells are prepared by etching a plurality of metallurgical grade wafers; depositing aluminum layer on backside of each wafer; depositing a layer of hydrogenated silicon nitride on front surface of each wafer; annealing the wafers at elevated temperature; removing the hydrogenated silicon nitride without disturbing the aluminum layer. A solar cell is then fabricated on the front surface of the wafer while the aluminum remain to serve as the back contact of the cell.
    Type: Grant
    Filed: August 24, 2010
    Date of Patent: August 5, 2014
    Assignee: Sunpreme, Inc.
    Inventors: Ashok Sinha, Wen Ma
  • Patent number: 8790949
    Abstract: A solid state imaging device includes: a substrate; a photoelectric conversion unit that is formed on the substrate to generate and accumulate signal charges according to light quantity of incident light; a vertical transmission gate electrode that is formed to be embedded in a groove portion formed in a depth direction from one side face of the substrate according to a depth of the photoelectric conversion unit; and an overflow path that is formed on a bottom portion of the transmission gate to overflow the signal charges accumulated in the photoelectric conversion unit.
    Type: Grant
    Filed: December 13, 2013
    Date of Patent: July 29, 2014
    Assignee: Sony Corporation
    Inventor: Ryosuke Nakamura
  • Publication number: 20140196767
    Abstract: A photovoltaic module assembly is mounted on a frame of a racking system of a photovoltaic module installation site. The photovoltaic module assembly includes at least one photovoltaic module and at least one rash. The photovoltaic module includes a back sheet, at least one crystalline silicon photovoltaic cell supported on the back sheet, a first encapsulant layer formed from a silicone composition supported on the photovoltaic cell, and a cover sheet supported on the first encapsulant layer. The rail is fixed relative to the back sheet and is configured to support the one photovoltaic module on the racking system. Adhesive adheres the back sheet of the photovoltaic module to the rail. The adhesive is formed from a room-temperature vulcanizing silicone composition and has a thickness from the rail to the back sheet of between 2.3 mm and 6.0 mm.
    Type: Application
    Filed: June 1, 2012
    Publication date: July 17, 2014
    Applicant: DOW CORNING CORPORATION
    Inventors: Kevin Houle, Elizabeth Knazs, Brandy Knutson, David McDougall
  • Publication number: 20140196766
    Abstract: A solar panel is described. The solar panel has at least a) a support layer, b) a first intermediate layer, arranged on top of the support layer, c) at least one crystalline solar cell, arranged on top of the intermediate layer, d) a second intermediate layer, arranged on top of the crystalline solar cell, e) a front pane from glass having a thickness of 0.85 to 2.8 mm, arranged on top of the second intermediate layer, and f) an edge reinforcing structure. The edge reinforcing structure projects from the front pane by a height of at least 0.5 mm and has at least one drain channel in every corner of the solar panel. The drain channel connects the interior and the exterior of the edge reinforcing structure.
    Type: Application
    Filed: March 30, 2012
    Publication date: July 17, 2014
    Inventors: Holger Schumacher, Hans-Werner Kuster, Dang Cuong Phan
  • Patent number: 8778718
    Abstract: Disclosed are a method of manufacturing a dye sensitized solar battery and a solar battery assembling apparatus. The method includes: forming electrode pads on electrodes of respective solar battery sub modules; applying a conductive adhesive on the electrode; and overlapping the electrodes of the solar battery sub modules, applying a current to the electrode pads, and then heating and hardening the conductive adhesive.
    Type: Grant
    Filed: November 2, 2012
    Date of Patent: July 15, 2014
    Assignee: Electronics and Telecommunications Research Institute
    Inventor: Moo Jung Chu
  • Patent number: 8779281
    Abstract: A solar cell includes a semi-conductive substrate, a doping layer, an anti-reflection layer, an electrode, a passivation stacked layer and a contact layer. The semi-conductive substrate has a front and a back surface. The doping layer is disposed on the front surface. The anti-reflection layer is disposed on the doping layer. The electrode is disposed on the anti-reflection layer and electrically connected to the doping layer. The passivation stacked layer is disposed on the back surface and has a first dielectric layer, a second dielectric layer and a middle dielectric layer sandwiched between the first and the second dielectric layer. The dielectric constant of the middle dielectric layer is substantially lower than the dielectric constant of the first dielectric layer and the dielectric constant of the second dielectric layer. The contact layer covers the passivation stacked layer and electrically contacts with the back surface of the semi-conductive substrate.
    Type: Grant
    Filed: May 4, 2011
    Date of Patent: July 15, 2014
    Assignee: Au Optronics Corporation
    Inventors: Yen-Cheng Hu, Peng Chen, Tsung-Pao Chen, Shuo-Wei Liang, Zhen-Cheng Wu, Chien-Jen Chen
  • Publication number: 20140191350
    Abstract: An image sensor chip package is disclosed, which includes a substrate, an image sensor component formed on the substrate, a spacer formed on the substrate and surrounding the image sensor component, and a transparent plate. A stress notch is formed on a side of the transparent plate, and a breaking surface is extended from the stress notch. A method for fabricating the image sensor chip package is also disclosed.
    Type: Application
    Filed: January 8, 2014
    Publication date: July 10, 2014
    Applicant: XINTEC INC.
    Inventors: Chih-Hao CHEN, Bai-Yao LOU, Shih-Kuang CHEN
  • Patent number: 8773583
    Abstract: Disclosed herein is a semiconductor device including: a first semiconductor chip having an electronic circuit section and a first connecting section formed on one surface thereof; a second semiconductor chip having a second connecting section formed on one surface thereof, the second semiconductor chip being mounted on the first semiconductor chip with the first and the second connecting sections connected to each other by a bump; a dam formed to fill a gap between the first and the second semiconductor chips on a part of an outer edge of the second semiconductor chip, the part of the outer edge being on a side of a region of formation of the electronic circuit section; and an underfill resin layer filled into the gap, protrusion of the resin layer from the outer edge of the second semiconductor chip to a side of the electronic circuit section being prevented by the dam.
    Type: Grant
    Filed: April 14, 2011
    Date of Patent: July 8, 2014
    Assignee: Sony Corporation
    Inventors: Satoru Wakiyama, Hiroshi Ozaki
  • Publication number: 20140184807
    Abstract: Various techniques are provided for implementing a segmented focal plane array (FPA) of infrared sensors. In one example, a system includes a segmented FPA. The segmented FPA includes a top die having an array of infrared sensors (e.g., bolometers). The top die may also include a portion of a read-out integrated circuit (ROIC). The segmented FPA also includes a bottom die having at least a portion of the ROIC. The top and the bottom dies are electrically coupled via inter-die connections. Advantageously, the segmented FPA may be fabricated with a higher yield and a smaller footprint compared with conventional FPA architectures. Moreover, the segmented FPA may be fabricated using different semiconductor processes for each die.
    Type: Application
    Filed: December 13, 2013
    Publication date: July 3, 2014
    Applicant: FLIR Systems, Inc.
    Inventors: Brian Simolon, Eric A. Kurth, Mark Nussmeier, Nicholas Högasten, Theodore R. Hoelter, Katrin Strandemar, Pierre Boulanger, Barbara Sharp
  • Patent number: 8766085
    Abstract: A photoelectric conversion device is provided in which a first photoelectric conversion module having a plurality of first photoelectric conversion elements formed on one surface of a first translucent insulated substrate and a second photoelectric conversion module having a plurality of photoelectric conversion elements formed on one surface of a second translucent insulated substrate are bonded together with the first photoelectric conversion elements and the second photoelectric conversion elements placed on an inner side. The photoelectric conversion device includes a plurality of photoelectric conversion element pairs formed by electrically connecting, in series, the first photoelectric conversion elements and the second photoelectric conversion elements arranged in positions opposed to each other. All the photoelectric conversion element pairs are electrically connected in series.
    Type: Grant
    Filed: March 16, 2010
    Date of Patent: July 1, 2014
    Assignee: Mitsubishi Electric Corporation
    Inventors: Hidetada Tokioka, Hiroya Yamarin, Tae Orita
  • Publication number: 20140175592
    Abstract: A CMOS type semiconductor image sensor module wherein a pixel aperture ratio is improved, chip use efficiency is improved and furthermore, simultaneous shutter operation by all the pixels is made possible, and a method for manufacturing such semiconductor image sensor module are provided. The semiconductor image sensor module is provided by stacking a first semiconductor chip, which has an image sensor wherein a plurality of pixels composed of a photoelectric conversion element and a transistor are arranged, and a second semiconductor chip, which has an A/D converter array. Preferably, the semiconductor image sensor module is provided by stacking a third semiconductor chip having a memory element array. Furthermore, the semiconductor image sensor module is provided by stacking the first semiconductor chip having the image sensor and a fourth semiconductor chip having an analog nonvolatile memory array.
    Type: Application
    Filed: February 28, 2014
    Publication date: June 26, 2014
    Applicant: SONY CORPORATION
    Inventors: Shin Iwabuchi, Makoto Motoyoshi
  • Publication number: 20140174505
    Abstract: The disclosure provides a solar cell encapsulating module including a first substrate, a first encapsulating material layer, a metal particle layer, multiple solar cells, a routing layer, a second encapsulating material layer and a second substrate. The first substrate is formed from a light transmittance material. The first encapsulating material layer is formed on the first substrate. The metal particle layer is formed on the first encapsulating material layer. The solar cells are disposed on the metal particle layer. The routing layer is disposed on the solar cells for being electrically connected to the plurality of solar cells. The second encapsulating material layer is formed on the routing layer. The second substrate is disposed on the second encapsulating material layer. The routing layer is disposed on only one side of the solar cells.
    Type: Application
    Filed: April 19, 2013
    Publication date: June 26, 2014
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventor: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
  • Patent number: 8753913
    Abstract: A method for fabricating an integrated device, the method including, overlying a first crystalline layer onto a second crystalline layer to form a combined layer, wherein one of the first and second crystalline layers is an image sensor layer and at least one of the first and second crystalline layers has been transferred by performing an atomic species implantation, and wherein at least one of the first and second crystalline layers includes single crystal transistors.
    Type: Grant
    Filed: March 16, 2012
    Date of Patent: June 17, 2014
    Assignee: Monolithic 3D Inc.
    Inventors: Zvi Or-Bach, Deepak C. Sekar
  • Patent number: 8753957
    Abstract: This invention relates to a method for producing solar cells, and photovoltaic panels thereof. The method for producing solar panels comprises employing a number of semiconductor wafers and/or semiconductor sheets of films prefabricated to prepare them for back side metallization, which are placed and attached adjacent to each other and with their front side facing downwards onto the back side of the front glass, before subsequent processing that includes depositing at least one metal layer covering the entire front glass including the back side of the attached wafers/sheets of films. The metallic layer is then patterned/divided into electrically isolated contacts for each solar cell and into interconnections between adjacent solar cells.
    Type: Grant
    Filed: April 2, 2009
    Date of Patent: June 17, 2014
    Assignee: Rec Solar Pte. Ltd.
    Inventors: Martin Nese, Erik Sauar, Andreas Bentzen, Paul Alan Basore
  • Publication number: 20140157693
    Abstract: A solar panel is described. The solar panel has at least a support layer and, arranged one on top of the other, a first intermediate layer, at least one solar cell, a second intermediate layer, and a front pane. The solar panel also has a first edge reinforcing layer and a second edge reinforcing layer, at least one terminal housing, and at least two collecting conductors which connect the solar cell to the terminal housing in an electrically conductive manner. The support layer has a portion that projects over the periphery of the front pane. The first edge reinforcing layer is arranged above the peripheral projection and has a cutout. The second edge reinforcement layer is arranged above the first edge reinforcement layer and has an opening. The collecting conductor is located in a cut-out section and in an opening.
    Type: Application
    Filed: April 3, 2012
    Publication date: June 12, 2014
    Inventor: Holger Schumacher
  • Patent number: 8741694
    Abstract: Embodiments of the present disclosure describe semiconductor device packaging techniques and devices that incorporate a heat spreader into the insulating material of a packaged semiconductor device. In one embodiment, a device comprising a semiconductor device is coupled to a substrate, and insulating material covers (i) a portion of the semiconductor device and (ii) a portion of the substrate. The device also comprises a heat spreader embedded in the insulating material and the heat spreader is isolated from the substrate at least in part by the insulating material.
    Type: Grant
    Filed: November 8, 2013
    Date of Patent: June 3, 2014
    Assignee: Marvell International Ltd.
    Inventors: Chender Chen, Chenglin Liu, Shiann-Ming Liou
  • Patent number: 8735206
    Abstract: A method includes a first bonding step of bonding a first main surface of a first solar cell and one side portion of a first wiring member to each other in such a way that the first main surface of the first solar cell and the one side portion are heated and pressed against each other by heated first and second tools in a state where the first main surface of the first solar cell and the one side portion face each other with the resin adhesive interposed therebetween. The first bonding step is performed with the first tool disposed in such a way that, in an extending direction of the first wiring member, both end portions of the first tool are located outside both ends of a portion of the first wiring member, the portion facing the first solar cell with the resin adhesive interposed therebetween.
    Type: Grant
    Filed: February 19, 2013
    Date of Patent: May 27, 2014
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Koutarou Sumitomo, Tomonori Tabe
  • Patent number: 8735198
    Abstract: One embodiment of the present application includes a multisensor assembly. This assembly has an electromechanical motion sensor member defined with one wafer layer, a first sensor carried with a first one or two or more other wafer layers, and a second sensor carried with a second one of the other wafer layers. The one wafer layer is positioned between the other wafer layers to correspondingly enclose the sensor member within a cavity of the assembly.
    Type: Grant
    Filed: December 6, 2005
    Date of Patent: May 27, 2014
    Assignee: NXP, B.V.
    Inventors: Padraig O'Mahony, Frank Caris, Theo Kersjes, Christian Paquet
  • Patent number: 8729384
    Abstract: A solar cell module includes a plurality of solar cells each including a substrate, an emitter region positioned at a back surface of the substrate, first electrodes electrically connected to the emitter region, second electrodes electrically connected to the substrate, a first current collector connecting the first electrodes, and a second current collector connecting the second electrodes, and a first connector connecting a first current collector of a first solar cell of the plurality of solar cells to a second current collector of a second solar cell adjacent to the first solar cell. The first current collector of the first solar cell and the second current collector of the second solar cell have a different polarity.
    Type: Grant
    Filed: January 3, 2012
    Date of Patent: May 20, 2014
    Assignee: LG Electronics Inc.
    Inventors: Myungjun Shin, Haejong Cho, Minho Choi, Seongeun Lee
  • Publication number: 20140134777
    Abstract: Provided is a method for manufacturing solar modules with an improved yield. A heat and pressure applying step is performed in which an opposing solar cell (10) and wiring member (11) with a resin adhesive (21) interposed between them are heated while applying pressure. After the heat and pressure applying step has been performed, a cooling step is performed in which the solar cell (10) and the wiring member (11) are cooled while applying pressure.
    Type: Application
    Filed: January 20, 2014
    Publication date: May 15, 2014
    Applicant: Sanyo Electric Co., Ltd.
    Inventor: Haruhisa Hashimoto
  • Patent number: 8722450
    Abstract: The present invention generally relates to a method for manufacturing an improved solar cell module, more particularly to a method for manufacturing the improved solar cell module that may not happen problems of power leakage and short circuit and save the cost to manufacturing.
    Type: Grant
    Filed: March 18, 2013
    Date of Patent: May 13, 2014
    Assignee: Perfect Source Technology Corp.
    Inventor: Po-Chung Huang
  • Publication number: 20140113400
    Abstract: A solar battery module (40) includes a stack of: a plurality of solar battery strings (30) and bus sections (32) connected to both ends of each of the plurality of solar battery strings (30); flexible resin layers (33a through 33c); and a flexible resin film (34). The flexible resin layers (33a through 33c) and the flexible resin film (34) have, on a light receiving surface side of solar battery cells (20), holes through which the bus sections (32) are each partially exposed. The exposed parts of the bus sections (32) serve as a respective plurality of electrically-connecting means (32a). A solar battery array (41) includes a plurality of solar battery modules (40). The plurality of solar battery modules (40) are electrically connected with each other via the plurality of electrically-connecting means (32a). This makes it possible to achieve a large-scale solar battery array (41) with high mechanical strength.
    Type: Application
    Filed: March 15, 2013
    Publication date: April 24, 2014
    Applicant: SHARP KABUSHIKI KAISHA
    Inventor: Naoki TAKAHASHI
  • Patent number: 8704085
    Abstract: The present invention shows a solar cell element comprising a semiconductor substrate layer (2) with precisely one first doping, a layer structure (1) which is disposed on the front-side of the substrate layer (2) and is adjacent to the substrate layer, said layer structure having at least one doping complementary to the first doping, a rear-side metallization (3) which is disposed on the rear-side of the substrate layer which is situated opposite the layer structure (1) and is adjacent to the substrate layer, and a first (4) and a second (6) front-side metallization, the first front-side metallization (4) contacting the layer structure (1) electrically and the second front-side metallization (6), electrically insulated from the first front-side metallization and the layer structure (1), being disposed on the front-side of the substrate layer adjacent to the substrate layer.
    Type: Grant
    Filed: March 7, 2008
    Date of Patent: April 22, 2014
    Assignee: Fraunhoer-Gesellschaft zur Forderung der Angewandten Forschung e.v.
    Inventor: Rüdiger Löckenhoff
  • Publication number: 20140106497
    Abstract: Disclosed is a solar cell module that reduces entering of moisture into a solar cell module from a side surface SF thereof, and has high moisture-resistant properties. The disclosed solar cell module is a solar cell module in which solar cells 13a to 13d are sealed by a sealing member 21 between a transparent front surface protective member 11 and a back surface protective member 12, wherein the sealing member 21 includes at least a first sealing member 14 and a second sealing member 15, the first sealing member and the second sealing member are different in type, and the sealing member 21 exposed to a side surface SF of the solar cell module is the first sealing member 14.
    Type: Application
    Filed: December 17, 2013
    Publication date: April 17, 2014
    Applicant: SANYO ELECTRIC CO., LTD.
    Inventors: Shihomi NAKATANI, Yasuo KADONAGA, Yousuke ISHII, Masaru HIKOSAKA, Shingo OKAMOTO
  • Patent number: 8698321
    Abstract: A vertically stackable die having a chip identifier structure is disclosed. In a particular embodiment, a semiconductor device is disclosed that includes a die comprising a first through silicon via to communicate a chip identifier and other data. The semiconductor device also includes a chip identifier structure that comprises at least two through silicon vias that are each hard wired to an external electrical contact.
    Type: Grant
    Filed: October 7, 2009
    Date of Patent: April 15, 2014
    Assignee: QUALCOMM Incorporated
    Inventor: Jungwon Suh
  • Patent number: 8697473
    Abstract: Methods for forming backside illuminated (BSI) image sensors having metal redistribution layers (RDL) and solder bumps for high performance connection to external circuitry are provided. In one embodiment, a BSI image sensor with RDL and solder bumps may be formed using a temporary carrier during manufacture that is removed prior to completion of the BSI image sensor. In another embodiment, a BSI image sensor with RDL and solder bumps may be formed using a permanent carrier during manufacture that partially remains in the completed BSI image sensor. A BSI image sensor may be formed before formation of a redistribution layer on the front side of the BSI image sensor. A redistribution layer may, alternatively, be formed on the front side of an image wafer before formation of BSI components such as microlenses and color filters on the back side of the image wafer.
    Type: Grant
    Filed: May 20, 2011
    Date of Patent: April 15, 2014
    Assignee: Aptina Imaging Corporation
    Inventors: Swarnal Borthakur, Kevin W. Hutto, Andrew Perkins, Marc Sulfridge
  • Patent number: 8691694
    Abstract: In order to better and more efficiently assemble back contact solar cells into modules, the cell to cell soldering and other soldered connections are replaced by electro and/or electroless plating. Back contact solar cells, diodes and external leads can be first laminated to the module front glass for support and stability. Conductive materials are deposited selectively to create a plating seed pattern for the entire module circuit. Subsequent plating steps create an integrated cell and module metallization. This avoids stringing and tabbing and the associated soldering steps. This process is easier for mass manufacturing and is advantageous for handling fragile silicon solar cells. Additionally, since highly corrosion resistant metals can be plated, the moisture barrier requirements of the back side materials can be greatly relaxed. This can simplify and reduce the cost of the back side of the module.
    Type: Grant
    Filed: December 16, 2010
    Date of Patent: April 8, 2014
    Inventor: Henry Hieslmair
  • Patent number: 8686281
    Abstract: A semiconductor device includes a semiconductor circuit on an insulated metal substrate, which includes an anodized film formed on at least one side of an Al substrate, wherein the Al substrate has a potential higher than an average potential of the semiconductor circuit when the semiconductor circuit is driven.
    Type: Grant
    Filed: April 6, 2010
    Date of Patent: April 1, 2014
    Assignee: FUJIFILM Corporation
    Inventor: Shigenori Yuuya
  • Publication number: 20140084407
    Abstract: An imaging system may include an image sensor package with an image sensor wafer mounted on a carrier wafer, which may be a silicon substrate. A capacitor may be formed in the carrier wafer. Trenches may be etched in a serpentine pattern in the silicon substrate. Conductive plates of the capacitor may be formed at least partially in the trenches. An insulator material may be formed between the capacitor and the silicon substrate. A dielectric layer may be formed between the conductive plates of the capacitor. The image sensor package may be mounted on a printed circuit board via a ball grid array. Conductive vias may electrically couple the capacitor and the image sensor wafer to the printed circuit board.
    Type: Application
    Filed: September 24, 2013
    Publication date: March 27, 2014
    Applicant: Aptina Imaging Corporation
    Inventors: Scott Churchwell, Marc Sultridge, Swarnal Borthakur
  • Publication number: 20140076393
    Abstract: A flexible solar cell and a manufacturing method thereof are provided. The flexible solar cell includes a rigid transparent substrate, a transparent electrode, a photoactive layer, a metal electrode, an encapsulating structure and a flexible substrate. The transparent electrode is disposed on the rigid transparent substrate, the photoactive layer is disposed on the transparent electrode, and the metal electrode is disposed on the photoactive layer. The transparent electrode, the photoactive layer and the metal electrode are sealed by the encapsulating structure disposed on the rigid transparent substrate. The flexible substrate opposite to the rigid transparent substrate is disposed on the encapsulating structure.
    Type: Application
    Filed: November 15, 2012
    Publication date: March 20, 2014
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yi-Ming Chang, Chao-Feng Sung, Mei-Ju Lee, Chia-Sheng Huang, Chi-Yi Leu
  • Publication number: 20140076382
    Abstract: A photovoltaic module has a plurality of interconnected polymer sockets that have accepted and electrically connected a plurality of back-contact photovoltaic cells each having at least one set of linearly arranged backface emitter contacts and at least one set of linearly arranged backface collector contacts. A process for manufacturing such a photovoltaic module is also provided.
    Type: Application
    Filed: September 19, 2013
    Publication date: March 20, 2014
    Applicant: E I DU PONT DE NEMOURS AND COMPANY
    Inventor: PETROS DAFNIOTIS
  • Patent number: 8664512
    Abstract: The present invention provides a photovoltaic module with bypass diodes that has a high electricity generating capacity per unit area and high productivity. This photovoltaic module includes a photovoltaic cell assembly in which a plurality of photovoltaic cells are electrically connected in series, and a diode assembly in which a plurality of diodes are formed on a substrate in the arrangement that is consistent with the arrangement of the photovoltaic cells to which the diodes are to be attached. The diode assembly is disposed on a non-light receiving side of the photovoltaic cells, and the diodes are electrically connected to the photovoltaic cells. The photovoltaic cell assembly and the diode assembly are sealed and united by a sealant.
    Type: Grant
    Filed: December 9, 2011
    Date of Patent: March 4, 2014
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Makoto Shimosawa, Shinji Fujikake, Hiroki Sato
  • Publication number: 20140030841
    Abstract: A flexible photovoltaic module for converting light into an electric current includes a plurality of electrically interconnected flexible photovoltaic submodules monolithically integrated onto a common flexible substrate. Each photovoltaic submodule includes a plurality of electrically interconnected flexible thin-film photovoltaic cells monolithically integrated onto the flexible substrate. A flexible photovoltaic module for converting light into an electric current includes a backplane layer for supporting the photovoltaic module. A first pottant layer is disposed on the backplane layer, and a photovoltaic submodule assembly is disposed on the first pottant layer. The photovoltaic submodule assembly has at least one photovoltaic submodule, where each photovoltaic submodule includes a plurality of thin-film photovoltaic cells. A second pottant layer is disposed on the photovoltaic submodule assembly, and a upper laminate layer disposed on the second pottant layer.
    Type: Application
    Filed: September 30, 2013
    Publication date: January 30, 2014
    Applicant: ASCENT SOLAR TECHNOLOGIES, INC.
    Inventors: Joseph H. Armstrong, Matthew B. Foster, Jonathan S. Port, Douglas G. Jensen
  • Patent number: 8629524
    Abstract: A backside illuminated image sensor comprises a photodiode and a first transistor located in a first chip, wherein the first transistor is electrically coupled to the photodiode. The backside illuminated image sensor further comprises a second transistor formed in a second chip and a plurality of logic circuits formed in a third chip, wherein the second chip is stacked on the first chip and the third chip is stacked on the second chip. The logic circuit, the second transistor and the first transistor are coupled to each other through a plurality of boding pads and through vias.
    Type: Grant
    Filed: April 27, 2012
    Date of Patent: January 14, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tzu-Jui Wang, Szu-Ying Chen, Jen-Cheng Liu, Dun-Nian Yaung, Ping-Yin Liu, Lan-Lin Chao
  • Publication number: 20140008754
    Abstract: A first semiconductor substrate 1 and a second semiconductor substrate 2 are different in material, and therefore have sensitivities to incident light of mutually different wavelength bands. Respective photodiodes of photodiode arrays are connected to amplifiers of the first semiconductor substrate 1. According to this method, the second semiconductor substrate 2 is separated from the wafer by etching the second semiconductor substrate 2 and then dicing a deepest portion of the etched groove. The density of crystal defects in a side surface produced by etching is smaller than the density of crystal defects in a side surface produced by dicing. Because a photodiode located in an end portion of the second semiconductor substrate 2 does not need to be removed, a reduction in the number of photodiodes can be suppressed.
    Type: Application
    Filed: March 27, 2012
    Publication date: January 9, 2014
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventors: Masatoshi Ishihara, Nao Inoue, Hirokazu Yamamoto
  • Patent number: 8623689
    Abstract: In a package process of backside illumination image sensor, a wafer including a plurality of pads is provided. A first carrier is processed to form a plurality of blind vias therein. The first carrier is adhered to the wafer so that the blind vias face to the pads correspondingly. A spacing layer is formed and a plurality of sensing components are disposed. A second carrier is adhered on the spacing layer. Subsequently, a carrier thinning process is performed so that the blind vias become the through holes. An insulating layer is formed on the first carrier. An electrically conductive layer is formed on the insulating layer and filled in the though holes to electrically connect to the pads. The package process can achieve the exact alignment of the through holes and the pads, thereby increasing the package efficiency and improving the package quality.
    Type: Grant
    Filed: July 7, 2010
    Date of Patent: January 7, 2014
    Assignee: Ineffable Cellular Limited Liability Company
    Inventor: Wen-Hsiung Chang
  • Publication number: 20140004647
    Abstract: A microelectronic assembly and method of making, which includes a first microelectronic element (including a substrate with first and second opposing surfaces, a semiconductor device, and conductive pads at the first surface which are electrically coupled to the semiconductor device) and a second microelectronic element (including a handler with first and second opposing surfaces, a second semiconductor device, and conductive pads at the handler first surface which are electrically coupled to the second semiconductor device). The first and second microelectronic elements are integrated such that the second surfaces face each other. The first microelectronic element includes conductive elements each extending from one of its conductive pads, through the substrate to the second surface. The second microelectronic element includes conductive elements each extending between the handler first and second surfaces.
    Type: Application
    Filed: August 29, 2013
    Publication date: January 2, 2014
    Applicant: Optiz, Inc.
    Inventor: Vage Oganesian
  • Publication number: 20140000680
    Abstract: A photovoltaic module with a single layer homogeneous integrated back-sheet and a process for forming such a photovoltaic module are provided. The back-sheet comprises 20 to 80 weight percent olefin-based elastomer and 20 to 80 weight percent of inorganic particulates.
    Type: Application
    Filed: March 11, 2013
    Publication date: January 2, 2014
    Applicant: E I DU PONT DE NEMOURS AND COMPANY
    Inventor: CHEN QIAN ZHAO
  • Publication number: 20130340806
    Abstract: Provided is an electrically conductive adhesive composition including: electrically conductive particles (A) containing metal having a melting point of equal to or lower than 220° C.; a thermosetting resin (B); a flux activator (C); and a curing catalyst (D), in which a reaction start temperature of the thermosetting resin (B) and the curing catalyst (D) is 130 to 200° C.
    Type: Application
    Filed: January 11, 2012
    Publication date: December 26, 2013
    Applicant: HITACHI CHEMICAL COMPANY, LTD.
    Inventors: Shinichirou Sukata, Hiroki Hayashi, Aya Momozaki
  • Publication number: 20130298967
    Abstract: A tandem solar cell structure includes a substrate, a conductive layer, a bottom solar cell combination and a top solar cell, The bottom solar cell combination includes a plurality of solar cell units and is disposed on the substrate. A conductive layer is disposed between the top solar cell and the bottom solar cell combination. The top solar cell is connected to one of the solar cell units in series. A wide energy distribution of the solar radiation can be absorbed through the tandem solar cell structure. The electrical series connection of the top solar cell and the solar cell units of the bottom solar cell combination reduces current mismatch between the top and bottom cells and enhances the overall system open circuit voltage due to more units in the bottom cell combination. The efficiency of the tandem solar cell structure is therefore improved considerably.
    Type: Application
    Filed: August 22, 2012
    Publication date: November 14, 2013
    Applicant: GCSOL TECH CO., LTD.
    Inventors: Tien-Jung HUANG, Jui-yao CHIEN