Abstract: The present invention proposes a method of readily and reliably forming CNTs independent of a substrate allowing a catalyst metal to deposit thereon, or an underlying material, even for the case where the substrate is not used, in which a titanium-cobalt composite particles are deposited, using a catalyst particle production system, on an insulating film formed on a silicon substrate, and CNTs are grown from the from titanium-cobalt composite particles by the CVD process.

Abstract: A method for manufacturing a semiconductor device includes: (a) forming a stress relaxation layer on a first surface having an electrode of a semiconductor substrate; (b) forming a wiring line so as to cover the electrode and the stress relaxation layer after step (a); (c) forming a solder resist layer on the wiring line after step (b); and (d) forming a protective layer on a second surface opposite to the first surface of the semiconductor substrate after step (c).

Abstract: There is provided a resist underlayer film forming composition for lithography for forming a resist underlayer film capable of being used as a hard mask; and a forming method of a resist pattern using the underlayer film forming composition for lithography. A resist underlayer film forming composition for lithography comprising: as a silicon atom-containing compound, a hydrolyzable organosilane containing a sulfur atom-containing group, a hydrolysis product thereof, or a hydrolysis-condensation product thereof, wherein in the whole silicon atom-containing compound, the ratio of a sulfur atom to a silicon atom is less than 5% by mole. The hydrolyzable organosilane is preferably a compound of Formula (1): [R1aSi(R2)3-a]bR3 wherein R3 has a partial structure of Formula (2): R4—S—R5.

Abstract: A method of placing a functionalized semiconducting nanostructure, includes functionalizing a semiconducting nanostructure including one of a nanowire and a nanocrystal, with an organic functionality including a functional group for bonding to a bonding surface, dispersing the functionalized semiconducting nanostructure in a solvent to form a dispersion, and depositing the dispersion onto the bonding surface.

Abstract: In order to provide an adhesive composition for electronic components that is excellent in adhesion durability under long-term high temperature conditions, thermal cyclability, and insulation reliability, designed is an adhesive composition for electronic components containing a thermoplastic resin (a), an epoxy resin (b), a hardener (c), and an organopolysiloxane (d), wherein the glass transition temperature (Tg) after curing is ?10° C. to 50° C. and the rate of change of Tg after heat-treating the composition at 175° C. for 1000 hours is 15% or less.

Abstract: An object of the present invention is to increase adhesiveness between thin films, particularly a high molecular film formed on an insulating surface, and the present invention provides a semiconductor device with high reliability and a method for manufacturing the semiconductor device with high yield. A semiconductor device of the present invention comprises a laminate structure formed in close contact with an organic insulating film on a hydrophobic surface of an inorganic insulating film including silicon and nitrogen. A film having the hydrophobic surface is an insulating film having a contact angle of water of equal to or more than 30°, preferably of equal to or more than 40°.

Abstract: The present invention discloses a method of forming an alignment film for use in a liquid crystal display (LCD). The method includes: Provide a glass substrate and dispose an ITO film on the glass substrate. Next, set the thickness of the alignment film. Next, determine the spray volume of thin film material droplets based on the length and the width of the glass substrate. Next, spray a plurality of thin film material droplets in rows on the glass substrate through a plurality of nozzles of an inkjet head. The thin film material droplets are distributed in an approximate equilateral triangular pattern. The thin film material droplets in the shape of an approximate equilateral triangle can reduce instability when spreading on the glass substrate, achieving a target of optimized coatings. Finally, process an alignment material thin film which is formed after the thin film material droplets spread to form an alignment film.

Abstract: A method includes forming an insulating film over a substrate by introducing a cyclic siloxane compound having a cyclic siloxane as a skeleton and having at least one volatile hydrocarbon group bonded to a side chain, and a silicon-containing compound into a plasma, and converting the insulating film to a porous insulating film by adding energy to the insulating film. The silicon-containing compound is decomposed using less energy as compared with the skeleton of the cyclic siloxane compound, the volatile hydrocarbon group, and the bond between the cyclic siloxane compound and the volatile hydrocarbon group.

Abstract: The present invention provides a method of manufacturing an electronic apparatus, such as a lighting device having light emitting diodes (LEDs) or a power generating device having photovoltaic diodes. The exemplary method includes depositing a first conductive medium within a plurality of channels of a base to form a plurality of first conductors; depositing within the plurality of channels a plurality of semiconductor substrate particles suspended in a carrier medium; forming an ohmic contact between each semiconductor substrate particle and a first conductor; converting the semiconductor substrate particles into a plurality of semiconductor diodes; depositing a second conductive medium to form a plurality of second conductors coupled to the plurality of semiconductor diodes; and depositing or attaching a plurality of lenses suspended in a first polymer over the plurality of diodes. In various embodiments, the depositing, forming, coupling and converting steps are performed by or through a printing process.

Abstract: The porosity of a diamond film may be increased and its dielectric constant lowered by exposing a film containing sp3 hybridization to ion implantation. The implantation produces a greater concentration of sp2 hybridizations. The sp2 hybridizations may then be selectively etched, for example, using atomic hydrogen plasma to increase the porosity of the film. A series of layers may be deposited and successively treated in the same fashion to build up a composite, porous diamond film.

Abstract: A process for defining a functional area in a semiconductor device comprising a semiconductor substrate contiguous with a gate dielectric layer whose dielectric constant is higher than silicon oxide and an oxide capping layer positioned on the gate dielectric layer that reduces gate leakage comprises applying an organo phosphorous SAM to the oxide capping layer, adhering an organic photoresist layer to the organo phosphorous SAM, defining the functional area by imaging the photoresist layer with a functional area image, developing and removing the functional area image in the photoresist to form a functional area image on the organo phosphorous SAM, and removing the functional area image on the organo phosphorous SAM to form a functional area image on the oxide capping layer.

Abstract: The invention provides a composition for a resist underlayer film, the composition for a resist underlayer film to form a resist underlayer film of a multilayer resist film used in lithography, wherein the composition comprises at least (A) a fullerene derivative that is a reaction product of a substance having a fullerene skeleton with a 1,3-diene compound derivative having an electron-withdrawing group and (B) an organic solvent. There can be a composition for a resist underlayer film for a multilayer resist film used in lithography, the composition giving a resist underlayer film having excellent high dry etching resistance, capable of suppressing wiggling during substrate etching with high effectiveness, and capable of avoiding a poisoning problem in upperlayer patterning that uses a chemical amplification resist; a process for forming a resist underlayer film; a patterning process; and a fullerene derivative.

Abstract: In one embodiment, a pattern formation method is disclosed. The method can place a liquid resin material on a workpiece substrate. The method can press a template against the resin material and measuring distance between a lower surface of a projection of the template and an upper surface of the workpiece substrate. The template includes a pattern formation region and a circumferential region around the pattern formation region. A pattern for circuit pattern formation is formed in the pattern formation region and the projection is formed in the circumferential region. The method can form a resin pattern by curing the resin material in a state of pressing the template. In addition, the method can separate the template from the resin pattern.

Abstract: A film forming method includes the steps of forming a F-doped carbon film by using a source gas containing C and F, and modifying the F-doped carbon film by radicals, the source gas having a F/C ratio larger than 1 and smaller than 2, the F/C ratio being defined as a ratio of a number of F atoms to a number of C atoms in a source gas molecule.

Abstract: The present invention essentially relates to a method of preparing an electrically insulating film at the surface of an electrical conductor or semiconductor substrate, such as a silicon substrate. According to the invention, this method comprises: a) bringing said surface into contact with a liquid solution comprising: a protic solvent; at least one diazonium salt; at least one monomer that is chain-polymerizable and soluble in said protic solvent; at least one acid in a sufficient quantity to stabilize said diazonium salt by adjusting the pH of said solution to a value less than 7, preferably less than 2.5; b) the polarization of said surface according to a potentio- or galvano-pulsed mode for a duration sufficient to form a film having a thickness of at least 60 nanometers, and preferably between 80 and 500 nanometers. Application: Metallization of through-vias, especially of 3D integrated circuits.

Abstract: Apparatus and systems may comprise electrode structures that include two or more dissimilar and abutting metal layers on a surface, some of the electrode structures separated by a gap; and a polymer-based ferroelectric layer overlying and directly abutting some of the electrode structures. Methods may comprise actions to form and operate the apparatus and systems. Additional apparatus, systems, and methods are disclosed.

Abstract: The invention relates to compounds comprising a cycloalkyne or heterocycloalkyne group and a redox group. Said compounds are of general formula (I) wherein Z is a cycloalkyne or heterocycloalkyne with at least 8 links, optionally substituted by a halogen atom or a linear or branched C1 to C5 alkyl, A is an organic structure having oxidation-reduction properties, and B is an organic link between the cycloalkyne or heterocycloalkyne cycle and the organic structure A. The invention is especially applicable to the field of molecular electronics.

Abstract: Methods for doping a non-planar structure by forming a conformal doped silicon glass layer on the non-planar structure are disclosed. A substrate having the non-planar structure formed thereon is positioned in chemical vapor deposition process chamber to deposit a conformal SACVD layer of doped glass (e.g. BSG or PSG). The substrate is then exposed to RTP or laser anneal step to diffuse the dopant into the non-planar structure and the doped glass layer is then removed by etching.

Abstract: Methods involving the self-assembly of block copolymers are described herein, in which by beginning with openings (in one or more substrates) that have a targeted CD (critical dimension), holes are formed, in either regular arrays or arbitrary arrangements. Significantly, the percentage variation in the average diameter of the formed holes is less than the percentage variation of the average diameter of the initial openings. The formed holes (or vias) can be transferred into the underlying substrate(s), and these holes may then be backfilled with material, such as a metallic conductor. Preferred aspects of the invention enable the creation of vias with tighter pitch and better CD uniformity, even at sub-22 nm technology nodes.

Abstract: Electrical structures and devices may be formed and include an organic passivating layer that is chemically bonded to a silicon-containing semiconductor material to improve the electrical properties of electrical devices. In different embodiments, the organic passivating layer may remain within finished devices to reduce dangling bonds, improve carrier lifetimes, decrease surface recombination velocities, increase electronic efficiencies, or the like. In other embodiments, the organic passivating layer may be used as a protective sacrificial layer and reduce contact resistance or reduce resistance of doped regions. The organic passivation layer may be formed without the need for high-temperature processing.

Abstract: Implementations of encapsulated nanowires are disclosed.

Abstract: A manufacturing apparatus is provided, which can improve a utilization efficiency of an evaporation material, reduce manufacturing costs of a light emitting device having an organic light emitting element, and shorten manufacturing time necessary to manufacture a light emitting device. According to the present invention, a multi-chamber manufacturing apparatus having plural film forming chambers includes a first film forming chamber for subjecting a first substrate to evaporation and a second film forming chamber for subjecting a second substrate to evaporation. In each film forming chamber, plural organic compound layers are laminated, thereby improving the throughput. Further, it is possible that the respective substrates in the plural film forming chambers are subjected to evaporation in the same manner in parallel, while another film forming chamber undergoes cleaning.

Abstract: A method for forming a PECVD deposited amorphous carbon or ashable hard mask (AHM) in a trench or a via with less than 30% H content at a process temperature below 500° C., e.g., about 400° C. produces low H content hard masks with high selectivity and little or no hard mask on the sidewalls. The deposition method utilizes a pulsed precursor delivery with a plasma etch while the precursor flow is off.

Abstract: A method of fabricating a semiconductor device is provided which includes providing a substrate. A material layer is formed over the substrate. A polymer layer is formed over the material layer. A nano-sized feature is self-assembled using a portion of the polymer layer. The substrate is patterned using the nano-sized feature.

Abstract: Embodiments of the present invention provide a method of forming a semiconductor structure. The method includes forming a set of shapes on top of a substrate; applying a layer of copolymer covering the substrate; causing the copolymer to form a plurality of cylindrical blocks both inside and outside the shapes; forming a pattern of contact holes from the plurality of cylindrical blocks; and transferring the pattern of contact holes to the substrate to form the semiconductor structure. In one embodiment, the shapes are rings and forming the set of shapes includes forming a set of rings that are equally and squarely spaced. In another embodiment, causing the copolymer to form the plurality of cylindrical blocks includes forming only one cylindrical block inside each of the rings and only one cylindrical block outside every four (4) squarely neighboring rings.

Abstract: A semiconductor structure is provided that includes a spacer directly abutting a topographic edge of at least one patterned material layer. The spacer is a non-removable polymeric block component of a self-assembled block copolymer. A method of forming such a semiconductor structure including the inventive spacer is also provided that utilizes self-assembled block copolymer technology.

Abstract: A method of creating a sensor that may include applying a first conductive material on a first portion of a substrate to form a reference electrode and depositing a first mask over the substrate, the first mask having an opening that exposes the reference electrode and a second portion of the substrate. The method may also include depositing a second conductive material into the opening in the first mask, the second conductive material being in direct contact with the reference electrode and depositing a second mask over the second conductive material, the second mask having an opening over the second portion of the substrate, the opening exposing a portion of the second conductive material which forms a working surface to receive a fluid of interest.

Abstract: A method for manufacturing a semiconductor device includes: forming a source electrode and a drain electrode on a substrate; forming an organic semiconductor layer including a ? conjugated organic compound at least between the source electrode and the drain electrode; applying an application liquid on the organic semiconductor layer, the application liquid being made of a polymer of an alicyclic compound dissolved in a paraffin hydrocarbon solvent that is a carbocyclic compound without having aromaticity; forming a gate insulation layer including the polymer of the alicyclic compound by removing the paraffin hydrocarbon solvent from the application liquid; and forming a gate electrode on the gate insulation layer.

Abstract: Surface-textured encapsulations for use with light emitting diodes. In an aspect, a light emitting diode apparatus is provided that includes a light emitting diode, and an encapsulation formed upon the light emitting diode and having a surface texture configured to extract light. In an aspect, a method includes encapsulating a light emitting diode with an encapsulation having a surface texture configured to extract light. In an aspect, a light emitting diode lamp is provided that includes a package, at least one light emitting diode disposed within the package, and an encapsulation formed upon the at least one light emitting diode having a surface texture configured to extract light. In another aspect, a method includes determining one or more regions of an encapsulation, the encapsulation configured to cover a light emitting diode, and surface-texturing each region of the encapsulation with one or more geometric features that are configured to extract light.

Abstract: A method of fabricating an organic memory device is provided. In the method, a bottom electrode is formed on a substrate. A first surface treatment is performed on the bottom electrode to form a bottom surface treatment layer on a surface thereof. A polymer thin film is formed on the bottom surface treatment layer, and a top electrode is formed on the polymer thin film.

Abstract: The present invention relates to a dicing film having an adhesive film for dicing a wafer and a die adhesive film, which are used for manufacturing a semiconductor package, and a method of manufacturing a semiconductor package using the same. More particularly, the present invention relates to a dicing film wherein a shrinkage release film is inserted between an adhesive film for dicing a wafer and a die adhesive film so that the die adhesive film and a die can be easily separated from the adhesive film for dicing a wafer when picking up a semiconductor die, and a method of manufacturing a semiconductor package using the same.

Abstract: A method for fabricating an integrated circuit device is disclosed. The method is a lithography patterning method that can include providing a substrate; forming a protective layer over the substrate; forming a conductive layer over the protective layer; forming a resist layer over the conductive layer; and exposing and developing the resist layer.

Abstract: A process for producing a carbon nanotube resistor that is capable of providing a highly reliable resistor or fuse. The process comprises the step of introducing a carbon nanotube in a volatile solvent to a first concentration and conducting ultrasonic treatment thereof to thereby obtain an initial solution; the dilution step of stepwise diluting the initial solution with a volatile solvent under ultrasonication so as to adjust the same to a second concentration, thereby obtaining a coating solution; and the step of applying the coating solution between a first electrode and a second electrode, wherein the first concentration is 1(E10?4 g/ml or higher and the second concentration lower than 1(E10?5 g/ml.

Abstract: For patterning during integrated circuit fabrication, an image layer is activated for forming a respective first type polymer block at each of two nearest activated areas. A layer of block copolymer is formed on the image layer, and a plurality of the first type polymer blocks and a plurality of second and third types of polymer blocks are formed on an area of the image layer between outer edges of the two nearest activated areas, from the block copolymer. At least one of the first, second, and third types of polymer blocks are removed to form a variety of mask structures.

Abstract: Densifying a multi-layer substrate includes providing a substrate with a first dielectric layer on a surface of the substrate. The first dielectric layer includes a multiplicity of pores. Water is introduced into the pores of the first dielectric layer to form a water-containing dielectric layer. A second dielectric layer is provided on the surface of the water-containing first dielectric layer. The first and second dielectric layers are annealed at temperature of 600° C. or less. In an example, the multi-layer substrate is a nanoimprint lithography template. The second dielectric layer may have a density and therefore an etch rate similar to that of thermal oxide, yet may still be porous enough to allow more rapid diffusion of helium than a thermal oxide layer.

Abstract: To provide a method for manufacturing a semiconductor device, which the method is capable of efficient mass production of high-performance semiconductor devices by, upon manufacture of a semiconductor device, eliminating unwanted features (e.g., side lobes) created together with a resist pattern by thickening the resist pattern, to reduce the burden in designing photomasks and to increase depth of focus. The method of the present invention for manufacturing a semiconductor device includes at least: forming a resist pattern on a work surface and applying over a surface of the resist pattern a resist pattern thickening material to thereby thicken the resist pattern to eliminate an unwanted feature created together with the resist pattern.

Abstract: A method of forming a nanoporous film is disclosed. The method comprises forming a coating solution including clusters, surfactant molecules, a solvent, and one of an acid catalyst and a base catalyst. The clusters comprise inorganic groups. The method further comprises aging the coating solution for a time period to select a predetermined phase that will self-assemble and applying the coating solution on a substrate. The method further comprises evaporating the solvent from the coating solution and removing the surfactant molecules to yield the nanoporous film.

Abstract: A method of fabricating IC die includes providing a substrate having a topside semiconductor surface including active circuitry and a bottomside surface. The IC die includes at least one protruding feature coupled to the active circuitry that protrudes from the bottomside surface or the topside semiconductor surface. The topside semiconductor surface and/or bottomside surface and the protruding feature are coated with a dielectric polymer. A portion of the dielectric polymer is removed from the protruding feature using a solvent to expose a tip portion of the protruding feature for electrical connection thereto. With a solvent that does not corrode or oxidize the exposed protruding feature tips, the need for a conventional subsequent chemical exposure to remove corrosion or oxidation is avoided.

Abstract: A conductive paste including conductive particles each of which has a size of greater than or equal to 0.1 ?m and less than or equal to 10 ?m, a resin, and a solvent is placed over a first conductor and the solvent is vaporized. In this manner, a second conductor having the conductive particles and a memory layer including the resin between the first conductor and the conductive particles is formed.

Abstract: A method of forming an amorphous carbon layer on a substrate in a substrate processing chamber, includes introducing a hydrocarbon source into the processing chamber, introducing argon, alone or in combination with helium, hydrogen, nitrogen, and combinations thereof, into the processing chamber, wherein the argon has a volumetric flow rate to hydrocarbon source volumetric flow rate ratio of about 10:1 to about 20:1, generating a plasma in the processing chamber at a substantially lower pressure of about 2 Torr to 10 Torr, and forming a conformal amorphous carbon layer on the substrate.

Abstract: The present invention relates to a process for preparing an organic film on a selected zone at the surface of a photosensitive semiconductor substrate, characterized in that it comprises the following steps: (i) bringing a liquid solution comprising at least one organic adhesion primer into contact with at least said selected zone; (ii) polarization of the surface of said substrate to an electric potential more cathodic than the reduction potential of the adhesion primer used in step (i); and (iii) exposure of said selected zone to light radiation, the energy of which is at least equal to that of the band gap of said semiconductor.

Abstract: There is provided a damage recovery method capable of recovering electrical characteristics of a low dielectric insulating film sufficiently while suppressing oxidation of buried metal and generation of pattern defaults. A damaged functional group generated in a surface of the low dielectric insulating film by a processing is substituted with a hydrophobic functional group (ST. 2). A damaged component present under a dense layer generated in the surface of the low dielectric insulating film by the substitution process is recovered by using an ultraviolet heating process (ST. 3).

Abstract: A filler for filling a gap includes a hydrogenated polysiloxazane having an oxygen content of about 0.2 to about 3 wt %. A chemical structure of the hydrogenated polysiloxazane includes first, second, and third moieties represented by the following respective Chemical Formulas 1-3: The third moiety is on a terminal end of the hydrogenated polysiloxazane, and an amount of the third moiety is about 15 to about 35% based on a total amount of Si—H bonds in the hydrogenated polysiloxazane.

Abstract: System and method for forming a structure including a MEMS device structure. In order to prevent warpage of a substrate arising from curing process for a sacrificial material (such as a photoresist), and from subsequent high temperature process steps, an improved sacrificial material comprises (i) a polymer and (ii) a foaming agent or special function group. The structure can be formed by forming a trench in a substrate and filling the trench with a sacrificial material. The sacrificial material includes (i) a polymer and (ii) a foaming agent or special function group. After further process steps are completed, the sacrificial material is removed from the trench.

Abstract: In a method of making a polymer structure on a substrate a layer of a first polymer, having a horizontal top surface, is applied to a surface of the substrate. An area of the top surface of the polymer is manipulated to create an uneven feature that is plasma etched to remove a first portion from the layer of the first polymer thereby leaving the polymer structure extending therefrom. A light emitting structure includes a conductive substrate from which an elongated nanostructure of a first polymer extends. A second polymer coating is disposed about the nanostructure and includes a second polymer, which includes a material such that a band gap exists between the second polymer coating and the elongated nanostructure. A conductive material coats the second polymer coating. The light emitting structure emits light when a voltage is applied between the conductive substrate and the conductive coating.

Abstract: A non-volatile memory device includes lower and upper electrodes over a substrate, a conductive organic material layer between the lower and the upper electrodes, and a nanocrystal layer located within the conductive organic material layer, wherein the nanocrystal layer includes a plurality of nanocrystals surrounded by an amorphous barrier, wherein the device has a multi-level output current according to a voltage level of an input voltage coupled to the lower and the upper electrodes during a data read operation.

Abstract: A circuit pattern having a size finer than a half of a wavelength of an exposure beam is transferred on a semiconductor wafer plane with an excellent accuracy by means of a mask whereupon an integrated circuit pattern is formed and a reduction projection aligner. The accuracy of transferring the circuit pattern on the semiconductor wafer is improved by synergic effects of super-resolution exposure, wherein a mask cover made of a transparent medium is provided on a pattern side of the integrated circuit mask so as to suppress the aberration of reduction projection alignment, and a method of increasing the number of actual apertures of the optical reduction projection lens system provided with the wafer cover made of the transparent medium on a photoresist side of the semiconductor wafer to which planarizing process is performed.

Abstract: A method of forming a pattern and a method of producing an electronic element are characterized by including a first step of forming an electrically conductive film (D) by applying a liquid composition onto a first plate (10), and heating the first plate (10); a second step of forming an electrically conductive pattern (D?) on the first plate (10) by pressing a second plate (20) having a projection-and-recess pattern on a surface side thereof onto a surface side of the first plate (10), on which the electrically conductive film (D) is formed, to transfer an unwanted pattern of the electrically conductive film (D) to top faces of projections (20a) of the second plate (20), thereby removing the unwanted pattern; and a third step of transferring the electrically conductive pattern (D?) to a surface of a transfer-receiving substrate (30) by pressing the surface side of the first plate (10), on which the electrically conductive pattern (D?) is formed, onto the surface of the transfer-receiving substrate (30), wher

Abstract: Embodiments of the invention relate to a semiconductor module and to a method for manufacturing a semiconductor module. In an embodiment of the invention, a semiconductor module for mounting to a board may include at least an integrated circuit having connections on at least one side of the integrated circuit, and at least a first layer which is applied to the side of the integrated circuit having the connections, wherein the free surface of the first layer facing away from the integrated circuit has a thermo-mechanical linear expansion in the in-plane direction of the surface which corresponds to the thermo-mechanical linear expansion of the board to which the semiconductor module is to be mounted.

Abstract: A semiconductor device comprising curable polyorganosiloxane composites is provided where the composites contain at least 0.1 wt % of the 4th and/or 13th group elements of the periodic table. The cured polyorganosiloxane composites may be catalyst-free, have increased stability, and can be used as encapsulation resin at a temperature far lower than 300° C., have excellent light transmission properties (colorless transparency) in a wavelength region of from ultraviolet light to visible light, light resistance, heat resistance, resistance to moist heat and UV resistance, and has excellent adhesiveness toward metal, ceramics, and plastic surfaces over a long period of time.