Insulative Material Is Compound Of Refractory Group Metal (i.e., Titanium (ti), Zirconium (zr), Hafnium (hf), Vanadium (v), Niobium (nb), Tantalum (ta), Chromium (cr), Molybdenum (mo), Tungsten (w), Or Alloy Thereof) Patents (Class 438/785)
  • Patent number: 7732350
    Abstract: Titanium nitride (TiN) films are formed in a batch reactor using titanium chloride (TiCl4) and ammonia (NH3) as precursors. The TiCl4 is flowed into the reactor in temporally separated pulses. The NH3 can also be flowed into the reactor in temporally spaced pulses which alternate with the TiCl4 pulses, or the NH3 can be flowed continuously into the reactor while the TiCl4 is introduced in pulses. The resulting TiN films exhibit low resistivity and good uniformity.
    Type: Grant
    Filed: December 4, 2006
    Date of Patent: June 8, 2010
    Assignee: ASM International N.V.
    Inventors: Albert Hasper, Gert-Jan Snijders, Lieve Vandezande, Marinus J. De Blank, Radko Gerard Bankras
  • Patent number: 7732351
    Abstract: In a manufacturing process of a semiconductor device, a manufacturing technique and a manufacturing apparatus of a semiconductor device which simplify a lithography step using a photoresist is provided, so that the manufacturing cost is reduced, and the throughput is improved. An irradiated object, in which a light absorbing layer and an insulating layer are stacked over a substrate, is irradiated with a multi-mode laser beam and a single-mode laser beam so that both the laser beams overlap with each other, and an opening is formed by ablation in part of the irradiated object the irradiation of which is performed so that both the laser beams overlap with each other.
    Type: Grant
    Filed: September 18, 2007
    Date of Patent: June 8, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hirotada Oishi, Koichiro Tanaka
  • Patent number: 7732852
    Abstract: High dielectric films of mixed transition metal oxides of titanium and tungsten, or titanium and tantalum, are formed by sequential chemical vapor deposition (CVD) of the respective nitrides and annealing in the presence of oxygen to densify and oxidize the nitrides. The resulting film is useful as a capacitative cell and resists oxygen diffusion to the underlying material, has high capacitance and low current leakage.
    Type: Grant
    Filed: August 3, 2006
    Date of Patent: June 8, 2010
    Assignee: Micron Technology, Inc.
    Inventors: Jiong-Ping Lu, Ming-Jang Hwang
  • Patent number: 7727909
    Abstract: A method for producing complex metal oxide having nano-sized grains that includes the steps of forming a mixture containing at least one metal cation dissolved in a solution and particulate material containing at least one further metal in the form of metal(s) or metal compound(s) and treating the mixture to form the complex metal oxide having nano-sized grains. The at least one further metal from the particulate material becomes incorporated into the complex metal oxide.
    Type: Grant
    Filed: December 22, 2006
    Date of Patent: June 1, 2010
    Assignee: Very Small Particle Company Limited
    Inventors: Jose Antonio Alarco, Geoffrey Alan Edwards, Peter Cade Talbot
  • Patent number: 7727910
    Abstract: Methods of forming transparent conducting oxides and devices formed by these methods are shown. Monolayers that contain zinc and monolayers that contain zirconium are deposited onto a substrate and subsequently processed to form zirconium-doped zinc oxide. The resulting transparent conducing oxide includes properties such as an amorphous or nanocrystalline microstructure. Devices that include transparent conducing oxides formed with these methods have better step coverage over substrate topography and more robust film mechanical properties.
    Type: Grant
    Filed: February 13, 2007
    Date of Patent: June 1, 2010
    Assignee: Micron Technology, Inc.
    Inventors: Kie Y. Ahn, Leonard Forbes
  • Patent number: 7727911
    Abstract: In formation of a gate insulating film made of a high dielectric constant metal silicate, atomic layer deposition (ALD) is performed by setting exposure time to a precursor containing a metal or the like to saturation time of a deposition rate by a surface adsorption reaction and by setting exposure time to an oxidizing agent to time required for a composition of a metal oxide film to reach 97% or more of a stoichiometric value.
    Type: Grant
    Filed: January 6, 2009
    Date of Patent: June 1, 2010
    Assignee: Panasonic Corporation
    Inventors: Kenji Yoneda, Kazuhiko Yamamoto
  • Patent number: 7727908
    Abstract: Atomic layer deposition (ALD) can be used to form a dielectric layer of zirconium aluminum oxynitride (ZrAlON) for use in a variety of electronic devices. Forming the dielectric layer may include depositing zirconium oxide using atomic layer deposition and precursor chemicals, followed by depositing aluminum nitride using precursor chemicals, and repeating. The dielectric layer may be used as the gate insulator of a MOSFET, a capacitor dielectric, and a tunnel gate insulator in flash memories.
    Type: Grant
    Filed: August 3, 2006
    Date of Patent: June 1, 2010
    Assignee: Micron Technology, Inc.
    Inventors: Kie Y. Ahn, Leonard Forbes
  • Patent number: 7723245
    Abstract: The ability to control a concentration ratio of a metal and silicon in a metal silicate film is improved, allowing a high-quality semiconductor device to be manufactured. A step is provided for supplying a first raw material, which contains a metal atom, and a second raw material, which contains a silicon atom and a nitrogen atom, into a processing chamber (4); and forming on a substrate (30) a metal silicate film containing the metal atom and silicon atom. A raw material supply ratio of the first and second raw materials is controlled in the step of forming a metal silicate film, thereby controlling a concentration ratio of the metal and silicon in the resulting metal silicate film.
    Type: Grant
    Filed: November 29, 2005
    Date of Patent: May 25, 2010
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Atsushi Sano, Sadayoshi Horii, Hideharu Itatani, Katsuhiko Yamamoto
  • Patent number: 7723771
    Abstract: A capacitor structure comprises a first and a second electrode of conducting material. Between the first and second electrodes, an atomic layer deposited dielectric film is disposed, which comprises zirconium oxide and a dopant oxide. Herein, the dopant comprises an ionic radius that differs by more than 24 pm from an ionic radius of zirconium, while the dielectric film comprises a dopant content of 10 atomic percent or less of the dielectric film material excluding oxygen. A process for fabricating a capacitor comprises a step of forming a bottom electrode of the capacitor. On the bottom electrode, a dielectric film comprising zirconium oxide is deposited, and a step for introducing a dopant oxide into the dielectric film performed. On the dielectric structure, a top electrode is formed.
    Type: Grant
    Filed: March 30, 2007
    Date of Patent: May 25, 2010
    Assignee: Qimonda AG
    Inventors: Tim Boescke, Uwe Schroeder
  • Patent number: 7723535
    Abstract: This invention relates to organometallic precursor compounds represented by the formula i-PrN?Ta(NR1R2)3 wherein R1 and R2 are the same or different and are alkyl having from 1 to 3 carbon atoms, provided that (i) when R1 is ethyl, then R2 is other than ethyl and (ii) when R2 is ethyl, then R1 is other than ethyl, and a method for producing a film, coating or powder from the organometallic precursor compounds.
    Type: Grant
    Filed: May 9, 2005
    Date of Patent: May 25, 2010
    Assignee: Praxair Technology, Inc.
    Inventors: Delong Zhang, Cynthia Hoover
  • Patent number: 7718552
    Abstract: A method and device of nanostructured titania that is crack free. A method in accordance with the present invention comprises depositing a Ti film on a surface, depositing a masking layer on the Ti film, etching said masking layer to expose a limited region of the Ti film, the limited region being of an area less than a threshold area, oxidizing the exposed limited region of the Th.ucsbi film, and annealing the exposed limited region of the Ti film.
    Type: Grant
    Filed: April 4, 2006
    Date of Patent: May 18, 2010
    Assignee: The Regents of the University of California
    Inventors: Zuruzi Abu Samah, Noel C. MacDonald, Marcus Ward, Martin Moskovits, Andrei Kolmakov, Cyrus R. Safinya
  • Patent number: 7713812
    Abstract: A substrate with a second semiconductor layer and a second mask film formed thereon is subjected to a heat treatment in an oxidizing atmosphere. Thus, second oxidized regions are formed through oxidization of the second semiconductor layer in regions of the second semiconductor layer that are not covered by the second mask film. At the same time, a second base layer is formed in each region that is interposed by the second oxidized regions. Then, the second mask film is removed, and a third semiconductor layer is selectively grown on the surface of the second base layer that is exposed between the second oxidized regions so as to cover the second oxidized regions, after which the first oxidized regions and the second oxidized regions covering the entire upper surface of the substrate are removed.
    Type: Grant
    Filed: January 12, 2006
    Date of Patent: May 11, 2010
    Assignee: Panasonic Corporation
    Inventors: Tetsuzo Ueda, Hisashi Nakayama, Masaaki Yuri
  • Patent number: 7713884
    Abstract: A semiconductor wafer is placed in a chamber of a film-deposition apparatus, and gas in the chamber is exhausted from a gas exhaust outlet. Then, with interrupting the exhaust, an inert gas is introduced into the chamber so that the chamber has a pressure of 133 Pa or higher and lower than 101325 Pa, and then a mixed gas of an inert gas and a source gas for depositing a metal oxide film is introduced into the chamber. Then, after exhausting the gas in the chamber, an oxidation gas is introduced into the chamber to react with the molecules of the source gas absorbed on the semiconductor wafer to form a metal oxide film on the semiconductor wafer. By repeating these steps, a metal oxide film having a desired film thickness is deposited on the semiconductor wafer with a film-thickness distribution by an ALD method.
    Type: Grant
    Filed: June 19, 2008
    Date of Patent: May 11, 2010
    Assignees: Renesas Technology Corp., Seiko Epson Corporation
    Inventors: Hiromi Ito, Yuuichi Kamimuta, Yukimune Watanabe, Shinji Migita
  • Patent number: 7713886
    Abstract: Disclosed is a film forming method using a film forming gas composed of a metal alkoxide wherein clean film formation suppressed in contamination of a target substrate to be processed is achieved by restraining aluminum or an aluminum alloy in the processing chamber from dissolving. Specifically disclosed is method for forming a thin film on a target substrate to be processed which is held in a processing chamber, and this method comprises a step for heating the target substrate and a step for supplying a film forming gas into the processing chamber. This method is characterized in that the film forming gas is composed of a metal alkoxide, the processing chamber is made of aluminum or an aluminum alloy, and a protective film composed of a nonporous anodic oxide film is formed on the inner wall surface of the processing chamber.
    Type: Grant
    Filed: April 30, 2007
    Date of Patent: May 11, 2010
    Assignee: Tokyo Electron Limited
    Inventors: Hirokatsu Kobayashi, Tetsuya Nakano, Masato Koizumi
  • Patent number: 7709276
    Abstract: A by-product (e.g., RuF5) that is produced in the process of cleaning may cover a cleaning subject film and may obstruct the progress of the cleaning. To suppress an accumulation of the by-product, a cleaning operation is divided into plural operations, performing vacuum evacuation between the divided operations to evaporate the by-product and expose a new surface of the cleaning subject film between each supply of cleaning gas.
    Type: Grant
    Filed: May 30, 2008
    Date of Patent: May 4, 2010
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Hideharu Itatani, Kazuhiro Harada
  • Patent number: 7709359
    Abstract: A method of fabricating an integrated circuit with a dielectric layer on a substrate is disclosed. One embodiment provides forming the dielectric layer in an amorphous state on the substrate, the dielectric layer having a crystallization temperature; a doping the dielectric layer; a forming of a covering layer on the dielectric layer at a temperature being equal to or below the crystallization temperature; and a heating of the dielectric layer to a temperature being equal to or greater than the crystallization temperature.
    Type: Grant
    Filed: September 5, 2007
    Date of Patent: May 4, 2010
    Assignee: Qimonda AG
    Inventors: Tim Boescke, Johannes Heitmann, Uwe Schroder
  • Patent number: 7709402
    Abstract: Electronic apparatus and methods of forming the electronic apparatus include a HfSiON film on a substrate for use in a variety of electronic systems. The HfSiON film may be structured as one or more monolayers. The HfSiON film may be formed by atomic layer deposition. Electrodes to a dielectric containing a HfSiON may be structured as one or more monolayers of titanium nitride, tantalum, or combinations of titanium nitride and tantalum. The titanium nitride and the tantalum may be formed by atomic layer deposition.
    Type: Grant
    Filed: February 16, 2006
    Date of Patent: May 4, 2010
    Assignee: Micron Technology, Inc.
    Inventors: Kie Y. Ahn, Leonard Forbes
  • Patent number: 7704896
    Abstract: Germanium has higher mobility than silicon and therefore is considered to be a good alternative semiconductor for CMOS technology. Surface treatments a can facilitate atomic layer deposition (ALD) of thin films, such as high-k dielectric layers, on germanium substrates. Surface treatment can comprise the formation of a thin layer of GeOx or GeOxNy. After surface treatment and prior to deposition of the desired thin film, a passivation layer may be deposited on the substrate. The passivation layer may be, for example, a metal oxide layer deposited by ALD.
    Type: Grant
    Filed: January 20, 2006
    Date of Patent: April 27, 2010
    Assignee: ASM International, N.V.
    Inventors: Suvi P. Haukka, Marko Tuominen, Antti Rahtu
  • Patent number: 7704895
    Abstract: A method for depositing a high-k dielectric material on a semiconductor substrate is disclosed. The method includes applying a chemical bath to a surface of a substrate, rinsing the surface, applying a co-reactant bath to the surface of the substrate, and rinsing the surface. The chemical bath includes a metal precursor which includes at least a hafnium compound, an aluminium compound, a titanium compound, zirconium compound, a scandium compound, a yttrium compound or a lanthanide compound.
    Type: Grant
    Filed: April 2, 2008
    Date of Patent: April 27, 2010
    Assignee: Intel Corporation
    Inventors: Adrien R. Lavoie, John J. Plombon, Juan E. Dominguez, Harsono S. Simka, Mansour Moinpour
  • Patent number: 7700989
    Abstract: Embodiments of a dielectric layer containing a hafnium titanium oxide film structured as one or more monolayers include the dielectric layer disposed in an integrated circuit. Embodiments of methods of fabricating such a dielectric layer provide a dielectric layer for use in a variety of electronic devices.
    Type: Grant
    Filed: December 1, 2006
    Date of Patent: April 20, 2010
    Assignee: Micron Technology, Inc.
    Inventors: Kie Y. Ahn, Leonard Forbes
  • Patent number: 7691757
    Abstract: Methods are provided for pulsed chemical vapor deposition (CVD) of complex nitrides, such as ternary metal nitrides. Pulses of metal halide precursors are separated from one another and nitrogen-containing precursor is provided during the metal halide precursor pulses as well as between the metal halide precursor pulses. Two different metal halide precursors can be provided in simultaneous pulses, alternatingly, or in a variety of sequences. The nitrogen-containing precursor, such as ammonia, can be provided in pulses simultaneously with the metal halide precursors and between the metal halide precursors, or continuously throughout the deposition. Temperatures can be kept between about 300° C. and about 700° C.
    Type: Grant
    Filed: June 21, 2007
    Date of Patent: April 6, 2010
    Assignee: ASM International N.V.
    Inventors: Suvi P. Haukka, Tanja Claasen, Peter Zagwijn
  • Patent number: 7691758
    Abstract: A method of forming an insulating film according to one embodiment of the present invention, which is a method of forming an insulating film for use in a semiconductor device, performs thermal oxidation of a tantalum nitride film at a temperature range of 200 to 400 degrees centigrade by a wet oxidation process, whereby a tantalum oxide film is formed as the insulating film.
    Type: Grant
    Filed: August 21, 2007
    Date of Patent: April 6, 2010
    Assignee: NEC Electronics Corporation
    Inventor: Takayuki Iwaki
  • Publication number: 20100081292
    Abstract: A gas delivery apparatus comprises: a chamber surrounding a substrate to be processed; a showerhead disposed within the chamber; and gas supply means supplying a gas comprising a mixture of NH3 and H2 to the chamber, in which a coating layer deposited on the interior of the chamber and the showerhead contain nickel (Ni). When the apparatus is utilized to practice a method comprising exposing an object W to a gas comprising a mixture consisting of NH3 and H2, the H2/NH3 gas flow rate ratio and the temperature are controlled so that the reaction of nickel contained in the coating layer deposited on the interior of the chamber and the showerhead is suppressed.
    Type: Application
    Filed: June 20, 2006
    Publication date: April 1, 2010
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Kensaku Narushima, Satoshi Wakabayashi
  • Publication number: 20100075510
    Abstract: A method for pulsed plasma deposition of titanium dioxide film is revealed. The method includes the steps of: (1) set a substrate into a chamber and the chamber is pumped down to a certain vacuum level. (2) Introduce titanium tetraisopropoxide gas and gas containing oxygen into the chamber and a RF (radio frequency) pulse power supply is turned on to create a glow discharge for generating pulsed plasma. (3) A layer of titanium dioxide film is deposited on the substrate by the pulsed plasma. The TiO2 film is deposited on a substrate such as plastic substrate at low temperature according to the method so that the heat-resistant and conductive requirements of conventional substrates are removed.
    Type: Application
    Filed: September 25, 2008
    Publication date: March 25, 2010
    Inventors: Der-Jun JAN, Chi-Fong Ai
  • Patent number: 7678711
    Abstract: A SiO2 film is formed on a semiconductor substrate. Then, a SiN film is formed on the SiO2 film. In this event bis(tertiary butyl amino) silane and NH3 are used as a material gas, and the film forming temperature is set to 600° C. or lower.
    Type: Grant
    Filed: June 8, 2005
    Date of Patent: March 16, 2010
    Assignee: Fujitsu Microelectronics Limited
    Inventors: Mitsuaki Hori, Hiroyuki Ohta, Katsuaki Ookoshi
  • Patent number: 7678710
    Abstract: The present invention generally provides methods and apparatuses that are adapted to form a high quality dielectric gate layer on a substrate. Embodiments contemplate a method wherein a metal plasma treatment process is used in lieu of a standard nitridization process to form a high dielectric constant layer on a substrate. Embodiments further contemplate an apparatus adapted to “implant” metal ions of relatively low energy in order to reduce ion bombardment damage to the gate dielectric layer, such as a silicon dioxide layer and to avoid incorporation of the metal atoms into the underlying silicon. In general, the process includes the steps of forming a high-k dielectric and then terminating the surface of the deposited high-k material to form a good interface between the gate electrode and the high-k dielectric material.
    Type: Grant
    Filed: December 20, 2006
    Date of Patent: March 16, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Thai Cheng Chua, Steven Hung, Patricia M. Liu, Tatsuya Sato, Alex M. Paterson, Valentin Todorov, John P. Holland
  • Patent number: 7678708
    Abstract: A method of forming (and apparatus for forming) a metal oxide layer, preferably a dielectric layer, on a substrate, particularly a semiconductor substrate or substrate assembly, using a vapor deposition process and ozone with one or more metal organo-amine precursor compounds.
    Type: Grant
    Filed: January 13, 2009
    Date of Patent: March 16, 2010
    Assignee: Micron Technology, Inc.
    Inventors: Brian A. Vaartstra, Timothy A. Quick
  • Publication number: 20100062614
    Abstract: Embodiments of the invention provide a method for treating the inner surfaces of a processing chamber and depositing a material on a during a vapor deposition process, such as atomic layer deposition (ALD) or by chemical vapor deposition (CVD). In one embodiment, the inner surfaces of the processing chamber and the substrate may be exposed to a reagent, such as a hydrogenated ligand compound during a pretreatment process. The hydrogenated ligand compound may be the same ligand as a free ligand formed from the metal-organic precursor used during the subsequent deposition process. The free ligand is usually formed by hydrogenation or thermolysis during the deposition process. In one example, the processing chamber and substrate are exposed to an alkylamine compound (e.g., dimethylamine) during the pretreatment process prior to conducting the vapor deposition process which utilizes a metal-organic chemical precursor having alkylamino ligands, such as pentakis(dimethylamino) tantalum (PDMAT).
    Type: Application
    Filed: September 8, 2008
    Publication date: March 11, 2010
    Inventors: Paul F. Ma, Joseph F. Aubuchon, Mei Chang, Steven H. Kim, Dien-Yeh Wu, Norman M. Nakashima, Mark Johnson, Roja Palakodeti
  • Patent number: 7674726
    Abstract: Processing methods and internal reactor parts avoid peeling and particle generation caused by differences in the coefficients of thermal expansion (CTE's) between reactor parts and films deposited on the reactor parts in hot wall CVD chambers. Conventional materials for reactor parts have relatively low CTE's, resulting in significant CTE differences with modem films, which can be deposited on the surfaces of reactor parts during semiconductor processing. Such CTE differences can cause cracking and flaking of the deposited films, thereby leading to particle generation. Reactor parts, such as boats and pedestals, which undergo large thermal cycles even in a hot wall chamber, are made of materials having a CTE greater than about 5×10?6 K?1, in order to more closely match the CTE of deposited materials, such TiN.
    Type: Grant
    Filed: October 13, 2005
    Date of Patent: March 9, 2010
    Assignee: ASM International N.V.
    Inventors: Albert Hasper, Theodorus Gerardus Maria Oosterlaken
  • Patent number: 7674680
    Abstract: The invention is directed to a device for regulating the flow of electric current with high dielectric constant gate insulating layer and a source and/or drain forming a Schottky contact or Schottky-like region with a substrate and its fabrication method. In one aspect, the gate insulating layer has a dielectric constant greater than the dielectric constant of silicon. In another aspect, the current regulating device may be a MOSFET device, optionally a planar P-type or N-type MOSFET, having any orientation. In another aspect, the source and/or drain may consist partially or fully of a silicide.
    Type: Grant
    Filed: October 5, 2004
    Date of Patent: March 9, 2010
    Assignee: Avolare 2, LLC
    Inventors: John P. Snyder, John P. Larson
  • Patent number: 7674446
    Abstract: A hafnium silicide target is provided. The target is used for forming a gate oxide film composed of HfSi1.02-2.00. The target material is superior in workability and embrittlement resistance and is suitable for forming a HfSiO film and HfSiON film that may be used as a high dielectric gate insulation film in substitute for a SiO2 film. A method of manufacturing the above referenced hafnium silicide target is also provided.
    Type: Grant
    Filed: March 3, 2009
    Date of Patent: March 9, 2010
    Assignee: Nippon Mining & Metals Co., Ltd
    Inventors: Shuichi Irumata, Ryo Suzuki
  • Publication number: 20100048032
    Abstract: Methods and apparatus for a gas delivery assembly are provided herein. In some embodiments, the gas delivery assembly includes a gas inlet funnel having a first volume and one or more gas conduits; each gas conduit having an inlet and an outlet for facilitating the flow of a gas therethrough and into the first volume, wherein each gas conduit has a second volume less than the first volume, and wherein each gas conduit has a cross-section that increases from a first cross-section proximate the inlet to a second cross-section proximate the outlet, wherein the second cross-section is non-circular. In some embodiments, each conduit has a longitudinal axis that intersects a central axis of the gas inlet funnel.
    Type: Application
    Filed: August 22, 2008
    Publication date: February 25, 2010
    Applicant: APPLIED MATERIALS, INC.
    Inventors: KEDARNATH SANGAM, Anh N. Nguyen
  • Patent number: 7666801
    Abstract: A method of forming (and an apparatus for forming) a metal oxide layer on a substrate, particularly a semiconductor substrate or substrate assembly, using a vapor deposition process and one or more precursor compounds that include aminosilane ligands.
    Type: Grant
    Filed: October 9, 2008
    Date of Patent: February 23, 2010
    Assignee: Micron Technology, Inc.
    Inventors: Brian A. Vaartstra, Timothy A. Quick
  • Publication number: 20100041244
    Abstract: Electronic apparatus and methods may include a hafnium tantalum oxynitride film on a substrate for use in a variety of electronic systems. The hafnium tantalum oxynitride film may be structured as one or more monolayers. The hafnium tantalum oxynitride film may be formed using atomic layer deposition. Metal electrodes may be disposed on a dielectric containing a hafnium tantalum oxynitride film.
    Type: Application
    Filed: October 19, 2009
    Publication date: February 18, 2010
    Inventors: Leonard Forbes, Kie Y. Ahn, Arup Bhattacharyya
  • Patent number: 7662729
    Abstract: Electronic apparatus and methods of forming the electronic apparatus include a conductive layer having a layer of ruthenium in contact with a lanthanide oxide dielectric layer for use in a variety of electronic systems. The lanthanide oxide dielectric layer and the layer of ruthenium may be structured as one or more monolayers. The lanthanide oxide dielectric layer and the layer of ruthenium may be formed by atomic layer deposition.
    Type: Grant
    Filed: April 28, 2005
    Date of Patent: February 16, 2010
    Assignee: Micron Technology, Inc.
    Inventors: Kie Y. Ahn, Leonard Forbes
  • Patent number: 7659215
    Abstract: Disclosed herein is a method of depositing a nanolaminate film for next-generation non-volatile floating gate memory devices by atomic layer deposition. The method includes the steps of: introducing a substrate into an atomic layer deposition reactor; forming on the substrate a first high-dielectric-constant layer by alternately supplying an oxygen source and a metal source selected from among an aluminum source, a zirconium source and a hafnium source; forming on the first high-dielectric-constant layer a nickel oxide layer by alternately supplying a nickel source and an oxygen source; and forming on the nickel oxide layer a second high-dielectric-constant layer by alternately supplying an oxygen source and a metal source selected from among an aluminum source, a zirconium source and a hafnium source.
    Type: Grant
    Filed: August 29, 2007
    Date of Patent: February 9, 2010
    Assignee: Korea Research Institute of Chemical Technology
    Inventors: Chang-Gyoun Kim, Young-Kuk Lee, Taek-Mo Chung, Ki-Seok An, Sun-Sook Lee, Won-Tae Cho
  • Publication number: 20100029054
    Abstract: A dielectric layer containing a hafnium tantalum oxide film and a method of fabricating such a dielectric layer produce a dielectric layer for use in a variety of electronic devices. Embodiments include structures for capacitors, transistors, memory devices, and electronic systems with dielectric layers containing a hafnium tantalum oxide film structured as one or more monolayers.
    Type: Application
    Filed: October 12, 2009
    Publication date: February 4, 2010
    Inventors: Kie Y. Ahn, Leonard Forbes
  • Patent number: 7655549
    Abstract: A method to improve a high-k dielectric film and metal gate interface in the fabrication of a MOSFET by depositing a metal gate on a high-k dielectric, the method includes annealing a substrate with a high-k dielectric film deposited thereon in a thermal annealing module and depositing a metal gate material on the annealed substrate in a metal gate deposition module, wherein the annealing step and the depositing step are carried out consecutively without a vacuum break.
    Type: Grant
    Filed: February 6, 2006
    Date of Patent: February 2, 2010
    Assignee: Canon Anelva Corporation
    Inventors: Wickramanayaka Sunil, Motomu Kosuda, Naoki Yamada, Naomu Kitano
  • Patent number: 7651953
    Abstract: Multiple sequential processes are conducted in a reaction chamber to form ultra high quality silicon-containing compound layers, including silicon nitride layers. In a preferred embodiment, a silicon layer is deposited on a substrate using trisilane as the silicon precursor. A silicon nitride layer is then formed by nitriding the silicon layer. By repeating these steps, a silicon nitride layer of a desired thickness is formed.
    Type: Grant
    Filed: October 23, 2007
    Date of Patent: January 26, 2010
    Assignee: ASM America, Inc.
    Inventors: Michael A. Todd, Keith D. Weeks, Christiaan J. Werkhoven, Christophe F. Pomarede
  • Patent number: 7648874
    Abstract: In a method of manufacturing a dielectric structure, after a first dielectric layer is formed on a substrate by using a metal oxide doped with silicon, the substrate is placed on a susceptor of a chamber. By treating the first dielectric layer with a plasma in controlling a voltage difference between the susceptor and a ground, a second dielectric layer is formed on the first dielectric layer. The second dielectric layer including a metal oxynitride doped with silicon having enough content of nitrogen is formed on the first dielectric layer. Therefore, dielectric properties of the dielectric structure comprising the first and the second dielectric layers can be improved and a leakage current can be greatly decreased. By adapting the dielectric structure to a gate insulation layer and/or to a dielectric layer of a capacitor or of a non-volatile semiconductor memory device, capacitances and electrical properties can be improved.
    Type: Grant
    Filed: January 25, 2006
    Date of Patent: January 19, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-Cheol Lee, Sung-Tae Kim, Young-Sun Kim, Cha-Young Yoo, Gab-Jin Nam, Young-Geun Park, Jae-Hyoung Choi, Jae-Hyun Yeo, Ha-Jin Lim, Yun-Seok Kim
  • Patent number: 7648854
    Abstract: Provided herein are methods of forming a metal oxide layer that include providing an organometallic compound and an oxidizing agent to the substrate to form the metal oxide layer on the substrate. The organometallic compound may have the general formula of M(NR1R2)3R3, wherein M is a metal; R1 and R2 are each independently hydrogen or alkyl; and R3 is selected from the group consisting of alkyl, cycloalkyl, heterocycloalkyl, aryl and heteroaryl.
    Type: Grant
    Filed: November 16, 2007
    Date of Patent: January 19, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-Ho Lee, Jun-Hyun Cho, Youn-Joung Cho, Seung-Min Ryu, Kyoo-Chul Cho, Jung-Sik Choi
  • Patent number: 7648926
    Abstract: A method of forming (and an apparatus for forming) a metal oxide layer on a substrate, particularly a semiconductor substrate or substrate assembly, using a vapor deposition process and one or more precursor compounds that include diketonate ligands and/or ketoimine ligands.
    Type: Grant
    Filed: July 13, 2006
    Date of Patent: January 19, 2010
    Assignee: Micron Technology, Inc.
    Inventor: Brian A. Vaartstra
  • Patent number: 7646073
    Abstract: A ferroelectric capacitor includes: a base substrate; a buffer layer formed above the base substrate; a lower electrode formed above the buffer layer; a ferroelectric layer formed above the lower electrode; and an upper electrode formed above the ferroelectric layer, wherein the buffer layer includes titanium (Ti) and cobalt (Co) as metal elements, and a metal element ratio x is 0.05?x<1, when Ti:Co=1?x:x.
    Type: Grant
    Filed: February 28, 2007
    Date of Patent: January 12, 2010
    Assignee: Seiko Epson Corporation
    Inventor: Yasuaki Hamada
  • Patent number: 7645709
    Abstract: Methods of fabricating an oxide layer on a semiconductor substrate are provided herein. In some embodiments, a method of forming an oxide layer on a semiconductor substrate includes placing a substrate to be oxidized on a substrate support in a vacuum chamber of a plasma reactor, the chamber having an ion generation region remote from the substrate support; introducing a process gas into the chamber, the process gas comprising at least one of hydrogen (H2) and oxygen (O2)—provided at a flow rate ratio of hydrogen (H2) to oxygen (O2) of up to about 3:1—or water vapor (H2O vapor); and generating an inductively coupled plasma in the ion generation region of the chamber to form a silicon oxide layer on the substrate.
    Type: Grant
    Filed: July 30, 2007
    Date of Patent: January 12, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Thai Cheng Chua, James P. Cruse, Cory Czarnik
  • Patent number: 7645694
    Abstract: Methods of developing or removing a select region of block copolymer films using a polar supercritical solvent to dissolve a select portion are disclosed. In one embodiment, the polar supercritical solvent includes chlorodifluoromethane, which may be exposed to the block copolymer film using supercritical carbon dioxide (CO2) as a carrier or chlorodiflouromethane itself in supercritical form. The invention also includes a method of forming a nano-structure including exposing a polymeric film to a polar supercritical solvent to develop at least a portion of the polymeric film. The invention also includes a method of removing a poly(methyl methacrylate-b-styrene) (PMMA-b-S) based resist using a polar supercritical solvent.
    Type: Grant
    Filed: June 20, 2008
    Date of Patent: January 12, 2010
    Assignee: International Business Machines Corporation
    Inventors: Matthew E. Colburn, Dmitriy Shneyder, Shahab Siddiqui
  • Patent number: 7642201
    Abstract: An iPVD system is programmed to deposit uniform material, such as barrier material, into high aspect ratio nano-size features on semiconductor substrates using a multi-step process within a vacuum chamber which enhances the sidewall coverage compared to the field and bottom coverage(s) while minimizing or eliminating overhang.
    Type: Grant
    Filed: January 24, 2008
    Date of Patent: January 5, 2010
    Assignee: Tokyo Electron Limited
    Inventors: Frank M. Cerio, Jr., Shigeru Mizuno, Tsukasa Matsuda, Adam Selsey
  • Patent number: 7642200
    Abstract: A method of forming a thin film is provided. The method includes introducing an organometallic compound represented by the following formula onto a substrate; wherein M represents a metal in listed in Group 4A of the periodic table of elements, R1, R2 and R3 independently represent hydrogen or an alkyl group having a carbon number from 1 to 5, and X represents hydrogen or an alkyl group having a carbon number from 1 to 5 and then chemisorbing a portion of the organometallic compound on the substrate. The method further includes removing a non-chemisorbed portion of the organometallic compound from the substrate, providing an oxidizing agent onto the substrate and forming a thin film including a metal oxide on the substrate by chemically reacting the oxidizing agent with a metal in the organometallic compound and by separating ligands of the organometallic compound.
    Type: Grant
    Filed: January 13, 2006
    Date of Patent: January 5, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-Ho Lee, Jun-Hyun Cho, Jung-Sik Choi, Sang-Mun Chon
  • Publication number: 20090311879
    Abstract: A method of forming on at least one support at least one metal containing dielectric films having the formula (M11-a M2a) Ob Nc, wherein: 0?a<1, 01 and M2 being metals Hf, Zr or Ti using precursors with pentadienyl ligands and/or cyclopentadienyl ligands.
    Type: Application
    Filed: June 2, 2006
    Publication date: December 17, 2009
    Applicant: L'Air Liquide, Societe Anonyme Pour L'Etude Et L'Exploitation Des Procedes Georges Claude
    Inventors: Nicolas Blasco, Christian Dussarrat
  • Publication number: 20090311878
    Abstract: A depositing method for a dielectric material is provided, where the dielectric material has the first and the second primary elements, and a single precursor includes the first and the second primary elements. The depositing method includes pulsing the single precursor, purging a redundant part of the single precursor, pulsing an oxidant for oxidizing the single precursor, and purging a redundant part of the oxidant.
    Type: Application
    Filed: August 26, 2008
    Publication date: December 17, 2009
    Applicant: NANYA TECHNOLOGY CORP.
    Inventors: Shin-Yu Nieh, Tsai-Yu Huang, Chun-I Hsieh
  • Patent number: 7632761
    Abstract: A method for producing a thin film titanium dioxide is disclosed. The disclosed method for producing the thin film titanium dioxide includes performing a magnetron reactive sputtering process to vaporize at least portions of a titanium source in a sputtering chamber that is supplied with gaseous oxygen. The vaporized titanium reacts with the oxygen to form anatase titanium dioxide, which is deposited on a substrate within the sputtering chamber.
    Type: Grant
    Filed: June 1, 2007
    Date of Patent: December 15, 2009
    Assignee: Wayne State University
    Inventors: Ibrahim Abdullah Al-Homoudi, Golam Newaz, Gregory W. Auner