Abstract: A trench structure that in one embodiment includes a trench present in a substrate, and a dielectric layer that is continuously present on the sidewalls and base of the trench. The dielectric layer has a dielectric constant that is greater than 30. The dielectric layer is composed of tetragonal phase hafnium oxide with silicon present in the grain boundaries of the tetragonal phase hafnium oxide in an amount ranging from 3 wt. % to 20 wt. %.

Abstract: ALD processing techniques for forming non-volatile resistive-switching memories are described. In one embodiment, a method includes forming a first electrode on a substrate, maintaining a pedestal temperature for an atomic layer deposition (ALD) process of less than 100° Celsius, forming at least one metal oxide layer over the first electrode, wherein the forming the at least one metal oxide layer is performed using the ALD process using a purge duration of less than 20 seconds, and forming a second electrode over the at least one metal oxide layer.

Abstract: A method and apparatus for manufacturing a semiconductor device is disclosed, which is capable of realizing an extension of a cleaning cycle for a processing chamber, the method comprising preheating a substrate; placing the preheated substrate onto a substrate-supporting unit provided in a susceptor while the preheated substrate is maintained at a predetermined height from an upper surface of the susceptor provided in a processing chamber; and forming a thin film on the preheated substrate, wherein a temperature of the preheated substrate is higher than a processing temperature for forming the thin film in the processing chamber.

Abstract: Disclosed are titanium-containing precursors and methods of synthesizing the same. The compounds may be used to deposit titanium, titanium oxide, strontium-titanium oxide, and barium strontium titanate containing layers using vapor deposition methods such as chemical vapor deposition or atomic layer deposition.

Abstract: A batch CVD method repeats a cycle including adsorption and reaction steps along with a step of removing residual gas. The adsorption step is preformed while supplying the source gas into the process container by first setting the source gas valve open for a first period and then setting the source gas valve closed, without supplying the reactive gas into the process container by keeping the reactive gas valve closed, and without exhausting gas from inside the process container by keeping the exhaust valve closed. The reaction step is performed without supplying the source gas into the process container by keeping the source gas valve closed, while supplying the reactive gas into the process container by setting the reactive gas valve open, and exhausting gas from inside the process container by setting the exhaust valve to gradually decrease its valve opening degree from a predetermined open state.

Abstract: In one example, we describe a new high performance AlGaN/GaN metal-insulator-semiconductor heterostructure field-effect transistor (MISHFET), which was fabricated using HfO2 as the surface passivation and gate insulator. The gate and drain leakage currents are drastically reduced to tens of nA, before breakdown. Without field plates, for 10 ?m of gate-drain spacing, the off-state breakdown voltage is 1035V with a specific on-resistance of 0.9 m?-cm2. In addition, there is no current slump observed from the pulse measurements. This is the best performance reported on GaN-based, fast power-switching devices on sapphire, up to now, which efficiently combines excellent device forward, reverse, and switching characteristics. Other variations, features, and examples are also mentioned here.

Abstract: There are provided a substrate processing apparatus, a method of manufacturing a semiconductor device, and a method of manufacturing a substrate, for growing a SiC epitaxial film at a high-temperature condition. The substrate processing apparatus comprises: a reaction chamber; a first gas supply system configured to supply at least a gas containing silicon atoms and a gas containing chlorine atoms, or a gas containing silicon and chlorine atoms; a second gas supply system configured to supply at least a reducing gas; a third gas supply system configured to supply at least a gas containing carbon atoms; a first gas supply nozzle connected to the first gas supply system or the first and third gas supply systems; a second gas supply nozzle connected to the second gas supply system or the second and third gas supply systems; and a controller configured to control the first to third gas supply systems.

Abstract: Provided are low temperature methods of depositing hafnium or zirconium containing films using a Hf(BH4)4 precursor, or Zr(BH4)4 precursor, respectively, as well as a co-reactant. The co-reactant can be selected to obtain certain film compositions. Co-reactants comprising an oxidant can be used to deposit oxygen into the film. Accordingly, also provided are films comprising a metal, boron and oxygen, wherein the metal comprises hafnium where a Hf(BH4)4 precursor is used, or zirconium, where a Zr(BH4)4 precursor is used.

Abstract: A method and apparatus are presented for reducing halide-based contamination within deposited titanium-based thin films. Halide adsorbing materials are utilized within the deposition chamber to remove halides, such as chlorine and chlorides, during the deposition process so that contamination of the titanium-based film is minimized. A method for regenerating the halide adsorbing material is also provided.

Abstract: Methods for forming a film on a substrate in a semiconductor manufacturing process. A reaction chamber a substrate in the chamber are provided. A ruthenium based precursor, which includes ruthenium tetroxide dissolved in a mixture of at least two non-flammable fluorinated solvents, is provided and a ruthenium containing film is produced on the substrate.

Abstract: By depositing a layer of oxidizing metal on the semiconductor surface first and then depositing a layer of the high-k oxide material over the layer of oxidizing metal by an atomic layer deposition, a high-k metal oxide is formed at the interface between the semiconductor substrate and the high-k oxide and prevents formation of the undesirable low-k semiconductor oxide layer at the semiconductor/high-k oxide interface.

Abstract: An apparatus and method are provided which allow the low cost patterned deposition of material onto a workpiece. A stencil mask, having chamfered edges is applied to the surface of the workpiece. The material is then deposited onto the workpiece, such as by PECVD. Because of the chamfered edges, the material thickness is much more uniform than is possible with traditional stencil masks. Stencil masks having a variety of cross sectional patterns are disclosed which improve deposition uniformity.

Abstract: Methods are provided for fabricating integrated circuits having controlled threshold voltages. In accordance with one embodiment a method includes forming a gate dielectric overlying an N-doped silicon substrate and depositing a layer of titanium nitride and a layer of tantalum nitride overlying the gate dielectric. A sub-monolayer of tantalum oxide is deposited overlying the layer of tantalum nitride by a process of atomic layer deposition, and oxygen is diffused from the tantalum oxide through the tantalum nitride and titanium nitride.

Abstract: A method of forming a thin-film device includes forming an oxide-semiconductor film formed on the first electrical insulator, and forming a second electrical insulator formed on the oxide-semiconductor film, the oxide-semiconductor film defining an active layer. The oxide-semiconductor film is comprised of a first interface layer located at an interface with the first electrical insulating insulator, a second interface layer located at an interface with the second electrical insulator, and a bulk layer other than the first and second interface layers. The method further includes oxidizing the oxide-semiconductor film to render a density of oxygen holes in at least one of the first and second interlayer layers is smaller than a density of oxygen holes in the bulk layer.

Abstract: A high-k capacitor insulating film stable at a higher temperature is formed. There is provided a method of manufacturing a semiconductor device. The method comprises: forming a first amorphous insulating film comprising a first element on a substrate; adding a second element different from the first element to the first amorphous insulating film so as to form a second amorphous insulating film on the substrate; and annealing the second amorphous insulating film at a predetermined annealing temperature so as to form a third insulating film by changing a phase of the second amorphous insulating film. The concentration of the second element added to the first amorphous insulating film is controlled according to the annealing temperature.

Abstract: A capacitor structure and method of forming it are described. In particular, a high-K dielectric oxide is provided as the capacitor dielectric. The high-K dielectric is deposited in a series of thin layers and oxidized in a series of oxidation steps, as opposed to a depositing a single thick layer. Further, at least one of the oxidation steps is less aggressive than the oxidation environment or environments that would be used to deposit the single thick layer. This allows greater control over oxidizing the dielectric and other components beyond the dielectric.

Abstract: A method of manufacturing a semiconductor device. In the method, an aluminum-containing insulation film is formed on an electrode film of a substrate by alternately repeating a process of supplying an aluminum precursor into a processing chamber in which the substrate is accommodated and exhausting the aluminum precursor from the processing chamber and a process of supplying an oxidizing or nitriding precursor into the processing chamber and exhausting the oxidizing or nitriding precursor from the processing chamber; and a high permittivity insulation film different from the aluminum-containing insulation film is formed on the aluminum-containing insulation film by alternately repeating a process of supplying a precursor into the processing chamber and exhausting the precursor from the processing chamber and a process of supplying an oxidizing precursor into the processing chamber and exhausting the oxidizing precursor from the processing chamber. In addition, heat treatment is performed on the substrate.

Abstract: Embodiments of a dielectric layer containing a hafnium tantalum titanium oxide film structured as one or more monolayers include the dielectric layer disposed in an integrated circuit. Embodiments of methods of fabricating such a dielectric layer provide a dielectric layer for use in a variety of electronic devices. An embodiment may include forming hafnium tantalum titanium oxide film using a monolayer or partial monolayer sequencing process such as atomic layer deposition.

Abstract: A method for processing a high-k dielectric layer includes the following steps. A semiconductor substrate is provided, and a high-k dielectric layer is formed thereon. The high-k dielectric layer has a crystalline temperature. Subsequently, a first annealing process is performed, and a process temperature of the first annealing process is substantially smaller than the crystalline temperature. A second annealing process is performed, and a process temperature of the second annealing process is substantially larger than the crystalline temperature.

Abstract: Methods of manufacturing semiconductor devices including multilayer dielectric layers are disclosed. The methods include forming a multilayer dielectric layer including metal atoms and silicon atoms on a semiconductor substrate. The multilayer dielectric layer includes at least two crystalline metal silicate layers having different silicon concentrations. The multilayer dielectric layer may be used, for example, as a dielectric layer for a capacitor, or as a blocking layer for a nonvolatile memory device.

Abstract: A method of forming (and apparatus for forming) a metal oxide layer, preferably a dielectric layer, on a substrate, particularly a semiconductor substrate or substrate assembly, using a vapor deposition process and ozone with one or more metal organo-amine precursor compounds.

Abstract: MEMS devices (such as interferometric modulators) may be fabricated using a sacrificial layer that contains a heat vaporizable polymer to form a gap between a moveable layer and a substrate. One embodiment provides a method of making a MEMS device that includes depositing a polymer layer over a substrate, forming an electrically conductive layer over the polymer layer, and vaporizing at least a portion of the polymer layer to form a cavity between the substrate and the electrically conductive layer.

Abstract: A semiconductor device production method includes: forming a gate insulating film on the p-type region of a semiconductor substrate; forming a first aluminum oxide film with an oxygen content lower than stoichiometric composition on the gate insulating film; forming a tantalum-nitrogen-containing film that contains tantalum and nitrogen on the first aluminum oxide film; forming an electrically conductive film on the tantalum-nitrogen-containing film; patterning the electrically conductive film to form a gate electrode; injecting n-type impurities into the p-type region using the gate electrode as a mask; and carrying out heat treatment after the formation of the tantalum-nitrogen-containing film.

Abstract: In a manufacturing process of a semiconductor device, a manufacturing technique and a manufacturing apparatus of a semiconductor device which simplify a lithography step using a photoresist is provided, so that the manufacturing cost is reduced, and the throughput is improved. An irradiated object, in which a light absorbing layer and an insulating layer are stacked over a substrate, is irradiated with a multi-mode laser beam and a single-mode laser beam so that both the laser beams overlap with each other, and an opening is formed by ablation in part of the irradiated object the irradiation of which is performed so that both the laser beams overlap with each other.

Abstract: The present invention relates to a method for enhancing uniformity of metal oxide coatings formed by Atomic Layer Deposition (ALD) or ALD-type processes. Layers are formed using alternating pulses of metal halide and oxygen-containing precursors, preferably water, and purging when necessary. An introduction of modificator pulses following the pulses of the oxygen-containing precursor affects positively on layer uniformity, which commonly exhibits gradients, particularly in applications with closely arranged substrates. In particular, improvement in layer thickness uniformity is obtained. According to the invention, alcohols having one to three carbon atoms can be used as the modificator.

Abstract: A method for tuning the work function of a metal gate of the PMOS device is disclosed. The method comprises depositing a layer of metal nitride or a metal on a layer of high-k gate dielectric by physical vapor deposition (PVD), as a metal gate; doping the metal gate with dopants such as Al, Pt, Ru, Ga, Ir by ion implantation; and driving the doped metal ions to the interface between the high-k gate dielectric and interfacial SiO2 by high-temperature annealing so that the doped metal ions accumulate at the interface or generate dipoles by interfacial reaction, which in turn tunes the work function of the metal gate. The method can be widely used and its process is simple and convenient, has a better ability of tuning the work function of the metal gate, and is compatible with the conventional CMOS process.

Abstract: A method for manufacturing a semiconductor device that improves the reliability of a metal cap layer and productivity. The method includes an insulation layer step of superimposing an insulation layer(11) on a semiconductor substrate (2) including an element region (2b), a recess step of forming a recess (12) in the insulation layer (11), a metal layer step of embedding a metal layer (13) in the recess (12), a planarization step of planarizing a surface of the insulation layer (11) and a surface of the metal layer (13) to be substantially flush with each other, and a metal cap layer step of forming a metal cap layer (16) containing at least zirconium element and nitrogen element on the surface of the insulation layer (11) and the surface of the metal layer (13) after the planarization step.

Abstract: A semiconductor device manufacturing method includes the steps of forming a silicate film by performing a first step of forming a metal oxide film on a silicon substrate, and a second step of inducing a solid phase reaction between the metal oxide film and a surface of the silicon substrate by heat treatment, and forming a high dielectric constant insulating film on the silicate film.

Abstract: Embodiments of the invention provide methods for forming dielectric materials on a substrate. In one embodiment, a method includes exposing a substrate surface to a first oxidizing gas during a pretreatment process, wherein the first oxidizing gas contains a mixture of ozone and oxygen having an ozone concentration within a range from about 1 atomic percent to about 50 atomic percent and forming a hafnium-containing material on the substrate surface by exposing the substrate surface sequentially to a deposition gas and a second oxidizing gas during an atomic layer deposition (ALD) process, wherein the deposition gas contains a hafnium precursor, the second oxidizing gas contains water, and the hafnium-containing material has a thickness within a range from about 5 ? to about 300 ?. In one example, the hafnium-containing material contains hafnium oxide having the chemical formula of HfOx, whereas x is less than 2, such as about 1.8.

Abstract: There is disclosed a method of forming crystalline tantalum pentoxide on a ruthenium-containing material having an oxygen-containing surface wherein the oxygen-containing surface is contacted with a treating composition, such as water, to remove at least some oxygen. Crystalline tantalum pentoxide is formed on at least a portion of the surface having reduced oxygen content.

Abstract: When forming the strain-inducing semiconductor alloy in one type of transistor of a sophisticated semiconductor device, superior thickness uniformity of a dielectric cap material of the gate electrode structures may be achieved by forming encapsulating spacer elements on each gate electrode structure and providing an additional hard mask material. Consequently, in particular, in sophisticated replacement gate approaches, the dielectric cap material may be efficiently removed in a later manufacturing stage, thereby avoiding any irregularities upon replacing the semiconductor material by an electrode metal.

Abstract: A fabricating method of a MOS transistor includes the following steps. A substrate is provided. A gate dielectric layer is formed on the substrate. A nitridation process containing nitrogen plasma and helium gas is performed to nitride the gate dielectric layer. A fin field-effect transistor and fabrication method thereof are also provided.

Abstract: The invention includes inserting an object to be processed into a processing vessel, which can be maintained vacuum, and making the processing vessel vacuum; performing a sequence of forming a ZrO2 film on a substrate by alternately supplying zirconium source and an oxidizer into the processing vessel for a plurality of times and a sequence of forming SiO2 film on the substrate by alternately supplying silicon source and an oxidizer into the processing vessel for one or more times, wherein the number of times of performing each of the sequences is adjusted such that Si concentration of the films is from about 1 atm % to about 4 atm %; and forming a zirconia-based film having a predetermined thickness by performing the film forming sequences for one or more cycles, wherein one cycle indicates that each of the ZrO2 film forming sequences and the SiO2 film forming sequences are repeated for the adjusted number of times of performances.

Abstract: A method is provided for forming a semiconductor device containing a buried threshold voltage adjustment layer. The method includes providing a substrate containing an interface layer, depositing a first high-k film on the interface layer, depositing a threshold voltage adjustment layer on the first high-k film, and depositing a second high-k film on the threshold voltage adjustment layer such that the threshold voltage adjustment layer is interposed between the first and second high-k films. The semiconductor device containing a patterned gate stack is described.

Abstract: A semiconductor process having a dielectric layer including metal oxide is provided. The semiconductor process includes: A substrate is provided. A dielectric layer including metal oxide is formed on the substrate, wherein the dielectric layer has a plurality of oxygen-related vacancies. A first oxygen-importing process is performed to fill the oxygen-related vacancies with oxygen. Otherwise, three MOS transistor processes are also provided, each of which has a gate dielectric layer including a high dielectric constant, and a first oxygen-importing process is performed to fill the oxygen-related vacancies with oxygen.

Abstract: A substrate treating method comprising a step of preparing a semiconductor substrate (W, 11) which has an oxide film (13, 14) containing at least one of a rare earth oxide and an alkaline earth oxide, at least a portion of the oxide film (13, 14) being exposed, and a rinse step of supplying the oxide film (13, 14) on the semiconductor substrate (W, 11) with a rinse liquid made of an alkaline chemical or an organic solvent. Preferably, the alkaline chemical is an alkaline aqueous solution having a pH of more than 7. Further, preferably, the organic solvent is a high concentration organic solvent having a concentration of substantially 100%.

Abstract: A method of forming a dielectric layer on a further layer of a semiconductor device is disclosed. The method comprises depositing a dielectric precursor compound and a further precursor compound over the further layer, the dielectric precursor compound comprising a metal ion from the group consisting of Yttrium and the Lanthanide series elements, and the further precursor compound comprising a metal ion from the group consisting of group IV and group V metals; and chemically converting the dielectric precursor compound and the further precursor compound into a dielectric compound and a further compound respectively, the further compound self-assembling during said conversion into a plurality of nanocluster nuclei within the dielectric layer formed from the first dielectric precursor compound. The nanoclusters may be dielectric or metallic in nature. Consequently, a dielectric layer is formed that has excellent charge trapping capabilities.

Abstract: A manufacturing method of a metal gate structure includes providing a substrate having at least a first metal oxide layer formed thereon, and transferring the surface of the first metal oxide layer into a second metal oxide layer. The first metal oxide layer includes a metal oxide (M1Ox) of a first metal (M1) and the second metal oxide layer includes a metal oxide ((M1M2Oy) of the first metal and a second metal (M2).

Abstract: A process for forming gate structures is described. A web comprises a substrate, a plurality of conductive elements disposed on the substrate, and a conductive anodization bus. The web is moved through an anodization station to form a plurality of gate structures comprising a plurality of gate dielectrics adjacent to a plurality of gate electrodes. A process for forming electronic devices further providing a semiconductor, a source electrode, and a drain electrode is described.

Abstract: Provided are methods for depositing a high-k dielectric film on a substrate. The methods comprise annealing a substrate after cleaning the surface to create dangling bonds and depositing the high-k dielectric film on the annealed surface.

Abstract: A method of forming a dielectric stack devoid of an interfacial layer includes subjecting an exposed interfacial layer provided on a semiconductor material to a low pressure thermal anneal process for a predetermined time period at a temperature of about 900° C. to about 1000° C. with an inert gas purge. A semiconductor structure is also disclosed, with a dielectric stack devoid of an interfacial layer.

Abstract: A resistive-switching memory element is described. The memory element includes a first electrode, a porous layer over the first electrode including a point defect embedded in a plurality of pores of the porous layer, and a second electrode over the porous layer, wherein the nonvolatile memory element is configured to switch between a high resistive state and a low resistive state.

Abstract: Provided are methods for depositing a cerium doped hafnium containing high-k dielectric film on a substrate. The reagents of specific methods include hafnium tetrachloride, an organometallic complex of cerium and water.

Abstract: Disclosed herein is a method for making a semiconductor device including the steps of: forming a light-receiving portion for carrying out photoelectric conversion in a semiconductor substrate; forming an insulating film to cover a light-receiving side of the semiconductor substrate; forming a metallic light-shielding film to partly cover the insulating film in correspondence to the light-receiving portion; and heating the metallic light-shielding film by irradiation of the metallic light-shielding film with a microwave to permit selective annealing of a laminated portion with the metallic light-shielding film in the insulating film.

Abstract: To provide a method of manufacturing a dielectric film having a high dielectric constant. In an embodiment of the present invention, an HfN/Hf laminated film is formed on a substrate on which a thin silicon oxide film is formed and a dielectric film of a metal nitride made of a mixture of Hf, Si, O and N is manufactured by annealing treatment. According to the present invention, it is possible to (1) reduce an EOT, (2) reduce a leak current to Jg=1.0×10?1 A/cm2 or less, (3) suppress hysteresis caused by the generation of fixed charges, and (4) prevent an increase in EOT even if heat treatment at 700° C. or more is performed and obtain excellent heat resistance.

Abstract: Embodiments of the invention generally relate to nonvolatile memory devices, such as a ReRAM cells, and methods for manufacturing such memory devices, which includes optimized, atomic layer deposition (ALD) processes for forming metal oxide film stacks. The metal oxide film stacks contain a metal oxide coupling layer disposed on a metal oxide host layer, each layer having different grain structures/sizes. The interface disposed between the metal oxide layers facilitates oxygen vacancy movement. In many examples, the interface is a misaligned grain interface containing numerous grain boundaries extending parallel to the electrode interfaces, in contrast to the grains in the bulk film extending perpendicular to the electrode interfaces. As a result, oxygen vacancies are trapped and released during switching without significant loss of vacancies.

Abstract: A replacement gate structure and method of fabrication are disclosed. The method provides for fabrication of both high performance FET and low leakage FET devices within the same integrated circuit. Low leakage FET devices are fabricated with a hybrid gate dielectric comprised of a low-K dielectric layer and a high-K dielectric layer. High performance FET devices are fabricated with a low-K gate dielectric.

Abstract: High performance thin-film, transistors are entirely processed at temperatures not exceeding 150° C., using amorphous multi component dielectrics based on the mixture of high band gap and high dielectric constant (K) materials. The sputtered or ink jet printed mixed dielectric materials such as Ta2O5 with SiO2 or Al2O3 or HfO2 with SiO2 or Al2O3 are used. These multicomponent dielectrics allow producing amorphous dielectrics to be introduced in high stable electronic devices with low leakage currents, while preserving a high dielectric constant. This results in producing thin film transistors with remarkable electrical properties, such as the ones produced based on Ga—In—Zn oxide as channel layers and where the dielectric was the combination of the mixture Ta2O5:SiO2, exhibiting field-effect mobility exceeding 35 cm2 V?1 s?1, close to 0 V turn-on voltage, on/off ratio higher than 106 and subthreshold slope below 0.24 V dec?1.

Abstract: A dielectric layer containing a hafnium tantalum oxide film and a method of fabricating such a dielectric layer produce a dielectric layer for use in a variety of electronic devices. Embodiments include structures for capacitors, transistors, memory devices, and electronic systems with dielectric layers containing a hafnium tantalum oxide film structured as one or more monolayers.

Abstract: Methods of forming a roughened metal surface on a substrate are provided, along with structures comprising such roughened surfaces. In preferred embodiments roughened surfaces are formed by selectively depositing metal or metal oxide on a substrate surface to form discrete, three-dimensional islands. Selective deposition may be obtained, for example, by modifying process conditions to cause metal agglomeration or by treating the substrate surface to provide a limited number of discontinuous reactive sites. The roughened metal surface may be used, for example, in the manufacture of integrated circuits.