Insulative Material Is Compound Of Refractory Group Metal (i.e., Titanium (ti), Zirconium (zr), Hafnium (hf), Vanadium (v), Niobium (nb), Tantalum (ta), Chromium (cr), Molybdenum (mo), Tungsten (w), Or Alloy Thereof) Patents (Class 438/785)
  • Patent number: 7879680
    Abstract: Photoresist on a metal is removed with less oxidation of the metal surface by the invented ashing. During process, the matching of oxygen gas ratio and wafer temperature under downstream plasma which means no RF bias plasma is controlled for oxidation amount not to depend on ashing time with required photo resist rate in manufacturing.
    Type: Grant
    Filed: September 25, 2008
    Date of Patent: February 1, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Hiromi Sasaki, Masashige Moritoki
  • Publication number: 20110021001
    Abstract: Atomic layer deposition methods as described herein can be advantageously used to form a metal-containing layer on a substrate. For example, certain methods as described herein can form a strontium titanate layer that has low carbon content (e.g., low strontium carbonate content), which can result in layer with a high dielectric constant.
    Type: Application
    Filed: September 29, 2010
    Publication date: January 27, 2011
    Applicant: Micron Technology, Inc.
    Inventors: Bhaskar Srinivasan, John Smythe
  • Publication number: 20110014797
    Abstract: A film is formed so that the atomic numbers ratio of Sr to Ti, i.e., Sr/Ti, in the film is not less than 1.2 and not more than 3. The film is then annealed in an atmosphere containing not less than 0.001% and not more than 80% of O2 at 500° C. or above. An SrO film forming step or a TiO film forming step are repeated a plurality of times so that a sequence, in which a plurality of SrO film forming steps or/and a plurality of TiO film forming steps are performed continuously, is included. When Sr is oxidized after the adsorption of Sr, O3 and H2O are used as an oxidizing agent.
    Type: Application
    Filed: September 2, 2008
    Publication date: January 20, 2011
    Applicants: TOKYO ELECTRON LIMITED, ELPIDA MEMORY, INC.
    Inventors: Yumiko Kawano, Susumu Arima, Akinobu Kakimoto, Toshiyuki Hirota, Takakazu Kiyomura
  • Patent number: 7871883
    Abstract: The invention aims at enabling leakage current characteristics and a step coverage property to be improved by depositing a hafnium silicate film by utilizing an atomic layer evaporation method using a hafnium raw material, a silicon raw material and an oxidizing agent. Disclosed herein is a method of manufacturing a semiconductor device having a trench capacitor including a first electrode formed on an inner surface of a trench, a capacitor insulating film formed on a surface of the first electrode, and a second electrode formed on a surface of the capacitor insulating film. The method includes the step of depositing the capacitor insulating film in a form of a hafnium silicate film by utilizing an atomic layer deposition method using a hafnium raw material, a silicon raw material and an oxidizing agent.
    Type: Grant
    Filed: September 11, 2006
    Date of Patent: January 18, 2011
    Assignee: Sony Corporation
    Inventor: Takashi Ando
  • Patent number: 7871942
    Abstract: Processes for making a high K (dielectric constant) film using an ultra-high purity hafnium containing organometallic compound are disclosed. Also described are devices incorporating high K films made with high purity hafnium containing organometallic compounds.
    Type: Grant
    Filed: March 27, 2008
    Date of Patent: January 18, 2011
    Assignee: Applied Materials, Inc.
    Inventors: Shreyas S. Kher, Pravin K. Narwankar, Khaled Z. Ahmed, Yi Ma
  • Patent number: 7867847
    Abstract: The present invention provides a method of manufacturing a dielectric film having a high permittivity. An embodiment of the present invention is a method of manufacturing, on a substrate, a dielectric film including a metallic oxynitride containing an element A made of Hf or a mixture of Hf and Zr, an element B made of Al, and N and O. The manufacturing method includes: a step of forming a metallic oxynitride whose mole fractions of the element A, the element B, and N expressed as B/(A+B+N) has a range of 0.015?(B/A+B+N))?0.095 and N/(A+B+N) has a range of 0.045?(N/(A+B+N)) and a mole fraction O/A of the element A and O has a range expressed as 1.0<(O/A)<2.0, and having a noncrystalline structure; and a step of performing an annealing treatment at 700° C. or higher on the metallic oxynitride having a noncrystalline structure to form a metallic oxynitride including a crystalline phase with a cubical crystal incorporation percentage of 80% or higher.
    Type: Grant
    Filed: April 16, 2010
    Date of Patent: January 11, 2011
    Assignee: Canon Anelva Corporation
    Inventors: Naomu Kitano, Takashi Nakagawa, Toru Tatsumi
  • Patent number: 7867919
    Abstract: Lanthanum-metal oxide dielectric layers and methods of fabricating such dielectric layers provide an insulating layer in a variety of structures for use in a wide range of electronic devices and systems. In an embodiment, a lanthanum aluminum oxide dielectric layer is formed using a trisethylcyclopentadionatolanthanum precursor and/or a trisdipyvaloylmethanatolanthanum precursor.
    Type: Grant
    Filed: December 8, 2006
    Date of Patent: January 11, 2011
    Assignee: Micron Technology, Inc.
    Inventors: Kie Y. Ahn, Leonard Forbes
  • Patent number: 7867896
    Abstract: Embodiments of the invention provide a method for forming tantalum nitride materials on a substrate by employing an atomic layer deposition (ALD) process. The method includes heating a tantalum precursor within an ampoule to a predetermined temperature to form a tantalum precursor gas and sequentially exposing a substrate to the tantalum precursor gas and a nitrogen precursor to form a tantalum nitride material. Thereafter, a nucleation layer and a bulk layer may be deposited on the substrate. In one example, a radical nitrogen compound may be formed from the nitrogen precursor during a plasma-enhanced ALD process. A nitrogen precursor may include nitrogen or ammonia. In another example, a metal-organic tantalum precursor may be used during the deposition process.
    Type: Grant
    Filed: April 2, 2009
    Date of Patent: January 11, 2011
    Assignee: Applied Materials, Inc.
    Inventors: Wei Cao, Hua Chung, Vincent W. Ku, Ling Chen
  • Patent number: 7863202
    Abstract: An integrated circuit can be formed with a high-k dielectric layer. A first titanium oxide layer is deposited over a substrate using a first ALD process. A first metal oxide layer is also deposited over the substrate using a second ALD process. A second titanium oxide layer is deposited over the substrate using a third ALD process and a second metal oxide layer is deposited over the substrate using a fourth ALD process. The first and second metal oxides are preferably strontium oxide and/or aluminum oxide.
    Type: Grant
    Filed: December 20, 2007
    Date of Patent: January 4, 2011
    Assignee: Qimonda AG
    Inventor: Shrinivas Govindarajan
  • Publication number: 20100330813
    Abstract: The present invention provides a dielectric film having a high permittivity and a high heat resistance. An embodiment of the present invention is a dielectric film (103) including a composite oxynitride containing an element A made of Hf, an element B made of Al or Si, and N and O, wherein mole fractions of the element A, the element B, and N expressed as B/(A+B+N) range from 0.015 to 0.095 and N/(A+B+N) equals or exceeds 0.045, and has a crystalline structure.
    Type: Application
    Filed: September 10, 2010
    Publication date: December 30, 2010
    Applicant: CANON ANELVA CORPORATION
    Inventors: Takashi Nakagawa, Naomu Kitano, Toru Tatsumi
  • Patent number: 7858815
    Abstract: A method of forming (and apparatus for forming) a tantalum oxide layer on a substrate, particularly a semiconductor substrate or substrate assembly, using a vapor deposition process and a tantalum precursor compound that includes alkoxide ligands, for example.
    Type: Grant
    Filed: April 21, 2008
    Date of Patent: December 28, 2010
    Assignee: Micron Technology, Inc.
    Inventors: Brian A. Vaartstra, Timothy A. Quick
  • Patent number: 7838439
    Abstract: A stacked film has an insulating film containing hafnium formed above a silicon layer and a polysilicon layer formed on the insulating film. The stacked film is heated in an atmosphere containing oxygen and nitrogen and having the total pressure approximately equal to a partial pressure of the nitrogen.
    Type: Grant
    Filed: June 26, 2008
    Date of Patent: November 23, 2010
    Assignee: Semiconductor Technology Academic Research Center
    Inventors: Masaharu Oshima, Haruhiko Takahashi, Koji Usuda, Ziyuan Liu, Liu Guo-lin, Kazuto Ikeda, Masaki Yoshimaru
  • Patent number: 7838438
    Abstract: A dielectric layer, an MIM capacitor, a method of manufacturing the dielectric layer and a method of manufacturing the MIM capacitor. The method of manufacturing the dielectric layer includes chemically reacting a metal source with different amounts of an oxidizing agent based on the cycle of the chemical reactions in order to control leakage characteristics of the dielectric layer, the electrical characteristics of the dielectric layer, and the dielectric characteristics of the dielectric layer.
    Type: Grant
    Filed: February 28, 2006
    Date of Patent: November 23, 2010
    Assignee: Samsung Electronics Co., Ltd
    Inventors: Ki Vin Im, Jae Hyun Yeo, Kyoung Ryul Yoon, Jong Cheol Lee, Eun Ae Chung, Young Sun Kim
  • Patent number: 7838441
    Abstract: In one embodiment, a method for forming a titanium nitride barrier material on a substrate is provided which includes depositing a titanium nitride layer on the substrate by a metal-organic chemical vapor deposition (MOCVD) process, and thereafter, densifying the titanium nitride layer by exposing the substrate to a plasma process. In one example, the MOCVD process and the densifying plasma process is repeated to form a barrier stack by depositing a second titanium nitride layer on the first titanium nitride layer. In another example, a third titanium nitride layer is deposited on the second titanium nitride layer. Subsequently, the method provides depositing a conductive material on the substrate and exposing the substrate to a annealing process. In one example, each titanium nitride layer may have a thickness of about 15 ? and the titanium nitride barrier stack may have a copper diffusion potential of less than about 5×1010 atoms/cm2.
    Type: Grant
    Filed: April 20, 2009
    Date of Patent: November 23, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Amit Khandelwal, Avgerinos V. Gelatos, Christophe Marcadal, Mei Chang
  • Patent number: 7833906
    Abstract: Titanium silicon nitride (TiSiN) films are formed in a cyclic chemical vapor deposition process. In some embodiments, the TiSiN films are formed in a batch reactor using TiCl4, NH3 and SiH4 as precursors. Substrates are provided in a deposition chamber of the batch reactor. In each deposition cycle, a TiN layer is formed on the substrates by flowing TiCl4 into the deposition chamber simultaneously with NH3. The deposition chamber is subsequently flushed with NH3. to prepare the TiN layer for silicon incorporation. SiH4 is subsequently flowed into the deposition chamber. Silicon from the SiH4 is incorporated into the TiN layers to form TiSiN. Exposing the TiN layers to NH3 before the silicon precursor has been found to facilitate efficient silicon incorporation into the TiN layers to form TiSiN.
    Type: Grant
    Filed: December 11, 2008
    Date of Patent: November 16, 2010
    Assignee: ASM International N.V.
    Inventors: Martin A. Knapp, Guido Probst
  • Patent number: 7833913
    Abstract: A method is provided for forming doped hafnium zirconium based films by atomic layer deposition (ALD) or plasma enhanced ALD (PEALD). The method includes disposing a substrate in a process chamber and exposing the substrate to a gas pulse containing a hafnium precursor, a gas pulse containing a zirconium precursor, and a gas pulse containing one or more dopant elements. The dopant elements may be selected from Group II, Group XIII, silicon, and rare earth elements of the Periodic Table. Sequentially after each precursor and dopant gas pulse, the substrate is exposed to a gas pulse containing an oxygen-containing gas, a nitrogen-containing gas, or an oxygen- and nitrogen-containing gas. In alternative embodiments, the hafnium and zirconium precursors may be pulsed together, and either or both may be pulsed with the dopant elements. The sequential exposing steps may be repeated to deposit a doped hafnium zirconium based film with a predetermined thickness.
    Type: Grant
    Filed: March 20, 2007
    Date of Patent: November 16, 2010
    Assignee: Tokyo Electron Limited
    Inventor: Robert D. Clark
  • Publication number: 20100279515
    Abstract: A method for forming an atomic deposition layer is provided, which includes: (a) performing a first water pulse on a substrate; (b) performing a precursor pulse on the hydroxylated substrate, wherein the precursor reacts with the hydroxyl groups and forms a layer; (c) purging the substrate with an inert carrier gas; (d) exposing the layer to a second water pulse for at least about 3 seconds so that the layer has a minimum of 70 percent of surface hydroxyl groups thereon; (e) purging the layer with the inert carrier gas; and (f) repeating steps (b) to (e) to form a resultant atomic deposition layer.
    Type: Application
    Filed: June 3, 2010
    Publication date: November 4, 2010
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chen-Hua YU, Liang-Gi YAO
  • Patent number: 7824990
    Abstract: A semiconductor structure having a high-k dielectric and its method of manufacture is provided. A method includes forming a first dielectric layer over the substrate, a metal layer over the first dielectric layer, and a second dielectric layer over the metal layer. A method further includes annealing the substrate in an oxidizing ambient until the three layers form a homogenous high-k dielectric layer. Forming the first and second dielectric layers comprises a non-plasma deposition process such atomic layer deposition (ALD), or chemical vapor deposition (CVD). A semiconductor device having a high-k dielectric comprises an amorphous high-k dielectric layer, wherein the amorphous high-k dielectric layer comprises a first oxidized metal and a second oxidized metal. The atomic ratios of all oxidized metals are substantially uniformly within the amorphous high-k dielectric layer.
    Type: Grant
    Filed: January 10, 2006
    Date of Patent: November 2, 2010
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Vincent S. Chang, Fong-Yu Yen, Peng-Soon Lim, Jin Ying, Hun-Jan Tao
  • Patent number: 7825043
    Abstract: A method for fabricating a capacitor in a semiconductor device includes: forming a bottom electrode; forming a ZrxAlyOz dielectric layer on the bottom electrode using an atomic layer deposition (ALD) method, wherein the ZrxAlyOz dielectric layer comprises a zirconium (Zr) component, an aluminum (Al) component and an oxygen (O) component mixed in predetermined mole fractions of x, y and z, respectively; and forming a top electrode on the ZrxAlyOz dielectric layer.
    Type: Grant
    Filed: June 28, 2006
    Date of Patent: November 2, 2010
    Assignee: Hynix Semiconductor Inc.
    Inventor: Kee-Jeung Lee
  • Publication number: 20100270626
    Abstract: There is provided an improved method for depositing thin films using precursors to deposit binary oxides by atomic layer deposition (ALD) techniques. Also disclosed is an ALD method for depositing a high-k dielectric such as hafnium lanthanum oxide (HfLaO) on a substrate. Embodiments of the present invention utilize a combination of ALD precursor elements and cycles to deposit a film with desired physical and electrical characteristics. Electronic components and systems that integrate devices fabricated with methods consistent with the present invention are also disclosed.
    Type: Application
    Filed: April 27, 2009
    Publication date: October 28, 2010
    Inventor: Petri I. Raisanen
  • Patent number: 7816283
    Abstract: A method of depositing a high permittivity dielectric film on a doped silicon or silicon compound layer of a wafer. The method includes a first step of nitriding a specific element (A) such as hafnium Hf to form a nitride film (AxNy) on the silicon layer, wherein the specific element (A) and nitrogen (N) in the nitride film (AxNy) have a predetermined fraction relationship between x and y; a second step of oxidizing the nitride film in a oxygen atmosphere to form the dielectric film (AON).
    Type: Grant
    Filed: June 1, 2005
    Date of Patent: October 19, 2010
    Assignee: Canon Anelva Corporation
    Inventors: Sunil Wickramanayaka, Naoki Yamada
  • Patent number: 7816716
    Abstract: Source/drain diffusion layers and a channel region are formed in a polysilicon thin film formed on a substrate made of glass or the like, and furthermore, a gate electrode 6 is formed via a gate insulating film. A silicon hydronitride film is formed on the interlayer dielectric film, whereby the hydrogen concentration in an active element region including a switching thin film transistor can be maintained at a high level, and Si—H bonds in the silicon thin film become stable. In addition, by providing a ferroelectric film on the silicon hydronitride film via a lower electrode formed of a conductive oxide film, whereby the oxygen concentration of the ferroelectric capacitive element layer can be maintained at a high level, and generation of oxygen deficiency in the ferroelectric film is prevented.
    Type: Grant
    Filed: June 23, 2005
    Date of Patent: October 19, 2010
    Assignee: NEC Corporation
    Inventor: Hiroshi Tanabe
  • Publication number: 20100244192
    Abstract: The present invention provides a dielectric film having a high permittivity and a high heat resistance. An embodiment of the present invention is a dielectric film (103) including a composite oxynitride containing an element A made of Hf, an element B made of Al or Si, and N and O, wherein mole fractions of the element A, the element B, and N expressed as B/(A+B+N) range from 0.015 to 0.095 and N/(A+B+N) equals or exceeds 0.045, and has a crystalline structure.
    Type: Application
    Filed: April 14, 2010
    Publication date: September 30, 2010
    Applicant: CANON ANELVA CORPORATION
    Inventors: Takashi Nakagawa, Naomu Kitano, Toru Tatsumi
  • Patent number: 7799668
    Abstract: The present invention provides method of forming a gate dielectric that includes forming a metal source layer (210) comprising a metal and at least one nonmetallic element over a substrate (110). The metal source layer (210) is formed having a composition rich in the metal. A dielectric layer (310) comprising the metal is formed over the metal source layer (210).
    Type: Grant
    Filed: August 17, 2005
    Date of Patent: September 21, 2010
    Assignee: Texas Instruments Incorporated
    Inventors: Hiroaki Niimi, Luigi Colombo, James J. Chambers
  • Patent number: 7795160
    Abstract: Methods for forming metal silicate films are provided. The methods comprise contacting a substrate with alternating and sequential vapor phase pulses of a metal source chemical, a silicon source chemical and an oxidizing agent. In preferred embodiments, an alkyl amide metal compound and a silicon halide compound are used. Methods according to preferred embodiments can be used to form hafnium silicate and zirconium silicate films with substantially uniform film coverages on substrate surfaces comprising high aspect ratio features (e.g., vias and/or trenches).
    Type: Grant
    Filed: July 21, 2006
    Date of Patent: September 14, 2010
    Assignee: ASM America Inc.
    Inventors: Chang-gong Wang, Eric J. Shero, Glen Wilk, Jan Willem Maes
  • Patent number: 7795663
    Abstract: The present invention is directed to a dielectric thin film composition comprising: (1) one or more barium/titanium-containing additives selected from (a) barium titanate, (b) any composition that can form barium titanate during firing, and (c) mixtures thereof; dissolved in (2) organic medium; and wherein said thin film composition is doped with 0.002-0.05 atom percent of a dopant comprising an element selected from Sc, Cr, Fe, Co, Ni, Ca, Zn, Al, Ga, Y, Nd, Sm, Eu, Gd, Dy, Ho, Er, Yb, Lu and mixtures thereof and to capacitors comprising such compositions.
    Type: Grant
    Filed: June 21, 2005
    Date of Patent: September 14, 2010
    Assignee: E. I. du Pont de Nemours and Company
    Inventors: Seigi Suh, William J. Borland
  • Patent number: 7795061
    Abstract: MEMS devices (such as interferometric modulators) may be fabricated using a sacrificial layer that contains a heat vaporizable polymer to form a gap between a moveable layer and a substrate. One embodiment provides a method of making a MEMS device that includes depositing a polymer layer over a substrate, forming an electrically conductive layer over the polymer layer, and vaporizing at least a portion of the polymer layer to form a cavity between the substrate and the electrically conductive layer.
    Type: Grant
    Filed: December 29, 2005
    Date of Patent: September 14, 2010
    Assignee: Qualcomm MEMS Technologies, Inc.
    Inventors: Chun-Ming Wang, Jeffrey Lan, Teruo Sasagawa
  • Patent number: 7790556
    Abstract: Methods are provided herein for forming electrode layers over high dielectric constant (“high k”) materials. In the illustrated embodiments, a high k gate dielectric, such as zirconium oxide, is protected from reduction during a subsequent deposition of silicon-containing gate electrode. In particular, a seed deposition phase includes conditions designed for minimizing hydrogen reduction of the gate dielectric, including low hydrogen content, low temperatures and/or low partial pressures of the silicon source gas. Conditions are preferably changed for higher deposition rates and deposition continues in a bulk phase. Desirably, though, hydrogen diffusion is still minimized by controlling the above-noted parameters. In one embodiment, high k dielectric reduction is minimized through omission of a hydrogen carrier gas. In another embodiment, higher order silanes, aid in reducing hydrogen content for a given deposition rate.
    Type: Grant
    Filed: June 9, 2005
    Date of Patent: September 7, 2010
    Assignee: ASM America, Inc.
    Inventors: Christophe F. Pomarede, Michael E. Givens, Eric J. Shero, Michael A. Todd
  • Patent number: 7790627
    Abstract: A method of manufacturing a metal compound thin film is disclosed. The method may include forming a first metal compound layer on a substrate by atomic layer deposition, performing annealing on the first metal compound layer in an atmosphere containing a nitrogen compound gas, thereby diffusing nitrogen into the first metal compound layer, and forming a second metal compound layer on the first metal compound layer by atomic layer deposition.
    Type: Grant
    Filed: December 11, 2007
    Date of Patent: September 7, 2010
    Assignee: Rohm Co., Ltd.
    Inventors: Kunihiko Iwamoto, Toshihide Nabatame, Koji Tominaga, Tetsuji Yasuda
  • Patent number: 7785996
    Abstract: A nonvolatile memory device and a method of manufacturing the same are provided. The nonvolatile memory device includes a semiconductor substrate on which a source region, a drain region, and a channel region are formed, a silicon oxide layer formed on the channel region, a transition metal oxide layer having trap particles that trap electrons, formed on the silicon oxide layer, and a gate electrode formed on the transition metal oxide layer.
    Type: Grant
    Filed: October 19, 2005
    Date of Patent: August 31, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-hyun Lee, Kyu-sik Kim
  • Patent number: 7785958
    Abstract: A method for making a semiconductor device is described. That method comprises forming a first dielectric layer on a substrate, a trench within the first dielectric layer, and a second dielectric layer on the substrate. The second dielectric layer has a first part that is formed in the trench and a second part. After a first metal layer with a first workfunction is formed on the first and second parts of the second dielectric layer, part of the first metal layer is converted into a second metal layer with a second workfunction.
    Type: Grant
    Filed: June 12, 2008
    Date of Patent: August 31, 2010
    Assignee: Intel Corporation
    Inventors: Mark L. Doczy, Justin K. Brask, Jack Kavalieros, Uday Shah, Matthew V. Metz, Suman Datta, Ramune Nagisetty, Robert S. Chau
  • Patent number: 7786023
    Abstract: A metal pad formation method and metal pad structure using the same are provided. A wider first pad metal is formed together with a first metal. A dielectric layer is then deposited thereon. A first opening and a second opening are formed in the dielectric layer to respectively expose the first metal and the first pad metal. Then, the first opening is filled by W metal to generate a first via. Finally, a second metal and a second pad metal are formed to respectively cover the first via and the first pad metal to generate the metal pad.
    Type: Grant
    Filed: June 25, 2007
    Date of Patent: August 31, 2010
    Assignee: Macronix International Co., Ltd.
    Inventors: Yung-Tai Hung, Jen-Chuan Pan, Chin-Ta Su, Ta-Hung Yang
  • Patent number: 7776766
    Abstract: A trench embedding method comprising the steps of applying a composition for filling trenches which comprises a complex of an amine compound and aluminum hydride and an organic solvent to a substrate having trenches; and heating and/or exposing the composition to light to convert the complex into aluminum in the trenches so as to embed aluminum into the trenches. According to this method, even when aluminum is embedded into trenches having a fine and complex pattern, embedding performance is high and trenches in a large substrate can filled. This method can be carried out at a low cost.
    Type: Grant
    Filed: January 11, 2006
    Date of Patent: August 17, 2010
    Assignee: JSR Corporation
    Inventors: Tatsuya Sakai, Yasuo Matsuki
  • Patent number: 7776765
    Abstract: Electronic apparatus and methods of forming the electronic apparatus include a tantalum silicon oxynitride film on a substrate for use in a variety of electronic systems. The tantalum silicon oxynitride film may be structured as one or more monolayers. The tantalum silicon oxynitride film may be formed using atomic layer deposition. Metal electrodes may be disposed on a dielectric containing a tantalum silicon oxynitride film.
    Type: Grant
    Filed: August 31, 2006
    Date of Patent: August 17, 2010
    Assignee: Micron Technology, Inc.
    Inventors: Leonard Forbes, Kie Y. Ahn, Arup Bhattacharyya
  • Patent number: 7776731
    Abstract: A method of forming a semiconductor device includes forming a high dielectric constant material over a semiconductor substrate, forming a conductive material over the high dielectric constant material, and performing an anneal in a non-oxidizing ambient using ultraviolet radiation to remove defects in the high dielectric constant material. Examples of a non-oxidizing ambient include for example nitrogen, deuterium, a deuterated forming gas (N2/D2), helium, argon or a combination of any two or more of these. Additional anneals using ultraviolet radiation may be performed. These additional anneals may occur in non-oxidizing or oxidizing ambients.
    Type: Grant
    Filed: September 14, 2007
    Date of Patent: August 17, 2010
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Kurt H. Junker, Tien-Ying Luo, Dina H. Triyoso
  • Patent number: 7776396
    Abstract: An improved vapor-phase deposition method and apparatus for the application of multilayered films/coatings on substrates is described. The method is used to deposit multilayered coatings where the thickness of an oxide-based layer in direct contact with a substrate is controlled as a function of the chemical composition of the substrate, whereby a subsequently deposited layer bonds better to the oxide-based layer. The improved method is used to deposit multilayered coatings where an oxide-based layer is deposited directly over a substrate and an organic-based layer is directly deposited over the oxide-based layer. Typically, a series of alternating layers of oxide-based layer and organic-based layer are applied.
    Type: Grant
    Filed: April 21, 2005
    Date of Patent: August 17, 2010
    Assignee: Applied Microstructures, Inc.
    Inventors: Boris Kobrin, Jeffrey D. Chinn, Romuald Nowak, Richard C. Yi
  • Patent number: 7776762
    Abstract: Dielectric layers containing a zirconium-doped tantalum oxide layer, where the zirconium-doped tantalum oxide layer is formed of one or more monolayers of tantalum oxide doped with zirconium, provide an insulating layer in a variety of structures for use in a wide range of electronic devices.
    Type: Grant
    Filed: December 8, 2006
    Date of Patent: August 17, 2010
    Assignee: Micron Technology, Inc.
    Inventors: Kie Y. Ahn, Leonard Forbes
  • Patent number: 7772073
    Abstract: A method is provided for forming a semiconductor device containing a buried threshold voltage adjustment layer. The method includes providing a substrate containing an interface layer, depositing a first high-k film on the interface layer, depositing a threshold voltage adjustment layer on the first high-k film, and depositing a second high-k film on the threshold voltage adjustment layer such that the threshold voltage adjustment layer is interposed between the first and second high-k films. The semiconductor device containing a patterned gate stack is described.
    Type: Grant
    Filed: September 28, 2007
    Date of Patent: August 10, 2010
    Assignee: Tokyo Electron Limited
    Inventors: Robert D. Clark, Gerrit J. Leusink
  • Patent number: 7772132
    Abstract: A method for forming a zirconium oxide (ZrO2) layer on a substrate in a chamber includes controlling a temperature of the substrate; and repeating a unit cycle of an atomic layer deposition (ALD) method. The unit cycle includes supplying a zirconium (Zr) source into a chamber, parts of the Zr source being adsorbed into a surface of the substrate; purging non-adsorbed parts of the Zr source remaining inside the chamber; supplying a reaction gas for reacting with the adsorbed parts of the Zr source; and purging non-reacted parts of the reaction gas remaining inside the chamber and reaction byproducts, wherein the temperature of the substrate and a concentration of the reaction gas are controlled such that the ZrO2 layer is formed with a tetragonal structure.
    Type: Grant
    Filed: June 29, 2006
    Date of Patent: August 10, 2010
    Assignee: Hynix Semiconductor, Inc.
    Inventors: Deok-Sin Kil, Han-Sang Song, Seung-Jin Yeom, Ki-Seon Park, Jae-Sung Roh, Jin-Hyock Kim
  • Patent number: 7759718
    Abstract: A method of forming a dielectric layer in a capacitor adapted for use in a semiconductor device is disclosed. The method includes forming a first ZrO2 layer, forming an interfacial layer using a plasma treatment on the first ZrO2 layer, and forming a second ZrO2 layer on the interfacial layer.
    Type: Grant
    Filed: October 2, 2007
    Date of Patent: July 20, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-yeol Kang, Jong-cheol Lee, Ki-vin Im, Jae-hyun Yeo, Hoon-sang Choi, Eun-ae Chung
  • Patent number: 7759262
    Abstract: Methods to selectively form a dielectric etch stop layer over a patterned metal feature. Embodiments include a transistor incorporating such an etch stop layer over a gate electrode. In accordance with certain embodiments of the present invention, a metal is selectively formed on the surface of the gate electrode which is then converted to a silicide or germanicide. In other embodiments, the metal selectively formed on the gate electrode surface enables a catalytic growth of a silicon or germanium mesa over the gate electrode. At least a portion of the silicide, germanicide, silicon mesa or germanium mesa is then oxidized, nitridized, or carbonized to form a dielectric etch stop layer over the gate electrode only.
    Type: Grant
    Filed: June 30, 2008
    Date of Patent: July 20, 2010
    Assignee: Intel Corporation
    Inventors: Sean King, Jason Klaus
  • Patent number: 7754620
    Abstract: A method of forming a metal silicate film on a silicon substrate in a processing container is disclosed that includes the steps of (a) forming a base oxide film on the silicon substrate by feeding an oxidation gas into the processing container; and (b) forming the metal silicate film on the base oxide film by continuing to feed the oxidation gas and by feeding a first gaseous phase material formed of an amidic organic hafnium compound and a second gaseous phase material formed of a silicon-containing material into the processing container.
    Type: Grant
    Filed: March 29, 2006
    Date of Patent: July 13, 2010
    Assignee: Tokyo Electron Limited
    Inventor: Kouji Shimomura
  • Patent number: 7754510
    Abstract: A process for fabricating an electronic device including: depositing a layer comprising a semiconductor; liquid depositing a dielectric composition comprising a lower-k dielectric material, a higher-k dielectric material, and a liquid, wherein the lower-k dielectric material and the higher-k dielectric material are not phase separated prior to the liquid depositing; and causing phase separation of the lower-k dielectric material and the higher-k dielectric material to form a phase-separated dielectric structure wherein the lower-k dielectric material is in a higher concentration than the higher-k dielectric material in a region of the dielectric structure closest to the layer comprising the semiconductor, wherein the depositing the layer comprising the semiconductor is prior to the liquid depositing the dielectric composition or subsequent to the causing phase separation.
    Type: Grant
    Filed: April 2, 2007
    Date of Patent: July 13, 2010
    Assignee: Xerox Corporation
    Inventors: Yiliang Wu, Hadi K Mahabadi, Beng S Ong, Paul F Smith
  • Patent number: 7754621
    Abstract: This invention concerns a process for producing oxide thin film on a substrate by an ALD type process. According to the process, alternating vapor-phase pulses of at least one metal source material, and at least one oxygen source material are fed into a reaction space and contacted with the substrate. According to the invention, an yttrium source material and a zirconium source material are alternately used as the metal source material so as to form an yttrium-stabilized zirconium oxide (YSZ) thin film on a substrate.
    Type: Grant
    Filed: September 28, 2007
    Date of Patent: July 13, 2010
    Assignee: ASM International N.V.
    Inventor: Matti Putkonen
  • Publication number: 20100173495
    Abstract: Aspects of the invention include a method and apparatus for processing a substrate using a multi-chamber processing system (e.g., a cluster tool) adapted to process substrates in one or more batch and/or single substrate processing chambers to increase the system throughput. In one embodiment, a system is configured to perform a substrate processing sequence that contains batch processing chambers only, or batch and single substrate processing chambers, to optimize throughput and minimize processing defects due to exposure to a contaminating environment. In one embodiment, a batch processing chamber is used to increase the system throughput by performing a process recipe step that is disproportionately long compared to other process recipe steps in the substrate processing sequence that are performed on the cluster tool. In another embodiment, two or more batch chambers are used to process multiple substrates using one or more of the disproportionately long processing steps in a processing sequence.
    Type: Application
    Filed: March 16, 2010
    Publication date: July 8, 2010
    Inventors: Randhir Thakur, Steve G. Ghanayem, Joseph Yudovsky, Aaron Webb, Adam Alexander Brailove, Nir Merry, Vinay K. Shah, Andreas G. Hegedus
  • Patent number: 7749879
    Abstract: The use of atomic layer deposition (ALD) to form a semiconductor structure of a silicon film on a germanium substrate is disclosed. An embodiment includes a tantalum nitride gate electrode on a hafnium dioxide gate dielectric on the silicon film (TaN/HfO2/Si/Ge), which produces a reliable high dielectric constant (high k) electronic structure having higher charge carrier mobility as compared to silicon substrates. This structure may be useful in high performance electronic devices. The structure is formed by ALD deposition of a thin silicon layer on a germanium substrate surface, and then ALD forming a hafnium oxide gate dielectric layer, and a tantalum nitride gate electrode. Such a structure may be used as the gate of a MOSFET, or as a capacitor. The properties of the dielectric may be varied by replacing the hafnium oxide with another gate dielectric such as zirconium oxide (ZrO2), or titanium oxide (TiO2).
    Type: Grant
    Filed: August 3, 2006
    Date of Patent: July 6, 2010
    Assignee: Micron Technology, Inc.
    Inventors: Kie Y. Ahn, Leonard Forbes
  • Publication number: 20100167554
    Abstract: In a method of forming a target layer having a uniform composition of constituent materials, a first precursor including a first central atom and a ligand is chemisorbed on a first reaction site of an object. The ligand or the first central atom is then removed to form a second reaction site. A second precursor including a second central atom is then chemisorbed on the second reaction site.
    Type: Application
    Filed: December 29, 2009
    Publication date: July 1, 2010
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jong-Cheol LEE, Ki-Yeon PARK, Jun-Noh LEE
  • Publication number: 20100167555
    Abstract: The present invention relates to a method for enhancing uniformity of metal oxide coatings formed by Atomic Layer Deposition (ALD) or ALD-type processes. Layers are formed using alternating pulses of metal halide and oxygen-containing precursors, preferably water, and purging when necessary. An introduction of modificator pulses following the pulses of the oxygen-containing precursor affects positively on layer uniformity, which commonly exhibits gradients, particularly in applications with closely arranged substrates. In particular, improvement in layer thickness uniformity is obtained. According to the invention, alcohols having one to three carbon atoms can be used as the modificator.
    Type: Application
    Filed: July 2, 2008
    Publication date: July 1, 2010
    Applicant: BENEQ OY
    Inventors: Jarmo Maula, Kari Harkonen
  • Patent number: 7745348
    Abstract: A method of manufacturing a semiconductor device employs a PEALD method including using an organometallic Ta precursor to form a TaN thin film. As a result, a conformal TaN diffusion barrier may be formed at a temperature of 250° C. or higher, so that impurities are reduced and density is increased in the TaN thin film.
    Type: Grant
    Filed: September 15, 2005
    Date of Patent: June 29, 2010
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Han-Choon Lee
  • Patent number: 7737051
    Abstract: A method for using a silicon germanium (SiGe) surface layer to integrate a high-k dielectric layer into a semiconductor device. The method forms a SiGe surface layer on a substrate and deposits a high-k dielectric layer on the SiGe surface layer. An oxide layer, located between the high-k dielectric layer and an unreacted portion of the SiGe surface layer, is formed during one or both of deposition of the high-k dielectric layer and an annealing process after deposition of the high-k dielectric layer. The method further includes forming an electrode layer on the high-k dielectric layer.
    Type: Grant
    Filed: March 10, 2004
    Date of Patent: June 15, 2010
    Assignee: Tokyo Electron Limited
    Inventors: Anthony Dip, Pradip K. Roy, Sanjeev Kaushal, Allen J. Leith, Seungho Oh, Raymond Joe