Insulative Material Is Compound Of Refractory Group Metal (i.e., Titanium (ti), Zirconium (zr), Hafnium (hf), Vanadium (v), Niobium (nb), Tantalum (ta), Chromium (cr), Molybdenum (mo), Tungsten (w), Or Alloy Thereof) Patents (Class 438/785)
  • Patent number: 8048733
    Abstract: An method of fabricating the gate structure comprises: sequentially depositing and patterning a dummy oxide layer and a dummy gate electrode layer on a substrate; surrounding the dummy oxide layer and the dummy gate electrode layer with a nitrogen-containing dielectric layer and an interlayer dielectric layer; removing the dummy gate electrode layer; removing the dummy oxide layer by exposing a surface of the dummy oxide layer to a vapor mixture comprising NH3 and a fluorine-containing compound at a first temperature; heating the substrate to a second temperature to form an opening in the nitrogen-containing dielectric layer; depositing a gate dielectric; and depositing a gate electrode.
    Type: Grant
    Filed: April 9, 2010
    Date of Patent: November 1, 2011
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Matt Yeh, Yi-Chen Huang, Fan-Yi Hsu, Ouyang Hui
  • Publication number: 20110263137
    Abstract: Embodiments of the invention provide methods for forming dielectric materials on a substrate. In one embodiment, a method includes exposing a substrate surface to a first oxidizing gas during a pretreatment process, wherein the first oxidizing gas contains a mixture of ozone and oxygen having an ozone concentration within a range from about 1 atomic percent to about 50 atomic percent and forming a hafnium-containing material on the substrate surface by exposing the substrate surface sequentially to a deposition gas and a second oxidizing gas during an atomic layer deposition (ALD) process, wherein the deposition gas contains a hafnium precursor, the second oxidizing gas contains water, and the hafnium-containing material has a thickness within a range from about 5 ? to about 300 ?. In one example, the hafnium-containing material contains hafnium oxide having the chemical formula of HfOx, whereas x is less than 2, such as about 1.8.
    Type: Application
    Filed: June 30, 2011
    Publication date: October 27, 2011
    Inventor: MAITREYEE MAHAJANI
  • Publication number: 20110256735
    Abstract: Methods for forming metal silicate films are provided. The methods comprise contacting a substrate with alternating and sequential vapor phase pulses of a silicon source chemical, metal source chemical, and an oxidizing agent, wherein the metal source chemical is the next reactant provided after the silicon source chemical. Methods according to some embodiments can be used to form silicon-rich hafnium silicate and zirconium silicate films with substantially uniform film coverages on substrate surface.
    Type: Application
    Filed: July 1, 2011
    Publication date: October 20, 2011
    Applicant: ASM AMERICA, INC.
    Inventors: Chang-Gong Wang, Eric Shero, Glen Wilk
  • Patent number: 8034728
    Abstract: A method of forming (and an apparatus for forming) a metal oxide layer on a substrate, particularly a semiconductor substrate or substrate assembly, using a vapor deposition process and one or more precursor compounds that include diketonate ligands and/or ketoimine ligands.
    Type: Grant
    Filed: December 23, 2009
    Date of Patent: October 11, 2011
    Assignee: Micron Technology, Inc.
    Inventor: Brian A. Vaartstra
  • Patent number: 8034727
    Abstract: A semiconductor device manufacturing method according to the present invention uses a first raw material gas containing Si, a second raw material gas containing a metal element M and an oxidation gas, in which a first step of supplying the oxidation gas onto a substrate to be treated, and a second step of supplying the first raw material gas are sequentially performed. The method further includes, after the first and second steps, a step of supplying the second raw material gas or gas mixture of the first raw material gas and the second raw material gas.
    Type: Grant
    Filed: October 13, 2006
    Date of Patent: October 11, 2011
    Assignee: NEC Corporation
    Inventor: Takashi Nakagawa
  • Patent number: 8030725
    Abstract: Apparatus and methods for detecting evaporation conditions in an evaporator for evaporating metal onto semiconductor wafers, such as GaAs wafers, are disclosed. One such apparatus can include a crystal monitor sensor configured to detect metal vapor associated with a metal source prior to metal deposition onto a semiconductor wafer. This apparatus can also include a shutter configured to remain in a closed position when the crystal monitor sensor detects an undesired condition, so as to prevent metal deposition onto the semiconductor wafer. In some implementations, the undesired condition can be indicative of a composition of a metal source, a deposition rate of a metal source, impurities of a metal source, position of a metal source, position of an electron beam, and/or intensity of an electron beam.
    Type: Grant
    Filed: October 5, 2010
    Date of Patent: October 4, 2011
    Assignee: Skyworks Solutions, Inc.
    Inventors: Lam T. Luu, Heather L. Knoedler, Richard S. Bingle, Daniel C. Weaver
  • Patent number: 8026184
    Abstract: Disclosed is a method of manufacturing a semiconductor device formed by laminating a capacitor including a bottom metal electrode, a capacitive insulating film, and an upper metal electrode. When the capacitive insulating film is formed by performing a first step of forming a first dielectric layer on the bottom metal electrode by a vapor phase film forming method using a precursor gas that contains constituent elements of a dielectric; and a second step of forming a second dielectric layer on the first dielectric layer by a vapor phase film forming method using a precursor gas that contains constituent elements of a dielectric, a film forming temperature in the first step is set so as to be lower than a film forming temperature in the second step.
    Type: Grant
    Filed: December 28, 2007
    Date of Patent: September 27, 2011
    Assignee: Elpida Memory, Inc.
    Inventor: Mitsuhiro Horikawa
  • Patent number: 8026161
    Abstract: A gate oxide and method of fabricating a gate oxide that produces a more reliable and thinner equivalent oxide thickness than conventional SiO2 gate oxides are provided. Also shown is a gate oxide with a conduction band offset in a range of approximately 5.16 eV to 7.8 eV. Gate oxides formed from elements such as zirconium are thermodynamically stable such that the gate oxides formed will have minimal reactions with a silicon substrate or other structures during any later high temperature processing stages. The process shown is performed at lower temperatures than the prior art, which further inhibits reactions with the silicon substrate or other structures. Using a thermal evaporation technique to deposit the layer to be oxidized, the underlying substrate surface smoothness is preserved, thus providing improved and more consistent electrical properties in the resulting gate oxide.
    Type: Grant
    Filed: August 30, 2001
    Date of Patent: September 27, 2011
    Assignee: Micron Technology, Inc.
    Inventors: Kie Y. Ahn, Leonard Forbes
  • Patent number: 8022448
    Abstract: Apparatus and methods for evaporating metal onto semiconductor wafers are disclosed. One such apparatus can include an evaporation chamber that includes a wafer holder, such as a dome, and a test wafer holder that is separate and spaced apart from the wafer holder. In certain implementations, the test wafer can be coupled to a cross beam supporting at least one shaper. A metal can be evaporated onto production wafers positioned in the wafer holder while metal is evaporated on a test wafer positioned in a test wafer holder. In some instances, the production wafers can be GaAs wafers. The test wafer can be used to make a quality assessment about the production wafers.
    Type: Grant
    Filed: October 5, 2010
    Date of Patent: September 20, 2011
    Assignee: Skyworks Solutions, Inc.
    Inventors: Lam T. Luu, Shiban K. Tiku, Richard S. Bingle, Jens A. Riege, Heather L. Knoedler, Daniel C. Weaver
  • Patent number: 8021990
    Abstract: A MOSFET structure including silicate gate dielectrics with nitridation treatments of the gate dielectric prior to gate material deposition.
    Type: Grant
    Filed: April 9, 2009
    Date of Patent: September 20, 2011
    Assignee: Texas Instruments Incorporated
    Inventors: Antonio L. P. Rotondaro, Luigi Colombo, Mark R Visokay, Rajesh Khamankar, Douglas E Mercer
  • Patent number: 8017469
    Abstract: A method and apparatus are described for integrating dual gate oxide (DGO) transistor devices (50, 52) and core transistor devices (51, 53) on a single substrate (15) having a silicon germanium channel layer (21) in the PMOS device areas (112, 113), where each DGO transistor device (50, 52) includes a metal gate (25), an upper gate oxide region (60, 84) formed from a second, relatively higher high-k metal oxide layer (24), and a lower gate oxide region (58, 84) formed from a first relatively lower high-k layer (22), and where each core transistor device (51, 53) includes a metal gate (25) and a core gate dielectric layer (72, 98) formed from only the second, relatively higher high-k metal oxide layer (24).
    Type: Grant
    Filed: January 21, 2009
    Date of Patent: September 13, 2011
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Tien-Ying Luo, Gauri V. Karve, Daniel G. Tekleab
  • Publication number: 20110217850
    Abstract: Methods of fabricating an oxide layer on a semiconductor substrate are provided herein. The oxide layer may be formed over an entire structure disposed on the substrate, or selectively formed on a non-metal containing layer with little or no oxidation of an exposed metal-containing layer. The methods disclosed herein may be performed in a variety of process chambers, including but not limited to decoupled plasma oxidation chambers, rapid and/or remote plasma oxidation chambers, and/or plasma immersion ion implantation chambers. In some embodiments, a method may include providing a substrate comprising a metal-containing layer and non-metal containing layer; and forming an oxide layer on an exposed surface of the non-metal containing layer by exposing the substrate to a plasma formed from a process gas comprising a hydrogen-containing gas, an oxygen-containing gas, and at least one of a supplemental oxygen-containing gas or a nitrogen-containing gas.
    Type: Application
    Filed: May 18, 2011
    Publication date: September 8, 2011
    Applicant: APPLIED MATERIALS, INC.
    Inventors: RAJESH MANI, NORMAN TAM, TIMOTHY W. WEIDMAN, YOSHITAKA YOKOTA
  • Patent number: 8012822
    Abstract: A process for forming dielectric films containing at least metal atoms, silicon atoms, and oxygen atoms on a silicon substrate comprises a first step of oxidizing a surface portion of the silicon substrate to form a silicon dioxide film; a second step of forming a metal film on the silicon dioxide film in a non-oxidizing atmosphere; a third step of heating in a non-oxidizing atmosphere to diffuse the metal atoms constituting the metal film into the silicon dioxide film; and a fourth step of oxidizing the silicon dioxide film containing the diffused metal atoms to form the film containing the metal atoms, silicon atoms, and oxygen atoms.
    Type: Grant
    Filed: December 23, 2008
    Date of Patent: September 6, 2011
    Assignees: Canon Kabushiki Kaisha, Canon Anelva Corporation
    Inventors: Naomu Kitano, Yusuke Fukuchi, Nobumasa Suzuki, Hideo Kitagawa
  • Patent number: 8012783
    Abstract: The object of the present invention is to provide a semiconductor element containing an n-type gallium nitride based compound semiconductor and a novel electrode that makes an ohmic contact with the semiconductor. The semiconductor element of the present invention has an n-type Gallium nitride based compound semiconductor and an electrode that forms an ohmic contact with the semiconductor, wherein the electrode has a TiW alloy layer to be in contact with the semiconductor. According to a preferable embodiment, the above-mentioned electrode can also serve as a contact electrode. According to a preferable embodiment, the above-mentioned electrode is superior in the heat resistance. Moreover, a production method of the semiconductor element is also provided.
    Type: Grant
    Filed: April 4, 2006
    Date of Patent: September 6, 2011
    Assignee: Mitsubishi Chemical Corporation
    Inventors: Tsuyoshi Takano, Takahide Joichi, Hiroaki Okagawa
  • Patent number: 8008152
    Abstract: A method of manufacturing a semiconductor device comprising a first insulating film formed on a semiconductor substrate, a charge storage layer formed on the first insulating film, a second insulating film formed on the charge storage layer, and a control electrode formed on the second insulating film, forming the second insulating film comprises forming a lower insulating film containing oxygen and a metal element, thermally treating the lower insulating film in an atmosphere containing oxidizing gas, and forming an upper insulating film on the thermally treated lower insulating film using film forming gas containing at least one of hydrogen and chlorine.
    Type: Grant
    Filed: March 29, 2007
    Date of Patent: August 30, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Ryota Fujitsuka, Katsuaki Natori, Daisuke Nishida, Masayuki Tanaka, Katsuyuki Sekine, Yoshio Ozawa, Akihito Yamamoto
  • Patent number: 8008096
    Abstract: ALD processing techniques for forming non-volatile resistive-switching memories are described. In one embodiment, a method includes forming a first electrode on a substrate, maintaining a pedestal temperature for an atomic layer deposition (ALD) process of less than 100° Celsius, forming at least one metal oxide layer over the first electrode, wherein the forming the at least one metal oxide layer is performed using the ALD process using a purge duration of less than 20 seconds, and forming a second electrode over the at least one metal oxide layer.
    Type: Grant
    Filed: June 4, 2009
    Date of Patent: August 30, 2011
    Assignee: Intermolecular, Inc.
    Inventors: Nobi Fuchigami, Pragati Kumar, Prashant Phatak
  • Publication number: 20110207337
    Abstract: The application relates to a method of deposition on a substrate, of a metal containing dielectric film comprising a compound of the formula (M11-aM2a)ObNc, wherein 0?a<1, 0<b?3, 0?c?1, M1 represents a metal selected from (Hf), (Zr) and (Ti); and M2 represents a metal atom atoms. The method generally uses an M1 metal containing precursor selected from: Zr(MeCp)(NMe2)3, Zr(EtCp)(NMe2)3, ZrCp(NMe2)3, Zr(MeCp)(NEtMe)3, Zr(EtCp)(NEtMe)3, ZrCp(NEtMe)3, Zr(MeCp)(NEt2)3, Zr(EtCp)(NEt2)3, ZrCp(NEt2)3, Zr(iPr2Cp)(NMe2)3, Zr(tBu2Cp)(NMe2)3, Hf(MeCp)(NMe2)3, Hf(EtCp)(NMe2)3, HfCp(NMe2)3, Hf(MeCp)(NEtMe)3, Hf(EtCp)(NEtMe)3, HfCp(NEtMe)3, Hf(MeCp)(NEt2)3, Hf(EtCp)(NEt2)3, HfCp(NEt2)3, Hf(iPr2Cp)(NMe2)3, Hf(tBu2Cp)(NMe2)3.
    Type: Application
    Filed: January 20, 2011
    Publication date: August 25, 2011
    Applicant: L'Air Liquide, Societe Anonyme pour l'Etude et l'Exploitation des Procedes Geroges Claude
    Inventors: Christian DUSSARRAT, Nicolas Blasco, Audrey Pinchart, Christophe Lachaud
  • Patent number: 8003548
    Abstract: A method for forming an atomic deposition layer is provided, which includes: (a) performing a first water pulse on a substrate; (b) performing a precursor pulse on the hydroxylated substrate, wherein the precursor reacts with the hydroxyl groups and forms a layer; (c) purging the substrate with an inert carrier gas; (d) exposing the layer to a second water pulse for at least about 3 seconds so that the layer has a minimum of 70 percent of surface hydroxyl groups thereon; (e) purging the layer with the inert carrier gas; and (f) repeating steps (b) to (e) to form a resultant atomic deposition layer.
    Type: Grant
    Filed: June 3, 2010
    Date of Patent: August 23, 2011
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chen-Hua Yu, Liang-Gi Yao
  • Patent number: 7998879
    Abstract: An insulation structure for high temperature conditions and a manufacturing method thereof. In the insulation structure, a substrate has a conductive pattern formed on at least one surface thereof for electrical connection of a device. A metal oxide layer pattern is formed on a predetermined portion of the conductive pattern by anodization, the metal oxide layer pattern made of one selected from a group consisting of Al, Ti and Mg.
    Type: Grant
    Filed: March 19, 2007
    Date of Patent: August 16, 2011
    Assignees: Samsung Electro-Mechanics Co., Ltd., Samsung LED Co., Ltd.
    Inventors: Young Ki Lee, Seog Moon Choi, Sang Hyun Shin
  • Patent number: 7998883
    Abstract: This invention concerns a process for producing oxide thin film on a substrate by an ALD type process. According to the process, alternating vapour-phase pulses of at least one metal source material, and at least one oxygen source material are fed into a reaction space and contacted with the substrate. According to the invention, an yttrium source material and a zirconium source material are alternately used as the metal source material so as to form an yttrium-stabilised zirconium oxide (YSZ) thin film on a substrate.
    Type: Grant
    Filed: June 22, 2010
    Date of Patent: August 16, 2011
    Assignee: ASM International N.V.
    Inventor: Matti Putkonen
  • Patent number: 7998882
    Abstract: When forming dielectric materials of reduced dielectric constant in sophisticated metallization systems, the creation of defect particles on the dielectric material may be reduced during a plasma enhanced deposition process by inserting an inert plasma step after the actual deposition step.
    Type: Grant
    Filed: June 25, 2009
    Date of Patent: August 16, 2011
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Ulrich Mayer, Hartmut Ruelke
  • Publication number: 20110189860
    Abstract: Methods of nitridation and selective oxidation are provided herein. In some embodiments, a method of nitridation includes providing a substrate having a first layer disposed thereon, where the substrate is disposed on a substrate support in a process chamber; forming a remote plasma from a process gas comprising nitrogen; and exposing the first layer to a reactive species formed from the remote plasma to form a nitrogen-containing layer, wherein a density of the reactive species is about 109 to about 1017 molecules/cm3 and wherein a pressure in the chamber during exposure of the first layer is about 5 mTorr to about 3 Torr. In some embodiments, the nitrogen-containing layer is a gate dielectric layer for use in a semiconductor device.
    Type: Application
    Filed: January 31, 2011
    Publication date: August 4, 2011
    Applicant: APPLIED MATERIALS, INC.
    Inventor: PETER PORSHNEV
  • Patent number: 7989283
    Abstract: A manufacturing method of a semiconductor device is provided for improving the reliability of a semiconductor device including a MISFET with a high dielectric constant gate insulator and a metal gate electrode. A first Hf-containing insulating film containing Hf, La, and O as a principal component is formed as a high dielectric constant gate insulator for an n-channel MISFET. A second Hf-containing insulating film containing Hf, Al, and O as a principal component is formed as a high dielectric constant gate insulator for a p-channel MISFET. Then, a metal film and a silicon film are formed and patterned by dry etching to thereby form first and second gate electrodes. Thereafter, parts of the first and second Hf-containing insulating films not covered with the first and second gate electrodes are removed by wet etching.
    Type: Grant
    Filed: October 1, 2010
    Date of Patent: August 2, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Shinichi Yamanari, Ryoichi Yoshifuku, Masaaki Shinohara, Takahiro Maruyama, Kenji Kawai, Yusaku Hirota
  • Patent number: 7989362
    Abstract: Electronic apparatus and methods of forming the electronic apparatus include a hafnium lanthanide oxynitride film on a substrate for use in a variety of electronic systems. The hafnium lanthanide oxynitride film may be structured as one or more monolayers. Metal electrodes may be disposed on a dielectric containing a hafnium lanthanide oxynitride film.
    Type: Grant
    Filed: July 20, 2009
    Date of Patent: August 2, 2011
    Assignee: Micron Technology, Inc.
    Inventors: Leonard Forbes, Kie Y. Ahn, Arup Bhattacharyya
  • Publication number: 20110183527
    Abstract: In a method of forming a layer, a precursor composition including a metal and a ligand chelating to the metal is stabilized by contacting the precursor composition with an electron donating compound to provide a stabilized precursor composition onto a substrate. A reactant is introduced onto the substrate to bind to the metal in the stabilized precursor composition. The stabilized precursor composition is provided onto the substrate by introducing the precursor composition onto the substrate after the electron donating compound is introduced onto the substrate. The electron donating compound is continuously introduced onto the substrate during and after the precursor composition is introduced.
    Type: Application
    Filed: February 25, 2011
    Publication date: July 28, 2011
    Inventors: Youn-Joung Cho, Youn-Soo Kin, Kyu-Ho Cho, Jung-Ho Lee, Jae-Hyoung Choi, Seung-Min Ryu
  • Publication number: 20110171836
    Abstract: Methods for forming a film on a substrate in a semiconductor manufacturing process. A reaction chamber a substrate in the chamber are provided. A ruthenium based precursor, which includes ruthenium tetroxide dissolved in a mixture of at least two non-flammable fluorinated solvents, is provided and a ruthenium containing film is produced on the substrate.
    Type: Application
    Filed: January 20, 2011
    Publication date: July 14, 2011
    Applicant: Air Liquide Electronics U.S. LP
    Inventors: Bin Xia, Ashutosh Misra
  • Publication number: 20110165780
    Abstract: A method of forming ruthenium-containing films by atomic layer deposition is provided. The method comprises delivering at least one precursor to a substrate, the at least one precursor corresponding in structure to Formula I: (L)Ru(CO)3 wherein L is selected from the group consisting of a linear or branched C2-C6-alkenyl and a linear or branched C1-6-alkyl; and wherein L is optionally substituted with one or more substituents independently selected from the group consisting of C2-C6-alkenyl, C1-6-alkyl, alkoxy and NR1R2; wherein R1 and R2 are independently alkyl or hydrogen.
    Type: Application
    Filed: May 29, 2009
    Publication date: July 7, 2011
    Applicant: Sigma-Aldrich Co.
    Inventors: Ravi Kanjolia, Rajesh Odedra, Jeff Anthis, Neil Boag
  • Patent number: 7972978
    Abstract: Embodiments of the invention provide methods for forming a hafnium material on a substrate within a processing chamber. In one embodiment, a method is provided which includes exposing the substrate within the processing chamber to a first oxidizing gas during a pretreatment process, exposing the substrate sequentially to a second oxidizing gas and a deposition gas during an atomic layer deposition (ALD) cycle, wherein the second oxidizing gas contains water and the deposition gas contains a hafnium amino compound, and repeating the ALD cycle to form a hafnium-containing layer having a thickness within a range from about 5 ? to about 300 ?. In one example, the first oxidizing gas contains an O3/O2 mixture having an ozone concentration within a range from about 5 atomic percent to about 30 atomic percent.
    Type: Grant
    Filed: June 27, 2008
    Date of Patent: July 5, 2011
    Assignee: Applied Materials, Inc.
    Inventor: Maitreyee Mahajani
  • Patent number: 7972977
    Abstract: Methods for forming metal silicate films are provided. The methods comprise contacting a substrate with alternating and sequential vapor phase pulses of a silicon source chemical, metal source chemical, and an oxidizing agent, wherein the metal source chemical is the next reactant provided after the silicon source chemical. Methods according to some embodiments can be used to form silicon-rich hafnium silicate and zirconium silicate films with substantially uniform film coverages on substrate surface.
    Type: Grant
    Filed: October 5, 2007
    Date of Patent: July 5, 2011
    Assignee: ASM America, Inc.
    Inventors: Chang-Gong Wang, Eric Shero, Glen Wilk
  • Patent number: 7968458
    Abstract: A production process for making an electronic circuit substrate comprising: a patterning step of forming a respectively anodically oxidizable conductor pattern and distribution pattern connected to the conductor pattern on a substrate; and an anodic oxidation step of generating an oxide film from the conductor pattern and the distribution pattern by contacting an electrolyte solution with the conductor pattern and the distribution pattern and carrying out anodic oxidation while applying current thereto, the patterns serving as anodes, wherein the width or film thickness of the distribution pattern is at least partially set so that an insulator portion is formed in the anodic oxidation step in which an oxide film formed on one of the side walls of the distribution pattern is integrated with an oxide film formed on the other side wall.
    Type: Grant
    Filed: October 21, 2005
    Date of Patent: June 28, 2011
    Assignee: Pioneer Corporation
    Inventors: Takashi Chuman, Satoru Ohta, Satoshi Miyaguchi
  • Patent number: 7968472
    Abstract: The invention includes inserting an object to be processed into a processing vessel, which can be maintained vacuum, and making the processing vessel vacuum; performing a sequence of forming a ZrO2 film on a substrate by alternately supplying zirconium source and an oxidizer into the processing vessel for a plurality of times and a sequence of forming SiO2 film on the substrate by alternately supplying silicon source and an oxidizer into the processing vessel for one or more times, wherein the number of times of performing each of the sequences is adjusted such that Si concentration of the films is from about 1 atm % to about 4 atm %; and forming a zirconia-based film having a predetermined thickness by performing the film forming sequences for one or more cycles, wherein one cycle indicates that each of the ZrO2 film forming sequences and the SiO2 film forming sequences are repeated for the adjusted number of times of performances.
    Type: Grant
    Filed: August 6, 2009
    Date of Patent: June 28, 2011
    Assignee: Tokyo Electron Limited
    Inventors: Yoshihiro Ishida, Katsushige Harada, Takuya Sugawara
  • Publication number: 20110151227
    Abstract: Methods are provided to form and stabilize high-? dielectric films by vapor deposition processes using metal-source precursors and titanium-based ?-diketonate precursors according to Formula I: Ti(L)x wherein: L is a ?-diketonate; and x is 3 or 4. Further provided are methods of improving high-? gate property of semiconductor devices by using titanium precursors according to Formula I. High-? dielectric film-forming lattices are also provided comprising titanium precursors according to Formula I.
    Type: Application
    Filed: May 22, 2009
    Publication date: June 23, 2011
    Applicant: SIGMA-ALDRICH CO.
    Inventors: Paul Raymond Chalker, Peter Nicholas Heys
  • Patent number: 7964513
    Abstract: Multiple sequential processes are conducted in a reaction chamber to form ultra high quality silicon-containing compound layers, including silicon nitride layers. In a preferred embodiment, a silicon layer is deposited on a substrate using trisilane as the silicon precursor. A silicon nitride layer is then formed by nitriding the silicon layer. By repeating these steps, a silicon nitride layer of a desired thickness is formed.
    Type: Grant
    Filed: August 24, 2009
    Date of Patent: June 21, 2011
    Assignee: ASM America, Inc.
    Inventors: Michael A. Todd, Keith D. Weeks, Christiaan J. Werkhoven, Christophe F. Pomarede
  • Patent number: 7964515
    Abstract: A method is provided for forming high dielectric constant (high-k) films for semiconductor devices. According to one embodiment, a metal-carbon-oxygen high-k film is deposited by alternately and sequentially exposing a substrate to a metal-carbon precursor and near saturation exposure level of an oxidation source containing ozone. The method is capable of forming a metal-carbon-oxygen high-k film with good thickness uniformity while impeding growth of an interface layer between the metal-carbon-oxygen high-k film and the substrate. According to one embodiment, the metal-carbon-oxygen high-k film may be treated with an oxidation process to remove carbon from the film.
    Type: Grant
    Filed: December 21, 2007
    Date of Patent: June 21, 2011
    Assignee: Tokyo Electron Limited
    Inventors: Robert D. Clark, Cory Wajda
  • Patent number: 7964431
    Abstract: A photovoltaic cell is formed by bonding a donor body to a receiver element and cleaving a thin lamina from the donor body. Electrical contact is made to the bonded surface of the lamina through vias formed in the lamina. In some embodiments the emitter exists only at the bonded surface or only at the cleaved surface face; the emitter does not wrap through the vias between the surfaces. Wiring contacting each of the two surfaces is formed only at the cleaved face, and one set of wiring contacts the bonded surface through conductive material formed in the vias, insulated from the via sidewalls.
    Type: Grant
    Filed: March 19, 2009
    Date of Patent: June 21, 2011
    Assignee: Twin Creeks Technologies, Inc.
    Inventors: Christopher J Petti, Mohamed M Hilali
  • Patent number: 7960803
    Abstract: The use of atomic layer deposition (ALD) to form a dielectric layer of hafnium nitride (Hf3N4) and hafnium oxide (HfO2) and a method of fabricating such a combination gate and dielectric layer produces a reliable structure for use in a variety of electronic devices. Forming the dielectric structure includes depositing hafnium oxide using precursor chemicals, followed by depositing hafnium nitride using precursor chemicals, and repeating to form the laminate structure. Alternatively, the hafnium nitride may be deposited first followed by the hafnium nitride. Such a dielectric layer may be used as the gate insulator of a MOSFET, a capacitor dielectric in a DRAM, or a tunnel gate insulator in flash memories, because the high dielectric constant (high-k) of the film provides the functionality of a thinner silicon dioxide film, and because of the reduced leakage current when compared to an electrically equivalent thickness of silicon dioxide.
    Type: Grant
    Filed: January 26, 2009
    Date of Patent: June 14, 2011
    Assignee: Micron Technology, Inc.
    Inventors: Kie Y. Ahn, Leonard Forbes
  • Patent number: 7960293
    Abstract: A method for forming an insulating film includes forming a silicon nitride film on a silicon surface by subjecting a target substrate wherein silicon is exposed in the surface to a treatment for nitriding the silicon, forming a silicon oxynitride film by heating the target substrate provided with the silicon nitride film in an N2O atmosphere, and nitriding the silicon oxynitride film.
    Type: Grant
    Filed: May 30, 2007
    Date of Patent: June 14, 2011
    Assignee: Tokyo Electron Limited
    Inventors: Minoru Honda, Yoshihiro Sato, Toshio Nakanishi
  • Patent number: 7943475
    Abstract: There is provided a semiconductor device comprising a dielectric film made of a high dielectric constant material, in which a leak current is reduced in the film and which exhibits improved device reliability. Specifically, a dielectric film 142 is a metal-compound film having a composition represented by the formula MOxCyNz wherein x, y and z meet the conditions: 0<x, 0.1?y?1.25, 0.01?z and x+y+z=2; and M comprises at least Hf or Zr.
    Type: Grant
    Filed: January 4, 2006
    Date of Patent: May 17, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Tomoe Yamamoto, Toshihiro Iizuka
  • Patent number: 7923381
    Abstract: A dielectric film containing Zr—Sn—Ti—O and methods of fabricating such a dielectric film produce a reliable dielectric layer having an equivalent oxide thickness thinner than attainable using SiO2. Films of Zr—Sn—Ti—O may be formed in a self-limiting growth process.
    Type: Grant
    Filed: July 11, 2008
    Date of Patent: April 12, 2011
    Assignee: Micron Technology, Inc.
    Inventors: Kie Y. Ahn, Leonard Forbes
  • Patent number: 7923336
    Abstract: A high-k dielectric film, a method of forming the high-k dielectric film, and a method of forming a related semiconductor device are provided. The high-k dielectric film includes a bottom layer of metal-silicon-oxynitride having a first nitrogen content and a first silicon content and a top layer of metal-silicon-oxynitride having a second nitrogen content and a second silicon content. The second nitrogen content is higher than the first nitrogen content and the second silicon content is higher than the first silicon content.
    Type: Grant
    Filed: October 30, 2009
    Date of Patent: April 12, 2011
    Assignee: Infineon Technologies AG
    Inventors: Kil-Ho Lee, Chan Lim
  • Patent number: 7923382
    Abstract: Methods of forming a roughened metal surface on a substrate are provided, along with structures comprising such roughened surfaces. In preferred embodiments roughened surfaces are formed by selectively depositing metal or metal oxide on a substrate surface to form discrete, three-dimensional islands. Selective deposition may be obtained, for example, by modifying process conditions to cause metal agglomeration or by treating the substrate surface to provide a limited number of discontinuous reactive sites. The roughened metal surface may be used, for example, in the manufacture of integrated circuits.
    Type: Grant
    Filed: February 10, 2009
    Date of Patent: April 12, 2011
    Assignee: ASM International N.V.
    Inventors: Hannu Huotari, Suvi Haukka
  • Patent number: 7923360
    Abstract: A method of forming dielectric films including a metal silicate on a silicon substrate comprises a first step of oxidizing a surface layer portion of the silicon substrate and forming a silicon dioxide film; a second step of irradiating ion on the surface of the silicon dioxide film and making the surface layer portion of the silicon dioxide film into a reaction-accelerating layer with Si—O cohesion cut; a third step of laminating a metal film on the reaction-accelerating layer in a non-oxidizing atmosphere; and a fourth step of oxidizing the metal film and forming a metal silicate film that diffuses a metal from the metal film to the silicon dioxide film.
    Type: Grant
    Filed: December 23, 2008
    Date of Patent: April 12, 2011
    Assignees: Canon Kabushiki Kaisha, Canon Anelva Corporation
    Inventors: Hideo Kitagawa, Naomu Kitano
  • Publication number: 20110065287
    Abstract: A method is provided for forming a metal-silicon-containing film on a substrate by pulsed chemical vapor deposition. The method includes providing the substrate in a process chamber, maintaining the substrate at a temperature suited for chemical vapor deposition of a metal-silicon-containing film by thermal decomposition of a metal-containing gas and a silicon-containing gas on the substrate, exposing the substrate to a continuous flow of the metal-containing gas, and during the continuous flow, exposing the substrate to sequential pulses of the silicon-containing gas.
    Type: Application
    Filed: September 11, 2009
    Publication date: March 17, 2011
    Applicant: TOKYO ELECTRON LIMITED
    Inventor: Cory Wajda
  • Patent number: 7906442
    Abstract: A gas delivery apparatus comprises: a chamber surrounding a substrate to be processed; a showerhead disposed within the chamber; and gas supply means supplying a gas comprising a mixture of NH3 and H2 to the chamber, in which a coating layer deposited on the interior of the chamber and the showerhead contain nickel (Ni). When the apparatus is utilized to practice a method comprising exposing an object W to a gas comprising a mixture consisting of NH3 and H2, the H2/NH3 gas flow rate ratio and the temperature are controlled so that the reaction of nickel contained in the coating layer deposited on the interior of the chamber and the showerhead is suppressed.
    Type: Grant
    Filed: June 20, 2006
    Date of Patent: March 15, 2011
    Assignee: Tokyo Electron Limited
    Inventors: Kensaku Narushima, Satoshi Wakabayashi
  • Patent number: 7902090
    Abstract: In a method of forming a thin layer for a semiconductor device through an ALD process and a CVD process in the same chamber, a semiconductor substrate is introduced into a processing chamber, and an interval between a showerhead and the substrate is adjusted to a first gap distance. A first layer is formed on the substrate at a first temperature through an ALD process. The interval between the showerhead and the substrate is additionally adjusted to a second gap distance, and a second layer is formed on the first layer at a second temperature through a CVD process. Accordingly, the thin layer has good current characteristics, and the manufacturing throughput of a semiconductor device is improved.
    Type: Grant
    Filed: September 17, 2008
    Date of Patent: March 8, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-Hun Seo, Young-Wook Park, Jin-Gi Hong
  • Patent number: 7892917
    Abstract: A bismuth titanium silicon oxide having a pyrochlore phase, a thin film formed of the bismuth titanium silicon oxide, a method for forming the bismuth-titanium-silicon oxide thin film, a capacitor and a transistor for a semiconductor device including the bismuth-titanium-silicon oxide thin film, and an electronic device employing the capacitor and/or the transistor are provided. The bismuth titanium silicon oxide has good dielectric properties and is thermally and chemically stable. The bismuth-titanium-silicon oxide thin film can be effectively used as a dielectric film of a capacitor or as a gate dielectric film of a transistor in a semiconductor device. Various electronic devices having good electrical properties can be manufactured using the capacitor and/or the transistor having the bismuth-titanium-silicon oxide film.
    Type: Grant
    Filed: May 14, 2008
    Date of Patent: February 22, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young-jin Cho, Yo-sep Min, Young-soo Park, Jung-hyun Lee, June-key Lee, Yong-kyun Lee
  • Patent number: 7883974
    Abstract: A method of manufacturing a semiconductor device includes forming a trench in an interlayer dielectric film on the semiconductor substrate, the trench reaching a semiconductor substrate and having a sidewall made of silicon nitride film; depositing a gate insulation film made of a HfSiO film at a temperature within a range of 200 degrees centigrade to 260 degrees centigrade, so that the HfSiO film is deposited on the semiconductor substrate which is exposed at a bottom surface of the trench without depositing the HfSiO film on the silicon nitride film; and filling the trench with a gate electrode made of metal.
    Type: Grant
    Filed: September 17, 2009
    Date of Patent: February 8, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takuya Kobayashi, Katsuyuki Sekine, Tomonori Aoyama, Hiroshi Tomita
  • Patent number: 7883906
    Abstract: The use of a conductive bidimensional perovskite as an interface between a silicon, metal, or amorphous oxide substrate and an insulating perovskite deposited by epitaxy, as well as an integrated circuit and its manufacturing process comprising a layer of an insulating perovskite deposited by epitaxy to form the dielectric of capacitive elements having at least an electrode formed of a conductive bidimensional perovskite forming an interface between said dielectric and an underlying silicon, metal, or amorphous oxide substrate.
    Type: Grant
    Filed: March 3, 2010
    Date of Patent: February 8, 2011
    Assignees: STMicroelectronics S.A., Universite Francois Rabelais
    Inventors: Ludovic Goux, Monique Gervais
  • Publication number: 20110027960
    Abstract: Embodiments of the current invention include methods of forming a strontium titanate (SrTiO3) film using atomic layer deposition (ALD). More particularly, the method includes forming a plurality of titanium oxide (TiO2) unit films using ALD and forming a plurality of strontium oxide (SrO) unit films using ALD. The combined thickness of the TiO2 and SrO unit films is less than approximately 5 angstroms. The TiO2 and SrO units films are then annealed to form a strontium titanate layer.
    Type: Application
    Filed: June 3, 2010
    Publication date: February 3, 2011
    Inventors: Laura M. Matz, Xiangxin Rui, Xinjian Lei, Sunil Shanker, Moo-Sung Kim, Nobi Fuchigami, Iain Buchanan, Anh Duong, Sandra Malhotra, Imran Hashim
  • Patent number: 7879400
    Abstract: There is provided a substrate processing apparatus equipped with a metallic component, with at least a part of its metallic surface exposed to an inside of a processing chamber and subjected to baking treatment at a pressure less than atmospheric pressure. As a result of this baking treatment, a film which does not react with various types of reactive gases, and which can block the out diffusion of metals, is formed on the surface of the above-mentioned metallic component.
    Type: Grant
    Filed: October 10, 2007
    Date of Patent: February 1, 2011
    Assignee: Hitachi Kokusal Electric Inc.
    Inventors: Takahiro Maeda, Kiyohiko Maeda, Takashi Ozaki