Silicon Oxide Formation Patents (Class 438/787)
  • Patent number: 8741784
    Abstract: A process for fabricating a semiconductor device is described. A silicon oxide layer is formed. A nitridation process including at least two steps is performed to nitridate the silicon oxide layer into a silicon oxynitride (SiON) layer. The nitridation process comprises a first nitridation step and a second nitridation step in sequence, wherein the first nitridation step and the second nitridation step are different in the setting of at least one parameter.
    Type: Grant
    Filed: September 20, 2011
    Date of Patent: June 3, 2014
    Assignee: United Microelectronics Corp.
    Inventors: Chien-Liang Lin, Te-Lin Sun, Ying-Wei Yen, Yu-Ren Wang
  • Patent number: 8741788
    Abstract: A method of forming a silicon oxide layer is described. The method may include the steps of mixing a carbon-free silicon-and-nitrogen containing precursor with a radical precursor, and depositing a silicon-and-nitrogen containing layer on a substrate. The silicon-and-nitrogen containing layer is then converted to the silicon oxide layer.
    Type: Grant
    Filed: July 21, 2010
    Date of Patent: June 3, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Jingmei Liang, Nitin K. Ingle, Shankar Venkataraman
  • Patent number: 8728956
    Abstract: Methods of depositing a film on a substrate surface include surface mediated reactions in which a film is grown over one or more cycles of reactant adsorption and reaction. In one aspect, the method is characterized by the following operations: (a) exposing the substrate surface to a first reactant in vapor phase under conditions allowing the first reactant to adsorb onto the substrate surface; (b) exposing the substrate surface to a second reactant in vapor phase while the first reactant is adsorbed on the substrate surface; and (c) exposing the substrate surface to plasma to drive a reaction between the first and second reactants adsorbed on the substrate surface to form the film.
    Type: Grant
    Filed: April 11, 2011
    Date of Patent: May 20, 2014
    Assignee: Novellus Systems, Inc.
    Inventors: Adrien LaVoie, Shankar Swaminathan, Hu Kang, Ramesh Chandrasekharan, Tom Dorsh, Dennis M. Hausmann, Jon Henri, Thomas Jewell, Ming Li, Bryan Schlief, Antonio Xavier, Thomas W. Mountsier, Bart J. van Schravendijk, Easwar Srinivasan, Mandyam Sriram
  • Patent number: 8716152
    Abstract: A deposition process for coating a substrate with films of a different thickness on front and rear surface of a substrate can be achieve in one growth. The thickness of the film deposition can be controlled by the separation between the substrates. Different separation distances between the substrates in the same chemical bath will result in different film thicknesses on the substrate. Substrates may be arranged to have different separation distances between front and back surfaces, a V-shaped arrangement, or placed next to a curtain with varying separation distances between a substrate and the curtain.
    Type: Grant
    Filed: March 29, 2012
    Date of Patent: May 6, 2014
    Assignee: Natcore Technology, Inc.
    Inventor: Yuanchang Zhang
  • Patent number: 8709853
    Abstract: The present invention provides a method of manufacturing a crystalline silicon solar cell, comprising: —providing a crystalline silicon substrate having a front side and a back side; —forming a thin silicon oxide film on at least one of the front and the back side by soaking the crystalline silicon substrate in a chemical solution; —forming a dielectric coating film on the thin silicon oxide film on at least one of the front and the back side. The thin silicon oxide film may be formed with a thickness of 0.5-10 nm. By forming a oxide layer using a chemical solution, it is possible to form a thin oxide film for surface passivation wherein the relatively low temperature avoids deterioration of the semiconductor layers.
    Type: Grant
    Filed: September 20, 2007
    Date of Patent: April 29, 2014
    Assignee: ECN Energieonderzoek Centrum Nederland
    Inventors: Yuji Komatsu, Lambert Johan Geerligs, Valentin Dan Mihailetchi
  • Patent number: 8710579
    Abstract: A semiconductor device and method of manufacturing the same are provided. In one embodiment, semiconductor device comprises a split charge-trapping region comprising two nitride layers with charge traps distributed therein, the two nitride layers separated by one or more oxide layers. The two nitride layers include a first nitride layer closer to a substrate over which the split charge-trapping region is formed, and a second nitride layer on the other side of the one or more oxide layers. The second nitride layer comprises a majority of the charge traps. Other embodiments are also described.
    Type: Grant
    Filed: July 17, 2012
    Date of Patent: April 29, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventors: Fredrick Jenne, Krishnaswamy Ramkumar
  • Patent number: 8703623
    Abstract: A semiconductor arrangement is provided that includes one or more substrate structures. One or more nitride-based material structures are used in fabricating nitride-based devices. One or more intermediary layers are interposed between the one or more substrate structures and the one or more nitride-based material structures. The one or more intermediary layers support the lattice mismatch and thermal expansion coefficients between the one or more nitride-based material structure and the one or more substrate structures. Several new electronic devices based on this arrangement are described.
    Type: Grant
    Filed: June 1, 2009
    Date of Patent: April 22, 2014
    Assignee: Massachusetts Institute of Technology
    Inventors: Jinwook Chung, Han Wang, Tomas Palacios
  • Patent number: 8703625
    Abstract: Described herein are methods of forming dielectric films comprising silicon, oxide, and optionally nitrogen, carbon, hydrogen, and boron. Also disclosed herein are the methods to form dielectric films or coatings on an object to be processed, such as, for example, a semiconductor wafer.
    Type: Grant
    Filed: January 28, 2011
    Date of Patent: April 22, 2014
    Assignee: Air Products and Chemicals, Inc.
    Inventors: Liu Yang, Manchao Xiao, Bing Han, Kirk S. Cuthill, Mark L. O'Neill
  • Publication number: 20140106576
    Abstract: Disclosed is an inorganic polysilazane that undergoes less shrinkage during a calcination step in an oxidizing agent such as water vapor and is less prone to allow a silica film to suffer from the formation of cracks or peel off from a semiconductor substrate, and a silica film-forming coating liquid containing the inorganic polysilazane, and also provides an inorganic polysilazane and a silica film-forming coating liquid containing the same. The value of A/(B+C) is 0.9-1.5 and the value of (A+B)/C is 4.2-50. A=peak area within the range of from 4.75 ppm to less than 5.4 ppm. B=peak area within the range of from 4.5 ppm to less than 4.75 ppm. Peak area within the range of from 4.2 ppm to less than 4.5 ppm is represented by C in a 1H-NMR spectrum; and the polystyrene-equivalent mass average molecular weight is 2000 to 20000.
    Type: Application
    Filed: April 9, 2012
    Publication date: April 17, 2014
    Applicant: ADEKA CORPORATION
    Inventors: Hiroshi Morita, Atsushi Kobayashi, Hiroo Yokota, Yasuhisa Furihata
  • Patent number: 8697583
    Abstract: Provided according to embodiments of the present invention are an oxidation-promoting compositions, methods of forming oxide layers, and methods of fabricating semiconductor devices. In some embodiments of the invention, the oxidation-promoting composition includes an oxidation-promoting agent having a structure of A-M-L, wherein L is a functional group that is chemisorbed to a surface of silicon, silicon oxide, silicon nitride, or metal, A is a thermally decomposable oxidizing functional group, and M is a moiety that allows A and L to be covalently bonded to each other.
    Type: Grant
    Filed: September 2, 2011
    Date of Patent: April 15, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyung-seok Oh, Kyung-mun Byun, Shin-hye Kim, Deok-young Jung, Gil-heyun Choi, Eunkee Hong
  • Publication number: 20140099797
    Abstract: A silicon oxide film is formed, having a specific film thickness on a substrate by alternately repeating: forming a silicon-containing layer on the substrate by supplying a source gas containing silicon, to the substrate housed in a processing chamber and heated to a first temperature; and oxidizing and changing the silicon-containing layer formed on the substrate, to a silicon oxide layer by supplying reactive species containing oxygen to the substrate heated to the first temperature in the processing chamber under a pressure atmosphere of less than atmospheric pressure, the reactive species being generated by causing a reaction between an oxygen-containing gas and a hydrogen-containing gas in a pre-reaction chamber under a pressure atmosphere of less than atmospheric pressure and heated to a second temperature equal to the first temperature or higher than the first temperature.
    Type: Application
    Filed: May 17, 2012
    Publication date: April 10, 2014
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventor: Masato Terasaki
  • Patent number: 8685867
    Abstract: Provided herein are novel pre-metal dielectric (PMD) integration schemes. According to various embodiments, the methods involve depositing flowable dielectric material to fill trenches or other gaps between gate structures in a front end of line (FEOL) fabrication process. The flowable dielectric material may be partially densified to form dual density filled gaps having a low density region capped by a high density region. In certain embodiments, the methods include further treating at least a portion of the gap fill material after subsequent process operations such as chemical mechanical planarization (CMP) or contact etching.
    Type: Grant
    Filed: December 8, 2011
    Date of Patent: April 1, 2014
    Assignee: Novellus Systems, Inc.
    Inventors: Michal Danek, Bart van Schravendijk, Nerissa Draeger, Lakshminarayana Nittala
  • Patent number: 8673682
    Abstract: A composition containing a high order silane compound and a solvent, wherein the solvent contains a cyclic hydrocarbon which has one or two double bonds and no alkyl group, is composed of only carbon and hydrogen and has a refractive index of 1.40 to 1.51, a specific permittivity of not more than 3.0 and a molecular weight of not more than 180. Method of manufacturing a film-coated substrate using the high order silane composition.
    Type: Grant
    Filed: January 7, 2010
    Date of Patent: March 18, 2014
    Assignee: Japan Science and Technology Agency
    Inventors: Tatsuya Shimoda, Yasuo Matsuki, Takashi Masuda
  • Patent number: 8662886
    Abstract: The present invention relates generally to semiconductor wafer fabrication and more particularly but not exclusively to advanced process control methodologies for controlling oxide formation using pressure. The present invention, in one or more implementations, includes a pressure stabilization system to dynamically adjust scavenger pressure in a furnace during wafer fabrication in relation to a pressure formation range, value, or one or more pressure indicators in a wafer fabrication process.
    Type: Grant
    Filed: November 12, 2007
    Date of Patent: March 4, 2014
    Assignee: Micrel, Inc.
    Inventor: Miles Dudman
  • Patent number: 8647993
    Abstract: Described are methods of making silicon nitride (SiN) materials and other silicon-containing films, including carbon-containing and/or oxygen-containing films such as SiCN (also referred to as SiNC), SiON and SiONC films, on substrates. According to various embodiments, the methods involve electromagnetic radiation-assisted activation of one or more reactants. In certain embodiments, for example, the methods involve ultraviolet (UV) activation of vapor phase amine coreactants. The methods can be used to deposit silicon-containing films, including SiN and SiCN films, at temperatures below about 400° C.
    Type: Grant
    Filed: May 15, 2012
    Date of Patent: February 11, 2014
    Assignee: Novellus Systems, Inc.
    Inventors: Adrien LaVoie, Bhadri Varadarajan, Jon Henri, Dennis Hausmann
  • Patent number: 8642486
    Abstract: A control unit heats a reaction pipe to a load temperature by controlling a temperature-raising heater 16, and then makes semiconductor wafers received in the reaction pipe. Next, the control unit heats the reaction pipe in which the semiconductor wafers are received to a film formation temperature by controlling the temperature-raising heater, and then forms thin films on the semiconductor wafers by supplying a film forming gas into the reaction pipe from a process gas introducing pipe. Also, the control unit sets the load temperature to a temperature higher than the film formation temperature.
    Type: Grant
    Filed: December 27, 2011
    Date of Patent: February 4, 2014
    Assignee: Tokyo Electron Limited
    Inventors: Toshiyuki Ikeuchi, Pao-Hwa Chou, Kazuya Yamamoto, Kentarou Sera
  • Patent number: 8642441
    Abstract: A method for fabricating a memory device with a self-aligned trap layer and rounded active region corners is disclosed. In the present invention, an STI process is performed before any of the charge-trapping and top-level layers are formed. Immediately after the STI process, the sharp corners of the active regions are exposed. Because these sharp corners are exposed at this time, they are available to be rounded through any number of known rounding techniques. Rounding the corners improves the performance characteristics of the memory device. Subsequent to the rounding process, the charge-trapping structure and other layers can be formed by a self-aligned process.
    Type: Grant
    Filed: December 15, 2006
    Date of Patent: February 4, 2014
    Assignee: Spansion LLC
    Inventors: Tim Thurgate, Shenqing Fang, Kuo-Tung Chang, YouSeok Suh, Meng Ding, Hidehiko Shiraiwa, Amol Joshi, Harpreet Sachar, David Matsumoto, Lovejeet Singh, Chih-Yuh Yang
  • Patent number: 8637411
    Abstract: Methods of depositing a film on a substrate surface include surface mediated reactions in which a film is grown over one or more cycles of reactant adsorption and reaction. In one aspect, the method is characterized by intermittent delivery of dopant species to the film between the cycles of adsorption and reaction.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: January 28, 2014
    Assignee: Novellus Systems, Inc.
    Inventors: Shankar Swaminathan, Jon Henri, Dennis M. Hausmann, Pramod Subramonium, Mandyam Sriram, Vishwanathan Rangarajan, Kirthi K. Kattige, Bart J. van Schravendijk, Andrew J. McKerrow
  • Publication number: 20140017908
    Abstract: A method for forming a conformal, homogeneous dielectric film includes: forming a conformal dielectric film in trenches and/or holes of a substrate by cyclic deposition using a gas containing a silicon and a carbon, nitrogen, halogen, hydrogen, and/or oxygen, in the absence of a porogen gas; and heat-treating the conformal dielectric film and continuing the heat-treatment beyond a point where substantially all unwanted carbons are removed from the film and further continuing the heat-treatment to render substantially homogeneous film properties of a portion of the film deposited on side walls of the trenches and/or holes and a portion of the film deposited on top and bottom surfaces of the trenches and/or holes.
    Type: Application
    Filed: June 20, 2013
    Publication date: January 16, 2014
    Inventors: Julien Beynet, Ivo Raaijmakers, Atsuki Fukazawa
  • Publication number: 20140017909
    Abstract: A film deposition method includes a step of condensing hydrogen peroxide on a substrate including a concave portion formed in a surface thereof by supplying a gas containing the hydrogen peroxide, and a step of supplying a silicon-containing gas reactable with the hydrogen peroxide to the substrate having the hydrogen peroxide condensed thereon.
    Type: Application
    Filed: July 10, 2013
    Publication date: January 16, 2014
    Inventor: Hitoshi KATO
  • Publication number: 20140011372
    Abstract: A film deposition method deposits a silicon oxide film on a substrate in which a concave portion is formed by supplying a silicon-containing gas to the substrate so that the silicon-containing gas is adsorbed on the substrate and by oxidizing the adsorbed silicon-containing gas with an oxidation gas. A gas-phase temperature in an atmosphere above the substrate to which the silicon-containing gas is supplied can be kept lower by an inactive gas supplied from a separation area that separates the silicon gas supply part and the oxidation gas supply part even if the substrate is heated to a temperature higher than a temperature that can decompose the silicon-containing gas. Accordingly, the silicon-containing gas can adsorb on the substrate without decomposing in the gas phase.
    Type: Application
    Filed: July 3, 2013
    Publication date: January 9, 2014
    Inventors: Hitoshi KATO, Takeshi Kumagai, Tatsuya Tamura, Hiroyuki Kikuchi
  • Publication number: 20140011371
    Abstract: A silicone oxide film forming method includes forming a silicon oxide film on a plurality of target objects by supplying a chlorine atom-containing silicon source into a reaction chamber accommodating the plurality of target objects. Forming the silicon oxide film includes making an interior of the reaction chamber be under a hydrogen atmosphere by supplying a hydrogen gas into the reaction chamber.
    Type: Application
    Filed: July 2, 2013
    Publication date: January 9, 2014
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Tomoyuki OBU, Masaki KUROKAWA
  • Patent number: 8623750
    Abstract: A film of silicon dioxide is formed on the silicon-germanium layer, and a high dielectric constant film is further formed on the film of silicon dioxide. First irradiation from a flash lamp is performed on the semiconductor wafer to increase the temperature of a front surface of the semiconductor wafer from a preheating temperature to a target temperature for a time period in the range of 3 milliseconds to 1 second. Subsequently, second irradiation from the flash lamp is performed to maintain the temperature of the front surface of the semiconductor wafer within a ±25° C. range around the target temperature for a time period in the range of 3 milliseconds to 1 second. This promotes the crystallization of the high dielectric constant film while suppressing the alleviation of distortion in the silicon-germanium layer.
    Type: Grant
    Filed: September 10, 2012
    Date of Patent: January 7, 2014
    Assignee: Dainippon Screen Mfg. Co., Ltd.
    Inventors: Kazuhiko Fuse, Shinichi Kato
  • Publication number: 20140004715
    Abstract: A method of forming a silicone oxide film includes: forming a silicon oxide film on a plurality of target objects by supplying a chlorine-containing silicon source into a reaction chamber accommodating the plurality of target objects; and modifying the silicon oxide film, which is formed by forming the silicon oxide film, by supplying hydrogen and oxygen or hydrogen and nitrous oxide into the reaction chamber and making an interior of the reaction chamber be under a hydrogen-oxygen atmosphere or a hydrogen-nitrous oxide atmosphere.
    Type: Application
    Filed: June 28, 2013
    Publication date: January 2, 2014
    Inventors: Tomoyuki OBU, Masaki KUROKAWA
  • Patent number: 8609551
    Abstract: To form an insulating film with extremely low concentration of impurities such as carbon, hydrogen, nitrogen, chlorine, etc in a film. There are provided the steps of forming a specific element-containing layer on a substrate by supplying source gas containing a specific element into a processing container in which the substrate is accommodated; changing the specific element-containing layer into a nitride layer, by activating and supplying gas containing nitrogen into the processing container; and changing the nitride layer into an oxide layer or an oxynitride layer, by activating and supplying gas containing oxygen into the processing container; with this cycle set as one cycle and performed for at least one or more times.
    Type: Grant
    Filed: December 22, 2008
    Date of Patent: December 17, 2013
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Naonori Akae, Yoshiro Hirose
  • Patent number: 8609554
    Abstract: A semiconductor structure and a method for manufacturing the same are provided. The method comprises following steps. A first silicon-containing conductive material is formed on a substrate. A second silicon-containing conductive material is formed on the first silicon-containing conductive material. The first silicon-containing conductive material and the second silicon-containing conductive material have different dopant conditions. The first silicon-containing conductive material and the second silicon-containing conductive material are thermally oxidized for turning the first silicon-containing conductive material wholly into an insulating oxide structure, and the second silicon-containing conductive material into a silicon-containing conductive structure and an insulating oxide layer.
    Type: Grant
    Filed: January 19, 2011
    Date of Patent: December 17, 2013
    Assignee: Macronix International Co., Ltd.
    Inventors: Hang-Ting Lue, Yi-Hsuan Hsiao
  • Patent number: 8609555
    Abstract: When forming complex metallization systems, a sensitive material, such as a ULK material, may be deposited on a silicon-containing dielectric material, such as an etch stop material, with superior adhesion by performing a surface treatment on the basis of fluorine radicals. Due to the fluorine treatment, silicon-fluorine bonds are generated, which are then broken up upon interacting with the chemically active component during the further deposition process. Consequently, the subsequent material layer is chemically bonded to the underlying material, thereby imparting superior stability to the interface, which in turn may result in superior robustness and reliability of the metallization system upon performing reflowing processes and operating complex packaged semiconductor devices.
    Type: Grant
    Filed: May 25, 2011
    Date of Patent: December 17, 2013
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Christof Streck, Hartmut Ruelke, Heinz-Juergen Voss
  • Publication number: 20130330936
    Abstract: A method of forming an Al2O3/SiO2 stack comprising injecting into the reaction chamber, through an ALD process, at least one silicon containing compound selected from the group consisting of: BDEAS Bis(diethylamino)silane SiH2(NEt2)2, BDMAS Bis(dimethylamino)silane SiH2(NMe2)2, BEMAS Bis(ethylmethylamino)silane SiH2(NEtMe)2, DIPAS (Di-isopropylamido)silane SiH3(NiPr2), DTBAS (Di tert-butylamido)silane SiH3(NtBu2); injecting into the reaction chamber an oxygen source selected in the list: oxygen, ozone, oxygen plasma, water, CO2 plasma, N2O plasma; and injecting on said silicon oxide film, through an ALD process, at least one aluminum containing compound selected in the list: Al(Me)3, Al(Et)3, Al(Me)2(OiPr), Al(Me)2(NMe)2 or Al(Me)2(NEt)2.
    Type: Application
    Filed: December 15, 2011
    Publication date: December 12, 2013
    Applicants: TECHNISCHE UNIVERSITEIT EINDHOVEN, L'AIR LIQUIDE, SOCIETE ANONYME POUR L'ETUDE ET L'EXPLOITATION DES PROCÉDÉS GEORGES CLAUDE
    Inventors: Christophe Lachaud, Alain Madec, Wilhelmus Mathijs Marie Kessels, Gijs Dingemans
  • Patent number: 8603924
    Abstract: A method of forming gate dielectric material includes forming a silicon oxide gate layer over a substrate. The silicon oxide gate layer is treated with a first ozone-containing gas. After treating the silicon oxide gate layer, a high dielectric constant (high-k) gate dielectric layer is formed over the treated silicon oxide gate layer.
    Type: Grant
    Filed: January 11, 2011
    Date of Patent: December 10, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Liang-Gi Yao, Chia-Cheng Chen, Clement Hsingjen Wann
  • Publication number: 20130302999
    Abstract: Methods for processing a substrate are described herein. Methods can include positioning a substrate in a processing chamber, maintaining the processing chamber at a temperature below 400° C., flowing a reactant gas comprising either a silicon hydride or a silicon halide and an oxidizing precursor into the process chamber, applying a microwave power to create a microwave plasma from the reactant gas, and depositing a silicon oxide layer on at least a portion of the exposed surface of a substrate.
    Type: Application
    Filed: May 2, 2013
    Publication date: November 14, 2013
    Inventors: Tae Kyung WON, Seon-Mee CHO, Soo Young CHOI, Beom Soo PARK, Dong-Kil YIM, John M. WHITE, Jozef KUDELA
  • Patent number: 8580699
    Abstract: Catalyzed atomic layer deposition from a reduced number of precursors is described. A deposition precursor contains silicon, oxygen and a catalytic ligand. A hydroxyl-terminated substrate is exposed to the deposition precursor to form a silicon bridge bond between two surface-bound oxygens. The surface-bound oxygens were part of two surface-bound hydroxyl groups and the adsorption of the deposition precursor liberates the hydrogens. The silicon atom is also chemically-bound to one or two additional oxygen atoms which were already chemically-bound to the silicon within a same deposition precursor molecule. At least one of the additional oxygen atoms is further chemically-bound to the catalytic ligand either directly or by way of a hydrocarbon chain. Further exposure of the substrate to moisture (H2O) results in displacement of the additional oxygen which are replaced by hydroxyl groups from the moisture. The surface is again hydroxyl-terminated and the process may be repeated.
    Type: Grant
    Filed: August 3, 2011
    Date of Patent: November 12, 2013
    Assignee: Applied Materials, Inc.
    Inventor: Abhijit Basu Mallick
  • Patent number: 8574985
    Abstract: Methods for depositing high-K dielectrics are described, including depositing a first electrode on a substrate, wherein the first electrode is chosen from the group consisting of platinum and ruthenium, applying an oxygen plasma treatment to the exposed metal to reduce the contact angle of a surface of the metal, and depositing a titanium oxide layer on the exposed metal using at least one of a chemical vapor deposition process and an atomic layer deposition process, wherein the titanium oxide layer comprises at least a portion rutile titanium oxide.
    Type: Grant
    Filed: March 3, 2011
    Date of Patent: November 5, 2013
    Assignees: Intermolecular, Inc., Elpida Memory, Inc.
    Inventors: Xiangxin Rui, Sunil Shanker, Sandra Malhotra, Imran Hashim, Edward Haywood
  • Patent number: 8575041
    Abstract: Damaged surface areas of low-k dielectric materials may be efficiently repaired by avoiding the saturation of dangling silicon bonds after a reactive plasma treatment on the basis of OH groups, as is typically applied in conventional process strategies. The saturation of the dangling bond may be accomplished by directly initiating a chemical reaction with appropriate organic species, thereby providing superior reaction conditions, which in turn results in a more efficient restoration of the dielectric characteristics.
    Type: Grant
    Filed: September 15, 2011
    Date of Patent: November 5, 2013
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Matthias Schaller, Daniel Fischer, Thomas Oszinda
  • Patent number: 8557716
    Abstract: A thin film can be formed on a substrate at a low temperature with a practicable film-forming rate. There is provided a semiconductor device manufacturing method for forming an oxide or nitride film on a substrate. The method comprises: exposing the substrate to a source gas; exposing the substrate to a modification gas comprising an oxidizing gas or a nitriding gas, wherein an atom has electronegativity different from that of another atom in molecules of the oxidizing gas or the nitriding gas; and exposing the substrate to a catalyst. The catalyst has acid dissociation constant pKa in a range from 5 to 7, but a pyridine is not used as the catalyst.
    Type: Grant
    Filed: February 17, 2010
    Date of Patent: October 15, 2013
    Assignee: Hitachi Kokusai Electric Inc.
    Inventor: Norikazu Mizuno
  • Patent number: 8546271
    Abstract: A method for selective oxidation of silicon containing materials in a semiconductor device is disclosed and claimed. In one aspect, a rapid thermal processing apparatus is used to selectively oxidize a substrate by in-situ steam generation at high pressure in a hydrogen rich atmosphere. Other materials, such as metals and barrier layers, in the substrate are not oxidized.
    Type: Grant
    Filed: May 27, 2011
    Date of Patent: October 1, 2013
    Assignee: Applied Materials, Inc.
    Inventors: Yoshitaka Yokota, Norman Tam, Balasubramanian Ramachandran, Martin John Ripley
  • Publication number: 20130252440
    Abstract: Methods of conformally depositing silicon oxide layers on patterned substrates are described. The patterned substrates are plasma treated such that subsequently deposited silicon oxide layers may deposit uniformly on walls of deep closed trenches. The technique is particularly useful for through-substrate vias (TSVs) which require especially deep trenches. The trenches may be closed at the bottom and deep to enable through-substrate vias (TSVs) by later removing a portion of the backside substrate (near to the closed end of the trench). The conformal silicon oxide layer thickness on the sidewalls near the bottom of a trench is greater than or about 70% of the conformal silicon oxide layer thickness near the top of the trench in embodiments of the invention. The improved uniformity of the silicon oxide layer enables a subsequently deposited conducting plug to be thicker and offer less electrical resistance.
    Type: Application
    Filed: September 20, 2012
    Publication date: September 26, 2013
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Lei Luo, Shankar Venkataraman, Manuel A. Hernandez, Kedar Sapre, Zhong Qiang Hua
  • Patent number: 8536070
    Abstract: This invention relates to materials and processes for thin film deposition on solid substrates. Silica/alumina nanolaminates were deposited on heated substrates by the reaction of an aluminum-containing compound with a silanol. The nanolaminates have very uniform thickness and excellent step coverage in holes with aspect ratios over 40:1. The films are transparent and good electrical insulators. This invention also relates to materials and processes for producing improved porous dielectric materials used in the insulation of electrical conductors in microelectronic devices, particularly through materials and processes for producing semi-porous dielectric materials wherein surface porosity is significantly reduced or removed while internal porosity is preserved to maintain a desired low-k value for the overall dielectric material.
    Type: Grant
    Filed: July 22, 2011
    Date of Patent: September 17, 2013
    Assignee: President and Fellows of Harvard College
    Inventors: Roy Gerald Gordon, Jill S. Becker, Dennis Hausmann
  • Patent number: 8524612
    Abstract: Embodiments related to depositing thin conformal films using plasma-activated conformal film deposition (CFD) processes are described herein. In one example, a method of processing a substrate includes, applying photoresist to the substrate, exposing the photoresist to light via a stepper, patterning the resist with a pattern and transferring the pattern to the substrate, selectively removing photoresist from the substrate, placing the substrate into a process station, and, in the process station, in a first phase, generating radicals off of the substrate and adsorbing the radicals to the substrate to form active species, in a first purge phase, purging the process station, in a second phase, supplying a reactive plasma to the surface, the reactive plasma configured to react with the active species and generate the film, and in a second purge phase, purging the process station.
    Type: Grant
    Filed: January 21, 2011
    Date of Patent: September 3, 2013
    Assignee: Novellus Systems, Inc.
    Inventors: Ming Li, Hu Kang, Mandyam Sriram, Adrien LaVoie
  • Patent number: 8524591
    Abstract: In semiconductor devices, integrity of a titanium nitride material may be increased by exposing the material to an oxygen plasma after forming a thin silicon nitride-based material. The oxygen plasma may result in an additional passivation of any minute surface portions which may not be appropriately covered by the silicon nitride-based material. Consequently, efficient cleaning recipes, such as cleaning processes based on SPM, may be performed after the additional passivation without undue material loss of the titanium nitride material. In this manner, sophisticated high-k metal gate stacks may be formed with a very thin protective liner material on the basis of efficient cleaning processes without unduly contributing to a pronounced yield loss in an early manufacturing stage.
    Type: Grant
    Filed: August 2, 2010
    Date of Patent: September 3, 2013
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Sven Beyer, Rick Carter, Andreas Hellmich, Berthold Reimer
  • Patent number: 8513578
    Abstract: A processing apparatus using an electromagnetic wave is provided to perform a heat treatment on a target object. The processing apparatus includes a metallic processing chamber; a loading/unloading opening provided in one end of the processing chamber; a closing body capable of closing and opening the loading/unloading opening; a holding unit loaded and unloaded into and from the inside of the processing chamber through the loading/unloading opening, holding target objects at a predetermined interval, the holding unit being made of a material allowing the electromagnetic wave to transmit therethrough; an electromagnetic wave supply unit for introducing the electromagnetic wave into the processing chamber; a gas introducing unit for introducing a gas into the processing chamber; and a gas exhaust unit for exhausting an atmosphere in the processing chamber.
    Type: Grant
    Filed: May 17, 2011
    Date of Patent: August 20, 2013
    Assignee: Tokyo Electron Limited
    Inventor: Masahiro Shimizu
  • Patent number: 8513809
    Abstract: A semiconductor device includes an interlayer insulation film, a wiring embedded in the interlayer insulation film and an air gap part formed between a side surface of the wiring and the interlayer insulation film. A first sidewall film is formed in the air gap part so that the first sidewall film contacts with the side surface of the wiring.
    Type: Grant
    Filed: May 6, 2011
    Date of Patent: August 20, 2013
    Assignee: Elpida Memory, Inc.
    Inventor: Yasuhiko Ueda
  • Patent number: 8501636
    Abstract: A method for fabricating silicon dioxide layer is disclosed. The method includes the following steps. Firstly, a semiconductor substrate is provided. Next, the semiconductor substrate is cleaned with a solution containing hydrogen peroxide to form a chemical oxide layer on the semiconductor substrate. Then, the chemical oxide layer is heated in no oxygen atmosphere, such that the chemical oxide layer forms a compact layer. Then, the semiconductor substrate is heated in oxygen atmosphere to form a silicon dioxide layer between the semiconductor substrate and the compact layer.
    Type: Grant
    Filed: July 24, 2012
    Date of Patent: August 6, 2013
    Assignee: United Microelectronics Corp.
    Inventors: Shao-Wei Wang, Yu-Ren Wang, Chien-Liang Lin, Ying-Wei Yen, Kun-Yuan Lo, Chih-Wei Yang
  • Publication number: 20130189853
    Abstract: This invention discloses the method of forming silicon nitride, silicon oxynitride, silicon oxide, carbon-doped silicon nitride, carbon-doped silicon oxide and carbon-doped oxynitride films at low deposition temperatures. The silicon containing precursors used for the deposition are monochlorosilane (MCS) and monochloroalkylsilanes. The method is preferably carried out by using plasma enhanced atomic layer deposition, plasma enhanced chemical vapor deposition, and plasma enhanced cyclic chemical vapor deposition.
    Type: Application
    Filed: September 21, 2012
    Publication date: July 25, 2013
    Applicants: TOKYO ELECTRON LIMITED, AIR PRODUCTS AND CHEMICALS, INC.
    Inventors: Liu Yang, Xinjian Lei, Bing Han, Manchao Xiao, Eugene Joseph Karwacki, JR., Kazuhide Hasebe, Masanobu Matsunaga, Masato Yonezawa, Hansong Cheng
  • Patent number: 8492290
    Abstract: A method of fabricating a silicon-containing oxide layer that includes providing a chemical oxide layer on a surface of a semiconductor substrate, removing the chemical oxide layer in an oxygen-free environment at a temperature of 1000° C. or greater to provide a bare surface of the semiconductor substrate, and introducing an oxygen-containing gas at a flow rate to the bare surface of the semiconductor substrate for a first time period at the temperature of 1000° C. The temperature is then reduced to room temperature during a second time period while maintaining the flow rate of the oxygen containing gas to provide a silicon-containing oxide layer having a thickness ranging from 0.5 ? to 10 ?.
    Type: Grant
    Filed: June 21, 2011
    Date of Patent: July 23, 2013
    Assignees: International Business Machines Corporation, Globalfoundries Inc.
    Inventors: Michael P. Chudzik, Min Dai, Joseph F. Shepard, Jr., Shahab Siddiqui, Jinping Liu
  • Patent number: 8481403
    Abstract: Methods of this invention relate to filling gaps on substrates with a solid dielectric material by forming a flowable film in the gap. The flowable film provides consistent, void-free gap fill. The film is then converted to a solid dielectric material. In this manner gaps on the substrate are filled with a solid dielectric material. According to various embodiments, the methods involve reacting a dielectric precursor with an oxidant to form the dielectric material. In certain embodiments, the dielectric precursor condenses and subsequently reacts with the oxidant to form dielectric material. In certain embodiments, vapor phase reactants react to form a condensed flowable film.
    Type: Grant
    Filed: January 4, 2011
    Date of Patent: July 9, 2013
    Assignee: Novellus Systems, Inc.
    Inventors: Vishal Gauri, Raashina Humayun, Chi-I Lang, Judy H. Huang, Michael Barnes, Sunil Shanker
  • Patent number: 8475666
    Abstract: A toughening agent composition for increasing the hydrophobicity of an organosilicate glass dielectric film when applied to said film. It includes a component capable of alkylating or arylating silanol moieties of the organosilicate glass dielectric film via silylation, and an activating agent selected from the group consisting of an amine, an onium compound and an alkali metal hydroxide.
    Type: Grant
    Filed: September 15, 2004
    Date of Patent: July 2, 2013
    Assignee: Honeywell International Inc.
    Inventors: Teresa A. Ramos, Robert R. Roth, Anil S. Bhanap, Paul G. Apen, Denis H. Endisch, Brian J. Daniels, Ananth Naman, Nancy Iwamoto, Roger Y. Leung
  • Patent number: 8476108
    Abstract: A method and apparatus for manufacturing a semiconductor device is disclosed, which is capable of realizing an extension of a cleaning cycle for a processing chamber, the method comprising preheating a substrate; placing the preheated substrate onto a substrate-supporting unit provided in a susceptor while the preheated substrate is maintained at a predetermined height from an upper surface of the susceptor provided in a processing chamber; and forming a thin film on the preheated substrate, wherein a temperature of the preheated substrate is higher than a processing temperature for forming the thin film in the processing chamber.
    Type: Grant
    Filed: January 4, 2012
    Date of Patent: July 2, 2013
    Assignee: Jusung Engineering Co., Ltd
    Inventors: Sang Ki Park, Seong Ryong Hwang, Geun Tae Cho
  • Patent number: 8470675
    Abstract: A process of forming an integrated circuit, including forming a dummy oxide layer for ion implanting low voltage transistors, replacing the dummy oxide in the low voltage transistor area with a thinner gate dielectric layer, and retaining the dummy oxide for a gate dielectric for a DEMOS or LDMOS transistor. A process of forming an integrated circuit, including forming a dummy oxide layer for ion implanting low voltage and intermediate voltage transistors, replacing the dummy oxide in the low voltage transistors with a thinner gate dielectric layer, replacing the dummy oxide in the intermediate voltage transistor with another gate dielectric layer, and retaining the dummy oxide for a gate dielectric for a DEMOS or LDMOS transistor.
    Type: Grant
    Filed: October 17, 2011
    Date of Patent: June 25, 2013
    Assignee: Texas Instruments Incorporated
    Inventors: Seetharaman Sridhar, Sameer Pendharkar
  • Patent number: 8470187
    Abstract: A method of depositing a film with a target conformality on a patterned substrate, includes: depositing a first film on a convex pattern and a bottom surface; and depositing a second film on the first film, thereby forming an integrated film having a target conformality, wherein one of the first and second films is a conformal film which is non-flowable when being deposited and has a conformality of about 80% to about 100%, and the other of the first and second films is a flowable film which is flowable when being deposited.
    Type: Grant
    Filed: November 5, 2010
    Date of Patent: June 25, 2013
    Assignee: ASM Japan K.K.
    Inventor: Jeongseok Ha
  • Patent number: 8466073
    Abstract: A method of forming a silicon oxide layer is described. The method first deposits a silicon-nitrogen-and-hydrogen-containing (polysilazane) film by radical-component chemical vapor deposition (CVD). The silicon-nitrogen-and-hydrogen-containing film is formed by combining a radical precursor (excited in a remote plasma) with an unexcited carbon-free silicon precursor. A capping layer is formed over the silicon-nitrogen-and-hydrogen-containing film to avoid time-evolution of underlying film properties prior to conversion into silicon oxide. The capping layer is formed by combining a radical oxygen precursor (excited in a remote plasma) with an unexcited silicon-and-carbon-containing-precursor. The films are converted to silicon oxide by exposure to oxygen-containing environments. The two films may be deposited within the same substrate processing chamber and may be deposited without breaking vacuum.
    Type: Grant
    Filed: April 17, 2012
    Date of Patent: June 18, 2013
    Assignee: Applied Materials, Inc.
    Inventors: Linlin Wang, Abhijit Basu Mallick, Nitin K. Ingle