Abstract: A method and apparatus are disclosed for reducing the concentration of chlorine and/or other bound contaminants within a semiconductor oxide composition that is formed by chemical vapor deposition (CVD) using a semiconductor-element-providing reactant such as dichlorosilane (DCS) and an oxygen-providing reactant such as N2O. In one embodiment, a DCS-HTO film is annealed by heating N2O gas to a temperature in the range of about 825° C. to about 950° C. so as to trigger exothermic decomposition of the N2O gas and flowing the heated gas across the DCS-HTO film so that disassociated atomic oxygen radicals within the heated N2O gas can transfer disassociating energy to chlorine atoms bound within the DCS-HTO film and so that the atomic oxygen radicals can fill oxygen vacancies within the semiconductor-oxide matrix of DCS-HTO film. An improved ONO structure may be formed with the annealed DCS-HTO film for use in floating gate or other memory applications.

Abstract: In a process of forming a silicon oxide film 116 that constitutes an interlayer insulating film with TEOS as a raw material through the plasma CVD method, the RF output is oscillated at 50 W, and the RF output is gradually increased from 50 W to 250 W (an output value at the time of forming a film) after discharging (after the generation of O2-plasma). A TEOS gas is supplied to start the film formation simultaneously when the RF output becomes 250 W, or while the timing is shifted. As a result, because the RF power supply is oscillated at a low output when starting discharging, a voltage between the RF electrodes can be prevented from changing transitionally and largely.

Abstract: Adhesion between silicon nitride etch-stop layers and carbon doped oxide films may be improved by using plasma argon densification treatments of the carbon doped oxide films. The resulting surface layer of the carbon doped oxide films may be carbon-depleted and may include a relatively rough interface to improve the adhesion of deposited silicon nitride films.

Abstract: The present invention pertains to forming a transistor in the absence of hydrogen, or in the presence of a significantly reduced amount of hydrogen. In this manner, a high-k material can be utilized to form a gate dielectric layer in the transistor and facilitate device scaling while mitigating defects that can be introduced into the high-k material by the presence of hydrogen and/or hydrogen containing compounds.

Abstract: In a method of forming a silicon oxide film, the silicon oxide film is formed on a substrate by the use of a plasma CVD method. A plasma-generating region is separated from a deposition region which includes excitation oxygen molecules and excitation oxygen atoms. Plasma of first gas containing oxygen atoms is formed in the plasma-generating region while second gas containing silicon atoms is supplied into the deposition region. First quantity of the excitation oxygen molecules and second quantity of the excitation oxygen atoms are controlled intentionally.

Abstract: Chemical vapor deposition processes are employed to fill high aspect ratio (typically at least 3:1), narrow width (typically 1.5 microns or less and even sub 0.15 micron) gaps with significantly reduced incidence of voids or weak spots. This deposition process involves the use of hydrogen as a process gas in the reactive mixture of a plasma containing CVD reactor. The process gas also includes dielectric forming precursor molecules such as silicon and oxygen containing molecules.

Abstract: A semiconductor device structure and method for manufacture includes a substrate having a top first layer; a second thin transition layer located on top of the first layer; and, a third layer located on top of the transition layer, wherein the second thin transition layer provides strong adhesion and cohesive strength between the first and third layers of the structure. Additionally, a semiconductor device structure and method for manufacture includes an insulating structure comprising a multitude of dielectric and conductive layers with respective transition bonding layers disposed to enhance interfacial strength among the different layers. Further, an electronic device structure incorporates layers of insulating and conductive materials as intralevel or interlevel dielectrics in a back-end-of-the-line (“BEOL”) wiring structure in which the interfacial strength between different pairs of dielectric films is enhanced by a thin intermediate transition bonding layer.

Abstract: A hard film is formed on an insulation film formed on a semiconductor substrate by vaporizing a silicon-containing hydrocarbon compound to provide a source gas, introducing a reaction gas composed of the source gas and optionally an additive gas such as alcohol to a reaction space of a plasma CVD apparatus, and applying low-frequency RF power and high-frequency RF power. The silicon-containing hydrocarbon compound includes a cyclic Si-containing hydrocarbon compound and/or a linear Si-containing hydrocarbon compound, as a basal structure, with reactive groups for form oligomers using the basal structure. The residence time of the reaction gas in the reaction space is lengthened by reducing the total flow of the reaction gas in such a way as to form a siloxan polymer film with a low dielectric constant.

Abstract: An integrated circuit is provided comprising a substrate and discrete areas of electrically insulating and electrically conductive material, wherein the electrically insulating material is a hybrid organic-inorganic material that has a density of 1.45 g/cm3 or more and a dielectric constant of 3.0 or less. The integrated circuit can be made by a method comprising: providing a substrate; forming discrete areas of electrically insulating and electrically conductive material on the substrate; wherein the electrically insulating material is deposited on the substrate followed by heating at a temperature of 350° C. or less; and wherein the electrically insulating material is a hybrid organic-inorganic material that has a density of 1.45 g/cm3 or more after densification. Also disclosed is a method for making an integrated circuit comprising performing a dual damascene method with an electrically conductive material and a dielectric, the dielectric being a directly photopatterned hybrid organic-inorganic material.

Abstract: The present disclosure provides methods and apparatus useful in depositing materials on batches of microfeature workpieces. One implementation provides a method in which a quantity of a first precursor gas is introduced to an enclosure at a first enclosure pressure. The pressure within the enclosure is reduced to a second enclosure pressure while introducing a purge gas at a first flow rate. The second enclosure pressure may approach or be equal to a steady-state base pressure of the processing system at the first flow rate. After reducing the pressure, the purge gas flow may be increased to a second flow rate and the enclosure pressure may be increased to a third enclosure pressure. Thereafter, a flow of a second precursor gas may be introduced with a pressure within the enclosure at a fourth enclosure pressure; the third enclosure pressure is desirably within about 10 percent of the fourth enclosure pressure.

Abstract: According to the invention, while performing plasma-enhanced chemical vapor deposition on a substrate by exposing the substrate in a vacuum to a flow of particles generated by a plasma, which particles react to form a passivation layer on the substrate, a grid is interposed between the plasma and the substrate, thereby reducing the flow of charged particles towards the substrate while conserving a flow of neutral particles. The grid is formed of metal wires that are crossed at a pitch that is less than two or three times the Debye length (?D) of the plasma used, at least at the beginning of deposition. The aging properties of semiconductor components made by such a method is thereby improved.

Abstract: A method and apparatus are disclosed for depositing a dielectric film in a gap having an aspect ratio at least as large as 6:1. By cycling the gas chemistry of a high-density-plasma chemical-vapor-deposition system between deposition and etching conditions, the gap may be substantially 100% filled. Such filling is achieved by adjusting the flow rates of the precursor gases such that the deposition to sputtering ratio during the deposition phases is within certain predetermined limits.

Abstract: A process is provided for depositing an undoped silicon oxide film on a substrate disposed in a process chamber. A process gas that includes SiF4, a fluent gas, a silicon source, and an oxidizing gas reactant is flowed into the process chamber. A plasma having an ion density of at least 1011 ions/cm3 is formed from the process gas. The undoped silicon oxide film is deposited over the substrate with the plasma using a process that has simultaneous deposition and sputtering components.

Abstract: A semiconductor device producing method using a plasma processing apparatus including a processing chamber, a substrate-supporting body which supports a substrate in the processing chamber, and a cylindrical electrode and a magnetic lines of force-forming member disposed around the processing chamber, comprises forming an oxide film on the substrate, and thereafter, by changing a high frequency impedance of the substrate-supporting body, continuously forming an oxynitride film by nitriding the oxide film by activated species of nitrogen which are activated by plasma.

Abstract: Embodiments of the present invention relate to semiconductor structures having multiple gate dielectric structures. One embodiment forms semiconductor devices in multiple regions having different dielectric thicknesses where the interface between the gate dielectric and the semiconductor substrate is protected to result in an improved (e.g. less rough) interface. One embodiment includes forming a dielectric layer overlying a substrate, partially etching the dielectric layer in at least one of the multiple regions, and ashing the dielectric layer. The remaining portion of the dielectric layer (due to the partial etch) may then help protect the underlying substrate from damage during a subsequent preclean. Afterwards, in one embodiment, the gate dielectric layer is grown to achieve a target gate dielectric thickness in at least one of the regions. This may also help further densify the gate dielectric layer. Processing may then be continued to form semiconductor devices in each of the multiple regions.

Abstract: A method is provided for depositing a thin film on a substrate in a process chamber with reduced incidence of plasma charge damage. A process gas containing a precursor gases suitable for forming a plasma is flowed into a process chamber, and a plasma is generated from the process gas to deposit the thin film on the substrate. The precursor gases are flowed into the process chamber such that the thin film is deposited at the center of the substrate more rapidly than at an edge of the substrate.

Abstract: With keeping an atmosphere including oxygen within a chamber and with a wafer kept at a low temperature, plasma generated within the chamber is biased toward the wafer, and the wafer is subjected to the plasma. A semiconductor layer exposed on the wafer is oxidized into an oxide film. Thus, an oxide film can be formed even at room temperature differently from thermal oxidation. This oxidation is applicable to recovery of an implantation protection insulating film having been etched in cleaning a photoresist film, relaxation of a step formed between polysilicon films, relaxation of a step formed within a trench and the like. Also, before removing a photoresist film used for forming a gate electrode including a metal, a contamination protection film can be formed by this oxidation with the photoresist film kept.

Abstract: A method and system for forming a low defect oxide in a plasma processing chamber. By pulsing at least one of an RF power source and a processing gas, the growth of the oxide can be regulated. During periods in which the processing gas is not injected, an inert gas is injected to keep a substantially constant flow rate.

Abstract: The present invention is provided to a semiconductor device and a method of fabricating the same. A spacer consisting of SiCxHy or SiOCxHy having a low dielectric constant is formed at the sidewall of a trench or a hole that is formed in an interlayer insulating film. It is therefore possible to reduce the dielectric constant while reducing critical dimension loss of the trench or the hole. Therefore, the present invention has advantages that it can enhance the operating speed of the device by minimizing parasitic capacitance and prohibiting RC delay and crosstalk.

Abstract: Low dielectric constant porous materials with improved elastic modulus and material hardness. The process of making such porous materials involves providing a porous dielectric material and plasma curing the porous dielectric material with a fluorine-free plasma gas to produce a fluorine-free plasma cured porous dielectric material. Fluorine-free plasma curing of the porous dielectric material yields a material with improved modulus and material hardness, and with comparable dielectric constant. The improvement in elastic modulus is typically greater than or about 50%, and more typically greater than or about 100%. The improvement in material hardness is typically greater than or about 50%. It is emphasized that this abstract is provided to comply with the rules requiring an abstract which will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure.

Abstract: A method is disclosed for removing liquids from a semiconductor substrate by contacting the liquid on the substrate with a liquid which attracts the liquid on the substrate, separating the liquids from the substrate, and inducing a phase transition in a layer on the substrate. In particular, the method is applicable to removing water from a water-containing layer on the substrate by contacting the layer with a hygroscopic liquid. Trenches on a substrate can be isolated by filling the trenches with a water-containing gel formed by reacting silane and hydrogen peroxide. The gel is contacted with sulfuric acid to remove a portion of the water from the gel before annealing to form silica in the trenches. Unlike filled trenches formed by conventional technology, there are no voids in the bottom of the trenches. The method is also applicable to forming dielectric layers which cover metal lines, low-dielectric layers, and interlayer dielectric layers.

Abstract: A method for forming an adhesion between dielectric layers, it includes forming a first dielectric layer and forming a second dielectric layer having a first portion and a second portion. The first portion is on the first dielectric layer and the second portion is on the first portion. The first portion and second portion are formed by an in-situ method. The first portion has at least one of the following a dielectric constant, hardness or SiCH3/SiO area ratio, which is higher than the second portion. A structure of enhanced-inter-adhesion dielectric layers includes a first dielectric layer and a second dielectric layer having a first portion on the first dielectric layer, and a second portion on the first portion. Herein, the first portion has a dielectric constant around 2.8 to 3.5 higher than second portion.

Abstract: A method for dry etching a dielectric layer including providing a substrate; forming at least one overlying dielectric layer over the substrate; subjecting the at least one overlying layer to a plasma oxidizing process; and, subjecting the at least one overlying layer to a plasma etching process.

Abstract: Methods for forming a thin film on an integrated circuit device including providing energy to reactants in a deposition chamber to activate the reactants. The activated reactants are then deposited on the substrate to form a thin film on the substrate. The reactants selected may be selectively activated so that different thin films are formed in a single chamber thereby reducing processing time.

Abstract: Processing problems associated with porous low-k dielectric materials are often severe. Exposure of low-k materials to plasma during feature etching, ashing, and priming steps has deleterious consequences. For porous, silicon-based low-k dielectric materials, the plasma depletes a surface organic group, raising the dielectric constant of the material. In the worst case, the damaged dielectric is destroyed during the wet etch removal of the antireflective coating in the via-first copper dual-damascene integration scheme. This issue is addressed by exposing the dielectric to silane coupling agents at various stages of etching and cleaning. Chemical reactions with the silane coupling agent both replenish the dielectric surface organic group and passivate the dielectric surface relative to the surface of the antireflective coating.

Abstract: Chemical vapor deposition processes are employed to fill high aspect ratio (typically at least 3:1), narrow width (typically 1.5 microns or less and even sub 0.13 micron) gaps with significantly reduced incidence of voids or weak spots. This deposition process involves the use of hydrogen and a phosphorus dopant precursor as process gasses in the reactive mixture of a plasma containing CVD reactor. The process gas also includes dielectric forming precursor molecules such as silicon and oxygen containing molecules.

Abstract: The invention relates to a material including carbon, oxygen, silicon and hydrogen and having a dielectric constant of from about 2.1 to about 3.0 where an FTIR scan of the material includes at least two major peaks signifying Si—CH3 bonding. The invention further relates to a material which has a variable dielectric constant through the thickness of the material. Another aspect of the invention is the method of making the material.

Abstract: An embodiment of the instant invention is a method of forming a dielectric layer on a silicon-containing structure, the method comprising the steps of: providing a nitrogen-containing gas; heating the silicon-containing structure to an elevated temperature which is greater than 700 C; and striking a plasma above the silicon-containing structure, wherein combination of the nitrogen-containing gas, the elevated temperature, and the plasma resulting in the thermal nitridation of a portion of the silicon-containing structure. Preferably, the elevated temperature is greater than 900 C (more preferably the elevated temperature is greater than 1000 C). The silicon-containing structure is, preferably, a silicon substrate or a bottom electrode of a storage capacitor of a memory device.

Abstract: This invention relates to the fabrication of planar inductive components whereby the design in cross-section describes a conductor surrounded by magnetic material along the length of the conductor; an electrical insulator is placed between the conductor and the magnetic material. Cases also apply where more than one independent conductor is used. The planar form allows integration of inductive components with integrated circuits. These inductive components can be embedded in other materials. They can also be fabricated directly onto parts.

Abstract: A silicon oxide gap-filling process is described, wherein a CVD process having an etching effect is performed to fill up a trench with silicon oxide. The reaction gases used in the CVD process include deposition gases and He/H2 mixed gas as a sputtering-etching gas, wherein the percentage of the He/H2 mixed gas in the total reaction gases is raised with the increase of the aspect ratio of the trench.

Abstract: A method of forming dual gate insulator layers, each with a specific insulator thickness, featuring a HF type pre-clean procedure performed prior to formation of each of the gate insulator layers, has been developed. After a first HF type pre-clean procedure a silicon nitride layer is deposited on the native oxide free, semiconductor substrate followed by selective removal of silicon nitride layer from a second portion of the semiconductor substrate. After a second HF type pre-clean procedure a silicon dioxide gate insulator layer is formed on the second portion of the native oxide free, semiconductor substrate, with the silicon dioxide gate insulator layer comprised with a different thickness than the silicon nitride gate insulator layer, located on a first portion of the semiconductor substrate. The procedure used to form the silicon dioxide gate insulator layer also removes bulk traps in the silicon nitride gate insulator layer.

Abstract: A method for forming a low-k dielectric layer for a semiconductor device using an ALD process including (a) forming predetermined interconnection patterns on a semiconductor substrate, (b) supplying a first and a second reactive material to a chamber having the substrate therein, thereby adsorbing the first and second reactive materials on a surface of the substrate, (c) supplying a first gas to the chamber to purge the first and second reactive materials that remain unreacted, (d) supplying a third reactive material to the chamber, thereby causing a reaction between the first and second materials and the third reactive material to form a monolayer, (e) supplying a second gas to the chamber to purge the third reactive material that remains unreacted in the chamber and a byproduct; and (f) repeating (b) through (e) a predetermined number of times to form a SiBN ternary layer having a predetermined thickness on the substrate.

Abstract: A two-stage plasma enhance dielectric deposition with a first stage of low capacitively-coupled RF bias with conformal deposition (202) followed by high capacitively-coupled RF bias for planarizing deposition (204) limits the charge build up on the underlying structure (104, 106, 108).

Abstract: A capacitor and a capacitor dielectric material are fabricated by adjusting the amount of an ionic conductive species, such as hydrogen, contained in the capacitor dielectric material to obtain predetermined electrical or functional characteristics. Forming the capacitor dielectric material from silicon, nitrogen and hydrogen allows a stoichiometric ratio control of silicon to nitrogen to limit the amount of hydrogen. Forming the capacitor by dielectric material plasma enhanced chemical vapor deposition (PECVD) allows hydrogen bonds to be broken by ionic bombardment, so that stoichiometric control is achieved by controlling the power of the PECVD. Applying a predetermined number of thermal cycles of temperature elevation and temperature reduction also breaks the hydrogen bonds to control the amount of the hydrogen in the formed capacitor dielectric material.

Abstract: In a process of forming a silicon oxide film 116 that constitutes an interlayer insulating film with TEOS as a raw material through the plasma CVD method, the RF output is oscillated at 50 W, and the RF output is gradually increased from 50 W to 250 W (an output value at the time of forming a film) after discharging (after the generation of O2-plasma). A TEOS gas is supplied to start the film formation simultaneously when the RF output becomes 250 W, or while the timing is shifted. As a result, because the RF power supply is oscillated at a low output when starting discharging, a voltage between the RF electrodes can be prevented from changing transitionally and largely.

Abstract: A method for the passivation of a semiconductor substrate, wherein a SiNx:H layer is deposited on the surface of the substrate (1) by means of a PECVD process comprising the following steps: the substrate (1) is placed in a processing chamber (5) which has specific internal processing chamber dimensions; the pressure in the processing chamber is maintained at a relatively low value; the substrate (1) is maintained at a specific treatment temperature; a plasma (P) is generated by at least one plasma cascade source (3) mounted on the processing chamber (5) at a specific distance (L) from the substrate surface; at least a part of the plasma (P) generated by each source (3) is brought into contact with the substrate surface; and flows of silane and ammonia are supplied to said part of the plasma (P).

Abstract: A method of removing residual carbon deposits from a flowable, insulative material. The flowable, insulative material comprises silicon, carbon, and hydrogen and is a flowable oxide material or a spin-on, flowable oxide material. The residual carbon deposits are removed from the flowable, insulative material by exposing the material to ozone. The flowable, insulative material is used to form an insulative layer in a trench located on a semiconductor substrate.

Abstract: Enhanced carrier mobility in transistors of differing (e.g. complementary) conductivity types is achieved on a common chip by provision of two or more respective stressed layers, such as etch stop layers, overlying the transistors with stress being wholly or partially relieved in portions of the respective layers, preferably by implantations with heavy ions such as germanium, arsenic, xenon, indium, antimony, silicon, nitrogen oxygen or carbon in accordance with a block-out mask. The distribution and small size of individual areas of such stressed structures also prevents warping or curling of even very thin substrates.

Abstract: In a plasma processing method making use of a plasma processing gas of a reactant gas and an inert gas, it is aimed at enhancing an efficiency of use of high-frequency power and a reactant gas to increase a processing rate. The plasma processing method comprises supplying high frequency power to an electrode 2 opposed to a substrate 6 to thereby generate plasma between the electrode 2 and the substrate 6 on the basis of a plasma processing gas comprising a reactant gas and an inert gas to perform film formation, etching, surface treatment or the like on the substrate 6, pressure P(Torr) of the plasma processing gas being set to satisfy the following relationship 2×10?7(Torr/Hz)×f(Hz)?P(Torr)?500(Torr) where f(Hz) is a frequency of high frequency power.

Abstract: A method for depositing a low dielectric constant film having an improved hardness and elastic modulus is provided. In one aspect, the method comprises depositing a low dielectric constant film having silicon, carbon, and hydrogen, and then treating the deposited film with a plasma of helium, hydrogen, or a mixture thereof at conditions sufficient to increase the hardness of the film.

Abstract: One embodiment of the present invention is a method for fabricating a low-k dielectric film that includes steps of: (a) chemical vapor depositing a lower-k dielectric film; and (b) e-beam treating the lower-k dielectric film.

Abstract: CMOS gate dielectric made of high-k metal silicates by passivating a silicon surface with nitrogen compounds prior to high-k dielectric deposition. Optionally, a silicon dioxide monolayer may be preserved at the interface.

Abstract: An HDP process for high aspect ratio gap filling comprises contacting a semiconductor substrate with an oxide precursor under high density plasma conditions at a first pressure less than about 10 millitorr, wherein said gaps are partially filled with oxide; and further contacting the substrate with an oxide precursor under high density plasma conditions at a second pressure greater than about 10 millitorr, wherein said gaps are further filled with oxide.

Abstract: Low dielectric constant porous materials with improved elastic modulus and hardness. The process of making such porous materials involves providing a porous dielectric material and plasma curing the porous dielectric material to produce a plasma cured porous dielectric material. Plasma curing of the porous dielectric material yields a material with improved modulus and hardness. The improvement in elastic modulus is typically greater than or about 50%, more typically greater than or about 100%, and more typically greater than or about 200%. The improvement in hardness is typically greater than or about 50%. The plasma cured porous dielectric material can optionally be post-plasma treated. The post-plasma treatment of the plasma cured porous dielectric material reduces the dielectric constant of the material while maintaining an improved elastic modulus and hardness as compared to the plasma cured porous dielectric material.

Abstract: A method for forming a silicon oxide layer over a substrate disposed in a high density plasma substrate processing chamber. The method includes flowing a process gas that includes a silicon-containing source, an oxygen-containing source and a fluorine-containing source into the substrate processing chamber and forming a plasma from said process gas. The substrate is heated to a temperature above 450° C. during deposition of said silicon oxide layer and the deposited layer has a fluorine content of less than 1.0 atomic percent.

Abstract: A compound semiconductor structure is provided, which includes a GaAs-based supporting semiconductor structure having a surface on which a dielectric material is to be formed. A first layer of gallium oxide is located on the surface of the supporting semiconductor structure to form an interface therewith. A second layer of a Ga—Gd oxide is disposed on the first layer. The GaAs-based supporting semiconductor structure may be a GaAs-based heterostructure such as an at least partially completed semiconductor device (e.g., a metal-oxide field effect transistor, a heterojunction bipolar transistor, or a semiconductor laser). In this manner a dielectric layer structure is provided which has both a low defect density at the oxide-GaAs interface and a low oxide leakage current density because the dielectric structure is formed from a layer of Ga2O3 followed by a layer of Ga—Gd-oxide.

Abstract: A method for depositing an organosilicate layer on a substrate includes varying one or more processing conditions during a process sequence for depositing an organosilicate layer from a gas mixture comprising an organosilicon compound in the presence of RF power in a processing chamber. In one aspect, the distance between the substrate and a gas distribution manifold in the processing chamber is varied during processing. Preferably, the method of depositing an organosilicate layer minimizes plasma-induced damage to the substrate.

Abstract: Improved dielectric materials suitable for use in integrated circuits and computer systems are provided by a chemical vapor deposition process employing fluoroalkane precursors.

Abstract: In a semiconductor device in which a plurality of field effect transistors are formed on a silicon surface having substantially a <110> orientation, the field effect transistors are disposed on the silicon surface such that a direction connecting a source region and a drain region of the field effect transistor is coincident to a substantially <110> direction.

Abstract: A process is provided for depositing an undoped silicon oxide film on a substrate disposed in a process chamber. A process gas that includes SiF4, H2, a silicon source, and an oxidizing gas reactant is flowed into the process chamber. A plasma having an ion density of at least 1011 ions/cm3 is formed from the process gas. The undoped silicon oxide film is deposited over the substrate with the plasma using a process that has simultaneous deposition and sputtering components. A temperature of the substrate during such depositing is greater than 450° C.