Using Electromagnetic Or Wave Energy (e.g., Photo-induced Deposition, Plasma, Etc.) Patents (Class 438/788)
  • Patent number: 7927982
    Abstract: A silicon-based thin film mass-producing apparatus, including transparent electrodes placed to face in parallel to corresponding counter electrodes with a space therebetween, and silicon-based thin films are deposited on the transparent electrodes by feeding a raw material gas for depositing the silicon-based thin films into the chamber and by applying a DC pulse voltage to the counter electrodes to generate plasma. Unlike methods in which a radio frequency voltage is intermittently applied to perform discharge, a high plasma density distribution does not occur, and in-plane film thickness distribution does not occur. Furthermore, since the DC pulse voltage rises sharply, the ON period can be shortened. As a result, generation of a sheath ceases in the transient state before reaching the steady state, and the thickness of the sheath is small, which allows the space between the counter and transparent electrodes to decrease.
    Type: Grant
    Filed: March 26, 2009
    Date of Patent: April 19, 2011
    Assignee: NGK Insulators, Ltd.
    Inventors: Minoru Imaeda, Yuichiro Imanishi, Takao Saito
  • Patent number: 7928020
    Abstract: A method for fabricating a nitrogen-containing dielectric layer and semiconductor device including the dielectric layer in which a silicon oxide layer is formed on a substrate, such that an interface region resides adjacent to substrate and a surface region resides opposite the interface region. Nitrogen is introduced into the silicon oxide layer by applying a nitrogen plasma. After applying nitrogen plasma, the silicon oxide layer is annealed. The processes of introducing nitrogen into the silicon oxide layer and annealing the silicon oxide layer are repeated to create a bi-modal nitrogen concentration profile in the silicon oxide layer. In the silicon oxide layer, the peak nitrogen concentrations are situated away from the interface region and at least one of the peak nitrogen concentrations is situated in proximity to the surface region. A method for fabricating a semiconductor device is incorporating the nitrogen-containing silicon oxide layers also disclosed.
    Type: Grant
    Filed: September 27, 2007
    Date of Patent: April 19, 2011
    Assignee: Chartered Semiconductor Manufacturing Ltd.
    Inventors: Jinping Liu, Ben Ong, Zhengquan Zhang, Jae Gon Lee, Lydia Wong, Bin Yang, K. H. Alex See, Meisheng Zhou, Liang Choo Hsia
  • Patent number: 7927981
    Abstract: A silicon-based thin film depositing apparatus, including a plurality of transparent electrodes disposed to face corresponding counter electrodes with a space therebetween. Subsequently, while injecting a raw material gas from raw material gas injection orifices toward the supporting electrodes and also injecting a barrier gas from barrier gas injection orifices in the same direction as the direction in which the raw material gas is injected, the gases are discharged from a gas outlet, and thereby, the pressure in a chamber is controlled to a pressure of more than 1 kPa. Then, a DC pulse voltage is applied to each counter electrode to deposit a silicon-based thin film. A DC pulse voltage is applied to perform discharge. Therefore, even in a state where the distance between the electrodes is increased, plasma can be generated efficiently, and the in-plane distribution of film thickness can be improved.
    Type: Grant
    Filed: March 26, 2009
    Date of Patent: April 19, 2011
    Assignee: NGK Insulators, Ltd.
    Inventors: Minoru Imaeda, Yuichiro Imanishi, Takao Saito
  • Patent number: 7923384
    Abstract: In a formation method of a porous insulating film by supplying at least organosiloxane and an inert gas to a reaction chamber and forming an insulating film by a plasma vapor deposition method, a partial pressure of the organosiloxane in the reaction chamber is changed by varying a volume ratio of the organosiloxane and the inert gas to be supplied during deposition. Thus, the dielectric constant of the insulating film in the semiconductor device is reduced while the adhesion of the insulating film with other materials is improved. It is desirable that the organosiloxane be cyclic organosiloxane including at least silicon, oxygen, carbon, and hydrogen, and that the total pressure of the reaction chamber be constant during deposition.
    Type: Grant
    Filed: November 24, 2006
    Date of Patent: April 12, 2011
    Assignee: NEC Corporation
    Inventors: Munehiro Tada, Naoya Furutake, Tsuneo Takeuchi, Yoshihiro Hayashi
  • Patent number: 7915177
    Abstract: In the present invention, when a gate insulation film in a DRAM is formed, an oxide film constituting a base of the gate insulation film is plasma-nitrided. The plasma nitridation is performed with microwave plasma generated by using a plane antenna having a large number of through holes. Nitrogen concentration in the gate insulation film formed by the plasma nitridation is 5 to 20% in atomic percentage. Even without subsequent annealing, it is possible to effectively prevent a boron penetration phenomenon in the DRAM and to reduce traps in the film causing deterioration in driving capability of the device.
    Type: Grant
    Filed: January 27, 2010
    Date of Patent: March 29, 2011
    Assignee: Toyko Electron Limited
    Inventors: Tatsuo Nishita, Shuuichi Ishizuka, Yutaka Fujino, Toshio Nakanishi, Yoshihiro Sato
  • Patent number: 7902084
    Abstract: Embodiments disclosed herein pertain to silicon dioxide deposition methods using at least ozone and tetraethylorthosilicate (TEOS) as deposition precursors. In one embodiment, a silicon dioxide deposition method using at least ozone and TEOS as deposition precursors includes flowing precursors comprising ozone and TEOS to a substrate under subatmospheric pressure conditions effective to deposit silicon dioxide-comprising material having an outer surface onto the substrate. The outer surface is treated effective to one of add hydroxyl to or remove hydroxyl from the outer surface in comparison to any hydroxyl presence on the outer surface prior to said treating. After the treating, precursors comprising ozone and TEOS are flowed to the substrate under subatmospheric pressure conditions effective to deposit silicon dioxide-comprising material onto the treated outer surface of the substrate. Other embodiments are contemplated.
    Type: Grant
    Filed: July 5, 2007
    Date of Patent: March 8, 2011
    Assignee: Micron Technology, Inc.
    Inventors: John Smythe, Gurtej S. Sandhu
  • Patent number: 7897521
    Abstract: Disclosed is a low dielectric constant plasma polymerized thin film using linear organic/inorganic precursors and a method of manufacturing the low dielectric constant plasma polymerized thin film through plasma enhanced chemical vapor deposition and annealing using an RTA apparatus. The low dielectric constant plasma polymerized thin film is effective for the preparation of multilayered metal thin films having a thin film structure with very high thermal stability, a low dielectric constant, and superior mechanical properties.
    Type: Grant
    Filed: August 14, 2008
    Date of Patent: March 1, 2011
    Assignee: Sungkyunkwan University Foundation For Corporate Collaboration
    Inventors: Donggeun Jung, Sungwoo Lee, Jihyung Woo
  • Patent number: 7892648
    Abstract: A low-k dielectric material with increased cohesive strength for use in electronic structures including interconnect and sensing structures is provided that includes atoms of Si, C, O, and H in which a fraction of the C atoms are bonded as Si—CH3 functional groups, and another fraction of the C atoms are bonded as Si—R—Si, wherein R is phenyl, —[CH2]n— where n is greater than or equal to 1, HC?CH, C?CH2, C?C or a [S]n linkage, where n is a defined above.
    Type: Grant
    Filed: January 21, 2005
    Date of Patent: February 22, 2011
    Assignee: International Business Machines Corporation
    Inventors: Daniel C. Edelstein, Stephen M. Gates, Alfred Grill, Michael Lane, Robert D. Miller, Deborah A. Neumayer, Son Van Nguyen
  • Patent number: 7892920
    Abstract: A method for manufacturing a semiconductor device which minimizes the line width of a pattern and allows a low temperature oxide film and a thinly formed photoresist film to serve as ion blockers when performing an ion implantation process on the semiconductor substrate.
    Type: Grant
    Filed: October 12, 2008
    Date of Patent: February 22, 2011
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Myung-Soo Kim
  • Publication number: 20110034039
    Abstract: A method of forming a silicon oxide layer is described. The method may include the steps of mixing a carbon-free silicon-and-nitrogen containing precursor with a radical precursor, and depositing a silicon-and-nitrogen containing layer on a substrate. The silicon-and-nitrogen containing layer is then converted to the silicon oxide layer.
    Type: Application
    Filed: July 21, 2010
    Publication date: February 10, 2011
    Applicant: Applied Materials, Inc.
    Inventors: Jingmei Liang, Nitin K. Ingle, Shankar Venkataraman
  • Publication number: 20110027989
    Abstract: A silicon-based low-k dielectric material is formed on the basis of a single precursor material, such as OMTCS, without incorporating a porogen species. To this end, the initial deposition of the low-k dielectric material may be formed on the basis of a reduced process temperature, while a subsequent treatment, such as a UV treatment, may allow the adjustment of the final material characteristics without causing undue out-gassing of volatile organic components.
    Type: Application
    Filed: July 23, 2010
    Publication date: February 3, 2011
    Inventors: Ulrich MAYER, Hartmut RUELKE, Christof STRECK
  • Patent number: 7867923
    Abstract: A method of depositing a silicon and nitrogen containing film on a substrate. The method includes introducing silicon-containing precursor to a deposition chamber that contains the substrate, wherein the silicon-containing precursor comprises at least two silicon atoms. The method further includes generating at least one radical nitrogen precursor with a remote plasma system located outside the deposition chamber. Moreover, the method includes introducing the radical nitrogen precursor to the deposition chamber, wherein the radical nitrogen and silicon-containing precursors react and deposit the silicon and nitrogen containing film on the substrate. Furthermore, the method includes annealing the silicon and nitrogen containing film in a steam environment to form a silicon oxide film, wherein the steam environment includes water and acidic vapor.
    Type: Grant
    Filed: October 22, 2007
    Date of Patent: January 11, 2011
    Assignee: Applied Materials, Inc.
    Inventors: Abhijit Basu Mallick, Srinivas D. Nemani, Ellie Yieh
  • Patent number: 7867922
    Abstract: The present invention is a film forming method for an SiOCH film, comprising a unit-film-forming step including: a deposition step of depositing an SiOCH film element by using an organic silicon compound as a raw material and by using a plasma CVD method; and a hydrogen plasma processing step of providing a hydrogen plasma process to the deposited SiOCH film element, wherein the unit-film-forming step is repeated several times so as to form an SiOCH film on a substrate.
    Type: Grant
    Filed: December 5, 2006
    Date of Patent: January 11, 2011
    Assignee: Tokyo Electron Limited
    Inventors: Shinji Ide, Yasuhiro Oshima, Yusaku Kashiwagi
  • Patent number: 7867920
    Abstract: There is provided a method for modifying a high-k dielectric thin film provided on the surface of an object using a metal organic compound material. The method includes a preparation process for providing the object with the high-k dielectric thin film formed on the surface thereof, and a modification process for applying UV rays to the highly dielectric thin film in an inert gas atmosphere while maintaining the object at a predetermined temperature to modify the high-k dielectric thin film. According to the above constitution, the carbon component can be eliminated from the high-k dielectric thin film, and the whole material can be thermally shrunk to improve the density, whereby the occurrence of defects can be prevented and the film density can be improved to enhance the specific permittivity and thus to provide a high level of electric properties.
    Type: Grant
    Filed: November 22, 2006
    Date of Patent: January 11, 2011
    Assignee: Tokyo Electron Limited
    Inventors: Kazuyoshi Yamazaki, Shintaro Aoyama, Koji Akiyama
  • Patent number: 7855154
    Abstract: A cap layer that enables a photopatternable, spin-on material to be used in the formation of semiconductor device structures at wavelengths that were previously unusable. The photopatternable, spin-on material is applied as a layer to a semiconductor substrate. The cap layer and a photoresist layer are each formed over the photopatternable layer. The cap layer absorbs or reflects radiation and protects the photopatternable layer from a first wavelength of radiation used in patterning the photoresist layer. The photopatternable, spin-on material is convertible to a silicon dioxide-based material upon exposure to a second wavelength of radiation.
    Type: Grant
    Filed: March 29, 2006
    Date of Patent: December 21, 2010
    Assignee: Micron Technology, Inc.
    Inventors: Weimin Li, Gurtej S. Sandhu
  • Patent number: 7851385
    Abstract: The present invention generally provides apparatus and method for processing a semiconductor substrate. Particularly, embodiments of the present invention relate to a method and apparatus for forming semiconductor devices having a conformal silicon oxide layer formed at low temperature. One embodiment of the present invention provides a method for forming a semiconductor gate structure. The method comprises forming a gate stack on a semiconductor substrate, forming a conformal silicon oxide layer on the semiconductor substrate using a low temperature cyclic method, and forming a spacer layer on the conformal silicon oxide layer.
    Type: Grant
    Filed: September 30, 2008
    Date of Patent: December 14, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Matthew Spuller, Melody Agustin, Meiyee (Maggie Le) Shek, Li-Qun Xia, Reza Arghavani
  • Publication number: 20100297854
    Abstract: Methods of fabricating an oxide layer on a semiconductor structure are provided herein. In some embodiments, a method of selectively forming an oxide layer on a semiconductor structure includes providing a substrate having one or more metal-containing layers and one or more non metal-containing layers to a substrate support in a plasma reactor; introducing a first process gas into the plasma reactor, wherein the first process gas comprises hydrogen (H2) and oxygen (O2); maintaining the structure at a temperature of less than about 100 degrees Celsius; and generating a first plasma from the first process gas to selectively form an oxide layer on the one or more non metal-containing layers, wherein the first plasma has a density of greater than about 1010 ions/cm3.
    Type: Application
    Filed: April 20, 2010
    Publication date: November 25, 2010
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Sundar Ramamurthy, Majeed Foad, Matthew Scotney-Castle, Marla Britt, Yen B. Ta
  • Patent number: 7838443
    Abstract: The invention concerns a method for minimizing “corner” effects in shallow silicon oxide trenches, by densifying the silicon oxide layer after it has been deposited in the trenches. Said densification is preferably carried out by irradiating the layer under luminous radiation with weak wavelength.
    Type: Grant
    Filed: June 29, 2007
    Date of Patent: November 23, 2010
    Inventors: Patrick Schiavone, Frédéric Gaillard
  • Patent number: 7833882
    Abstract: A method of producing a semiconductor device, including: a first plasma processing step of processing a surface of a resin layer laid on a semiconductor element and containing silicon, with a first plasma generated from a gas containing oxygen and fluorine, thereby forming an oxide film; and an electrode pad forming step of forming an electrode pad of a metal on the oxide film.
    Type: Grant
    Filed: January 10, 2007
    Date of Patent: November 16, 2010
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Yukihiro Tsuji, Toshio Nomaguchi
  • Patent number: 7825038
    Abstract: Methods of depositing a silicon oxide layer on a substrate are described. The methods may include the steps of providing a substrate to a deposition chamber, generating an atomic oxygen precursor outside the deposition chamber, and introducing the atomic oxygen precursor into the chamber. The methods may also include introducing a silicon precursor to the deposition chamber, where the silicon precursor and the atomic oxygen precursor are first mixed in the chamber. The silicon precursor and the atomic oxygen precursor react to form the silicon oxide layer on the substrate, and the deposited silicon oxide layer may be annealed. Systems to deposit a silicon oxide layer on a substrate are also described.
    Type: Grant
    Filed: May 29, 2007
    Date of Patent: November 2, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Nitin K. Ingle, Zheng Yuan, Paul Gee, Kedar Sapre
  • Patent number: 7824991
    Abstract: A MOSFET fabrication process comprises nitridation of the dielectric silicon interface so that silicon-dangling bonds are connected with nitrogen atoms creating silicon—nitrogen bonds, which are stronger than silicon-hydrogen bonds. A tunnel dielectric is formed on the substrate. A nitride layer is then formed over the tunnel dielectric layer. The top of the nitride layer is then converted to an oxide and the interface between the substrate and the tunnel dielectric is nitrided simultaneously with conversion of the nitride layer to oxide.
    Type: Grant
    Filed: January 18, 2006
    Date of Patent: November 2, 2010
    Assignee: Macronix International Co., Ltd.
    Inventors: Yen-Hao Shih, Shih-Chin Lee
  • Patent number: 7825018
    Abstract: A plasma oxidation processing method is performed, on a structural object including a silicon layer and a refractory metal-containing layer, to form a silicon oxide film. A first plasma oxidation process is performed by use of a process gas including at least hydrogen gas and oxygen gas and a process pressure of 1.33 to 66.67 Pa. A second plasma oxidation process is performed by use of a process gas including at least hydrogen gas and oxygen gas and a process pressure of 133.3 to 1,333 Pa, after the first plasma oxidation process.
    Type: Grant
    Filed: February 27, 2007
    Date of Patent: November 2, 2010
    Assignee: Tokyo Electron Limited
    Inventor: Masaru Sasaki
  • Patent number: 7820558
    Abstract: A film with small hysteresis and high voltage resistance is obtained by reducing the carbon content in a gate insulating film on a SiC substrate. Specifically, the carbon content in the gate insulating film is set to 1×1020 atoms/cm3 or less. For this, using a plasma processing apparatus, a silicon oxide film is formed on the SiC substrate and then the formed silicon oxide film is reformed by exposure to radicals containing nitrogen atoms. Thus, the gate insulating film excellent in electrical properties is obtained.
    Type: Grant
    Filed: June 21, 2007
    Date of Patent: October 26, 2010
    Assignees: Tohoku University, Foundation for Advancement of International Science
    Inventors: Tadahiro Ohmi, Akinobu Teramoto, Koutaro Tanaka
  • Patent number: 7816272
    Abstract: A process of cleaning a semiconductor manufacturing system, and a method of manufacturing a semiconductor device. The cleaning process includes, for example, positioning a ceramic cover on the electrostatic chuck in tight contact with the chuck, and feeding a fluoride-based cleaning gas into a chamber. After the cleaning process, a process of forming a semiconductor film (deposition process) is performed. It is possible to prevent fluorine degasification from a substrate-supporting electrode (electrostatic chuck) during the deposition process. A semiconductor film can be formed without causing a temperature drop near the substrate. This prevents irregular film thickness, defective etching, film flaking, etc.
    Type: Grant
    Filed: March 31, 2009
    Date of Patent: October 19, 2010
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Hiroomi Tsutae
  • Patent number: 7811913
    Abstract: A method of fabricating a low, dark-current germanium-on-silicon PIN photo detector includes preparing a P-type silicon wafer; implanting the P-type silicon wafer with boron ions; activating the boron ions to form a P+ region on the silicon wafer; forming a boron-doped germanium layer on the P+ silicon surface; depositing an intrinsic germanium layer on the boron-doped germanium layer; cyclic annealing, including a relatively high temperature first anneal step and a relatively low temperature second anneal step; repeating the first and second anneal steps for about twenty cycles, thereby forcing crystal defects to the P+ germanium layer; implanting ions in the surface of germanium layer to form an N+ germanium surface layer and a PIN diode; activating the N+ germanium surface layer by thermal anneal; and completing device according to known techniques to form a low dark-current germanium-on-silicon PIN photodetector.
    Type: Grant
    Filed: December 19, 2005
    Date of Patent: October 12, 2010
    Assignee: Sharp Laboratories of America, Inc.
    Inventors: Jong-Jan Lee, Douglas J. Tweet, Jer-Shen Maa, Sheng Teng Hsu
  • Patent number: 7807495
    Abstract: A method of manufacturing a semiconductor film capable of suppressing difficulty in temperature control of a catalytic wire is obtained. This method of manufacturing a semiconductor film includes steps of heating a catalytic wire to at least a prescribed temperature and forming a semiconductor film by introducing source gas for a semiconductor and decomposing the source gas with the heated catalytic wire after heating the catalytic wire to at least the prescribed temperature.
    Type: Grant
    Filed: April 23, 2008
    Date of Patent: October 5, 2010
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Akira Terakawa, Toshio Asaumi
  • Patent number: 7803722
    Abstract: A method for forming a semiconductor structure includes reacting a silicon precursor and an atomic oxygen or nitrogen precursor at a processing temperature of about 150° C. or less to form a silicon oxide or silicon-nitrogen containing layer over a substrate. The silicon oxide or silicon-nitrogen containing layer is ultra-violet (UV) cured within an oxygen-containing environment.
    Type: Grant
    Filed: October 22, 2007
    Date of Patent: September 28, 2010
    Assignee: Applied Materials, Inc
    Inventor: Jingmei Liang
  • Patent number: 7799632
    Abstract: One embodiment of the present invention relates to a method of forming an isolation structure. During this method, an isolation trench is formed within a semiconductor body. After this trench is formed, it is filled by performing multiple high-frequency plasma depositions to deposit multiple dielectric layers over the semiconductor body. A first of the multiple layers is deposited at a high-frequency power of between approximately 100 watts and approximately 900 watts.
    Type: Grant
    Filed: January 17, 2007
    Date of Patent: September 21, 2010
    Assignee: Texas Instruments Incorporated
    Inventors: Jin Zhao, Manuel Quevedo-Lopez, Louis H. Breaux
  • Publication number: 20100233887
    Abstract: A production method for a semiconductor device comprising the first step of supplying a first reaction material to a substrate housed in a processing chamber to subject to a ligand substitution reaction a ligand as a reaction site existing on the surface of the substrate and the ligand of the first reaction material, the second step of removing the excessive first reaction material from the processing chamber, the third step of supplying a second reaction material to the substrate to subject a ligand substituted by the first step to a ligand substitution reaction with respect to a reaction site, the fourth step of removing the excessive second reaction material from the processing chamber, and a fifth step of supplying a third reaction material excited by plasma to the substrate to subject a ligand, not subjected to a substitution reaction with respect to a reaction site in the third step, to a ligand substitution reaction with respect to a reaction site, wherein the steps 1-5 are repeated a specified number
    Type: Application
    Filed: May 27, 2010
    Publication date: September 16, 2010
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Hironobu Miya, Kazuyuki Toyoda, Norikazu Mizuno, Taketoshi Sato, Masanori Sakai, Masayuki Asai, Kazuyuki Okuda, Hideki Horita
  • Patent number: 7795158
    Abstract: In an oxidation method for a semiconductor process, target substrates are placed at intervals in a vertical direction within a process field of a process container. An oxidizing gas and a deoxidizing gas are supplied to the process field from one side of the process field while gas is exhausted from the other side. One or both of the oxidizing gas and the deoxidizing gas are activated. The oxidizing gas and the deoxidizing gas are caused to react with each other, thereby generating oxygen radicals and hydroxyl group radicals within the process field. An oxidation process is performed on the surfaces of the target substrate by use of the oxygen radicals and the hydroxyl group radicals.
    Type: Grant
    Filed: August 28, 2007
    Date of Patent: September 14, 2010
    Assignee: Tokyo Electron Limited
    Inventors: Takehiko Fujita, Jun Ogawa, Shigeru Nakajima, Kazuhide Hasebe
  • Patent number: 7790633
    Abstract: A silicon dioxide-based dielectric layer is formed on a substrate surface by a sequential deposition/anneal technique. The deposited layer thickness is insufficient to prevent substantially complete penetration of annealing process agents into the layer and migration of water out of the layer. The dielectric layer is then annealed, ideally at a moderate temperature, to remove water and thereby fully densify the film. The deposition and anneal processes are then repeated until a desired dielectric film thickness is achieved.
    Type: Grant
    Filed: September 11, 2006
    Date of Patent: September 7, 2010
    Assignee: Novellus Systems, Inc.
    Inventors: Raihan M. Tarafdar, George D. Papasouliotis, Ron Rulkens, Dennis M. Hausmann, Jeff Tobin, Adrianne K. Tipton, Bunsen Nie
  • Patent number: 7790628
    Abstract: A method is provided for depositing a high dielectric constant (high-k) film for integrated circuits (ICs) by atomic layer deposition (ALD) or chemical vapor deposition (CVD). The method includes exposing a substrate to one or more metal precursors and plurality of oxidation sources to deposit a high-k film with a desired thickness and tailored properties. The plurality of oxidation sources contain a first oxidation source containing H2O, H2O2, or a combination thereof, and a second oxidation source containing oxygen radicals (O), O3, or O2, or a combination of two or more thereof. The high-k film may contain one or more metal elements selected from alkaline earth elements, rare earth elements, and Group IVB elements of the Periodic Table of the Elements.
    Type: Grant
    Filed: August 16, 2007
    Date of Patent: September 7, 2010
    Assignee: Tokyo Electron Limited
    Inventors: Robert D Clark, Lisa F Edge
  • Patent number: 7790478
    Abstract: In remote plasma cleaning, it is difficult to locally excite a plasma because the condition is not suitable for plasma excitation different from that at the time of film formation and a method using light has a problem of fogginess of a detection window that cannot be avoided in a CVD process and is not suitable for a mass production process.
    Type: Grant
    Filed: July 25, 2008
    Date of Patent: September 7, 2010
    Assignee: Renesas Technology Corp.
    Inventors: Kazuyuki Fujii, Minoru Hanazaki, Gen Kawaharada, Masakazu Taki, Mutsumi Tsuda
  • Patent number: 7786021
    Abstract: A thin-film transistor (TFT) with a multilayer gate insulator is provided, along with a method for forming the same. The method comprises: forming a channel, first source/drain (S/D) region, and a second S/D region in a Silicon (Si) active layer; using a high-density plasma (HDP) source, growing a first layer of Silicon oxide (SiOx) from the Si active layer, to a first thickness, where x is less than, or equal to 2; depositing a second layer of SiOx having a second thickness, greater than the first thickness, overlying the first layer of SiOx; using the HDP source, additionally oxidizing the second layer of SiOx, wherein the first and second SiOx layers form a gate insulator; and, forming a gate electrode adjacent the gate insulator. In one aspect, the second Si oxide layer is deposited using a plasma-enhanced chemical vapor deposition (PECVD) process with tetraethylorthosilicate (TEOS) precursors.
    Type: Grant
    Filed: November 2, 2005
    Date of Patent: August 31, 2010
    Assignee: Sharp Laboratories of America, Inc.
    Inventors: Pooran Chandra Joshi, Apostolos T. Voutsas
  • Patent number: 7781351
    Abstract: Methods of preparing a carbon doped oxide (CDO) layer of low dielectric constant and low residual stress involving, for instance, providing a substrate to a deposition chamber and exposing it to an organosilicon precursor containing unsaturated C—C bonds or to multiple organic precursors including at least one organosilicon and at least one unsaturated C—C bond are provided. The methods may also involve igniting and maintaining a plasma in a deposition chamber using radio frequency power having high and low frequency components with a high percentage of the low frequency component, and depositing the carbon doped dielectric layer under conditions in which the resulting dielectric layer has a residual stress of not greater than, e.g., about 50 MPa, and a dielectric constant not greater than about 3.
    Type: Grant
    Filed: April 7, 2004
    Date of Patent: August 24, 2010
    Assignee: Novellus Systems, Inc.
    Inventors: Qingguo Wu, Haiying Fu, Dong Niu, Ananda K. Bandyopadhyay, David Mordo
  • Publication number: 20100173501
    Abstract: Disclosed is a producing method of a semiconductor device, including: loading at least one substrate formed on a surface thereof with a tungsten film into a processing chamber; and forming a silicon oxide film on the surface of the substrate which includes the tungsten film by alternately repeating following steps a plurality of times: supplying the processing chamber with a first reaction material including a silicon atom while heating the substrate at 400° C.; and supplying the processing chamber with hydrogen and water which is a second reaction material while heating the substrate at 400° C. at a ratio of the water with respect to the hydrogen of 2×10?1 or lower.
    Type: Application
    Filed: January 5, 2010
    Publication date: July 8, 2010
    Inventors: Hironobu Miya, Masayuki Asai, Norikazu Mizuno
  • Patent number: 7745351
    Abstract: Methods of forming a dielectric layer where the tensile stress of the layer is increased by a plasma treatment at an elevated position are described. In one embodiment, oxide and nitride layers are deposited on a substrate and patterned to form an opening. A trench is etched into the substrate. The substrate is transferred into a chamber suitable for dielectric deposition. A dielectric layer is deposited over the substrate, filling the trench and covering mesa regions adjacent to the trench. The substrate is raised to an elevated position above the substrate support and exposed to a plasma which increases the tensile stress of the substrate. The substrate is removed from the dielectric deposition chamber, and portions of the dielectric layer are removed so that the dielectric layer is even with the topmost portion of the nitride layer. The nitride and pad oxide layers are removed to form the STI structure.
    Type: Grant
    Filed: October 15, 2008
    Date of Patent: June 29, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Xiaolin Chen, Srinivas D. Nemani, DongQing Li, Jeffrey C. Munro, Marlon E. Menezes
  • Patent number: 7745346
    Abstract: A method for forming a silicon-based dielectric film on a substrate with a single deposition process operation using pulsed plasma enhanced chemical vapor deposition (PECVD) wherein the high frequency radio frequency power of the plasma is pulsed, allows enhanced control, efficiency and product quality of the PECVD process. Pulsing the high frequency RF power of the plasma reduces the deposited film thickness per unit time the high frequency RF power of the plasma is on. This yields silicon-based dielectric films that are both thin and conformal.
    Type: Grant
    Filed: October 17, 2008
    Date of Patent: June 29, 2010
    Assignee: Novellus Systems, Inc.
    Inventors: Dennis Hausmann, James S. Sims, Andrew Antonelli, Sesha Varadarajan, Bart Van Schravendijk
  • Patent number: 7745350
    Abstract: Methods are disclosed of depositing a silicon oxide film on a substrate disposed in a substrate processing chamber. The substrate has a gap formed between adjacent raised surfaces. A first portion of the silicon oxide film is deposited over the substrate and within the gap using a high-density plasma process. Thereafter, a portion of the deposited first portion of the silicon oxide film is etched back. This includes flowing a halogen precursor through a first conduit from a halogen-precursor source to the substrate processing chamber, forming a high-density plasma from the halogen precursor, and terminating flowing the halogen precursor after the portion has been etched back. Thereafter, a halogen scavenger is flowed to the substrate processing chamber to react with residual halogen in the substrate processing chamber. Thereafter, a second portion of the silicon oxide film is deposited over the first portion of the silicon oxide film and within the gap using a high-density plasma process.
    Type: Grant
    Filed: September 4, 2008
    Date of Patent: June 29, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Anchuan Wang, Young S. Lee, Manoj Vellaikal, Jason Thomas Bloking, Jin Ho Jeon, Hemant P. Mungekar
  • Publication number: 20100140756
    Abstract: An object of the present invention is to provide a semiconductor thin film device which employs a silicon oxide thin film having an equivalent level of high insulating performance to those currently used in electronic devices, through a low-temperature printing process on a plastic substrate having plasticity or other types of substrates at a temperature equal to or lower than the heat resistant temperature of the substrate, and to provide a method for forming the device. The semiconductor thin film device is formed as follows: a coating film of a silicon compound including a silazane structure or a siloxane structure is formed on a plastic substrate having plasticity; the coating film is converted into a silicon oxide thin film; and the thin film is utilized as part of an insulating layer or a sealing layer.
    Type: Application
    Filed: December 4, 2007
    Publication date: June 10, 2010
    Applicant: National Institute of Advanced Industrial Science and Technology
    Inventors: Kenji Kozasa, Toshihide Kamata
  • Patent number: 7727783
    Abstract: A method of measuring a diffusion length of a minority carrier in a silicon wafer by a surface photovoltage method including irradiating the surface-treated silicon wafer with ultraviolet radiation in an oxygen-containing atmosphere, and measuring a diffusion length of a minority carrier in a silicon wafer by a surface photovoltage method.
    Type: Grant
    Filed: April 9, 2007
    Date of Patent: June 1, 2010
    Assignee: Sumco Corporation
    Inventor: Tsuyoshi Kubota
  • Patent number: 7727912
    Abstract: A method light enhanced atomic layer deposition for forming a film on a substrate. The method includes disposing the substrate in a process chamber of a light enhanced atomic layer deposition (LEALD) system configured to perform a LEALD process; and depositing a film on the substrate using the LEALD process, where the depositing includes (a) exposing the substrate to a first process material, (b) exposing the substrate to a second process material containing a reducing agent and irradiating the substrate with a first light radiation having either no or at least partial temporal overlap with the exposing of the substrate to the second process material, (c) repeating steps (a) and (b) until the desired film has been deposited. According to one embodiment of the invention, the deposited film can be a TaCN film or a TaC film.
    Type: Grant
    Filed: March 20, 2006
    Date of Patent: June 1, 2010
    Assignee: Tokyo Electron Limited
    Inventors: Tadahiro Ishizaka, Frank M. Cerio, Jr., Jacques Faguet
  • Patent number: 7727864
    Abstract: Metallic-compound films are formed by plasma-enhanced atomic layer deposition (PEALD). According to preferred methods, film or thin film composition is controlled by selecting plasma parameters to tune the oxidation state of a metal (or plurality of metals) in the film. In some embodiments, plasma parameters are selected to achieve metal-rich metallic-compound films. The metallic-compound films can be components of gate stacks, such as gate electrodes. Plasma parameters can be selected to achieve a gate stack with a predetermined work function.
    Type: Grant
    Filed: November 1, 2006
    Date of Patent: June 1, 2010
    Assignee: ASM America, Inc.
    Inventor: Kai-Erik Elers
  • Patent number: 7723218
    Abstract: In a plasma CVD apparatus, unnecessary discharge such as arc discharge is prevented, the amount of particles due to peeling of films attached to a reaction chamber is reduced, and the percentage of a time contributing to production in hours of operation of the apparatus is increased while enlargement of the apparatus and easy workability are maintained. The plasma CVD apparatus is configured such that in a conductive reaction chamber 104 with a power source 113, a vacuum exhausting means 118, and a reaction gas introduction pipe 114, plasma 115 is generated in a space surrounded by an electrode 111, a substrate holder 112, and an insulator 120.
    Type: Grant
    Filed: April 11, 2005
    Date of Patent: May 25, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Toru Takayama, Mitsunori Sakama, Hisashi Abe, Hiroshi Uehara, Mika Ishiwata
  • Patent number: 7718541
    Abstract: A surface component film (2) is etched using a resist (3) as a mask, and the surface component film (2) is patterned according to the shape of an aperture (3a). This results in a step portion (4) having the same shape as the aperture (3a), with the sidewall (4a) of the step portion (4) exposed through the aperture (3a). The aperture (3a) is spin-coated with a shrink agent, reacted at a first temperature, and developed to shrink the aperture (3a). To control the shrinkage with high accuracy, in the first round of reaction, the aperture is shrunk by, for example, about half of the desired shrinkage. The aperture (3a) is further spin-coated with a shrink agent, reacted at a second temperature, and developed to shrink the aperture (3a). In this embodiment, the second-round shrink process will result in the desired aperture length. The second temperature is adjusted based on the shrinkage in the first round.
    Type: Grant
    Filed: July 21, 2005
    Date of Patent: May 18, 2010
    Assignee: Fujitsu Limited
    Inventors: Kozo Makiyama, Ken Sawada
  • Patent number: 7718269
    Abstract: Provided is a technology capable of improving the reliability of a semiconductor device using a SiOC film as an interlayer film. In the invention, by forming an interlayer film from a SiOC film having a Si—CH3 bond/Si—O bond ratio less than 2.50% or having a strength ratio determined by the FT-IR of a Si—OH bond to a SiO—O bond exceeding 0.0007, a strength ratio of a SiH bond to a SiO—O bond at a wavelength of 2230 cm?1 exceeding 0.0050 and a strength ratio of a Si—H bond to a SiO—O bond at a wavelength of 2170 cm?1 exceeding 0.0067, the interlayer film has a relative dielectric constant of to 3 or less, and owing to suppression of lowering in hardness or elastic modulus, has improved mechanical strength.
    Type: Grant
    Filed: March 14, 2006
    Date of Patent: May 18, 2010
    Assignee: Renesas Technology Corp.
    Inventors: Masami Takayasu, Katsuhiko Hotta
  • Patent number: 7695765
    Abstract: Methods of preparing a carbon doped oxide (CDO) layer with a low dielectric constant (<3.2) and low residual stress without sacrificing important integration properties such as refractive index and etch rate are provided. The methods involve, for instance, providing a substrate to a deposition chamber and exposing it to TMSA, followed by igniting and maintaining a plasma in a deposition chamber using radio frequency power having high and low frequency components or one frequency component only, and depositing the carbon doped oxide film under conditions in which the resulting dielectric layer has a net tensile stress of less than about 40 MPa, a hardness of at least about 1 GPa, and a SiC:SiOx bond ratio of not greater than about 0.75.
    Type: Grant
    Filed: November 12, 2004
    Date of Patent: April 13, 2010
    Assignee: Novellus Systems, Inc.
    Inventors: Keith Fox, Carole Mars, Willis Kirkpatrick, Easwar Srinivasan
  • Patent number: 7691725
    Abstract: An insulating film is formed as a pore-wall protective film (103) on pore walls in a porous layer (102) by the use of a mixed gas plasma of a noble gas and an insulating film forming gas generated by microwave excitation. As a result, the pore-wall protective film can have film properties as a protective film.
    Type: Grant
    Filed: February 2, 2004
    Date of Patent: April 6, 2010
    Inventors: Tadahiro Ohmi, Akinobu Teramoto
  • Patent number: 7693597
    Abstract: A substrate processing method for removing a resist film from a substrate having the resist film formed thereon comprises maintaining the inner region of the chamber at a prescribed temperature by putting a substrate in a chamber, denaturing the resist film by supplying ozone and a water vapor in such a manner that ozone is supplied into the chamber while a water vapor is supplied into the chamber at a prescribed flow rate, the amount of ozone relative to the amount of the water vapor being adjusted such that the dew formation within the chamber is prevented, and processing the substrate with a prescribed liquid material so as to remove the denatured resist film from the substrate.
    Type: Grant
    Filed: October 5, 2005
    Date of Patent: April 6, 2010
    Assignee: Tokyo Electron Limited
    Inventors: Mitsunori Nakamori, Tadashi Iino, Noritaka Uchida, Takehiko Orii
  • Patent number: 7674728
    Abstract: A liquid injector is used to vaporize and inject a silicon precursor into a process chamber to form silicon-containing layers during a semiconductor fabrication process. The injector is connected to a source of silicon precursor, which preferably comprises liquid trisilane in a mixture with one or more dopant precursors. The mixture is metered as a liquid and delivered to the injector, where it is then vaporized and injected into the process chamber.
    Type: Grant
    Filed: March 29, 2007
    Date of Patent: March 9, 2010
    Assignee: ASM America, Inc.
    Inventors: Michael A Todd, Ivo Raaijmakers