Abstract: A system and method for handling post epitaxial thermal oxidation. The method produces semiconductor wafers by performing the steps of forming a wafer substrate, depositing an epilayer on the substrate, oxidizing a top portion of the epilayer, and removing the oxidized top portion. As a result, the wafer's surface is very smooth, with little or no micro-steps thereon.

Abstract: In a no-flow underfill process 400, a substrate 10 is heated to an elevated temperature prior to dispensing underfill 5 thereon. The underfill 5 flows more readily over mask portions 20 and conductors 25 on the substrate 10, filling in spaces between the conductors 25 and the masking portions 20, thereby preventing air from being trapped thereabout. In addition, when a bumped die 40 is heated during placement on the substrate 10 with the underfill 5 therebetween, the underfill 5 flows around bumps 45 more readily thereby preventing air from being trapped thereabout. The result is a flip chip semiconductor package having a lower void density.

Abstract: Methods for processing a substrate are disclosed. In one embodiment of the invention, a substrate with a first layer and an oxide layer on the substrate is placed in a processing chamber. The oxide layer is removed while the substrate is at a first temperature in the processing chamber. A second layer is then formed on the first layer while the substrate is at a second temperature in the processing chamber.

Abstract: A method for cleaning bonding pads on a semiconductor device, as disclosed herein, includes treating the bonding pads with a CF4 and water vapor combination. In the process, the water vapor breaks up and the hydrogen from the water vapor couples to fluorine residue on the bonding pad surface creating a volatile HF vapor. In addition, fluorine from the CF4 exchanges with the titanium in the metallic polymer residue making the polymer more soluble for the organic strip operation which follows. Next, the resist is ashed and then an organic resist stripper is applied to the bonding pad area, thereby creating a clean bonding pad surface. Thereafter, a reliable bond wire connection can be made to the bonding pad.

Abstract: A tungsten silicide (WSi) film is formed of tungsten hexafluoride (WF6) and dichlorosilane (SiCl2) as main raw material on a polysilicon film by the CVD method. At the final stage of this film forming process, supply of tungsten hexafluoride is terminated to relax internal stresses. As a result, on the tungsten silicide film, an Si-rich tungsten silicide film containing chlorine ions in a high concentration is formed. Then, before coating a chemical amplification photoresist, these films along with a silicon substrate are soaked in an etching liquid containing hydrogen peroxide to remove the Si-rich tungsten silicide film so that generation of ammonia chloride, which suppresses an alkali developing action, can be controlled. Thus the tungsten silicide film can be patterned by photolithography without pattern defects.

Abstract: A method of processing a semiconductor wafer sliced from a monocrystalline ingot comprises at least the steps of chamfering, lapping, etching, mirror-polishing, and cleaning. In the etching step, alkali etching is first performed and then acid etching, preferably reaction-controlled acid etching, is performed. The etching amount of the alkali etching is greater than the etching amount of the acid etching. Alternatively, in the etching step, reaction-controlled acid etching is first performed and then diffusion-controlled acid etching is performed. The etching amount of the reaction-controlled acid etching is greater than the etching amount of the diffusion-controlled acid etching.

Abstract: The object of the invention is to provide a bonded wafer in which an inferior bonding state of the bonded wafer attained by a hydrogen ion delamination method is reduced, no separation or no void is found at the connecting interface under a superior production characteristic and in a low cost. In a method for manufacturing a bonded wafer by a hydrogen ion delamination method, carbon concentration at a close contacted surface where both wafers are closely contacted from each other is 3-1014 atoms/cm2 or less.

Abstract: A process for producing a semiconductor substrate comprises the steps of forming a porous layer in a first substrate comprising monocrystalline silicon; forming a protective film on a side wall of the pores of the porous layer; forming a nonporous monocrystalline silicon layer on the porous layer; bonding the surface of the nonporous monocrystalline silicon layer onto a second substrate with interposition of an insulating layer; and etching off selectively the porous layer by use of a chemical etching solution.

Abstract: Disclosed is an MOCVD method of forming a tantalum oxide film. First, water vapor used as an oxidizing agent is supplied into a process container to cause moisture to be adsorbed on a surface of each semiconductor wafer. Then, PET gas used as a raw material gas is supplied into the process container and is caused to react with the moisture on the wafer at a process temperature of 200° C., thereby forming an interface layer of tantalum oxide. Then, PET gas and oxygen gas are supplied into the process container at the same time, and are caused to react with each other at a process temperature of 410° C., thereby forming a main layer of tantalum oxide on the interface layer.

Abstract: The present invention has as an objective providing a silicon epi-wafer, and a manufacturing method therefor, which simplifies processing as much as possible in an attempt to lower the cost of an epi-wafer, and which is capable of manifesting a sufficient IG effect even in low-temperature device fabrication processing of under 1080° C. in an epi-wafer, and furthermore, in device processing, which enhances gettering capabilities for a variety of impurities in wafer device processing, without performing, following wafer slicing, any process from which an EG effect can be anticipated. As for the silicon single crystal, which is grown via the CZ method so as to make the oxygen concentration relatively high, and to intentionally make the carbon concentration high, outstanding gettering capabilities are manifested in the wafer itself, without performing EG processing.

Abstract: A method of preparing a surface for and forming a thin film on a single-crystal silicon substrate is disclosed. One embodiment of his method comprises forming an oxidized silicon layer (which may be a native oxide) on at least one region of the substrate, and thermally annealing the substrate in a vacuum while supplying a silicon-containing flux to the oxide surface, thus removing the oxidized silicon layer. Preferably, the thin film is formed immediately after removal of the oxidized silicon layer. The silicon-containing flux is preferably insufficient to deposit a silicon-containing layer on top of the oxidized silicon layer, and yet sufficient to substantially inhibit an SiO-forming reaction between the silicon substrate and the oxidized silicon layer. The method of the invention allows for growth or deposition of films which have exceptionally smooth interfaces (less than 0.1 nm rms roughness) with the underlying silicon substrate at temperatures less than 800° C.

Abstract: A method for enhancing adhesion of photo-resist to silicon nitride surfaces is disclosed. An oxidation process is first performed on the surface of the semiconductor wafer using ozone-dissolved deionized water to transform most of the dangle bonds and Si-N bonds on the surface of the silicon nitride layer into Si-O bonds or Si-ON bonds. An HMDS layer is then formed on the surface of the silicon nitride layer. A photo-resist layer is next formed on the surface of the HMDS layer. Finally, a soft bake process is performed to remove solvents from the photo-resist layer and an exposure process is performed on the photo-resist layer to define a predetermined pattern in the photo-resist layer.

Abstract: Semiconductor processing methods and defect detection methods are described. In one embodiment, a semiconductor wafer in process is provided and a material is formed or deposited over the wafer. The material is discernably deposited over defective wafer surface areas and not appreciably deposited over non-defective wafer surface areas. Subsequently, the wafer surface areas are inspected to identify defective areas. In another embodiment, a substrate is provided having an exposed region containing surface defects. A defect-highlighting material is substantially selectively deposited over surface defects and not appreciably over other exposed regions. The substrate is subsequently inspected for the deposited defect-highlighting material. In yet another embodiment, a dielectric layer is formed over a substrate outer surface and the substrate is processed in a manner which can give rise to a plurality of randomly-distributed dielectric layer features.

Abstract: A method of processing a semiconductor wafer sliced from a monocrystalline ingot comprises at least the steps of chamfering, lapping, etching, mirror-polishing, and cleaning. In the etching step, alkali etching is first performed and then acid etching, preferably reaction-controlled acid etching, is performed. The etching amount of the alkali etching is greater than the etching amount of the acid etching. Alternatively, in the etching step, reaction-controlled acid etching is first performed and then diffusion-controlled acid etching is performed. The etching amount of the reaction-controlled acid etching is greater than the etching amount of the diffusion-controlled acid etching.

Abstract: A method of manufacturing a semiconductor device that forms laminate layers includes the steps of reducing contamination containing the single bond of carbon on at least one part of a surface on which the laminate films are formed by activated hydrogen before the laminate films are formed, and forming the laminate films on the surface on which the laminate films are formed.

Abstract: The invention concerns the use of spin-on-glass (SOG) to bond two layers of semiconductor together, in order to form a Silicon-on-Insulator (SOI) structure. One type of SOG is a cross-linked siloxane polymer, preferably of the poly-organo-siloxane type, comprising a carbon content of at least 5 atomic weight percent.

Abstract: A method of forming tungsten films on oxide layers is disclosed. The tungsten films are formed on the oxide layers by treating the oxide using a silane based gas mixture followed by the thermal decomposition of a W(CO)6 precursor. After the W(CO)6 precursor is thermally decomposed, additional layer of tungsten may be optionally formed thereon from the thermal decomposition of tungsten hexafluoride (WF6).

Abstract: A semiconductor device with a reduced insulating capacitance between an emitter electrode and a base layer, and a manufacturing method thereof are disclosed. In the semiconductor device, at least first and second insulating layers are interposed between the emitter electrode and the base layer. Preferably, the first insulating layer, a semiconductor layer having insulation characteristics, and the second insulating layer are interposed between the emitter electrode and the base layer.

Abstract: This invention relates to a process for the manufacture of one electronic structure comprising at least one active component and at least one passive component or element on a support substrate made of an insulating material. A characteristic process comprises the following steps: make the active component in a surface layer made of semiconducting material from an initial substrate comprising a wafer of semiconducting material supporting the said surface layer, make electrical insulation areas capable of insulating the passive component or element from the active component, make the passive component or element on and/or in the electrical insulation areas, prepare the surface of the initial substrate face with the said electronic structure to make this face compatible for bonding with another substrate by molecular bonding, perform the bonding, the other substrate being the said support substrate made of an insulating material, eliminate all or part of the wafer of semiconducting material.

Abstract: A process for fabricating and releasing a thin-film structure from a primary carrier for further processing. The thin-film structure is built on a metal interconnect disposed on a dielectric layer which, in turn, is deposited on a primary carrier. The thin-film structure and metal interconnect are released from the dielectric layer and primary carrier along a release interface defined between the metal interconnect and the dielectric film. Release is accomplished by disturbing the interface, either by laser ablation or dicing.

Abstract: This invention relates to a method for removing contaminate nitrogen from the peripheral gate region of a non-volatile memory device during production of said device, wherein at least some of the contaminate nitrogen has formed a bond with the surface of the silicon substrate in contact with the gate oxide layer in said gate region, said method comprising: contacting said gate oxide layer and contaminate nitrogen with a gas comprising ozone at a temperature of about 850° C. to about 950° C. for an effective period of time to break said bond; and removing said gate oxide layer and contaminate nitrogen from said surface of said silicon substrate.

Abstract: A method for efficiently fabricating semiconductor wafers of good planarization without utilizing chemical solutions of high etching rate is disclosed. The method slices a single-crystal ingot into slices of wafers. The edge of each wafer is chamfered. A lapping or grinding step is carried out to planarize the chamfered wafer. Both side surfaces of the wafer are then polished. Next, the wafer surface is mirror polished. Finally, the wafer is cleaned.

Abstract: The invention relates to a method of forming a stack-gate of a non-volatile memory. In this method, the stack-gate is formed in a predetermined region of the substrate of a semiconductor wafer. Then, a gate oxide layer, a first gate conductive layer, a dielectric layer, and a passivation layer are formed followed by lithography and stripping of the photo-resist layer and removal of the passivation layer from the dielectric layer. Finally, a second gate conductive layer is formed on the dielectric layer as the control gate of the stack-gate. The passivation layer can prevent the dielectric layer from being damaged during stripping of the photo-resist layer.

Abstract: An object of the invention is to provide a preparation process of a semiconductor wafer, in which breakage of the wafer on grinding the back surface of the wafer and on peeling the adhesive tape is prevented, and the operation time can be reduced. The preparation process of a semiconductor wafer comprises the steps of: adhering an adhesive tape on a front surface of a semiconductor wafer; grinding a back surface of the semiconductor wafer by a grinding machine; peeling the adhesive tape; and cleaning the front surface of the semiconductor wafer, wherein an adhesive tape having heat shrinkability is used as the adhesive tape, and after grinding the back surface of the semiconductor wafer, warm water at a temperature of from 50 to 99.degree. C. is poured to peel the adhesive tape in a wafer cleaning machine, and the front surface of the semiconductor wafer is cleaned in the wafer cleaning machine.

Abstract: Described are preferred processes for conditioning semiconductor devices with deuterium to improve operating characteristics and decrease depassivation which occurs during the course of device operation. Also described are semiconductor devices which can be prepared by such processes.

Abstract: A process for producing an SOI substrate is disclosed which is useful for saving resources and lowering production cost. Further, a process for producing a photoelectric conversion device such as a solar cell is disclosed which can successfully separate a substrate by a porous Si layer, does not require a strong adhesion between a substrate and a jig, and can save resources and lower production cost. In a substrate having a porous layer on a nonporous layer and further having on the porous layer a layer small in porosity, the nonporous layer and the layer small in porosity are separated by the porous layer to form a thin film. A metal wire is wound around a side surface of the substrate, and a current is made to flow into the metal wire to generate a heat from the metal wire and transfer the heat preferentially to the porous layer, thus conducting the separation.

Abstract: A method of de-oxidizing a surface onto which a refractory metal or molecule which contains a refractory metal atom will be adhered. The method utilizes a plasma which includes a gas such as argon, nitrogen, helium or hydrogen, or a mixture of any of the foregoing, to remove oxygen molecules from the surface to which adherence of the refractory metal is desired. Radicals in the plasma coat the surface to prevent further oxidation thereof. The method also includes techniques for depositing refractory metals onto a surface such as a substrate or layer of semiconductor material on which integrated circuitry has been fabricated.

Abstract: An integrated circuit die and method of fabricating the same. The method comprises further grinding, polishing or otherwise treating one or more perimeter edges of an individual circuit die. The perimeter edges are treated to remove a substantial portion of the remaining substrate material layer or scribe therefrom without exposing the active circuitry of the die. The process reduces the overall length and width dimensions of a die producing a smaller circuit die without reducing the amount of circuitry on the die.

Abstract: The present invention relates to a method of cleaning a surface of a substrate employed prior to film formation by using the CVD method which uses a reaction gas containing an ozone containing gas which contains ozone (O.sub.3) in oxygen (O.sub.2) and tetraethylorthosilicate (TEOS). The substrate surface cleaning method comprises the steps of oxidizing particles 13 by contacting a pre-process gas containing ozone 15 to a surface 12 of a substrate 11 on which the particles 13 are present, and removing the particles 13 by heating the substrate 11 to exceed a decomposition point of oxide 13a of the particles 13.

Abstract: Efficient transmutation doping of silicon through the bombardment of silicon wafers by a beam of deuterons is described. A key feature of the invention is that the deuterons are required to have an energy of at least 4 MeV, to overcome the Coulomb barrier and thus achieve practical utility. When this is done, transmutationally formed phosphorus in concentrations as high as 10.sup.16 atoms per cc. are formed from deuteron beams having a fluence as low as 10.sup.19 deuterons per square cm. As a byproduct of the process sulfur is also formed in a practical concentration range of about 10.sup.14 atoms per cc. This can be removed by annealing at temperatures in the order of 700 .degree. C. Additional sulfur continues to form as a result of the decay of P.sup.32. Because of the high energy of the deuterons, several silicon wafers may be processed simultaneously if a suitable mask is available and proper alignment is achieved.

Abstract: There is disclosed a method of manufacturing semiconductor wafers, in which a lapping process is performed prior to a chamfering process. This makes it possible to manufacture semiconductor wafers while maintaining the smoothness and dimensional accuracy of a chamfered surface of each wafer obtained by the chamfering process.

Abstract: A method of removing carbon contamination. On a semiconductor substrate having carbon contamination thereon, a sacrificial oxide layer is formed. During the formation of the sacrificial oxide layer, an agent is introduced to help and improve the growth of the sacrificial oxide layer, and to trap the carbon contamination. The sacrificial oxide layer is then removed, and the carbon contamination is removed with the sacrificial oxide layer.

Abstract: A process is taught for etching semiconductor wafers with an etching mixture comprising nitric and hydrofluoric acids and optionally a surfactant. To this mixture are added either more hydrofluoric acid, or more hydrofluoric and nitric acids, with the added acids having concentrations of at least 70% by weight. The use of concentrated acids reduces the loss of substrate material and extends etching bath life.

Abstract: A process for fabricating and releasing a thin-film structure from a primary carrier for further processing. The thin-film structure is built on a metal interconnect disposed on a dielectric layer which, in turn, is deposited on a primary carrier. The thin-film structure and metal interconnect are released from the dielectric layer and primary carrier along a release interface defined between the metal interconnect and the dielectric film. Release is accomplished by disturbing the interface, either by laser ablation or dicing.

Abstract: Process for the preparation of an epitaxial wafer having a total thickness variation and/or site total indicated reading of less than about 1.0 .mu.ms. The distance between the front and back surfaces of the epitaxial wafer at discrete positions on the front surface is measured to generate thickness profile data. Additional stock is removed from the front surface of the epitaxial wafer in a stock removal step to reduce the thickness of the epitaxial wafer to the target thickness, T.sub.t, with the amount of stock being removed at each of said discrete positions being determined after taking into account the thickness profile data and T.sub.t.

Abstract: In a method of manufacturing a semiconductor substrate, a first stage semiconductor substrate wafer is cut out from an ingot. Then, a chemical mechanical polishing process is performed to the first stage semiconductor substrate wafer to produce a second stage semiconductor substrate wafer respectively having mirror surfaces on front and rear surfaces of the second stage semiconductor substrate wafer. Subsequently, a third stage semiconductor substrate wafer is produced from the second stage semiconductor substrate wafer without performing an additional chemical mechanical polishing process, to have a blocking film on the rear surface and a mirror surface on the front surface. Finally, an epitaxial layer is grown on the front surface of the third stage semiconductor substrate wafer.

Abstract: A technique for forming a film of material (12) from a donor substrate (10). The technique has a step of introducing energetic particles (22) through a surface of a donor substrate (10) to a selected depth (20) underneath the surface, where the particles have a relatively high concentration to define a donor substrate material (12) above the selected depth. An energy source is directed to a selected region of the donor substrate to initiate a controlled cleaving action of the substrate (10) at the selected depth (20), whereupon the cleaving action provides an expanding cleave front to free the donor material from a remaining portion of the donor substrate.

Abstract: A method for cleaning polymer film residues from in-process integrated circuit devices is disclosed. Specifically, a method for forming a contact via in an integrated circuit is disclosed in which the formation of a metallization conductive element is exposed through a dry anisotropic etch. During the etch, a polymer film residue forms from masking materials, and coats the newly-formed via. The polymer film may have metals incorporated metals therein from the metallization conductive element. A fluorine based etchant is used to remove the polymer film. Protection of the metallization conductive element during the cleaning process is accomplished with passivation additives comprising straight, branched, cyclic, and aromatic hydrocarbons. Attached to the hydrocarbons are functional groups comprising at least 3 hydroxyls.

Abstract: A method of forming an integrated circuit device includes the steps of forming a conductive pattern on an integrated circuit device, and forming an insulating layer on the conductive pattern and on the integrated circuit substrate. An upper surface portion of the insulating layer opposite the substrate is removed, and a photoresist layer is formed on the insulating layer after the step of removing the upper surface portion. The photoresist layer is patterned, and exposed portions of the insulating layer are etched using the patterned photoresist layer as an etching mask thereby forming contact holes through the insulating layer.

Abstract: A grinding process monitoring system and grinding process monitoring method for monitoring progress of a grinding process by measuring thickness of a film applied to a substrate surface and undergoing the grinding process. A spectrum measuring device for measuring a spectrum of light reflected from the substrate surface has a measuring window opposed to the substrate surface. A measurement region between the measuring window and the substrate surface is filled with a cleaning liquid to form a liquid curtain in the measurement region. While examining bubble characteristic variations occurring in the spectrum due to bubbles present in the measurement region, a moving device is controlled to adjust a spacing between the measuring window and the substrate surface by feedback control to eliminate the bubble characteristic variations.

Abstract: Methods of forming metal silicide layers include the steps of forming electrically conductive lines that comprise the steps of forming a layer of polysilicon on a semiconductor substrate and then forming a layer of metal silicide on the polysilicon layer, opposite the substrate. The layer of metal silicide and the layer of polysilicon are then patterned as an electrically conductive line having sidewalls. The semiconductor substrate is then exposed to a cleaning agent that selectively etches the patterned layer of metal silicide at a faster rate than the patterned layer of polysilicon. The patterned layer of metal silicide is then thermally oxidized to define recess spacers extending adjacent sidewalls of the electrically conductive line. An electrically insulating layer is then formed on the electrically conductive line and on the recess spacers. The electrically insulating layer is then anisotropically etched to define insulating spacers on the recess spacers.

Abstract: The invention is a method of removing materials such as carbon and metallic elements from a substrate surface via heating in an atmosphere of molecular chlorine and steam. In a preferred embodiment, carbon residue is removed from the surface of a Si or GaAs substrate material.

Abstract: In a semiconductor single crystalline substrate provided with a protecting film to prevent autodoping on the reverse surface thereof, for growing a vapor-phase epitaxial layer on the main obverse surface thereof, a width of a chamfer is set for locating an edge-crown occurred in consequence of a vapor-phase epitaxial growth on the chamfer, and a gap of a distance is formed between a periphery of the protecting film and an innermost part of the chamfer on the reverse surface.

Abstract: A low pressure in situ wafer cleaning process and apparatus are disclosed wherein a low pressure external combustion reactor 2 in combination with a low pressure furnace 14 produces a stream of a combustion product through the combustion of a halogenated hydrocarbon and oxygen. The combustion product is contacted with semiconductor wafers in the low pressure furnace to remove Group I and II metals. After a sufficient time has passed for cleaning, the combustion reactor and furnace are purged with an inert gas to remove the combustion product. In a preferred embodiment, the halogenated hydrocarbon is trans-1,2-dichloroethylene and the combustion product is vaporous hydrochloric acid.

Abstract: A method of manufacturing a semiconductor monocrystalline mirror-surface wafer includes at least a gas phase etching process and a mirror-surface polishing process. The mirror-surface polishing process is composed of coarse polishing and finishing polishing, and only the coarse polishing is performed prior to the gas phase etching process, while the finishing polishing is carried out after the gas phase etching process. In addition, a heat treatment process is performed after the gas phase etching process but before the final cleaning process. The heat treatment process also serves as a donor-annihilation heat treatment process. The method can manufacture semiconductor monocrystalline mirror-surface wafers having a high degree of flatness, while resolving the problems involved in the conventional method; i.e., haze produced on a wafer surface, the introduction of strain and defects in the surface, high cost, and low productivity.

Abstract: A method of fabricating a semiconductor device includes the steps of protecting a front surface of a semiconductor substrate by an adhesive medium, grinding a rear surface of the semiconductor substrate in a state that the front surface is protected by the adhesive medium, removing the adhesive medium from the rear surface, and heating the semiconductor substrate, after the step of removing, to a temperature higher than a thermal decomposition temperature of an adhesive provided on the adhesive medium.

Abstract: The present invention relates to a method of cleaning wafers bonded on a fixing member in the form of an ingot, and then sliced by a wire saw from a direction perpendicular to the longitudinal dimension to form a row of wafers. The method includes: a cleaning process for cleaning the wafers bonded on the fixing member in the form of the row of wafers (workpiece W) by a cleaning mechanism; and a separating process includes: a softening step for softening an adhesive in a softening vessel; a first moving step for turning and moving a wafer in a planar direction using an end point of the glued portion of the wafer and the fixing member as the fulcrum; and a second moving step for further moving the wafer in a planar direction by a suction-cup rotary actuator to thereby bring the wafer out of the region of the row of wafers.

Abstract: The reduction of surface recombination is required for the manufacture of electronic devices made of silicon as well as for the application of various measurements and analytical methods for determining the purity of silicon. According to this invention, a process will be described for applying a laquer layer to the surface of silicon wafers, wherby the surface recombination velocity will be reduced to a value below 100 cm/s.

Abstract: A method of preventing edge stain in silicon wafers from the edge polishing step with an alkaline slurry, the method consisting of formation of an oxide layer by an ozone dipping step prior to edge polishing.

Abstract: A method for pre-shaping a major surface (21,22) of a semiconductor wafer (20) in preparation for polishing includes shaping the major surface (21,22) so that it has a concave shape. In a preferred method, an etching process is used to form the concave shape. The concave shape provides a starting wafer that is extremely flat after polishing.