Temporary Protective Layer Patents (Class 438/976)
  • Patent number: 9040390
    Abstract: A releasable buried layer for 3-D fabrication and methods of manufacturing is disclosed. The method includes forming an interposer structure which includes forming a carbon rich dielectric releasable layer over a wafer. The method further includes forming back end of the line (BEOL) layers over the carbon rich dielectric layer, including wiring layers and solder bumps. The method further includes bonding the solder bumps to a substrate using flip chip processes. The flip chip processes comprises reflowing the solder bumps and rapidly cooling down the solder bumps which releases the carbon rich dielectric releasable layer from the wafer.
    Type: Grant
    Filed: May 30, 2012
    Date of Patent: May 26, 2015
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Timothy H. Daubenspeck, Steven E. Molis, Gordon C. Osborne, Jr., Wolfgang Sauter, Edmund J. Sprogis
  • Patent number: 8921177
    Abstract: A method for fabricating an integrated device is disclosed. A protective layer is formed over a gate structure when forming epitaxial (epi) features adjacent to another gate structure uncovered by the protective layer. The protective layer is thereafter removed after forming the epitaxial (epi) features. The disclosed method provides an improved method for removing the protective layer without substantial defects resulting. In an embodiment, the improved formation method is achieved by providing a protector over an oxide-base material, and then removing the protective layer using a chemical comprising hydrofluoric acid.
    Type: Grant
    Filed: July 22, 2011
    Date of Patent: December 30, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ming-Hsi Yeh, Hsien-Hsin Lin, Ying-Hsueh Chang Chien, Yi-Fang Pai, Chi-Ming Yang, Chin-Hsiang Lin
  • Patent number: 8834662
    Abstract: A method of separating a wafer from a carrier includes placing a wafer assembly on a platform. The wafer assembly includes the wafer, the carrier, and a layer of wax between the wafer and the carrier. A wafer frame is mounted on the wafer of the wafer assembly. The layer of wax is softened. The wafer and the wafer frame mounted thereon are separated, by a first robot arm, from the carrier.
    Type: Grant
    Filed: March 22, 2012
    Date of Patent: September 16, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien Ling Hwang, Lin-Wei Wang, Chung-Shi Liu
  • Patent number: 8809194
    Abstract: A method for performing a spacer etch process is described. The method includes conformally applying a spacer material over a gate structure on a substrate, and performing a spacer etch process sequence to partially remove the spacer material from the gate structure and the substrate, while retaining a sidewall spacer positioned along a sidewall of the gate structure. The spacer etch process sequence may include depositing a SiOCl-containing layer on an exposed surface of the spacer material to form a spacer protection layer.
    Type: Grant
    Filed: March 7, 2012
    Date of Patent: August 19, 2014
    Assignee: Tokyo Electron Limited
    Inventors: Alok Ranjan, Kaushik Arun Kumar
  • Patent number: 8679289
    Abstract: A first holding table suction-holds an annular projection of a wafer remaining on a rear face thereof for surrounding a back grinding region. A second holding table having an outer peripheral wall adjacent to an inner wall of the annular projection is inserted into a flat portion inside the annular projection for joining a separating adhesive tape to a protective tape on a surface of the wafer while a flat plane of the flat portion is suction-held. Thereafter, the adhesive tape is separated. Accordingly, the adhesive tape is separated from the surface of the wafer together with the protective tape.
    Type: Grant
    Filed: October 17, 2011
    Date of Patent: March 25, 2014
    Assignee: Nitto Denko Corporation
    Inventors: Chouhei Okuno, Masayuki Yamamoto
  • Patent number: 8679280
    Abstract: A method for releasing a handler from a wafer, the wafer comprising an integrated circuit (IC), includes attaching the handler to the wafer using an adhesive comprising a thermoset polymer, the handler comprising a material that is transparent in a wavelength range of about 193 nanometers (nm) to about 400 nm; ablating the adhesive through the handler using a laser, wherein a wavelength of the laser is selected based on the transparency of the handler material; and separating the handler from the wafer.
    Type: Grant
    Filed: May 27, 2010
    Date of Patent: March 25, 2014
    Assignee: International Business Machines Corporation
    Inventors: Bing Dang, Matthew Farinelli, John Knickerbocker, Aparna Prabhakar, Robert E. Trzcinski, Cornelia K. Tsang
  • Patent number: 8623721
    Abstract: Improved silicide formation and associated devices are disclosed. An exemplary method includes providing a semiconductor material having spaced source and drain regions therein, forming a gate structure interposed between the source and drain regions, performing a gate replacement process on the gate structure to form a metal gate electrode therein, forming a hard mask layer over the metal gate electrode, forming silicide layers on the respective source and drain regions in the semiconductor material, removing the hard mask layer to expose the metal gate electrode, and forming source and drain contacts, each source and drain contact being conductively coupled to a respective one of the silicide layers.
    Type: Grant
    Filed: June 17, 2013
    Date of Patent: January 7, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Ming Chen, Chih-Hao Chang, Chih-Hao Yu
  • Patent number: 8609515
    Abstract: A dicing die bonding film including a bonding layer; and a pressure-sensitive adhesive layer adjoining the bonding layer, the pressure-sensitive adhesive layer having a storage modulus of about 400 to about 600 kPa at 25° C. and a peel strength of about 200 to about 350 mN/25 mm with respect to the bonding layer as measured according to KS-A-01107 standard.
    Type: Grant
    Filed: November 2, 2011
    Date of Patent: December 17, 2013
    Assignee: Cheil Industries, Inc.
    Inventors: Min Kyu Hwang, Ji Ho Kim, Ki Tae Song
  • Patent number: 8562750
    Abstract: A method and apparatus for processing a bevel edge is provided. A substrate is placed in a bevel processing chamber and a passivation layer is formed on the substrate only around a bevel region of the substrate using a passivation plasma confined in a peripheral region of the bevel processing chamber. The substrate may undergo a subsequent semiconductor process, during which the bevel edge region of the substrate is protected by the passivation layer. Alternatively, the passivation layer may be patterned using a patterning plasma formed in an outer peripheral region of the processing chamber, the patterning plasma being confined by increasing plasma confinement. The passivation layer on outer edge portion of the bevel region is removed, while the passivation layer on an inner portion of the bevel region is maintained. The bevel edge of the substrate may be cleaned using the patterned passivation layer as a protective mask.
    Type: Grant
    Filed: December 17, 2009
    Date of Patent: October 22, 2013
    Assignee: Lam Research Corporation
    Inventors: Jack Chen, Yunsang Kim
  • Patent number: 8561664
    Abstract: An object of the present invention is to provide a pickup device that can securely peel a die or to provide a reliable die bonder or a pickup method using the pickup device. To achieve the object, the present invention is provided with a characteristic that when a die to be peeled out of plural dies (semiconductor chips) applied to a dicing film is thrust up and is peeled from the dicing film, the dicing film in a predetermined part in a circumference of the die is thrust up and a peeling starting point is formed, the dicing film in a part except the predetermined part is thrust up, and the die is peeled from the dicing film.
    Type: Grant
    Filed: September 13, 2010
    Date of Patent: October 22, 2013
    Assignee: Hitachi High-Tech Instruments Co., Ltd.
    Inventors: Hiroshi Maki, Naoki Okamoto
  • Patent number: 8507363
    Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer. The semiconductor wafer is disposed on a water-soluble die attach film. The mask covers and protects the integrated circuits. The mask is patterned with a laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to form singulated integrated circuits. The water-soluble die attach film is then patterned with an aqueous solution.
    Type: Grant
    Filed: June 15, 2011
    Date of Patent: August 13, 2013
    Assignee: Applied Materials, Inc.
    Inventors: Wei-Sheng Lei, Madhava Rao Yalamanchili, Brad Eaton, Saravjeet Singh, Ajay Kumar
  • Patent number: 8419895
    Abstract: A method for releasing a handler from a wafer, the wafer comprising an integrated circuit (IC) includes attaching the handler to the wafer using an adhesive comprising a polymer; performing edge processing to remove an excess portion of the adhesive from an edge of the handler and wafer; ablating the adhesive through the handler using a laser, wherein a wavelength of the laser is selected based on the transparency of the handler material; and separating the handler from the wafer. A system for releasing a handler from a wafer, the wafer comprising an IC includes a handler attached to a wafer using an adhesive comprising a polymer; an edge processing module, the edge processing module configured to remove an excess portion of the adhesive from the edge of the handler and wafer; and a laser, the laser configured to ablate the adhesive through the handler.
    Type: Grant
    Filed: May 27, 2010
    Date of Patent: April 16, 2013
    Assignee: International Business Machines Corporation
    Inventors: Bing Dang, John Knickerbocker, Aparna Prabhakar, Peter Sorce, Robert E. Trzcinski, Cornelia K. Tsang
  • Patent number: 8338198
    Abstract: There is provided a peeling method capable of preventing a damage to a layer to be peeled. Thus, not only a layer to be peeled having a small area but also a layer to be peeled having a large area can be peeled over the entire surface at a high yield. Processing for partially reducing contact property between a first material layer (11) and a second material layer (12) (laser light irradiation, pressure application, or the like) is performed before peeling, and then peeling is conducted by physical means. Therefore, sufficient separation can be easily conducted in an inner portion of the second material layer (12) or an interface thereof.
    Type: Grant
    Filed: June 4, 2009
    Date of Patent: December 25, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toru Takayama, Junya Maruyama, Shunpei Yamazaki
  • Patent number: 8334222
    Abstract: A processing method of a semiconductor wafer is provided. The method comprising the steps of: removing at least part of oxide film from a surface of the semiconductor wafer; removing liquid from the surface; and providing at least partial oxide film on the surface by applying an oxidizing gas wherein a gas flow of the oxidizing gas and/or an ambient gas involved by the oxidizing gas is characterized by an unsaturated vapor pressure of the liquid such that the liquid on the surface vaporizes. The above-described steps are conducted in this order.
    Type: Grant
    Filed: May 1, 2009
    Date of Patent: December 18, 2012
    Assignee: Sumco Techxiv Corporation
    Inventors: Isamu Gotou, Tomonori Kawasaki
  • Patent number: 8309440
    Abstract: Embodiments described herein provide methods for processing a substrate. One embodiment comprises positioning a substrate in a processing region of a processing chamber, exposing a surface of the substrate disposed in the processing chamber to an oxygen containing gas to form a first oxygen containing layer on the surface, removing at least a portion of the first oxygen containing layer to expose at least a portion of the surface of the substrate, and exposing the surface of the substrate to an oxygen containing gas to form a second oxygen containing layer on the surface.
    Type: Grant
    Filed: July 1, 2011
    Date of Patent: November 13, 2012
    Assignee: Applied Materials, Inc.
    Inventors: Errol Antonio C. Sanchez, Johanes Swenberg, David K. Carlson, Roisin L. Doherty
  • Patent number: 8268687
    Abstract: An embodiment is directed to a method of fabricating a semiconductor memory device, the method including preparing a substrate having a cell array region and a contact region, forming a thin film structure on the substrate, including forming sacrificial film patterns isolated horizontally by a lower isolation region, the lower isolation region traversing the cell array region and the contact region, and forming sacrificial films sequentially stacked on the sacrificial film patterns, and forming an opening that penetrates the thin film structure to expose the lower isolation region of the cell array region, the opening being restrictively formed in the cell array region.
    Type: Grant
    Filed: November 3, 2010
    Date of Patent: September 18, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sungwoo Hyun, Byeongchan Lee, Sunghil Lee
  • Patent number: 8192578
    Abstract: In the pickup apparatus wherein a chip adhered on a sheet is sucked and held by a picking nozzle and then picked up by the nozzle, a sheet push-up member configured by forming flexible elastic material such as rubber in a spherical shape is attached on the abutment supporting surface of the upper surface of a tool, then the push-up surface of the sheet push-up member is followed in a flat surface state along the lower surface of the sheet and abutted thereto in the moving down state of the picking nozzle, and then the push-up surface pushes up the lower surface of the sheet while being deformed in a upwardly protruded curved surface shape in the moving up operation where the picking nozzle moves up together with the chip. Thus, the chip can be released from the sheet from the outer peripheral side of the chip.
    Type: Grant
    Filed: October 13, 2006
    Date of Patent: June 5, 2012
    Assignee: Panasonic Corporation
    Inventors: Hiroshi Haji, Mitsuru Ozono, Teruaki Kasai, Kazuhiro Noda
  • Patent number: 8172968
    Abstract: The invention relates to a method for contacting a flexible sheet to a first element with improved lateral alignment. The method includes a step of measuring a first lateral misalignment after establishing a first contact between the flexible sheet and either of the first element and a sheet parking surface called anchor in the first stage. If the 5 misalignment exceeds a predetermined threshold the flexible sheet is parked at the anchor such that it is not in contact with the first element, and the relative position of the first element and the anchor is altered during the second stage for correcting the mismatch during a contact between the flexible sheet and the first element to be established within the next step of the method. During the steps of shifting the contact point to obtain the second stage 10 the contacting process is more accurate and reproducible than the process for establishing the initial contact.
    Type: Grant
    Filed: January 11, 2008
    Date of Patent: May 8, 2012
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Marcus Antonius Verschuuren, Mischa Megens
  • Patent number: 8158519
    Abstract: In a method of manufacturing a non-volatile memory cell, a self-aligned metal silicide is used in place of a conventional tungsten metal layer to form a polysilicon gate, and the self-aligned metal silicide is used as a connection layer on the polysilicon gate. By using the self-aligned metal silicide to form the polysilicon gate, the use of masks in the etching process may be saved to thereby enable simplified manufacturing process and accordingly, reduced manufacturing cost. Meanwhile, the problem of resistance shift caused by an oxidized tungsten metal layer can be avoided.
    Type: Grant
    Filed: October 20, 2008
    Date of Patent: April 17, 2012
    Assignee: Eon Silicon Solution Inc.
    Inventors: Yi-Hsiu Chen, Yung-Chung Lee, Yider Wu
  • Patent number: 8053337
    Abstract: In a method of manufacturing a semiconductor device, a first groove and a second groove each having a width less than that of a scribe line are formed along the scribe line in a first protective film provided below a second protective film which protects element forming regions when a wafer is divided into parts by a laser dicing, and the first groove and the second groove are filled with the second protective film. Then, the laser dicing is performed on a region between the first groove and the second groove along the scribe line from the surface where the second protective film is formed to form a cutting groove that reaches at least a predetermined depth of the multi-layer interconnect.
    Type: Grant
    Filed: March 26, 2010
    Date of Patent: November 8, 2011
    Assignee: Renesas Electronics Corporation
    Inventor: Takamitsu Noda
  • Patent number: 8048614
    Abstract: A circuit pattern having a size finer than a half of a wavelength of an exposure beam is transferred on a semiconductor wafer plane with an excellent accuracy by means of a mask whereupon an integrated circuit pattern is formed and a reduction projection aligner. The accuracy of transferring the circuit pattern on the semiconductor wafer is improved by synergic effects of super-resolution exposure, wherein a mask cover made of a transparent medium is provided on a pattern side of the integrated circuit mask so as to suppress the aberration of reduction projection alignment, and a method of increasing the number of actual apertures of the optical reduction projection lens system provided with the wafer cover made of the transparent medium on a photoresist side of the semiconductor wafer to which planarizing process is performed.
    Type: Grant
    Filed: August 9, 2006
    Date of Patent: November 1, 2011
    Inventors: Yoshihiko Okamoto, Masami Ogita
  • Patent number: 8017466
    Abstract: In a semiconductor substrate on which are formed an N-type MOS transistor and a P-type MOS transistor, the gate electrode of the N-type MOS transistor comprises a tungsten film, which makes contact with a gate insulation film, and the gate electrode of the P-type MOS transistor comprises a tungsten film, which makes contact with a gate insulation film, and the concentration of carbon contained in the former tungsten film is less than the concentration of carbon contained in the latter tungsten film.
    Type: Grant
    Filed: November 10, 2009
    Date of Patent: September 13, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuaki Nakajima, Kyoichi Suguro
  • Patent number: 8008166
    Abstract: The present invention generally provides apparatus and method for forming a clean and damage free surface on a semiconductor substrate. One embodiment of the present invention provides a system that contains a cleaning chamber that is adapted to expose a surface of substrate to a plasma cleaning process prior to forming an epitaxial layer thereon. In one embodiment, a method is employed to reduce the contamination of a substrate processed in the cleaning chamber by depositing a gettering material on the inner surfaces of the cleaning chamber prior to performing a cleaning process on a substrate. In one embodiment, oxidation and etching steps are repeatedly performed on a substrate in the cleaning chamber to expose or create a clean surface on a substrate that can then have an epitaxial placed thereon. In one embodiment, a low energy plasma is used during the cleaning step.
    Type: Grant
    Filed: June 25, 2008
    Date of Patent: August 30, 2011
    Assignee: Applied Materials, Inc.
    Inventors: Errol Antonio C. Sanchez, Johanes Swenberg, David K. Carlson, Roisin L. Doherty
  • Patent number: 7981246
    Abstract: The invention relates to a film (2) which comprises a component (1) to be detached therefrom. Said film is placed in the area of the component on a detaching tool (5) that is provided with at least one supporting element (6) for the film, which extends in a plane of support (11). The film is sucked against the support element (6) and partially under the plane of support by exerting negative pressure. The area of the supporting element is provided with at least one surface section (8) which extends in the plane of support when the detaching process begins, and which can be displaced, once the component (1) is grasped by a suction tool (4), plane-parallel to the plane of support while the negative pressure is maintained. The invention allows to control the detaching process of the film in a controlled movement without damaging or displacing the component.
    Type: Grant
    Filed: December 17, 2004
    Date of Patent: July 19, 2011
    Assignee: Kulicke and Soffa Die Bonding GmbH
    Inventors: Joachim Trinks, Andreas Marte, Wolfgang Herbst
  • Patent number: 7883989
    Abstract: It is an object of the invention to provide a peeling method which does not damage a peeling layer, and to perform peeling not only a peeling layer having a small-size area but also an entire peeling layer having a large-size area with a preferable yield. In the invention, after pasting a fixing substrate, a part of a glass substrate is removed by scribing or performing laser irradiation on the glass substrate which leads to providing a trigger. Then, peeling is performed with a preferable yield by performing peeling from the removed part. In addition, a crack is prevented by covering the entire face except for a connection portion of a terminal electrode (including a periphery region of the terminal electrode) with a resin.
    Type: Grant
    Filed: October 14, 2009
    Date of Patent: February 8, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yuugo Goto, Yumiko Fukumoto, Toru Takayama, Junya Maruyama, Takuya Tsurume
  • Patent number: 7846288
    Abstract: Methods and systems for removing protective films from microfeature workpieces are disclosed herein. One particular embodiment of such a method comprises separating at least a portion of a protective tape from a workpiece to which the protective tape is attached with a separator configured to drive against an interface between the protective tape and the workpiece. The method further includes engaging the portion of the protective tape detached from the workpiece with a removal system.
    Type: Grant
    Filed: May 10, 2006
    Date of Patent: December 7, 2010
    Assignee: Micron Technology, Inc.
    Inventors: Charles E. Larson, Randall S. Parker
  • Patent number: 7820006
    Abstract: A die pickup apparatus facilitates picking up a semiconductor die in a manner such that, in a state in which a semiconductor die to be picked up is suctioned by a collet, a frontal end of a cover plate is caused to extend from a contact surface, and the cover plate is caused to slide while pushing up a dicing sheet and the semiconductor die, and subsequently a rear end of the cover plate is caused to extend from the contact surface such that an upper surface of the cover plate is substantially in parallel with the contact surface, the cover plate is caused to slide while pushing the dicing sheet and the semiconductor die with the upper surface of the cover plate such that the suction opening is opened, and the dicing sheet is suctioned into the opened suction opening, thereby separating the dicing sheet.
    Type: Grant
    Filed: March 1, 2010
    Date of Patent: October 26, 2010
    Assignee: Shinkkawa Ltd.
    Inventors: Okito Umehara, Kuniyuki Takahashi
  • Patent number: 7771560
    Abstract: A method for preventing edge chipping and cracking damage encountered by semiconductor chips in a die picking operation during separation from an adhesive sheet. Also provided is a device for preventing potential edge chipping and cracking damage encountered by a semiconductor chip during die picking processes.
    Type: Grant
    Filed: September 28, 2007
    Date of Patent: August 10, 2010
    Assignee: International Business Machines Corporation
    Inventors: James R. Johnson, Timothy C. Krywanczyk, Matthew R. Whalen
  • Patent number: 7763145
    Abstract: A system for removal of an integrated circuit from a mount material including holding and stretching the mount material using linear and rotary motion, and removing the integrated circuit from the mount material when the mount material is stretched by linear and rotary motion.
    Type: Grant
    Filed: March 17, 2006
    Date of Patent: July 27, 2010
    Assignee: Stats Chippac Ltd.
    Inventor: Soo-San Park
  • Patent number: 7757742
    Abstract: A die is detachable from an adhesive tape on which the die is mounted with a die detachment tool comprising a vacuum enclosure that is operative to provide a vacuum suction on the adhesive tape. One or more ejector pins are housed in the vacuum enclosure and are projectable from the vacuum enclosure for lifting the die and adhesive tape. A vibrational tool is housed in the vacuum enclosure adjacent to the ejector pins and it is projectable from the vacuum enclosure to contact a portion of the adhesive tape at which the die is located. The vibrational tool is further operative to oscillate the adhesive tape and die for promoting delamination of the die from the adhesive tape.
    Type: Grant
    Filed: July 31, 2007
    Date of Patent: July 20, 2010
    Assignee: ASM Assembly Automation Ltd
    Inventors: Yiu Ming Cheung, Man Kit Chow
  • Patent number: 7736921
    Abstract: An EL element capable of: preventing the state in which number of excessive layers are laminated on each light emitting part formed in a pattern at the time of forming the light emitting parts using the photolithography method; executing the peeling treatment easily and quickly in the excessive layer peeling process; and preventing generation of color mixture or pixel narrowing derived from the elution of the patterned light emitting part into the light emitting layer coating solution to be coated later, at the end part thereof, at the time of coating a light emitting layer coating solution. In order to achieve the above mentioned object, the present invention provides a method for manufacturing an electroluminescent element using a photolithography method.
    Type: Grant
    Filed: January 23, 2004
    Date of Patent: June 15, 2010
    Assignee: Dai Nippon Printing Co., Ltd.
    Inventors: Tomoyuki Tachikawa, Norihito Ito
  • Patent number: 7698806
    Abstract: The application discloses processes for fabricating a slider or head for a data storage device. The processes disclosed provide a transducer portion that is separated from a slider body by a gap. In an illustrated embodiment, actuator elements are fabricated in the gap to adjust a position of the transducer portion relative to the slider body.
    Type: Grant
    Filed: November 5, 2007
    Date of Patent: April 20, 2010
    Assignee: Seagate Technology LLC
    Inventors: Wayne A. Bonin, Roger L. Hipwell, John R. Pendray, Kyle M. Bartholomew, Zine-Eddine Boutaghou
  • Patent number: 7644747
    Abstract: A rectangular substrate dividing apparatus, which can divide a rectangular substrate in a smaller space, accommodate devices, formed as individual pieces by the division, into device cases, and pick up the devices reliably and efficiently from a protective tape affixed to the back of the rectangular substrate, is provided. This apparatus separates a rectangular substrate, to whose back a protective tape is affixed and on which a plurality of devices are partitioned by a lattice of scheduled-separation lines, along the scheduled-separation lines to divide the rectangular substrate into the individual devices, and accommodates the devices in device cases. In a cutting-responsible region, the rectangular substrate is carried out of cassettes, cut by a cutter, and then cleaned by a cleaner. In a tape peeling-responsible region, the devices are picked up with the protective tape being peeled off. In a device accommodation-responsible region, the picked-up individual devices are accommodated into device cases.
    Type: Grant
    Filed: November 29, 2005
    Date of Patent: January 12, 2010
    Assignee: Disco Corporation
    Inventors: Satoshi Ohkawara, Kuniharu Izumi, Shigeru Ishii, Ryu Komine
  • Patent number: 7642152
    Abstract: A method of fabricating spacers is provided. The method includes providing a substrate with a device structure formed thereon. The device structure comprises a gate structure and a pair of source/drain regions. Then, a spacer material layer is formed over the substrate to cover the substrate and the device structure. Thereafter, an etching process is performed to remove a portion of the spacer material layer so that spacers are formed on the respective sidewalls of the gate structure. After that, a plasma treatment step is performed to form a spacer protection layer on the surface of the substrate, the spacers and the gate structure.
    Type: Grant
    Filed: September 7, 2005
    Date of Patent: January 5, 2010
    Assignee: United Microelectronics Corp.
    Inventors: Chuan-Kai Wang, Yi-Hsing Chen, Chia-Jui Liu, Juan-Yi Chen, Ming-Yi Lin
  • Patent number: 7641760
    Abstract: A method of thermal adherend release, wherein a part of adherends adherent to a heat-peelable pressure-sensitive adhesive sheet having a heat-expandable layer containing a foaming agent are selectively released from the pressure-sensitive adhesive sheet by partly heating the heat-peelable pressure-sensitive adhesive sheet, wherein the method comprises previously heating a sticking site of an adherend to be released at a temperature at which the heat-expandable layer of the heat-peelable pressure-sensitive adhesive sheet does not expand and then heating the sticking site of the adherend in the heat-peelable pressure-sensitive adhesive sheet at a temperature at which the heat-expandable layer expands to thereby selectively releasing the adherend.
    Type: Grant
    Filed: December 8, 2005
    Date of Patent: January 5, 2010
    Assignee: Nitto Denko Corporation
    Inventors: Tomoko Doi, Daisuke Shimokawa, Yukio Arimitsu
  • Patent number: 7632374
    Abstract: In an adhesive sheet exfoliation process in a pick-up operation for a thin-type chip 6 adhered to the adhesive sheet 5, a suction exfoliation tool 22 provided at its adhesion surface 22a with plural suction grooves 22b is abutted against the lower surface of the adhesive sheet 5. Then, air within the suction grooves 22b are vacuum-sucked to bend and deform the adhesive sheet 5 together with the chip 6 thereby to exfoliate the adhesive sheet 5 from the lower surface of the chip 6 due to such bending deformation. Thus, it is possible to realize the picking-up operation with high productivity without causing a problem such as breakage or crack.
    Type: Grant
    Filed: July 15, 2003
    Date of Patent: December 15, 2009
    Assignee: Panasonic Corporation
    Inventors: Mitsuru Ozono, Teruaki Kasai
  • Patent number: 7622361
    Abstract: It is an object of the invention to provide a peeling method which does not damage a peeling layer, and to perform peeling not only a peeling layer having a small-size area but also an entire peeling layer having a large-size area with a preferable yield. In the invention, after pasting a fixing substrate, a part of a glass substrate is removed by scribing or performing laser irradiation on the glass substrate which leads to providing a trigger. Then, peeling is performed with a preferable yield by performing peeling from the removed part. In addition, a crack is prevented by covering the entire face except for a connection portion of a terminal electrode (including a periphery region of the terminal electrode) with a resin.
    Type: Grant
    Filed: July 9, 2007
    Date of Patent: November 24, 2009
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yuugo Goto, Yumiko Fukumoto, Toru Takayama, Junya Maruyama, Takuya Tsurume
  • Patent number: 7614137
    Abstract: Embodiments of the invention relate to manufacturing method of a magnetic head slider which flies stably even with a reduced peripheral speed resulting from a trend toward a magnetic disk having a smaller diameter. According to one embodiment, a method of manufacturing a magnetic head slider comprises forming a leading side rail surface and a trailing side rail surface, a leading stepped bearing surface and a trailing stepped bearing surface, and a negative-pressure groove surface on an air bearing surface through etching, forming a first stepped surface on the leading side rail surface through sputtering, and forming a second stepped surface by forming a carbon layer on the first stepped surface through sputtering. The first stepped surface has a first height with respect to the leading side rail surface and the second stepped surface has a second height with respect to the first stepped surface.
    Type: Grant
    Filed: July 5, 2006
    Date of Patent: November 10, 2009
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Yoshihiro Taniguchi, Yoshinori Takeuchi
  • Patent number: 7569118
    Abstract: A method for dicing a wafer having a first face in which opening are arranged along dicing streets. The method includes a step of affixing a dicing tape to the first face such that the dicing tape lies over the openings and adhesive regions of the dicing tape are exposed in the openings and a step of treating the dicing tape to reduce the adhesive strength of the adhesive regions.
    Type: Grant
    Filed: April 25, 2005
    Date of Patent: August 4, 2009
    Assignee: Canon Kabushiki Kaisha
    Inventors: Junichiro Iri, Toshio Kashino, Genji Inada
  • Patent number: 7540077
    Abstract: A method for bonding slider row bars for photolithography process, includes steps of: providing a first carrier plate having a sticky surface; providing slider row bars each having a first surface for forming ABS and an opposite second surface, and securing each slider row bar to the first carrier plate with its first surface facing the sticky surface; providing an encapsulation glue and dispensing it to the second surfaces and gaps between the slider row bars; providing a second carrier plate and attaching it to the second surfaces through the encapsulation glue; irradiating the first carrier plate and the encapsulation glue with ultraviolet light such that the first carrier plate is removed from the slider row bars, and the encapsulation glue is cured to bond the slider row bars with the second carrier plate together.
    Type: Grant
    Filed: October 2, 2006
    Date of Patent: June 2, 2009
    Assignee: SAE Magnetics (H.K.) Ltd.
    Inventors: TaiBoon Lee, YongPing Gao
  • Patent number: 7521384
    Abstract: A method and an apparatus for peeling a surface protective film attached on the surface of a semiconductor wafer are provided. A heating block is set in proximity to the whole surface of the semiconductor wafer, and the whole surface protective film is heated by the heating block. Thus, the air bubbles existing between the semiconductor wafer and the surface protective film are expanded or swelled, and the adhesion between the semiconductor wafer and the surface protective film is weakened. After that, the surface protective film is peeled from the semiconductor wafer. As a result, a peel starting point can be appropriately formed and damage to the wafer can be prevented.
    Type: Grant
    Filed: October 5, 2006
    Date of Patent: April 21, 2009
    Assignee: Tokyo Seimitsu Co., Ltd.
    Inventors: Masaki Kanazawa, Minoru Ametani, Daisuke Akita, Motoi Nezu
  • Patent number: 7497920
    Abstract: In a manufacturing method of a semiconductor device, a tape having an adhesive material is bonded to a first surface of a semiconductor substrate so as to form a space between a groove portion and the adhesive material of the tape, the semiconductor substrate is divided into a plurality of chips by a dicing, and the adhesive material is drawn from a second surface of the semiconductor substrate opposite to the first surface so that the adhesive material enters into the space. Therefore, dicing remnants remaining in the space during the drawing adhere on the adhesive material, and can be removed together with the adhesive material when the semiconductor substrate is removed from the tape to form divided chips. Accordingly, the quality of the semiconductor device can be improved.
    Type: Grant
    Filed: September 6, 2005
    Date of Patent: March 3, 2009
    Assignee: DENSO CORPORATION
    Inventor: Takeshi Nagasaka
  • Patent number: 7490650
    Abstract: A workpiece processing device (10) for processing a workpiece (60; 20, 36) comprises: a surface protection film peeling means (50) for peeling a surface protection film (110), which is adhered to a front surface (21) of a workpiece, with a peeling tape (4); a bar code adhering means (11) for adhering a bar code (65) corresponding to the workpiece to the workpiece; and a movable support table (72) for supporting the workpiece. A peeling operation for peeling the surface protection film conducted by the surface protection film peeling means and a adhering operation for adhering a bar code conducted by the bar code adhering means are given to the workpiece while the workpiece is being supported by the support table. Due to the foregoing, it is possible to avoid failures when adhering the bar code to the workpiece, such as a wafer. The bar code adhering means may adhere the bar code, which corresponds to character information of the workpiece read out by an optical reading means, to the workpiece.
    Type: Grant
    Filed: May 22, 2007
    Date of Patent: February 17, 2009
    Assignee: Tokyo Seimitsu Co., Ltd.
    Inventors: Isamu Kawashima, Hideshi Sato, Hideo Kino, Minoru Ametani
  • Patent number: 7455332
    Abstract: The overcoat of a slider (alumina) is recessed relative to the slider ABS by a non-abrasive CMP process sufficiently to prevent thermal protrusion of the overcoat during subsequent slider use in a hard disk drive. The CMP process involves the oscillatory and rotational compressional contact between the ABS surface of the slider and a polymerically pre-treated compliant pad that is sprayed by an aqueous alkali lubricating solution having a pH between about 9 and 10. The overcoat is thereby also softened by the lubricating solution and removed by the compressional contact and no use of abrasives is required.
    Type: Grant
    Filed: November 16, 2005
    Date of Patent: November 25, 2008
    Assignee: SAE Magnetics (HK) Ltd.
    Inventors: Winston Jose, Rudy Ayala, Niraj Mahadev
  • Patent number: 7445688
    Abstract: A work piece pickup method is for sucking and holding a work piece attached on an adhesive sheet by means of a suction collet that is disposed above the work piece attached on the adhesive sheet in such a way as to be movable up and down for sucking and holding the work piece and a suction member that is disposed below the adhesive sheet in such a way as to be movable up and down so as to detach and transfer the work piece. The method comprises a sheet suction process for sucking and holding a lower surface of the adhesive sheet corresponding to the work piece by the suction member, and a work piece suction process for sucking and holding the work piece by the suction collet under a state in which the suction collet and the work piece are in a positional relationship spaced from each other so as to detach the work piece. A pickup apparatus and a mounting machine operate in accordance with the above method.
    Type: Grant
    Filed: May 17, 2004
    Date of Patent: November 4, 2008
    Assignee: TDK Corporation
    Inventors: Hidetoshi Suzuki, Osamu Shindo
  • Patent number: 7390742
    Abstract: The invention relates to a method for producing a rewiring printed circuit board with a substrate wafer having passage connections between a first and a second surface. One embodiment of the method comprises applying and patterning masking layers on the first and the second surfaces, thereby uncovering a first contact location on the first surface and a second contact location on the second surface; applying a protective layer to the second surface in order to protect the corresponding masking layer and the second contact location during subsequent method steps; applying a first conductor structure to the first surface, the first conductor structure on the first surface covering the first contact location; removing the protective layer on the second surface; and applying a second conductor structure to the second surface, the second conductor structure on the second surface covering the second contact location.
    Type: Grant
    Filed: October 14, 2005
    Date of Patent: June 24, 2008
    Assignee: Infineon Technologies AG
    Inventors: Axel Brintzinger, Stefan Ruckmich, Octavio Trovarelli, Fritz Uhlendorf, legal representative, David Wallis, Ingo Uhlendorf
  • Patent number: 7374584
    Abstract: The present invention provides an interconnects-forming method and an interconnects-forming apparatus which can minimize the lowering of processing accuracy in etching, minimize light exposure processing for the formation of interconnect recesses in the production of multi-level interconnects, improve the electromigration resistance of interconnects without impairing the electrical properties of the interconnects, and enhance the reliability of the device.
    Type: Grant
    Filed: April 6, 2007
    Date of Patent: May 20, 2008
    Assignee: Ebara Corporation
    Inventors: Xinming Wang, Daisuke Takagi, Akihiko Tashiro, Yukio Fukunaga, Akira Fukunaga
  • Patent number: 7371591
    Abstract: A process includes forming a protective layer in a region of a substrate including a PAD electrode; forming a soluble resin layer in a region including a region on the substrate where an energy generating element has been formed, for forming a liquid chamber; forming a coating resin layer in a region covering the soluble resin layer and a region where an opening is formed above the electrode; forming an opening in the coating resin layer above the energy generating element to form a nozzle; dipping the substrate in an dissolving liquid to dissolve the soluble resin layer; and removing the protective layer after dissolution of the soluble resin layer.
    Type: Grant
    Filed: December 9, 2005
    Date of Patent: May 13, 2008
    Assignee: Sony Corporation
    Inventor: Shogo Ono
  • Patent number: 7335605
    Abstract: In a protective tape applying and separating method according to this invention, a protective tape applied by a tape applying mechanism to a surface of a wafer suction-supported by a chuck table is cut to a wafer configuration by a cutter unit. Subsequently, a protective tape having a weaker adhesion than the first protective tape is applied to the protective tape. The protective tapes forming plies are separated one by one, the upper one first, by a tape separating apparatus 15 after a thinning process of the wafer.
    Type: Grant
    Filed: December 22, 2003
    Date of Patent: February 26, 2008
    Assignee: Nitto Denko Corporation
    Inventor: Masayuki Yamamoto
  • Patent number: 7306695
    Abstract: A semiconductor chip pick-up apparatus includes: a pick-up head for picking up the chip on a sheet; a holding table for holding the sheet; a recognition means for recognizing the chip; a positioning means for positioning the chip relatively to the pick-up head on the basis of the recognition result by the recognition means; and a sheet separating mechanism for separating the sheet from the chip by sucking the sheet from a suction plane brought in contact with a lower surface of the sheet.
    Type: Grant
    Filed: April 8, 2004
    Date of Patent: December 11, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Teruaki Kasai