Contact Formation (i.e., Metallization) Patents (Class 438/98)
  • Patent number: 8916415
    Abstract: A method for producing a metallic contact structure for making electrical contact with a photovoltaic solar cell, wherein, in order to create the contact structure, a paste, which contains metal particles, is applied to a surface of a carrier substrate via at least one dispensing opening, wherein the dispensing opening and the carrier substrate are moved in relation to one another during the dispensing of the paste. The paste is circulated in a circulating region, and in each case a part of the paste is branched off out of the circulating region at a plurality of branching points and each branching point is assigned at least one dispensing opening, via which the paste branched off at the branching point is applied to the surface of the carrier substrate, wherein the paste flows through a flow path having a length of less than 1 cm in each case between being branched off out of the circulating region and being dispensed from the dispensing opening assigned to the branching point.
    Type: Grant
    Filed: August 29, 2011
    Date of Patent: December 23, 2014
    Assignee: Fraunhofer-Gesellschaft zur Förderung der Angewandten Forschung E.V.
    Inventors: Daniel Biro, Jan Specht, Daniel Scheffler, Maximilian Pospischil, Florian Clement
  • Patent number: 8916409
    Abstract: An electronic device includes a substrate and a plurality of particles anchored to the substrate. An electrode material is formed over the particles and configured to form peaks over the particles. One or more operational layers are fog led over the electrode material for performing a device function.
    Type: Grant
    Filed: October 18, 2011
    Date of Patent: December 23, 2014
    Assignee: International Business Machines Corporation
    Inventors: Ahmed Abou-Kandil, Keith E. Fogel, Augustin J. Hong, Jeehwan Kim, Hisham S. Mohamed, Devendra K. Sadana
  • Publication number: 20140370623
    Abstract: An evaporation apparatus comprises a chamber configured to contain at least one dispensing nozzle and at least one substrate to be coated. The chamber has at least one adjustable shielding member defining an adjustable aperture. The member is positioned between the at least one dispensing nozzle and the at least one substrate. The aperture is adjustable in at least one of the group consisting of area and shape. The at least one adjustable shielding member has a heater.
    Type: Application
    Filed: June 13, 2013
    Publication date: December 18, 2014
    Inventors: Chung-Hsien WU, Chi-Yu CHIANG, Shih-Wei CHEN, Wen-Tsai YEN
  • Publication number: 20140370650
    Abstract: According to one aspect of the disclosed subject matter, a method for forming a monolithically isled back contact back junction solar cell using bulk wafers is provided. Emitter and base contact regions are formed on a backside of a semiconductor wafer having a light receiving frontside and a backside opposite said frontside. A first level contact metallization is formed on the wafer backside and an electrically insulating backplane is attached to the semiconductor wafer backside. Isolation trenches are formed in the semiconductor wafer patterning the semiconductor wafer into a plurality of electrically isolated isles and the semiconductor wafer is thinned. A metallization structure is formed on the electrically insulating backplane electrically connecting the plurality of isles.
    Type: Application
    Filed: February 12, 2014
    Publication date: December 18, 2014
    Applicant: Solexel, Inc.
    Inventors: Mehrdad M. Moslehi, Pawan Kapur, Karl-Josef Kramer, Michael Wingert
  • Publication number: 20140366935
    Abstract: A solar cell device with improved performance and a method of fabricating the same is described. The solar cell includes a back contact layer formed on a substrate, an absorber layer formed on the back contact layer, a buffer layer formed on the absorber layer, and a front contact layer formed by depositing a transparent conductive oxide layer on the buffer layer and annealing the deposited TCO layer.
    Type: Application
    Filed: June 14, 2013
    Publication date: December 18, 2014
    Inventors: Chi-Yu CHIANG, Yung-Sheng CHIU, Wen-Tsai YEN
  • Publication number: 20140366934
    Abstract: Another aspect of the present disclosure relates to a device including a substrate, having a top surface and a bottom surface; an array of nanowires having a base and a top surface, the base contacting the top surface of the substrate; a contacting structure including the same material as the substrate having a non-nanostructured surface of a dimension suitable for forming an electrical contact, located on the same side of the substrate as the array of silicon nanowires; wherein the contacting structure is doped with a greater impurity concentration than the nanowire array, thereby forming a selective emitter.
    Type: Application
    Filed: August 24, 2014
    Publication date: December 18, 2014
    Applicant: BANDGAP ENGINEERING, INC.
    Inventors: Faris MODAWAR, Marcie R. BLACK, Brian MURPHY, Jeff MILLER, Mike JURA
  • Publication number: 20140366942
    Abstract: Disclosed are a solar cell and a method of fabricating the same. The solar cell includes a molybdenum layer on a support substrate; an ohmic layer on the molybdenum layer; a light absorbing layer on the ohmic layer; and a front electrode layer on the light absorbing layer, wherein the ohmic layer comprises a first ohmic layer and a second ohmic layer having crystal structures different from each other.
    Type: Application
    Filed: December 13, 2012
    Publication date: December 18, 2014
    Inventor: Jin Woo Lee
  • Publication number: 20140366938
    Abstract: A wafer solar cell comprising a semiconductor layer, a back-side emitter layer, a passivation layer arranged on the emitter layer, openings being formed in said passivation layer, and a metallization layer arranged on the passivation layer, wherein the emitter layer, the passivation layer and/or the metallization layer substantially completely covers a solar cell back side, and wherein adjacent to each opening a doping region is formed which extends into the emitter layer and/or into the semiconductor layer and is doped by means of a metal from the metallization layer and/or from the passivation layer. Furthermore, the invention relates to a solar cell production method for producing such a wafer solar cell.
    Type: Application
    Filed: June 13, 2014
    Publication date: December 18, 2014
    Inventors: Stefan BORDIHN, Janko CIESLAK, Verena MERTENS, Florian STENZEL
  • Publication number: 20140370651
    Abstract: A semiconductor device includes a substrate made of a semiconductor material, an n-type semiconductor layer arranged on a portion of one principal surface of the substrate, and a p-type semiconductor layer arranged on a portion of the one principal surface of the substrate, the portion not provided with the n-type semiconductor layer. The n-type semiconductor layer includes a portion located right above the p-type semiconductor layer.
    Type: Application
    Filed: September 4, 2014
    Publication date: December 18, 2014
    Inventors: Takuo TOCHIHARA, Naoya SOTANI, Mitsuaki MORIGAMI
  • Patent number: 8912038
    Abstract: Methods of forming emitters for back-contact solar cells are described. In one embodiment, a method includes forming a first solid-state dopant source above a substrate. The first solid-state dopant source includes a plurality of regions separated by gaps. Regions of a second solid-state dopant source are formed above the substrate by printing.
    Type: Grant
    Filed: June 11, 2014
    Date of Patent: December 16, 2014
    Assignee: SunPower Corporation
    Inventors: Bo Li, Peter J. Cousins, David D. Smith
  • Patent number: 8912094
    Abstract: Provided is a method for manufacturing a stretchable thin film transistor. The method for manufacturing a stretchable thin film transistor includes forming a mold substrate, forming a stretchable insulator on the mold substrate, forming a flat substrate on the stretchable insulator, removing the mold substrate, forming discontinuous and corrugated wires on the stretchable insulator, forming a thin film transistor connected between the wires, and removing the flat substrate.
    Type: Grant
    Filed: March 18, 2013
    Date of Patent: December 16, 2014
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jae Bon Koo, Chan Woo Park, Soon-Won Jung, Sang Chul Lim, Ji-Young Oh, Bock Soon Na, Hye Yong Chu
  • Publication number: 20140360570
    Abstract: The manufacturing method of a solar cell includes forming a photoelectric conversion unit and forming an electrode connected to the photoelectric conversion unit. The step of forming the electrode includes forming a seed formation layer connected to the photoelectric conversion unit, forming an anti-oxidation layer on the seed formation layer, performing a thermal process such that a material of the seed formation layer and a material of the photoelectric conversion unit react with each other to form a chemical bonding layer at a portion at which the seed formation layer and the photoelectric conversion unit are adjacent to each other, forming a conductive layer and a capping layer on the seed formation layer in a state in which a mask is used on the seed formation layer, and patterning the seed formation layer using either the conductive layer or the capping layer as a mask.
    Type: Application
    Filed: June 4, 2014
    Publication date: December 11, 2014
    Inventors: Hayan BAEK, Junghoon CHOI, Goohwan SHIM
  • Publication number: 20140360584
    Abstract: A manufacturing method of a solar cell includes the following steps, providing a substrate, which includes a first conductivity type semi-conductor layer and a second conductivity type semi-conductor layer. The conductivity type of the first conductivity type semi-conductor layer is opposite to the conductivity type of the second conductivity type semi-conductor layer. A graphene oxide layer is formed on the substrate and the graphene oxide layer contacts with the second conductivity type semi-conductor layer. A first electrode and a second electrode are formed on the substrate. The first electrode contacts with the first conductivity type semi-conductor layer, and the second electrode contacts with the second conductivity type semi-conductor layer.
    Type: Application
    Filed: June 7, 2013
    Publication date: December 11, 2014
    Inventors: CHU-HSUAN LIN, WEN-TZU HSU, ZONG-SIAN TSAI, CHUN-TIEN YU
  • Patent number: 8906733
    Abstract: A method for creating a nanostructure according to one embodiment includes depositing material in a template for forming an array of nanocables; removing only a portion of the template such that the template forms an insulating layer between the nanocables; and forming at least one layer over the nanocables. A nanostructure according to one embodiment includes a nanocable having a roughened outer surface and a solid core. A nanostructure according to one embodiment includes an array of nanocables each having a roughened outer surface and a solid core, the roughened outer surface including reflective cavities; and at least one layer formed over the roughened outer surfaces of the nanocables, the at least one layer creating a photovoltaically active p-n junction. Additional systems and methods are also presented.
    Type: Grant
    Filed: October 25, 2010
    Date of Patent: December 9, 2014
    Assignees: Q1 Nanosystems, Inc., The Regents Of The University Of California
    Inventors: Ruxandra Vidu, Brian Argo, John Argo, Pieter Stroeve, Saif Islam, Jie-Ren Ku, Michael Chen
  • Patent number: 8906734
    Abstract: A photovoltaic device and method include a crystalline substrate and an emitter contact portion formed in contact with the substrate. A back-surface-field junction includes a homogeneous junction layer formed in contact with the crystalline substrate and having a same conductivity type and a higher active doping density than that of the substrate. The homogeneous junction layer includes a thickness less than a diffusion length of minority carriers in the homogeneous junction layer. A passivation layer is formed in contact with the homogeneous junction layer opposite the substrate, which is either undoped or has the same conductivity type as that of the substrate.
    Type: Grant
    Filed: October 22, 2012
    Date of Patent: December 9, 2014
    Assignee: International Business Machines Corporation
    Inventors: Tze-Chiang Chen, Bahman Hekmatshoartabari, Devendra K. Sadana, Davood Shahrjerdi
  • Publication number: 20140352751
    Abstract: A solar cell includes an absorber layer, a buffer layer on the absorber layer, a front contact layer where a glass substrate, a back contact layer on the glass substrate, the absorber layer on the back contact layer, the buffer layer, and the front contact layer are manufactured as a first module at a temperature exceeding 500 degrees Celsius. The solar further includes an extracted portion from the first module where the extracted portion includes the absorber layer, the buffer layer, and the front contact layer, and where the extracted portion is applied to a flexible substrate or other substrate.
    Type: Application
    Filed: May 31, 2013
    Publication date: December 4, 2014
    Inventors: Chung-Hsien WU, Wei-Lun XU, Shih-Wei CHEN, Wen-Tsai YEN, Li XU
  • Publication number: 20140352778
    Abstract: Paste compositions, methods of making a paste composition, solar cells, and methods of making a solar cell contact are disclosed. The paste composition can include a conductive metal component, a glass component, and a vehicle. The glass component can include SiO2 at about 3 mole % or more and about 65 mole % or less of the glass component and one or more transition metal oxides at about 0.1 mole % or more and about 25 mole % or less of the glass component. The metal of the transition metal oxide is selected from the group consisting of Mn, Fe, Co, Ni, Cu, Ti, V, Cr, W, Nb, Ta, Hf, Mo, Zr, Rh, Ru, Pd, and Pt.
    Type: Application
    Filed: December 21, 2012
    Publication date: December 4, 2014
    Inventors: Yi Yang, Srinvasan Sridharan, Umesh Kumar, Aziz Shaikh
  • Publication number: 20140352774
    Abstract: A method of manufacturing a solar electrode comprising steps of:(a) stencil printing a conductive paste onto a front side of a semiconductor substrate through a printing mask comprising: (i) 60 wt % to 95 wt % of a conductive powder, (ii) 0.1 wt % to 10 wt % of glass frit, (iii) 3 wt % to 30 wt % of an organic medium, (iv) 0.4 wt % to 1.7 wt % of an amide compound, based on the total weight of the conductive paste and (b) firing the applied conductive paste to form an electrode.
    Type: Application
    Filed: May 19, 2014
    Publication date: December 4, 2014
    Applicant: E I DU PONT DE NEMOURS AND COMPANY
    Inventors: KAZUSHIGE ITO, JEAN YANG
  • Publication number: 20140352755
    Abstract: A radio frequency transparent photovoltaic cell includes a back contact layer formed of an electrically conductive material, at least one aperture formed in the back contact layer, and at least one photovoltaic cell section disposed on the back contact layer. An airship includes one or more radio frequency antennas disposed in an interior of the airship. One or more radio frequency transparent photovoltaic cells are disposed on an outer surface of the airship.
    Type: Application
    Filed: August 14, 2014
    Publication date: December 4, 2014
    Inventors: Daniel F. Sievenpiper, Michael Wechsberg, Fangchou Yang
  • Publication number: 20140352768
    Abstract: A method of manufacturing a solar electrode comprising steps of: (a) stencil printing a conductive paste onto a front side of a semiconductor substrate through a printing mask comprising, (i) 60 wt % to 95 wt % of a conductive powder, (ii) 0.1 wt % to 10 wt % of glass frit, (iii) 3 wt % to 30 wt % of an organic medium, (iv) 0.4 wt % to 1.7 wt % of polyamide, based on the total weight of the conductive paste and (b) firing the applied conductive paste to form an electrode.
    Type: Application
    Filed: May 31, 2013
    Publication date: December 4, 2014
    Inventors: KAZUSHIGE ITO, JEAN YANG
  • Publication number: 20140357014
    Abstract: A solar cell including a base of single crystal silicon with a cubic crystal structure and a single crystal layer of a second material with a higher bandgap than the bandgap of silicon. First and second single crystal transition layers are positioned in overlying relationship with the layers graduated from a cubic crystal structure at one surface to a hexagonal crystal structure at an opposed surface. The first and second transition layers are positioned between the base and the layer of second material with the one surface lattice matched to the base and the opposed surface lattice matched to the layer of second material.
    Type: Application
    Filed: May 30, 2013
    Publication date: December 4, 2014
    Inventors: MICHAEL LEBBY, Andrew Clark
  • Publication number: 20140352752
    Abstract: A solar cell including a substrate and a plurality of electrically connected unit cells on the substrate. A unit cell of the unit cells includes a first electrode, a light absorbing layer, and a second electrode, sequentially stacked. Adjacent unit cells of the unit cells are separated by an isolation region. The isolation region is between the light absorbing layers of the adjacent unit cells and between the second electrodes of the adjacent unit cells. A cross-section of the isolation region has step-shaped patterns in a direction perpendicular to the substrate, and the step-shaped patterns oppose one another. A method of manufacturing the solar cell includes sequentially stacking a first electrode, a light absorbing layer, and a second electrode on a substrate, and forming an isolation region in the light absorbing layer and the second electrode.
    Type: Application
    Filed: January 27, 2014
    Publication date: December 4, 2014
    Applicant: Samsung SDI Co., Ltd.
    Inventors: Young-Su Kim, Min-Kyu Kim, Su-Yeon Kim, Ku-Hyun Kang
  • Publication number: 20140357015
    Abstract: A method of manufacturing a lead wire for a solar cell includes heating a wire material by a direct resistance heating or by an induction heating to reduce a 0.2% proof stress of the wire material while conveying the wire material and plating the wire material that is in a heated condition obtained by the direct resistance heating or by the induction heating while further conveying the wire material. An apparatus is configured to implement the method, and includes a plating bath, a conveyor mechanism configured to convey the wire material, a heater configured to heat the wire material, and a controller configured to control the conveyor mechanism and the heater.
    Type: Application
    Filed: September 28, 2012
    Publication date: December 4, 2014
    Inventors: Yoshiki Seto, Kunihiro Kobayashi, Nobumoto Ishiki, Hisaak Watanabe
  • Publication number: 20140352780
    Abstract: A solar cell includes a photoelectric conversion body having principal surface with rugged structures and an electrode on the principal surface. The electrode includes first conductive materials, second conductive materials and resin. The second conductive materials are flat-shaped so that an aspect ratio of the second conductive materials, which is a ratio of a major axis diameters to their average thickness (the major axis diameter divided by the average thickness), is larger than that of the first conductive materials. In the electrode, a volume fraction of the second conductive materials is larger than that of the first conductive materials. The rugged structures include rugged structures which are larger than an average particle size of the first conductive materials, but smaller than an average major axis diameter of the second conductive materials.
    Type: Application
    Filed: August 14, 2014
    Publication date: December 4, 2014
    Inventor: Takeshi NISHIWAKI
  • Patent number: 8900996
    Abstract: A method of fabricating a through silicon via (TSV) structure is provided, in which, a first dielectric layer is formed on the substrate, the first dielectric layer is patterned to have at least one first opening, a via hole is formed in the first dielectric layer and the substrate, a second dielectric layer is conformally formed on the first dielectric layer, the second dielectric layer has at least one second opening corresponding to the at least one first opening, and the second dielectric layer covers a sidewall of the via hole. A conductive material layer is formed to fill the via hole and the second opening. The conductive material layer is planarized to form a TSV within the via hole. A TSV structure is also provided, in which, the second dielectric layer is disposed within the first opening and on the sidewall of the via hole.
    Type: Grant
    Filed: June 21, 2012
    Date of Patent: December 2, 2014
    Assignee: United Microelectronics Corp.
    Inventors: Hsin-Yu Chen, Home-Been Cheng, Yu-Han Tsai, Ching-Li Yang
  • Patent number: 8900906
    Abstract: In one embodiment, a method of forming a semiconductor device includes providing a substrate, forming a sacrificial layer above the substrate layer, forming a first trench in the sacrificial layer, forming a first sidewall layer with a thickness of less than about 50 nm on a first sidewall of the first trench using atomic layer deposition (ALD), and removing the sacrificial layer.
    Type: Grant
    Filed: March 8, 2012
    Date of Patent: December 2, 2014
    Assignee: Robert Bosch GmbH
    Inventors: Gary Yama, Fabian Purkl, Matthieu Liger, Matthias Illing
  • Publication number: 20140345685
    Abstract: A photovoltaic cell comprises a base substrate comprising silicon and including a rear region. A first electrode is disposed on, and is in electrical communication with, the rear region, and comprises a first metal present in the first electrode in a majority amount. A second electrode is spaced from the rear region such that the rear region is free of physical contact with the second electrode. The second electrode is in electrical contact with the first electrode. The second electrode comprises a polymer, a second metal present in the second electrode in a majority amount, and a third metal different from the first and second metals. The third metal has a melting temperature of no greater than about 300° C. The rear region is in electrical communication with the second electrode via the first electrode. A method of forming the PV cell is also provided.
    Type: Application
    Filed: December 13, 2012
    Publication date: November 27, 2014
    Inventors: John D. Albaugh, Guy Damien Serge Beaucarne, Nicholas E. Powell, Adriana Petkova Zambova
  • Publication number: 20140345673
    Abstract: Photovoltaic sub-cell interconnect systems and methods are provided. In one embodiment, a photovoltaic device comprises a thin film stack of layers deposited upon a substrate, wherein the thin film stack layers are subdivided into a plurality of sub-cells interconnected in series by a plurality of electrical interconnection structures; and wherein the plurality of electrical interconnection structures each comprise no more than two scribes that penetrate into the thin film stack layers.
    Type: Application
    Filed: May 21, 2014
    Publication date: November 27, 2014
    Applicant: Alliance for Sustainable Energy, LLC
    Inventors: Marinus Franciscus Antonius Maria van Hest, Heather Anne Swinger Platt
  • Publication number: 20140349442
    Abstract: A thin film type solar cell and a method for manufacturing the same is disclosed, the thin film type solar cell including a front electrode formed on a substrate; a semiconductor layer formed on the front electrode; a transparent conductive layer formed on the semiconductor layer; a rear electrode formed over the transparent conductive layer; and a buffer layer, formed between the transparent conductive layer and the rear electrode, for reducing an electric resistance of the rear electrode and enhancing an adhesive strength between the transparent conductive layer and the rear electrode.
    Type: Application
    Filed: August 7, 2014
    Publication date: November 27, 2014
    Applicant: JUSUNG ENGINEERING CO., LTD.
    Inventor: Jae Ho KIM
  • Publication number: 20140350375
    Abstract: An optrode may provide a cylindrical substrate two or more electrodes deposited said cylindrical substrate. The cylindrical substrate and electrodes may be coated by an insulating layer with openings or vias over certain portions of the electrodes that may provide a contact for the neural probe or may be utilized to connect lead lines. Manufacturing of an optrode may utilize a jig that secures a cylindrical substrate coated by a conductive material and a resist. A first mask may be positioned in an opening provided by the jig, and the cylindrical substrate may be exposed ions or neutral particles to define one or more electrode patterns. After regions of the resist and conductive material are removed to form the electrodes, a second mask may be utilized to define vias regions in which portions of the electrodes are exposed and uncoated by an insulating layer.
    Type: Application
    Filed: May 27, 2014
    Publication date: November 27, 2014
    Applicants: University of Houston, Vanderbilt University
    Inventors: John C. Wolfe, Mufaddal Gheewala, Wei-Chuan Shih, Gopathy Purushothaman
  • Publication number: 20140349441
    Abstract: One embodiment of the present invention provides a solar cell. The solar cell includes a photovoltaic structure, a transparent-conductive-oxide (TCO) layer situated above the photovoltaic structure, and a front-side metal grid situated above the TCO layer. The TCO layer is in contact with the front surface of the photovoltaic structure. The metal grid includes at least one of: Cu and Ni.
    Type: Application
    Filed: August 7, 2014
    Publication date: November 27, 2014
    Inventors: Jianming Fu, Zheng Xu, Chentao Yu, Jiunn Benjamin Heng
  • Patent number: 8895351
    Abstract: The present invention generally includes an apparatus and process of forming a conductive layer on a surface of a host substrate, which can be directly used to form a portion of an electronic device. More specifically, one or more of the embodiments disclosed herein include a process of forming a conductive layer on a surface of a substrate using an electrospinning type deposition process. Embodiments of the conductive layer forming process described herein can be used to reduce the number of processing steps required to form the conductive layer, improve the electrical properties of the formed conductive layer and reduce the conductive layer formation process complexity over current state-of-the-art conductive layer formation techniques. Typical electronic device formation processes that can benefit from one or more of the embodiments described herein include, but are not limited to processes used to form solar cells, electronic visual display devices and touchscreen type technologies.
    Type: Grant
    Filed: October 19, 2012
    Date of Patent: November 25, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Kurtis Leschkies, Steven Verhaverbeke, Robert Visser
  • Patent number: 8895350
    Abstract: A method for forming a nanostructure according to one embodiment includes creating a hole in an insulating layer positioned over an electrically conductive layer; and forming a nanocable in the hole such that the nanocable extends through the hole in the insulating layer and protrudes therefrom, the nanocable being in communication with the electrically conductive layer. Additional systems and methods are also presented.
    Type: Grant
    Filed: July 24, 2009
    Date of Patent: November 25, 2014
    Assignees: Q1 Nanosystems, Inc, The Regents of the University of California
    Inventors: Brian Argo, Ruxandra Vidu, Pieter Stroeve, John Argo, Saif Islam, Jie-Ren Ku, Michael Chen
  • Patent number: 8895342
    Abstract: Inverted metamorphic multijunction solar cells having a heterojunction middle subcell and a graded interlayer, and methods of making same, are disclosed herein. The present disclosure provides a method of manufacturing a solar cell using an MOCVD process, wherein the graded interlayer is composed of (InxGa1-x)yAl1-yAs, and is formed in the MOCVD reactor so that it is compositionally graded to lattice match the middle second subcell on one side and the lower third subcell on the other side, with the values for x and y computed and the composition of the graded interlayer determined so that as the layer is grown in the MOCVD reactor, the band gap of the graded interlayer remains constant at 1.5 eV throughout the thickness of the graded interlayer.
    Type: Grant
    Filed: May 17, 2012
    Date of Patent: November 25, 2014
    Assignee: Emcore Solar Power, Inc.
    Inventors: Mark A. Stan, Arthur Cornfeld
  • Patent number: 8895844
    Abstract: A method for forming a solar cell having a plasmonic back reflector is disclosed. The method includes the formation of a nanoimprinted surface on which a metal electrode is conformally disposed. The surface structure of the nanoimprinted surface gives rise to a two-dimensional pattern of nanometer-scale features in the metal electrode enabling these features to collectively form the plasmonic back reflector.
    Type: Grant
    Filed: November 29, 2011
    Date of Patent: November 25, 2014
    Assignee: The Board of Trustees of the Leland Stanford Junior University
    Inventors: I-Kang Ding, Jia Zhu, Yi Cui, Michael David McGehee
  • Publication number: 20140338747
    Abstract: Discussed is a solar cell including a semiconductor substrate including a base area and a doping area, a doping layer formed on the semiconductor substrate, the doping layer having a conductive type different from the doping area, a tunneling layer interposed between the doping layer and the semiconductor substrate, a first electrode connected to the doping area, and a second electrode connected to the doping layer.
    Type: Application
    Filed: May 15, 2014
    Publication date: November 20, 2014
    Applicant: LG ELECTRONICS INC.
    Inventors: Minho CHOI, Hyunjung PARK, Junghoon CHOI, Youngho CHOE
  • Publication number: 20140338738
    Abstract: A solar cell includes a substrate of a first conductive type, a first doped region positioned at a first surface of the substrate and contains impurities of a second conductive type different from the first conductive type, and a first electrode part electrically connected to the first doped region. The first electrode part includes a thermosetting resin, and first and second conductive particles distributed in the thermosetting resin. The second conductive particles have a work function greater than the first conductive particles and form silicide at an interface contacting the first doped region.
    Type: Application
    Filed: March 20, 2014
    Publication date: November 20, 2014
    Applicant: LG Electronics Inc.
    Inventors: Jeongbeom Nam, Mihee Heo, Eunjoo Lee, Ilhyoung Jung
  • Patent number: 8889470
    Abstract: A thin film type solar cell and a method for manufacturing the same is disclosed, wherein the method comprises sequentially depositing a front electrode layer and a semiconductor layer on a substrate; forming a first separating channel by removing predetermined portions of the front electrode layer and the semiconductor layer; forming a contact portion and a second separating channel by removing predetermined portions of the semiconductor layer; forming a first insulating layer in the first separating channel; and forming a plurality of rear electrodes at fixed intervals by each second separating channel interposed in-between, wherein each rear electrode is electrically connected with the front electrode layer through the contact portion. The present invention needs only one cleaning process after carrying out the laser-scribing process, whereby the yield can be improved owing to the simplified manufacturing process.
    Type: Grant
    Filed: June 11, 2009
    Date of Patent: November 18, 2014
    Assignee: Jusung Engineering Co., Ltd.
    Inventors: Jae Ho Kim, Chul Ju Hwang
  • Patent number: 8889471
    Abstract: For solar cell fabrication, the addition of precursors to printable media to assist etching through silicon nitride or silicon oxide layer thus affording contact with the substance underneath the nitride or oxide layer. The etching mechanism may be by molten ceramics formed in situ, fluoride-based etching, as well as a combination of the two.
    Type: Grant
    Filed: May 7, 2012
    Date of Patent: November 18, 2014
    Assignee: Sichuan Yinhe Chemical Co., Ltd.
    Inventors: Ovadia Abed, Yunjun Li, James P. Novak, Samuel Kim, Patrick Ferguson
  • Patent number: 8889041
    Abstract: Formulations and methods of making solar cells are disclosed. In general, the invention presents a solar cell contact made from a mixture wherein the mixture comprises a solids portion and an organics portion, wherein the solids portion comprises from about 85 to about 99 wt % of silver, and from about 1 to about 15 wt % of a glass component wherein the glass component comprises from about 15 to about 75 mol % PbO, and from about 5 to about 50 mol % SiO2, and preferably with no B2O3.
    Type: Grant
    Filed: October 5, 2009
    Date of Patent: November 18, 2014
    Assignee: Heraeus Precious Metals North America Conshohocken LLC
    Inventors: Srinivasan Sridharan, Tung Pham, Chandrashekhar S. Khadilkar, Aziz S. Shaikh
  • Publication number: 20140332068
    Abstract: A process is provided for contacting a nanostructured surface. The process may include (a) providing a substrate having a nanostructured material on a surface, (b) passivating the surface on which the nanostructured material is located, (c) screen printing onto the nanostructured surface and (d) firing the screen printing ink at a high temperature. In some embodiments, the nanostructured material compromises silicon. In some embodiments, the nanostructured material includes silicon nanowires. In some embodiments, the nanowires are around 150 nm, 250 nm, or 400 nm in length. In some embodiments, the nanowires have a diameter range between about 30 nm and about 200 nm. In some embodiments, the nanowires are tapered such that the base is larger than the tip. In some embodiments, the nanowires are tapered at an angle of about 1 degree, about 3 degrees, or about 10 degrees. In some embodiments, a high temperature can be approximately 700C, 750C, 800C, or 850C.
    Type: Application
    Filed: July 23, 2014
    Publication date: November 13, 2014
    Applicant: BANDGAP ENGINEERING, INC.
    Inventors: Michael Jura, Marcie R. Black, Jeff Miller, Joanne Yim, Joanne Forziati, Brian Murphy, Richard Chleboski
  • Publication number: 20140332759
    Abstract: According to various embodiments, an electrode may include at least one layer including a chemical compound including aluminum and titanium.
    Type: Application
    Filed: May 13, 2013
    Publication date: November 13, 2014
    Applicant: Infineon Technologies Dresden GmbH
    Inventors: Dirk Meinhold, Sven Schmidbauer, Markus Fischer, Norbert Urbansky
  • Publication number: 20140332757
    Abstract: A set of buried electrodes are embedded in a dielectric material layer, and a graphene layer having a doping of a first conductivity type are formed thereupon. A first upper electrode is formed over a center portion of each buried electrode. Second upper electrodes are formed in regions that do not overlie the buried electrodes. A bias voltage is applied to the set of buried electrodes to form a charged region including minority charge carriers over each of the buried electrodes, and to form a p-n junction around each portion of the graphene layer overlying a buried electrode. Charge carriers generated at the p-n junctions are collected by the first upper electrodes and the second upper electrodes, and are subsequently measured by a current measurement device or a voltage measurement device.
    Type: Application
    Filed: May 10, 2013
    Publication date: November 13, 2014
    Applicant: International Business Machines Corporation
    Inventors: Phaedon Avouris, Tony A. Low, Fengnian Xia
  • Publication number: 20140332072
    Abstract: A photovoltaic (PV) cell comprises a base substrate comprising silicon and including an upper doped region. A coating layer is disposed on the upper doped region and has an outer surface. Fingers are disposed in the coating layer. Each finger has a lower portion in electrical contact with the upper doped region, and an upper portion extending outwardly through the outer surface. Each finger comprises a first metal. A busbar is spaced from the upper doped region, which is free of physical contact with the busbar. The busbar is in electrical contact with the upper portions of the fingers. The busbar comprises a second metal and a third metal different from the first and second metals. The third metal has a melting temperature of no greater than about 300° C. A method of forming the PV cell is also provided.
    Type: Application
    Filed: December 13, 2012
    Publication date: November 13, 2014
    Inventors: Guy Damien Serge Beaucarne, Jorg (or Joerg) Horzel, Nicholas E. Powell, Loic Tous, Donald Adriaan Wood, Adriana Petkova Zambova
  • Publication number: 20140335651
    Abstract: A silicon solar cell is formed with an N-type silicon layer on a P-type silicon semiconductor substrate. An aluminum ink composition is printed on the back of the silicon wafer to form back contact electrodes. The back contact electrodes are sintered to produce an ohmic contact between the electrodes and the silicon layers. The aluminum ink composition may include aluminum powders, a vehicle, an inorganic polymer, and a dispersant. Other electrodes on the solar cell can be produced in a similar manner with the aluminum ink composition.
    Type: Application
    Filed: July 25, 2014
    Publication date: November 13, 2014
    Inventors: Yunjun LI, Peter B. LAXTON, James P. NOVAK, David Max ROUNDHILL
  • Publication number: 20140335650
    Abstract: A set of buried electrodes are embedded in a dielectric material layer, and a graphene layer having a doping of a first conductivity type are formed thereupon. A first upper electrode is formed over a center portion of each buried electrode. Second upper electrodes are formed in regions that do not overlie the buried electrodes. A bias voltage is applied to the set of buried electrodes to form a charged region including minority charge carriers over each of the buried electrodes, and to form a p-n junction around each portion of the graphene layer overlying a buried electrode. Charge carriers generated at the p-n junctions are collected by the first upper electrodes and the second upper electrodes, and are subsequently measured by a current measurement device or a voltage measurement device.
    Type: Application
    Filed: September 16, 2013
    Publication date: November 13, 2014
    Applicant: International Business Machines Corporation
    Inventors: Phaedon Avouris, Tony A. Low, Fengnian Xia
  • Patent number: 8883638
    Abstract: A method for manufacturing a damascene structure includes providing a substrate having a dielectric layer formed thereon, forming at least a trench in the dielectric layer, forming at least a via hole and a dummy via hole in the dielectric layer, forming a first conductive layer filling up the trench, the via hole and the dummy via hole on the substrate, and performing a chemical mechanical polishing process to form a damascene structure and simultaneously to remove the dummy via hole.
    Type: Grant
    Filed: January 18, 2012
    Date of Patent: November 11, 2014
    Assignee: United Microelectronics Corp.
    Inventors: En-Chiuan Liou, Chih-Wei Yang, Chih-Sen Huang, Chan-Yuan Hu, Ssu-I Fu
  • Patent number: 8883552
    Abstract: Methods of fabricating metal wrap through solar cells and modules for thin silicon solar cells, including epitaxial silicon solar cells, are described. These metal wrap through solar cells have a planar back contact geometry for the base and emitter contacts. Fabrication of a metal wrap through solar cell may comprise: providing a photovoltaic device attached at the emitter side of the device to a solar glass by an encapsulant, the device including busbars on the device emitter; forming vias through the device base and emitter, the vias terminating in the busbars; depositing a conformal dielectric film over the surface of the vias and the back surface of the base; removing portions of the conformal dielectric film from the ends of the vias for exposing the busbars and from field areas of the base; and forming separate electrical contacts to the busbars and the field areas on the back surface of the solar cell.
    Type: Grant
    Filed: August 11, 2011
    Date of Patent: November 11, 2014
    Assignee: Crystal Solar Inc.
    Inventors: Ashish Asthana, Tirunelveli S. Ravi, Kramadhati V. Ravi, Somnath Nag
  • Patent number: 8884157
    Abstract: A method for manufacturing an optoelectronic device includes steps of: providing an optoelectronic structure; forming a first metal contact layer having a pattern on the upper surface of the optoelectronic structure; forming a dielectric layer on the first metal contact layer and the optoelectronic structure; removing the dielectric layer on the first metal contact layer; and forming an electrode structure on the first metal contact layer.
    Type: Grant
    Filed: May 11, 2012
    Date of Patent: November 11, 2014
    Assignee: Epistar Corporation
    Inventors: Yi-Hung Lin, Yu-Chih Yang, Wu-Tsung Lo
  • Patent number: 8884154
    Abstract: A thin-film solar module contacted on one side includes a support layer, a photoactive absorber layer and at least one dopant layer deposited over a surface area of at least one side of the absorber layer so as to form a thin-film packet that is divided into thin-film solar cell areas by insulating separating trenches. The thin-film solar module includes first and second contact systems. The first contact system includes contacts connected by an outer contact layer. The second contact system consists of an inner contact layer covering a side of the solar cell areas that face away from the support layer so as to separately discharge excess charge carriers generated by incident light in the absorber layer. The second contact system includes structures that surround and electrically insulate the contacts, which extend through the inner contact layer from the outer contact layer.
    Type: Grant
    Filed: July 11, 2009
    Date of Patent: November 11, 2014
    Assignee: Helmholtz-Zentrum Berlin fuer Materialien und Energie GmbH
    Inventors: Rolf Stangl, Klaus Lips, Bernd Rech