Abstract: The envelope detector for detecting an envelope of a digital modulation signal in accordance with an embodiment of the present invention, includes: a mixer configured to receive the digital modulation signal and output a square signal squaring the digital modulation signal when being applied with bias voltage; a bias voltage applying unit configured to apply the bias voltage to the mixer; and a DC blocking capacitor configured to be connected to the mixer to block DC component included in the square signal. In accordance with the embodiment of the present invention, it is possible to provide the envelope detector having the simple structure while having the good receiving sensitivity and the wide dynamic range characteristics and detect the envelope of the modulated signal without transmitting the carrier signal in the transmitter and generating the separate signal in the receiver, thereby saving the costs consumed to implement the transceiver.

Abstract: Disclosed is a radio frequency signal receiving device, which includes a low-noise amplifier (LNA) and a mixer. The LNA includes a first inductor and a second inductor. The mixer has a first differential pair and a second differential pair, common ends of the first differential pair and the second differential pair are respectively coupled to the first differential output end and the second differential output end. The first inductor and the second inductor are serially connected between the first differential output end and the second differential output end of the LNA, so as to reduce power consumption and reach suitable frequency response. The first inductor and the second inductor generate a resonance effect with parasitic capacitance on the mixer, so as to effectively reduce flicker noises, and improve a working benefit of the radio frequency signal receiving device.

Abstract: A mixer for providing a mixed signal by mixing an input signal and an oscillation signal, comprising a follower and a switch. The follower is arranged to conduct a driving contribution from a bias terminal to an output terminal following a signal at an input terminal, wherein the input terminal and the bias terminal are respectively coupled to the input signal and the oscillation signal, and the output terminal is arranged to output the mixed signal. The switch is arranged to selectively conduct the output terminal to a reference level in response to alternating of the oscillation signal. An associated signal circuit is also disclosed.

Abstract: In accordance with some embodiments, methods for controlling the second order intercept point in a receiver are provided, the methods comprising: generating an amplitude modulated test tone; causing the test tone to be received by a receiver; determining a characteristic of a second order intercept point of the receiver based on the received test tone; and based on the characteristic, adjusting a parameter of the receiver. In accordance with some embodiments, systems for controlling the second order intercept point in a receiver are provided, the systems comprising: a test tone generator that generates an amplitude modulated test tone; a receiver that receives the test tone; a correlator that determines a characteristic of a second order intercept point of the receiver based on the received test tone; and digital logic that, based on the characteristic, adjusts a parameter of the receiver.

Abstract: A system can include an input signal source, a local oscillator (LO), and an intermediate frequency (IF) receiver to receive an input signal from the input signal source and an LO signal from the LO. The IF receiver can include a switch to switch between the first and second inputs to provide an output. The IF receiver can generate a calibration signal from the LO signal.

Abstract: A frequency up and down converter, in which, when down converting a high frequency signal into an intermediate frequency signal or up converting an intermediate frequency signal into a high frequency signal by controlling switching elements using a local oscillator signal, a signal with a frequency to be converted is controlled a number of times during one cycle of the local oscillator signal, whereby the local oscillator signal with a frequency lower than an original frequency may be used. Transistors are added in parallel to switching transistors disposed in a frequency down conversion unit or a frequency up conversion unit, and local oscillator signals with predetermined phases and pulse widths are provided to the gates of the transistors such that a high frequency signal or an intermediate frequency signal is transferred to an output terminal at least two times during one cycle of a local oscillator signal.

Abstract: A high frequency mixer with a tunable dynamic range is disclosed. One embodiment provides a mixer apparatus including multiple first transistors at an input branch that receive a differential radio frequency (RF) signal, and multiple second transistors at a second branch that receive a differential local oscillator (LO) signal. The second transistors generate an intermediate frequency (IF) differential output signal. The bias current that flows at the input branch and the output branch can be independently adjusted to allow the conversion gain, linearity, or the output noise of the mixer to be controlled.

Abstract: The present invention is applied to a frequency converter used for a receiver. The frequency converter according to the present invention includes an LO signal generator (11) that generates an LO signal and outputs the LO signal; and a mixer (10) that multiplies a received signal that has been band-limited in a usable bandwidth of said receiver by the LO signal so as to convert the frequency of the received signal and outputs the resultant signal, wherein said LO signal generator is capable of varying a phase resolution, and said frequency converter is capable of varying a signal gain for each phase value of the LO signal.

Abstract: According to an embodiment, a semiconductor circuit includes a substrate, a tunnel oxide film, a charge storage film, a blocking layer, and plural nodes. The substrate is made of a semiconductor in which two diffusion layers each serving as either a source or a drain are formed. The tunnel oxide film is formed on a region of the substrate between the diffusion layers. The charge storage film is formed on the tunnel oxide layer and stores charge. The blocking layer is formed between the charge storage film and a gate electrode and has layers of a first oxide film, a nitride film and a second oxide film to have a thickness of 5 nm or larger but 15 nm or smaller. The nodes allow external application of voltages so that the source and the drain are reversed and allow detection a gate voltage, a drain current and a substrate current.

Abstract: A 4-phase filter includes four filter units including resistors and capacitors which inputs input signals, and provides the input signal via a switch buffer to a secondary capacitor provided in parallel to a primary capacitance of each filter unit, thus enabling a shift of an operational frequency band according to whether or not the switch buffer is in an output-high-impedance state.

Abstract: A circuit used in a mixer configured to receive a signal made up of a relatively small modulation signal and a relatively large carrier signal is described. The mixer includes multiple switches. A balancing circuit configured to receive a supply voltage and a clocking signal is provided, and the balancing circuit provides a control signal to a switch in the mixer. The balancing circuit includes a capacitor configured to receive and selectively dissipate charge as a gate voltage along a gate path. The control signal causes switching of the switch in the mixer at times in accordance with the clocking signal according to a voltage difference value between a source voltage and the gate voltage, wherein the voltage difference value between the source voltage and the gate voltage is approximately a predetermined voltage value greater than a turn on voltage level of the switch.

Abstract: Apparatus for generating a plurality of radio-frequency RF subcarrier signals for transmission between two adjacent ultra-high frequency UHF broadcast channels comprises a signal generator for generating a plurality of local oscillator LO signals, and a plurality of mixers each arranged to mix one of the LO signals with one of a plurality of input signals to generate one of the RF subcarrier signals, said input signal including information to be transmitted by said RF subcarrier signal. Variable gain amplifiers can be provided to independently amplify the RF subcarrier signals before they are combined. The LO signals can have the same frequency and the input signals can have different frequencies, or the LO signals can have different frequencies and the input signals can have the same frequency. A second LO signal with a different frequency to a first LO signal can be obtained by dividing a reference frequency by a predetermined value and mixing with the first LO signal.

Abstract: A return-type current-reuse mixer having a transconductance/amplification stage, a mixing stage, and a high-pass and a low-pass filter network. The transconductance/amplification stage has a current-reuse CMOS topology wherein an input frequency signal is converted into a frequency current, low-frequency components are removed from the frequency current by the high-pass filter network, the frequency current is fed into the mixing stage, modulation occurs in the mixing stage, and then an intermediate-frequency signal is generated and output. Once high-frequency components are removed from the intermediate-frequency signal by the low-pass filter network, the intermediate-frequency signal is sent again for input into the transconductance/amplification stage, then amplified in the transconductance/amplification stage and output. The mixer transconductance/amplification stage employs a current-reuse technique.

Abstract: The invention relates to a complex intermediate frequency (CIF) mixer stage, methods of operation thereof, and methods of calibration thereof. The CIF mixer stage comprises numerous individual mixers driven by IF clock signals to down-convert received IF signals into a set of signals at baseband frequency which are further combined to form a lower side band signal and an upper side band signal. The IF clock signals used have a predefined phase relationship among them, which involves tuneable phase skews. By calibration of the conversion gains and the phases of the IF clock signals the gain and phase imbalance introduced in a preceding radio frequency mixer stage and/or the CIF mixer stage can be cancelled. Further, in-channel IQ leakage control can be applied to the lower side band signal and/or the upper side band signal. The CIF mixer stage can thus effectively suppress image interference and IQ leakage.

Abstract: A carrier frequency offset compensation method for a communication system is provided. The method includes: mixing, filtering and interpolating an input signal according to a mixing parameter, a first filtering parameter and a first interpolation parameter, respectively, to generate a processed result; calculating a carrier frequency offset estimation value of the input signal according to the processed result; adjusting the mixing parameter according to the carrier frequency offset estimation value; and mixing, filtering and interpolating the input signal according to the adjusted mixing parameter, a second filtering parameter and a second interpolation parameter, respectively. The first interpolation parameter is associated with a cut-off frequency corresponding to the first filtering parameter.

Abstract: A multi-mode receiver is disclosed that is reconfigurable to share a local oscillator signal in diversity mode to save power consumption. In an exemplary embodiment, an apparatus includes a primary receiver having a primary mixer configured to down-convert a primary signal and a secondary mixer configured to down-convert a secondary signal in carrier aggregation mode. The apparatus also includes a supplemental mixer that uses a shared primary local oscillator (LO) signal generated by a shared primary frequency synthesizer in diversity mode to reduce power consumption. The apparatus further includes a controller configured to disable the secondary mixer and to enable the supplemental mixer to down-convert the secondary signal when operating in the diversity mode.

Abstract: A radio frequency receiver for receiving an analog radio frequency signal, the radio frequency receiver comprising a sampling mixer being configured to sample the analog radio frequency signal using a predetermined sampling rate (fs) to obtain a discrete-time signal, and to shift the discrete-time signal towards an intermediate frequency to obtain an intermediate discrete-time signal sampled at the predetermined sampling rate (fs), and a processing circuit for discrete-time processing the intermediate discrete-time signal at the predetermined sampling rate (fs).

Abstract: Embodiments of a radio frequency (RF) circuit provide translational filtering in accordance with an input impedance response that is an impedance image of a reactive circuit impedance response from a poly phase reactive circuit. The RF circuit may include a first mixer circuit that provides a first frequency offset for the impedance image and a second mixer circuit that provides an additional frequency offset. Accordingly, the second mixer circuit may allow for adjustments to a total frequency offset of the impedance image. The second mixer circuit may also be configured so that the impedance image rejects a negative frequency impedance response of the reactive circuit impedance response.

Abstract: A mixer circuit is disclosed. The mixer circuit comprises a plurality of mixer elements, wherein there are non-overlapping clock signals provided to the plurality of mixer elements which have a duty cycle of 33? percent. Outputs signals of the mixer elements do not contain third order harmonic content of the non-overlapping clock signals. The third-order harmonic of the mixer is eliminated by using mixer which uses voltage sampling on non-overlapping clocks and thereby achieves high linearity. The mixer circuit is further expanded to remove the I-Q image and even order harmonics.

Abstract: A receiver circuit, e.g., a low-IF receiver, including two mixing paths. The two mixing paths scale an input signal respectively by two mixing gains and shift phase of the input signal respectively by two mixing phase offsets to provide two mixed signals. The two mixing gains and the two mixing phase offsets are arranged to produce an amplitude adjustment between amplitudes of the two mixed signals and a phase difference of 90 degrees plus a phase adjustment between phases of the two mixed signals. With the amplitude adjustment and/or the phase adjustment properly tuned to nonzero value(s) in association with band-pass response of the receiver circuit, image rejection can be achieved and optimized. Associated method is also disclosed.

Abstract: A novel and useful reconfigurable superheterodyne receiver that employs a 3rd order complex IQ charge-sharing band-pass filter (BPF) for image rejection and 1st order feedback based RF BPF for channel selection filtering. The operating RF input frequency of the receiver is 500 MHz to 1.2 GHz with varying high IF range of 33 to 80 MHz. The gain stages are inverter based gm stages and the total gain of the receiver is 35 dB and in-band IIP3 at mid gain is +10 dBm. The NF of the receiver is 6.7 dB which is acceptable for the receiver without an LNA. The architecture is highly reconfigurable and follows the technology scaling.

Abstract: Embodiments of apparatuses, systems and methods relating to a mixer having high second- and third-order intercept points are disclosed. Other embodiments may be described and claimed.

Abstract: A mixer arrangement for generating an analog output signal by mixing an analog input signal with a discrete-time mixing signal. The mixer arrangement comprises a plurality of unit elements. Each unit element is adapted to be in an enabled mode in a first state of an enable signal supplied to the unit element, and in a disabled mode in a second state of the enable signal. Each unit element is adapted to generate the output signal of the unit element based on the analog input signal of the mixer arrangement in the enabled mode but not in the disabled mode. The unit elements are connected for generating a common output signal as the sum of the output signals from the unit elements. The mixer arrangement is adapted to generate the analog output signal of the mixer arrangement based on the common output signal. A corresponding method is also disclosed.

Abstract: Systems and methods for improving the timing alignment of non-overlapping waveforms are provided. In this regard, a representative system, among others, includes a waveform synthesizer that generates a plurality of input waveforms and inverters having inputs and outputs, wherein the inverters receive the input waveforms at the inputs of the inverters and invert the input waveforms, producing a plurality of inverted waveforms at the outputs of the inverters. The system also includes NOR gates having inputs and outputs, wherein the NOR gates receive the plurality of inverted waveforms at the inputs of the NOR gates and pass through one of the inverted waveforms at the outputs of the NOR gates.

Abstract: A multiple mode RF circuit includes a switching network to switch the RF circuit between a mixer mode and amplifier mode of operation. Two differential amplifier stages coupled to a differential transistor pair form the core of the circuit. A differential local oscillator (LO) source is selectively coupled to the two differential amplifier stages for mixer operation by the switching network and a feedback loop is selectively coupled between the input of the differential transistor pair and the output of the two differential amplifier stages by the switching network for amplifier operation. Gain is controlled in both modes by varying the DC bias on the two differential amplifier stages so that partial cancellation of the amplified signal from the differential transistor pair occur at the RF output. The multiple mode RF circuit operates over a large dynamic range by adjusting a bias current to scale linearity.

Abstract: In one embodiment, the present invention includes a mixer circuit to receive and generate a mixed signal from a radio frequency (RF) signal and a master clock signal, a switch stage coupled to an output of the mixer circuit to rotatingly switch the mixed signal to multiple gain stages coupled to the switch stage, and a combiner to combine an output of the gain stages.

Abstract: A method of separating individual channels from a composite or broadband RF signal that carries the channels on respective frequencies. An RF signal is received from an antenna at a high impedance input port of a plurality of mixers. A local oscillator (LO) signal is received at a high impedance port of the plurality of mixers. The plurality of mixers separately mix the RF signal to produce a plurality of common intermediate frequency (IF) signals. The plurality of common IF signals are output to filters corresponding to the individual isolated channels then processed to derive their information content.

Abstract: A circuit used in a mixer configured to receive a signal made up of a relatively small modulation signal and a relatively large carrier signal is described. The mixer includes multiple switches. A balancing circuit configured to receive a supply voltage and a clocking signal is provided, and the balancing circuit provides a control signal to a switch in the mixer. The balancing circuit includes a capacitor configured to receive and selectively dissipate charge as a gate voltage along a gate path. The control signal causes switching of the switch in the mixer at times in accordance with the clocking signal according to a voltage difference value between a source voltage and the gate voltage, wherein the voltage difference value between the source voltage and the gate voltage is approximately a predetermined voltage value greater than a turn on voltage level of the switch.

Abstract: Systems and methods for combining signals from multiple active wireless receivers are discussed herein. An exemplary system comprises a first downconverter, a phase comparator, a phase adjuster, and a second downconverter. The first downconverter may be configured to downconvert a received signal from a first antenna to an intermediate frequency to create an intermediate frequency signal. The phase comparator may be configured to mix the received signal and a downconverted signal to create a mixed signal, compare a phase of the mixed signal to a predetermined phase, and generate a phase control signal based on the comparison, the downconverted signal being associated with the received signal from the first antenna. The phase adjuster may be configured to alter the phase of the intermediate frequency signal based on the phase control signal. The second downconverter may be configured to downconvert the phase-shifted intermediate frequency signal to create an output signal.

Abstract: A frequency translation filter 500 is configured to receive a radio frequency (RF) signal 501 comprising first and second non-contiguous carriers or non-contiguous frequency ranges. The frequency translation filter comprises a mixer 503 configured to mix the RF signal 501 received on a first input with a local oscillator (LO) signal 505 received on a second input. A filter 507 comprises a frequency dependent load impedance, the filter having band-pass characteristics which, when frequency translated using the mixer 503, contain first and second pass-bands corresponding to the first and second non-contiguous carriers or non-contiguous frequency ranges. The first and second pass-bands are centered about the local oscillator frequency.

Abstract: The teachings presented herein allow the same sequence of local oscillator waveform sample values to be used for driving two harmonic rejection mixers for which quadrature operation is desired, irrespective of whether the oversampling rate of the sequence is divisible by four or only divisible by two. This ability is obtained by controlling whether the quadrature mixer clocks coincidentally with the in-phase mixer, or clocks a half clock cycle out of phase relative to the in-phase mixer. Several advantages attend the contemplated circuit arrangement and method of operation. Example advantages include the improved matching that comes from operating both mixers with the identical waveform sample values, and the improved flexibility in optimizing the harmonic rejection and/or interference-related operation of the mixers over a broader range of frequencies of interest, which flows from having a larger set of usable OSRs.

Abstract: There is provided a mixing circuit in which a rise of the consumption current can be suppressed while decreasing a non-linear component. The mixing circuit includes: an input unit 803 including a grounded-gate MOS transistor M1 with a source into which an input signal is input, and a grounded-source MOS transistor M2 with a gate into which the input signal is input; a frequency converter 802 for converting frequencies of a first current signal output from the grounded-gate MOS transistor M1 and a second current signal output from the grounded-source MOS transistor M2, and for generating a third current signal and a fourth current signal; a load MOS transistor M7, with a gate and a drain connected, for receiving a third current signal; and a load MOS transistor M8, with a gate and a drain connected, for receiving a fourth current signal.

Abstract: The present invention is directed to a wireless communications device that includes an antenna configured to receive an RF signal from an ambient environment. The antenna is characterized by an antenna impedance and the RF signal is characterized by a predetermined frequency. A passive mixer assembly is coupled to the antenna without an RF matching network. The passive mixer assembly is characterized by a passive mixer impedance presented to the antenna. The passive mixer assembly includes a plurality of baseband mixer ports. The passive mixer assembly is configured to downconvert the RF signal and provide a plurality of baseband signals. Each baseband signal of the plurality of baseband signals is directed out of a corresponding port of the plurality of baseband mixer ports and characterized by a predetermined phase of a plurality of predetermined phases. A baseband low noise amplifier (baseband-LNA) assembly is coupled to the passive mixer assembly.

Abstract: A frequency mixing apparatus includes a local oscillator, a signal distributor, a first frequency mixer and a second frequency mixer and a combiner. The signal distributor divides a signal generated from the local oscillator into two signals having a phase difference and outputs the two signals. The first frequency mixer has a first input port through which one of the two signals outputted through the signal distributor is inputted and a second input port connected to an RF signal. The a second frequency mixer has a first input port through which one of the two signals outputted through the signal distributor and a second input port is connected to a termination signal. The combiner combines signals respectively outputted from the first and second frequency mixers.

Abstract: A sub-harmonic mixer includes a first transistor having a source and a drain and a second transistor having a source connected to the source of the first transistor and a drain connected to the drain of the first transistor. A mixing transistor is configured to be biased in a linear operating region. The mixing transistor includes a drain coupled to the sources of the first transistor and the second transistor. The mixing transistor has its drain driven by a signal at twice a local oscillator (LO) frequency and its gate driven by a radio frequency (RF) signal while the mixing transistor is biased in the linear region such that a process of frequency doubling and mixing are performed simultaneously.

Abstract: An apparatus comprising a low noise mixer comprising a transconductance amplifier configured to receive a differential voltage and to generate a differential current signal, a passive mixer directly connected to an output of the transconductance amplifier, and a transimpedance amplifier coupled to the passive mixer, wherein the transimpedance amplifier is configured to receive a current signal and convert the current signal to a voltage signal.

Abstract: A mixer includes an adder that inputs a first high-frequency signal and a second high-frequency signal for local use, adds the first high-frequency signal and the second high-frequency signal, and outputs as an addition signal; a magnetoresistive effect element that includes a fixed magnetic layer, a free magnetic layer, and a non-magnetic spacer layer disposed between the fixed magnetic layer and the free magnetic layer, and is operable when the addition signal has been inputted, to multiply the first high-frequency signal and the second high-frequency signal included in the addition signal using a magnetoresistive effect to generate a multiplication signal; a magnetic field applying unit applying a magnetic field to the free magnetic layer; and a first impedance converting unit that is passive, inputs the multiplication signal outputted from the magnetoresistive effect element, converts the multiplication signal to a lower impedance than an input impedance, and outputs the converted signal.

Abstract: A single-ended receiver is described. The single-ended receiver includes a multi-port transformer that outputs a differential signal. The multi-port transformer includes a first primary coil that is coupled to an output of a first low noise amplifier. The multi-port transformer also includes a second primary coil that is coupled to an output of a second low noise amplifier. The multi-port transformer further includes a first secondary coil. The single-ended receiver also includes a shared mixer that receives the differential signal from the multi-port transformer.

Abstract: A receiver circuit includes a quadrature passive mixer, a first charge load, and a second charge load. The quadrature passive mixer has a differential input for receiving a differential input signal, and arranged for mixing the differential input signal with a quadrature local oscillator (LO) signal. The quadrature passive mixer has an in-phase mixer with a differential in-phase output, and a quadrature-phase mixer with a differential quadrature-phase output. The first and second charge loads are coupled to differential in-phase output and differential quadrature-phase output, respectively. In every quarter cycle of the quadrature LO signal, the differential in-phase output and the differential quadrature-phase output are arranged to be not shorted so as to avoid charging sharing between the first charge load and the second charge load, or are arranged to be shorted to cause charging sharing between the first charge load and the second charge load that generates a leakage path.

Abstract: In one embodiment, a passive rotating harmonic rejection mixer (RHRM) is provided that can directly couple to an antenna to receive an incoming radio frequency (RF) signal. This RHRM can have a master RF device to receive the signal and provide first and second RF currents, a master LO device coupled to an output of the master RF device to receive the RF currents and mix them with a master clock signal of multiple polarities to obtain a mixed signal pair. The RHRM may further include a rotating switch coupled to the master LO device to cyclically switch the mixed signal pair to one of multiple virtual ground nodes at an output of the rotating switch, and operational amplifiers each having a first input terminal coupled to one of the virtual ground nodes and having a feedback filter coupled thereto.

Abstract: Apparatus and methods of manufacture for a wideband RF mixer are provided. The RF mixer includes an input, an LO input, and an output. A variable impedance tuner is disposed in an input signal path between the input port and the RF mixer, and a variable impedance tuner is disposed in an output signal path between the output and the RF mixer. The impedances of the variable impedance tuners are controllable for a particular frequency of operation with one or more digital or analog control signals.

Abstract: The invention relates to a device comprising a direct path block with an input and an output, and a feedback block with an input and an output, the input of the direct path block being adapted to receive a multi-channel input signal with a given frequency range and the output of the direct path block being adapted to output an output signal with a base band frequency range, the output of the direct path block being coupled to the input of the feedback block and the input of the direct path block being coupled to the output of the feedback block. The direct path block comprises a first transposing unit (4) adapted to transpose the input signal to the base band frequency range and the feedback block comprises a filtering unit (3) adapted to filter the transposed signal at the output of the direct path block, a second transposing unit (5) adapted to transpose the filtered signal to the given frequency range and to feed back the transposed signal at the input of the direct path block.

Abstract: An embodiment of a system and method provides a carbon nanotube transistor (CNT) mixer with a low local oscillator power requirement and no inter-modulation products. Specifically, an embodiment of the system and method provides two kinds of device current-voltage (I-V) characteristics on the same integrated circuit: exponential and linear. The CNT I-V characteristics support both the ideal exponential control characteristic (determined by physics constants) and the ideal linear control characteristic (also determined by physics constants), resulting in an ideal multiplier. In other words, the CNT mixer is mathematically equivalent to an ideal multiplier. Such an ideal multiplier can be used as a mixer with low local oscillator power requirement and virtually no inter-modulation products.

Abstract: Frequency conversion circuitry has an input node for receiving an input signal at a first frequency and an output node for producing an output signal at a second frequency different from the first frequency. A mixer circuit is responsive to the input signal for producing a signal at the second frequency. A step down impedance transformation circuit is coupled between the input node and an input of the mixer circuit for providing input impedance of the mixer circuit lower than impedance at the input node. An amplifier circuit is coupled between an output of the mixer circuit and the output node for amplifying the signal at the second frequency produced at the output of the mixer circuit. The mixer circuit is configured for providing input impedance of the output amplifier lower than the impedance at the input node.

Abstract: Embodiments of a radio frequency (RF) circuit provide translational filtering in accordance with an input impedance response that is an impedance image of a reactive circuit impedance response from a poly phase reactive circuit. The RF circuit may include a first mixer circuit that provides a first frequency offset for the impedance image and a second mixer circuit that provides an additional frequency offset. Accordingly, the second mixer circuit may allow for adjustments to a total frequency offset of the impedance image. The second mixer circuit may also be configured so that the impedance image rejects a negative frequency impedance response of the reactive circuit impedance response.

Abstract: A transistor-based switch is coupled to a replica circuit that includes transistor circuitry similar to that of the switch. The replica circuit biases a switched transistor to promote linear operation of the switch.

Abstract: In one embodiment of the invention, a method for convolution of signals is disclosed including generating four phased half duty cycle clocks each being out of phase by a multiple of ninety degrees from the others; coupling the four phased half duty cycle clocks into a four phase half duty cycle mixer; and switching switches in the four phase half duty cycle mixer in response to the four phased half duty cycle clocks to convolve a differential input signal with the four phased half duty cycle clocks to concurrently generate a differential in-phase output signal and a differential quadrature-phase output signal on a dual differential output port.

Abstract: Blixers, which are a relatively recent development, have not be studied as extensively as many older circuit designs. Here, a blixer is provided that improves linearity and reduces noise over other conventional blixer designs. To accomplish this, the blixer provided here uses a differential amplifier and/or a dummy path within its mixing circuit to perform noise reduction (and improve linearity).

Abstract: A frequency conversion device for transforming a frequency of an input signal, the device comprising: a signal generator for providing a plurality N of first signals at a first frequency, where N?1, from an input signal having an in-phase component I and a quadrature signal component Q; an oscillator for generating N parallel oscillation signals, wherein the N oscillation signals are stepped in phase with respect to one another; a mixer comprising N mixing components, each mixing component being coupled to receive a respective one of the plurality of first signals and coupled to receive a respective oscillation signal for mixing the respective first signal with the corresponding oscillation signal to provide an output signal; and a common amplifier for receiving the N output signals from the N mixing components in N sequential phases for transmission.

Abstract: An improved double balanced mixer is provided which in one embodiment includes a first balun for receiving a first single input and providing a first balanced output having two ports, a second balun for receiving a second single input and providing a second balanced output having two ports, and a balanced mixer core responsive to the first and second balanced outputs to provide a mixed signal from the first and second single inputs. The first balun includes an RC network coupled between at least one of the ports of the first balanced output and one of ground and a common mode node of the first balun to improve the linearity of the double balanced mixer.