Abstract: The invention relates to a complex intermediate frequency (CIF) mixer stage, methods of operation thereof, and methods of calibration thereof. The CIF mixer stage comprises numerous individual mixers driven by IF clock signals to down-convert received IF signals into a set of signals at baseband frequency which are further combined to form a lower side band signal and an upper side band signal. The IF clock signals used have a predefined phase relationship among them, which involves tunable phase skews. By calibration of the conversion gains and the phases of the IF clock signals the gain and phase imbalance introduced in a preceding radio frequency mixer stage and/or the CIF mixer stage can be cancelled. Further, in-channel IQ leakage control can be applied to the lower side band signal and/or the upper side band signal. The CIF mixer stage can thus effectively suppress image interference and IQ leakage.

Abstract: In one embodiment, a passive rotating harmonic rejection mixer (RHRM) is provided that can directly couple to an antenna to receive an incoming radio frequency (RF) signal. This RHRM can have a master RF device to receive the signal and provide first and second RF currents, a master LO device coupled to an output of the master RF device to receive the RF currents and mix them with a master clock signal of multiple polarities to obtain a mixed signal pair. The RHRM may further include a rotating switch coupled to the master LO device to cyclically switch the mixed signal pair to one of multiple virtual ground nodes at an output of the rotating switch, and operational amplifiers each having a first input terminal coupled to one of the virtual ground nodes and having a feedback filter coupled thereto.

Abstract: A technique for cancelling out target IM2 components in a wireless receiver's mixer output is disclosed. A differential RF signal and a differential local oscillator (LO) signal are mixed by a mixer to demodulate the RF signal. A first common node signal is generated between a first resistor and a second resistor coupled across the mixer's differential output terminals. A second common node signal is generated between a third resistor and a fourth resistor coupled across the differential output terminals, where a capacitor is coupled between the second common node and a power supply terminal. The second common node signal provides a stable reference signal for IM2 components above a certain frequency. The two common node signals are subtracted to create a difference signal. The difference signal is scaled by a scaling factor obtained during calibration. The scaled difference signal is coupled to the mixer output to offset IM2 distortion.

Abstract: Disclosed is a harmonic rejection mixer that makes it possible to suppress high-frequency response, while keeping the number of gm elements from increasing. In a harmonic rejection mixer that regulates the waveform of an output signal by mixing outputs of multiple mixers that are connected in parallel with the latter stage of multiple gm elements, some of the gm elements are shared by I phase and Q phase by using a control signal with a duty ratio of less than 50% to drive at least some of the mixers, and then using the period in which the I-phase mixers are inactive to activate the Q-phase mixers.

Abstract: Aspects of a method and system for simultaneous signal transmission on multiple selected frequencies may include generating from a single baseband signal, a plurality of radio frequency transmission signals each at a different radio frequency, wherein the single baseband signal comprises an in-phase signal component and/or a quadrature signal component. The single baseband signal, to generate said plurality of radio frequency transmission signals, may be modulated in a single radio frequency transmission chain, the radio frequency transmission chain comprising intermediate frequency modulation and radio frequency modulation. The plurality of radio frequency transmission signals may be a radio frequency signal and a corresponding image frequency signal, based on the intermediate frequency modulation and the radio frequency modulation.

Abstract: A receiver, such as a television tuner, includes a radio frequency (RF) filter circuit. The RF filter circuit includes a filter, a first node, and a second node coupled to the filter, and a conversion signal path having an input coupled to the first node and an output coupled to the second node, the conversion signal path having an active mixer coupled between the first node and the second node. The active mixer can include, for example, a first transconductor and a first mixer coupled in series between the first node and the second node. The RF filter circuit further includes a feedback signal path having an input coupled to the second node and an output coupled to the first node, the feedback signal path including a second transconductor and a second mixer coupled in series between the second node and the first node.

Abstract: An apparatus and method for splitting a wide band input signal and overlaying multiple frequency bands on each path associated with one or more digitizers. All frequencies from the split signal on each path can be fed to a mixer. The local oscillator of each mixer receives a sum of signals, which can each be set to any arbitrary frequency, as long as an associated matrix determinant of coefficients is non-zero. Each oscillator signal is multiplied by a coefficient, which can represent phase and magnitude, prior to summing the oscillator signals together. Each mixer mixes a combined signal with the input, thereby generating a set of multiple overlaid frequency bands. The digitized signals are processed to substantially reconstruct the original input signal. Thus, the wide band input signal is digitized using multiple individual digitizers. In particular, a system can support two wide band signals using four digitizers of narrower bandwidth.

Abstract: A radio frequency circuit includes a transformer, a local oscillator, a first mixer, a second mixer, a first variable gain amplifier, and a second variable gain amplifier. The first mixer includes a first inductor that is coupled between a positive in-phase input and a negative in-phase input. The second mixer includes a second inductor that is coupled between a positive quadrature input and a negative quadrature input. The first and second inductors provide inductive loads and improve conversion gains of the first and second mixers respectively.

Abstract: A system includes a weighting module, a mixer module, and a frequency selective impedance (FSI). The weighting module is configured to receive an input signal having an amplitude and to generate weighted outputs. Amplitudes of the weighted outputs have ratios relative to the amplitude of the input signal. The mixer module has switches configured to receive the weighted outputs and to generate a staircase waveform when the switches are clocked by clock signals. Amplitudes of steps of the staircase waveform are based on the ratios. The FSI is configured to communicate with the switches. The switches are configured to translate an impedance of the FSI centered on a first frequency to a second frequency determined by a frequency of the clock signals.

Abstract: Embodiments of the present invention provide systems, devices and methods for modeling and correcting amplitude and quadrature phase errors generated within analog components of a receiver. A frequency-dependent correction method is employed that closely tracks the frequency dependent nature of the mismatch between the I and Q polyphase filter responses. In particular, digital correction is performed on a signal based on a modeled error function generated during a calibration of the receiver.

Abstract: An adjustable mixer is disclosed that is capable of operating in different modes in order to satisfy the mixing requirement of multiple radio access technologies (RATs). The adjustable mixer includes a LO signal generating portion and a mixing portion. Depending on the mixing requirements of the RAT, the adjustable mixer can operate in any one of multiple modes, each mode having a specific configuration for the LO signal generating portion and the mixing portion. The LO signal generating portion generates a LO signal having a particular duty cycle, depending on the selected mode, for use by the mixing portion. The mixing portion has an adjustable circuit configuration that can be dynamically reconfigured based on the selected mode, and which allows the mixing portion to successfully mix received signals using the corresponding LO signals generated by the LO signal generating portion.

Abstract: Heterodyne commutating apparatuses and methods for creating the heterodyne commutating apparatuses are disclosed. The heterodyne commutating mixer includes a plurality of switches for transferring a radio frequency input signal sequentially during a plurality of local oscillator period timeslots to a plurality of output capacitors. The heterodyne commutating mixer also includes a plurality of inductors added across differential in-phase output terminals and quadrature output terminals. Values of inductance and capacitance are set to achieve resonance at an output intermediate frequency.

Abstract: Aspects of a method and system for a low-noise, highly-linear receiver front-end are provided. In this regard, a received signal may be processed via one or more transconductances, one or more transimpedance amplifiers (TIAs), and one or more mixers to generate a first baseband signal corresponding to a voltage at a node of the receiver, and a second baseband signal corresponding to a current at the node of the receiver. The first signal and the second signal may be processed to recover information from the received signal. The first signal may be generated via a first one or more signal paths of the receiver and the second signal may be generated via a second one or more signal paths of the receiver.

Abstract: In one embodiment, a comparator of a Flash analog-to-digital converter (ADC) is calibrated in the background by switching the comparator to a feedback loop, determining the comparator's current reference level, and adjusting the comparator's reference level to a target reference level by charging a reference capacitor coupled the comparator.

Abstract: Apparatus for generating a plurality of radio-frequency RF subcarrier signals for transmission between two adjacent ultra-high frequency UHF broadcast channels comprises a signal generator for generating a plurality of local oscillator LO signals, and a plurality of mixers each arranged to mix one of the LO signals with one of a plurality of input signals to generate one of the RF subcarrier signals, said input signal including information to be transmitted by said RF subcarrier signal. Variable gain amplifiers can be provided to independently amplify the RF subcarrier signals before they are combined. The LO signals can have the same frequency and the input signals can have different frequencies, or the LO signals can have different frequencies and the input signals can have the same frequency. A second LO signal with a different frequency to a first LO signal can be obtained by dividing a reference frequency by a predetermined value and mixing with the first LO signal.

Abstract: A filter circuit including first and second real filters of a zero-IF scheme. The first and second real filters receive an I component and a Q component separated from a reception signal, respectively; and a switch section for producing a complex filter by switchably connecting the first and second real filters through interconnection elements. The switch section further receiving a switching signal for connecting the first and second real filters, thereby switching from the zero-IF scheme to a low-IF scheme.

Abstract: Various embodiments of systems and methods for generating local oscillator (LO) signals for a harmonic rejection mixer are provided. One embodiment is a system for generating local oscillator (LO) signals for a harmonic rejection mixer. One such system comprises a local oscillator, a divide-by-N frequency divider, a divide-by-three frequency divider, and a harmonic rejection mixer. The local oscillator is configured to provide a reference frequency signal. The divide-by-N frequency divider is configured to divide the reference frequency signal by a value N and provide an output signal. The divide-by-three frequency divider is configured to receive the output signal of the divide-by-N frequency divider and divide the output signal into three phase-offset signals. The harmonic rejection mixer is configured to receive the three phase-offset signals and eliminate third frequency harmonics.

Abstract: A mixer circuit suitable for broadband RF applications is disclosed. A unique biasing scheme for a conventional Gilbert-cell type 4-quadrant multiplier is used, resulting in relatively good linearity, relatively low noise, and relatively low power consumption. Disclosed techniques provide programmability in gain for the mixer and a broadband frequency of operation. A non-linear feedback loop is wrapped around the circuit to stabilize the common-mode voltage shifts due to programming. In one embodiment, a non-linear switch as load-resistance is used to improve the linearity of the circuit.

Abstract: Provided are a direct sampling circuit and a receiver using a discrete time analog process and having a filter effect of a steep attenuation characteristic in a narrow-pass band without lowering a sampling rate. In a discrete time direct sampling circuit (13), the positive phase side and the inverse phase side are both sampled by a local signal for a differential current output of a differential voltage/current conversion unit (1011) and electric charge is accumulated in a charge sampling capacitor. The latest accumulated charge at the positive phase side and charge accumulated at the inverse phase side before a predetermined number of samples are combined with the charge accumulated in a history capacitor (1043) in the past. Thus, it is possible to realize equivalently high-degree FIR filter characteristic.

Abstract: A wideband distributed mixer capable of operation over a wide range of frequencies is provided. The mixer can include a plurality of N mixer stages and monolithic transmission lines integrated together on a common semiconductor substrate. The length of each transmission line between adjacent stages can be predetermined such that an IF signal output from each stage is in-phase with the IF signal output from any preceding stage, allowing the mixer to output a mixed IF signal that is a constructive sum of the IF output signals from each constituent stage. The number of mixer stages as well as the design architectures and topologies for each stage can be varied according to the needs of the application.

Abstract: A combination mixer arrangement comprising a first mixer and a second mixer coupled in parallel between first and second input ports and an output port. The mixers are arranged to be driven simultaneously by an input signal provided at the second input port. They are de-coupled, so a bias voltage applied at the first input port provides dc bias simultaneously for the mixers to enable gain expansion of the first mixer responsive to an increase in said input signal and thereby an improved linearity for the combination mixer arrangement.

Abstract: A single sideband mixer is constructed with digital logic elements such as T-type flip-flops and inverters and with FETs, and the resulting mixer circuit simultaneously improves control over the frequency resolution, noise floor and operating frequency range. The use of this group of elements also allows the mixer circuit to be easily realized in an integrated circuit.

Abstract: An amplifying circuit includes a pair of MOS transistors; an amplifier that amplify a difference between potentials of differential output nodes coupled to drains of the pair of MOS transistors; cancel circuits that cause cancel current to flow to one of the differential output nodes when the amplifier amplifies a voltage between the differential output nodes and that shut off, after the amplifier performs the amplification operation, inflow of the cancel current; and a controller that performs setting so that a potential of first one of the differential input signals is equal to a potential of another one of the differential input signals, that compares, before the inflow of the cancel current, potentials generated at differential output nodes when the difference between potentials of the differential output nodes is amplified, and that sets the cancel current so that the potentials are reversed after the inflow of the cancel current.

Abstract: Driver circuits and methods related thereto for driving high power and/or high frequency devices are described. The driver circuits comprise transistor stacks and capacitors coupled with the transistor stacks. Voltages across the capacitors depend on state (on or off) of each transistor in the transistor stacks. These voltages in turn determine output voltages generated by the driver circuits.

Abstract: A low-power receiver front-end includes a transconductance amplifier that produces a single-ended current signal in response to a single-ended voltage signal. An output of the transconductance amplifier is provided to an LC tuned circuit. At resonance, the LC tuned circuit generates a differential current signal in response to the single-ended current signal. Single-ended current signals corresponding to the resonant frequency of the LC tuned circuit are converted into differential signals. Further, the LC tuned circuit amplifies the differential current signals by an associated quality factor. Further, a mixer is coupled to an output of the LC tuned circuit. The mixer generates IF signals in response to the differential current signals.

Abstract: Receiver architectures and methods of processing harmonic rich input signals employing harmonic suppression mixers are disclosed herein. The disclosed receivers, mixers, and methods enable a receiver to achieve the advantages of switching mixers while greatly reducing the mixer response to the undesired harmonics. A harmonic mixer can include a plurality of mixers coupled to an input signal. A plurality of phases of a local oscillator signal can be generated from a single local oscillator output. Each of the phases can be used to drive an input of one of the mixers. The mixer outputs can be combined to generate a frequency converted output that has harmonic rejection.

Abstract: A harmonic rejection mixer unit is provided which comprises an input (RF), at least one harmonic rejection unit (HRU) with at least two transistor units (T3a, T3b; T4a, T4b) for multiplying an input signal from the input (RF) with a multiplication signal (ELO). The harmonic rejection mixer unit furthermore comprises a transistor control signal generating unit (GGU) for generating transistor control signals (GS1-GS4) for the at least two transistor units (T3a, T3b; T4a, T4b) of the at least one harmonic rejection unit (HRU) by deriving the transistor control signals (GS1-GS4) from a local oscillator signal (LO). The transistor control signals (GS3, GS4) for the at least two transistor units (T3a, T3b; T4a, T4b) are generated with a duty cycle of <50% and are generated such that the shape of the multiplication signal ELO) is achieved by a constructive summation of the output signals from the transistor units (T3a, T3b; T4a, T4b).

Abstract: A mixer capable of detecting or controlling a common mode voltage thereof, includes at least: a mixing module for mixing a first set of differential signals and a second set of differential signals to generate at least one mixed signal; and a compensation module for compensating at least one operation point of the mixing module.

Abstract: A mixer is described having a Gilbert cell structure including a first input and a second input for inputting an RF signal, a third input and a fourth input for inputting a local oscillator signal, a first output and a second output for outputting an IF signal, a plurality of switches for converting the RF signal to an IF signal, and a dynamic bleed circuit for dynamically reducing the dc-current of the switches at the switching-point. As the dc-current of the switches is reduced at the point of commutation, the 1/f-noise is also strongly reduced without degrading the linearity. The switching happens at twice the local oscillator frequency. The mixer also includes a common mode feedback circuit that feeds the common mode signal, optionally amplified, to a common mode feedback control device that is in series between the dynamic bleed circuit and the supply voltage.

Abstract: At very high frequencies, generally above 100 GHz, the performance of traditional radio frequency (RF) circuitry begins to significantly limit performance. An example is the hybrid coupler, which can have a relatively narrow 90° bandwidth in these frequency ranges. Here, however, a branch-line hybrid coupler (which has been integrated into a quadrature downconversion mixer) has been modified. Namely, an adjustable impedance network has been coupled to isolation port (which has traditionally been terminated) to substantially increase the tuning range and expand the bandwidth of the quadrature mixer within these very high frequency ranges.

Abstract: Aspects of a method and system for a low-noise, highly-linear receiver front-end are provided. In this regard, a received signal may be processed via one or more transconductances, one or more transimpedance amplifiers (TIAs), and one or more mixers to generate a first baseband signal corresponding to a voltage at a node of the receiver, and a second baseband signal corresponding to a current at the node of the receiver. The first signal and the second signal may be processed to recover information from the received signal. The first signal may be generated via a first one or more signal paths of the receiver and the second signal may be generated via a second one or more signal paths of the receiver.

Abstract: The present invention relates to a mixer circuit and method of frequency transformation, wherein an input signal is switched in accordance with a first local oscillator signal and in accordance with at least one second local oscillator signal having a smaller duty cycle than said first local oscillator signal, or having a respective predetermined phase shift with respect to said first local oscillator signal. Output signals obtained by the switching in accordance with the first and at least one second local oscillator signals are summed and the polarity of one of said first local oscillator signal and said at least one second local oscillator signal is switched in response to a control input, to thereby switch between a harmonic-rejection mode and a sub-harmonic mixing mode.

Abstract: The present invention relates to an apparatus for frequency conversion, comprising: an analog-to-digital (A/D) converter, receiving and sampling an input signal according to a sampling frequency for producing a first digital signal, and the sampling frequency and the frequency of the input signal having a correspondence; a sign conversion circuit, used for receiving the first digital signal, and performing a sign conversion on the first digital signal and producing a second digital signal; a first switching module, used for selecting one of the first digital signal and the second digital signal as an output signal according to the sampling frequency; a filter, coupled to the first switching module, used for filtering the output signal from the first switching module, and producing a filter signal; and a second switching module, coupled to the filter, used for outputting the filter signal to a first output path or a second output path alternately according to the sampling frequency.

Abstract: A noise cancellation circuit for a mixer device includes a first signal terminal, coupled to a first output terminal, and a second signal terminal, coupled to a second output terminal of the RF input stage of the mixer device, a first variable current source with a first end coupled to the first signal terminal, a second end coupled to the second signal terminal, and a third end coupled to a first voltage source, a second variable current source with a first end coupled to the second signal terminal, a second end coupled to the first signal terminal, and a third end coupled to the first voltage source, and a phase shift device coupled to the first signal terminal and the second end of the second variable current source, transforming a first signal into a second signal, and outputting to the second end of the second variable current source.

Abstract: A receiver circuit includes a quadrature passive mixer, a first charge load, and a second charge load. The quadrature passive mixer has a differential input for receiving a differential input signal, and arranged for mixing the differential input signal with a quadrature local oscillator (LO) signal. The quadrature passive mixer has an in-phase mixer with a differential in-phase output, and a quadrature-phase mixer with a differential quadrature-phase output. The first and second charge loads are coupled to differential in-phase output and differential quadrature-phase output, respectively. In every quarter cycle of the quadrature LO signal, the differential in-phase output and the differential quadrature-phase output are arranged to be not shorted so as to avoid charging sharing between the first charge load and the second charge load, or are arranged to be shorted to cause charging sharing between the first charge load and the second charge load that generates a leakage path.

Abstract: Provided is an even harmonic mixer which is reduced in cost and size. The even harmonic mixer includes: a transducer in which a conductor of a microstrip line is connected to a ground plane of a waveguide, for transducing an RF signal transmitted in a waveguide mode into a transmission mode of the microstrip line; an anti-parallel diode pair which is cascade-connected to a microstrip line side of the transducer, and formed on a semiconductor substrate; a branching circuit for branching an LO signal and an IF signal; an open-end stub which is disposed between the transducer and the anti-parallel diode pair, and has a line length of about ½ wavelength at an RF signal frequency; and an open-end stub which is disposed between the anti-parallel diode pair and the branching circuit, and has a line length of about ¼ wavelength at the RF signal frequency.

Abstract: A quadrature connected passive mixer arrangement for frequency converting analog signals from a first to a second frequency. The arrangement comprises two parallel connected mixers provided as transistors. First and second LO signals and their inverse signals having separated phases are provided for driving the transistors. Signal path switches are provided between the RF terminals and the mixer transistors. The switches are driven by signals having a different phase than the signal driving the corresponding mixer transistor. Thus, any short circuit between IF terminals of the arrangement may be eliminated.

Abstract: The system and method of the present invention provide a single mixer (200-400) with significantly reduced noise performance at a low cost by adding a current control circuit (109) that reduces the current in at least the switching stage (103, 303, 403) during polarity changes of the local oscillator (LO) signal (104). Alternative embodiments (300-400) are provided for a single mixer having significantly reduced noise wherein the low-noise characteristic is enhanced by a further modification to the switching stage (303-403).

Abstract: Apparatus and methods are disclosed, such as those involving an RF receiver. One such apparatus includes a front end having an input and an output. The front end forms part of an RF signal receive path. The front end includes a front-end resistor configured to receive an input signal; and a passive mixer downstream of the front-end resistor on the receive path. The passive mixer mixes the input signal with a local oscillation signal. The front-end includes a transimpedance amplifier located downstream of the passive mixer on the receive path. The transimpedance amplifier includes an input and an output. The front end further includes a feedback resistor coupled between the input and output of the transimpedance amplifier. The gain of the front end is a ratio of the feedback resistance to the front-end resistance, and is temperature- and frequency-insensitive. The apparatus also provides relatively constant input impedance and high linearity.

Abstract: The present invention relates to a dual radio frequency (RF) receiver circuit that includes a first RF mixer and a second RF mixer. The first and second RF mixers may be fed from a common local oscillator or from two separate local oscillators. When fed from two separate local oscillators and when the first and second RF mixers are receiving the same or nearly the same RF channel, the frequency of the RF channel is less than the frequency of one local oscillator and is greater than the frequency of the other local oscillator. This arrangement separates the frequencies of the local oscillators, thereby reducing noise, instability, or both, which may otherwise de-sensitize the dual RF receiver circuit.

Abstract: A mixer circuit includes a voltage-to-current converter which converts a positive phase input voltage signal and a reversed phase input voltage signal input to a first input terminal and a second input terminal into a positive phase current signal and a reversed phase current signal, a switching circuit switches over the positive phase current signal and the reversed phase current signal according to a positive phase local signal and a reversed phase local signal, and generates a positive phase output current signal and a reversed phase output current signal, and an impedance element connected between the first common terminal and the second common terminal, having a relatively high impedance to a differential-mode signal between the positive phase current signal and the reversed phase current signal, and having a relatively low impedance to a common-mode signal between the positive phase current signal and the reversed phase current signal.

Abstract: Provided are a mixer and a transceiver having the mixer. The mixer includes: an local oscillation (LO) differential signal generator converting an input LO signal into a differential signal; and a mixing unit receiving the LO differential signal as a first input and a first signal having a first frequency as a second input and performing differential amplification on the LO differential signal and the first signal to output a second signal having a second frequency.

Abstract: A sampling mixer includes TAs (transconductance amplifiers), an in-phase mixer section connected to the TA and the TA, an opposite-phase mixer section connected in parallel with the in-phase mixer section, and a signal generator for generating a control signal for the in-phase mixer section and the opposite-phase mixer section respectively. The IIR filter using signals that underwent a current conversion by using the different transconductances is constructed, so that the filter characteristic can be designed by a weighting of the transconductance in addition to a capacitance ratio. As a result, the wide-band filter characteristic and the band-pass filter characteristic can be obtained, and deterioration of the receiving sensitivity can be suppressed by designing the filter characteristic suitable for the radio communication system.

Abstract: A circuit features a balun having an unbalanced input and a balanced output, and a differential coupler having a symmetrical structure about a center axis. The differential coupler has a differential input and a differential output, the differential input being coupled to the balanced output of the balun. An impedance element is coupled to a circuit node of the differential coupler at a point along the center axis. Other embodiments are also described and claimed.

Abstract: Various embodiments of systems and methods for generating local oscillator (LO) signals for a harmonic rejection mixer are provided. One embodiment is a system for generating local oscillator (LO) signals for a harmonic rejection mixer. One such system comprises a local oscillator, a divide-by-N frequency divider, a divide-by-three frequency divider, and a harmonic rejection mixer. The local oscillator is configured to provide a reference frequency signal. The divide-by-N frequency divider is configured to divide the reference frequency signal by a value N and provide an output signal. The divide-by-three frequency divider is configured to receive the output signal of the divide-by-N frequency divider and divide the output signal into three phase-offset signals. The harmonic rejection mixer is configured to receive the three phase-offset signals and eliminate third frequency harmonics.

Abstract: A method (1100, 1200) of generating a composite mitigation signal (216, 902, 1002) is presented. The composite mitigation signal includes an odd integer (N) of transitions (310, 312) between a first amplitude and a second amplitude of the composite mitigation signal. Successive sets of the transition bursts are separated by a desired phase delay or time delay (330), or such separations are defined by a base signal (416) having a frequency equal to a fundamental frequency of the composite mitigation signal. The composite signal generators (222, 900, 1000) that generate the composite mitigation signal are also presented.

Abstract: A receiver arrangement includes a single ended multiband feedback amplifier, at least one single ended input, differential output mixer arrangement including a main mixer and a trim mixer, and a mixer feedback loop circuit configured to receive differential output signals generated by the mixer arrangement. The mixer feedback loop circuit generates a feedback signal based on the received differential output signals and provides the feedback signal to the mixer arrangement to minimize DC-offset and second order intermodulation products. The single ended multiband feedback amplifier may include an input stage and a programmable resonance tank circuit connected to the input stage for suppressing downconverted noise from harmonics of the LO-frequency, and a configurable feedback net that shapes the frequency response of a feedback loop including the feedback net based on a band operation of the single ended multiband feedback amplifier.

Abstract: A semiconductor integrated circuit includes a mixer circuit unit having a first single gate mixer configured to receive a first input signal having a first frequency and a second input signal having a second frequency as inputs, a second single gate mixer configured to receive the first input signal and a third input signal of a phase inverted from a phase of the second input signal as inputs, a third single gate mixer configured to receive a fourth input signal of a phase inverted from the phase of the first input signal and the second input signal as inputs, and a fourth single gate mixer configured to receive the third and the fourth input signals as inputs; and a ½-frequency divider unit configured to receive output signals from the first to the fourth single gate mixers as inputs and output a desired signal.

Abstract: A receiving apparatus includes: a frequency conversion portion that has at least a mixer that down-converts a frequency of a reception radio-frequency signal by mixing the radio-frequency signal and an output from a voltage-controlled oscillator and outputs the down-converted radio-frequency signal; and a resistor element that has a resistance value to set a DC bias voltage of an input transistor in the mixer to which the radio-frequency signal is inputted to a center value of a dynamic range.

Abstract: An electronic device comprising a passive harmonic-rejection mixer. The passive harmonic rejection mixer has an input connected to several sub-mixer stages, and the sub-mixer stages are connected to a summing module for generating the output. Each sub-mixing stage comprises a gating module and a respective amplifier, the gating module adapted to selectively pass the input signal or the input signal with inverted polarity under the control of control signals.