Abstract: A mixer for downconversion of RF signals includes at least one RF transistor (305); at least one switching pair (303) connected to the drain current (301) of the at least one RF transistor (305); and a common mode sensing component (300) configured to detect deviations in the common mode output of the switching pair (303) from a specified output; wherein the deviations modify the current of the at least one switching pair (303).

Abstract: The present invention is a controllable input impedance RF mixer, which when fed from a high impedance source, such as a current source, provides a high quality factor (Q) impedance response associated with an impedance peak. The high-Q impedance response may be used as a high-Q RF bandpass filter in a receive path upstream of down conversion, which may improve receiver selectivity and replace surface acoustic wave (SAW) or other RF filters. The present invention uses polyphase reactive circuitry, such as capacitive elements, coupled to the down conversion outputs of an RF mixer. The RF mixer mixes RF input signals with local oscillator signals to translate the impedance of the polyphase reactive circuitry into the RF input impedance of the RF mixer. The RF input impedance includes at least one impedance peak. The local oscillator signals are non-overlapping to maximize the energy transferred to the polyphase reactive circuitry.

Abstract: A miniaturized dual-balanced mixer circuit based on a double spiral layout architecture is proposed, which is designed for use to provide a frequency mixing function for millimeter wave (MMW) signals, and which features a downsized circuit layout architecture that allows IC implementation to be more miniaturized than the conventional star-type dual-balanced mixer (DBM). The proposed miniaturized dual-balanced mixer circuit is distinguished from the conventional star-type DBM particularly in the use of a double spiral layout architecture for the layout of two balun circuit units. This feature allows the required layout area to be only about 15% of that of the conventional star-type DBM.

Abstract: A mixer circuit comprises an input stage arranged to convert an input voltage signal received at an input of the mixer circuit into at least one current signal, and a frequency conversion stage comprising at least one switching element arranged to convert a signal component of the at least one current signal from an input frequency to a output frequency. The input stage comprises at least one resistance connected between the input of the mixer circuit and the at least one switching element. The at least one switching element and the at least one resistance are arranged such that the at least one switching element comprises a ‘turn-on’ resistance that exhibits a resistivity that is a factor less than the at least one resistance connected thereto.

Abstract: In accordance with one aspect of the disclosure, apparatus are provided. A filter is provided to receive from an antenna a receive signal of a given type and a low noise amplifier is provided to amplify the received signal. A translator down translates the receive signal carried at a radio frequency to be carried at an intermediate frequency. An I/Q channel separator is provided to separate the receive signal carried at the intermediate frequency into an analog in-phase (I) signal in an I channel and an analog quadrature-phase (Q) in a Q channel. An analog-to-digital (A/D) converter is provided to respectively convert the I signal and the Q signal to digital domain representations of the I signal and the Q signal. An intermodulation (IM) distortion avoider is provided to avoid IM distortion in the receive signal. The IM distortion avoider includes a carrier frequency exchanger to exchange an IM carrier frequency of IM distortion contained in the receive signal with a carrier frequency of the receive signal.

Abstract: A Gilbert cell mixer design is disclosed. Instead of using a differential transconductance stage as typically done, the design employs a differential transimpedance amplifier input stage. By utilizing a transimpedance input stage to the Gilbert mixer, feedback is used to obtain higher linearity without sacrificing noise performance. The transimpedance input stage supplies a current signal to the cascode connected Gilbert switching quad, so the transimpedance amplifier output is taken from the collector of the transimpedance amplifier output transistor, instead of the emitter as normally done with transimpedance amplifiers.

Abstract: A mixer such as an I/Q mixer, having an amplifier having first and second inputs and an output. The first input corresponding to, for example, an I input, and the second input corresponding to, for example, a Q input. The mixer also including a multiple way (M-way) switch having a single input in communication with the output of the amplifier; a frequency control input; and at least four outputs. The frequency control input is configured to receive a periodic signal, and the M-way switch is configured to switch a signal received on the single input to each of the at least four outputs at a switching frequency that is determined by the periodic signal. The M-way switch is operable to switch the input signal received on the single input to each of the at least four outputs in a serial fashion.

Abstract: An improved double balanced mixer is provided which in one embodiment includes a first balun for receiving a first single input and providing a first balanced output having two ports, a second balun for receiving a second single input and providing a second balanced output having two ports, and a balanced mixer core responsive to the first and second balanced outputs to provide a mixed signal from the first and second single inputs. The first balun includes an RC network coupled between at least one of the ports of the first balanced output and one of ground and a common mode node of the first balun to improve the linearity of the double balanced mixer.

Abstract: A miniaturized dual-balanced mixer circuit based on a multilayer double spiral layout architecture is proposed, which is designed for use to provide a frequency mixing function for millimeter wave (MMW) signals, and which features a downsized circuit layout architecture that allows IC implementation to be more miniaturized than the conventional star-type dual-balanced mixer (DBM). The proposed miniaturized dual-balanced mixer circuit is distinguished from the conventional star-type DBM particularly in the use of a 3-dimensional double-spiral circuit layout architecture for the layout of two balun circuit units. This feature allows the required layout area to be only about 15% of that of the conventional star-type DBM.

Abstract: A miniaturized dual-balanced mixer circuit based on a trifilar layout architecture is proposed, which is designed for use to provide a frequency mixing function for millimeter wave (MMW) signals, and which features a downsized circuit layout architecture that allows IC implementation to be more miniaturized than the conventional star-type dual-balanced mixer (DBM). The proposed miniaturized dual-balanced mixer circuit is distinguished from the conventional star-type DBM particularly in the use of a trifilar layout architecture for the layout of two balun circuit units. This feature allows the required layout area to be only about 20% of that of the conventional star-type DBM.

Abstract: A quadrature connected passive mixer arrangement for frequency converting analog signals from a first to a second frequency. The arrangement comprises two parallel connected mixers provided as transistors. First and second LO signals and their inverse signals having separated phases are provided for driving the transistors. Signal path switches are provided between the RF terminals and the mixer transistors. The switches are driven by signals having a different phase than the signal driving the corresponding mixer transistor. Thus, any short circuit between IF terminals of the arrangement may be eliminated.

Abstract: A radio receiver includes a down-converter 110 for receiving a radio multiplexed signal containing a first signal and a second signal, multiplying the first signal and the second signal by a mixer 104 to thereby down-convert the radio multiplexed signal and generate an intermediate frequency signal 5e. The mixer 104 has a control section for controlling an operating bias of the mixer 104 in response to a signal strength of at least either one of the first signal or the second signal. Thus, the dynamic range of the mixer can be widened so that stable image characteristics can be obtained over a wide range of transmission distance.

Abstract: A downconversion mixer with IM2 cancellation includes a mixer, an IM2 generator, and a scaling unit. The mixer frequency downconverts an input RF signal with an LO signal and generates an output baseband signal. The IM2 generator includes first and second field effect transistors (FETs) that receive the input RF signal and generate an intermediate signal having IM2 distortion. The scaling unit scales the intermediate signal to generate a scaled signal and further combines the scaled signal with the output baseband signal to cancel IM2 distortion in the output baseband signal. The IM2 generator may further include first and second amplifiers coupled between the source and gate of the first and second FETs, respectively. Different amounts of IM2 distortion and different temperature variation patterns may be generated in the intermediate signal by using different gains for the amplifiers.

Abstract: A high performance radio frequency receiver includes a low noise amplifier with large binary and stepped gain control range, controlled impedance, and enhanced blocker immunity, for amplifying and converting a radio frequency signal to a current; a pulse generator for generating in-phase and quadrature pulses; a crossover correction circuit and pulse shaper for controlling a crossover threshold of the pulses and interaction between in-phase and quadrature mixers; and a double balanced mixer for combining the RF signal with the pulses to generate an intermediate frequency or baseband zero intermediate frequency current-mode signal. The in-phase and quadrature pulses have a duty cycle of 20-35%. The intermediate frequency signal and second order harmonics may be filtered with a high frequency low pass filter and a current injected complex direct-coupled filter.

Abstract: A downconversion mixer includes a configurable gate or bulk bias voltage to allow calibration and correction of device offsets. Calibration may be performed on the configurable bias voltages to minimize IM2 distortion in the mixer. The techniques have minimal impact on voltage headroom, impose no requirement for a signal path to be phase-matched with a calibration path, and are particularly well-suited for passive mixers.

Abstract: A first mixer circuit mixes a first center frequency signal with a first local oscillation signal to generate a second mixed signal, and mixes the first center frequency signal with a second local oscillation signal to generate a first mixed signal, and a second mixer circuit mixes a second center frequency signal with the first local oscillation signal to generate a fourth mixed signal, and mixes the second center frequency signal with the second local oscillation signal to generate a third mixed signal. An adder and subtracter circuit subtracts the third mixed signal from the second mixed signal to output a signal of subtraction result as a first upper side band signal, and adds the first mixed signal to the fourth mixed signal to output a signal of addition result as a second upper side band signal different in phase from the first upper side band signal by 90 degrees.

Abstract: A system and method for high frequency, high power operation communication systems is provided. More particularly, a system and method for a single system-on-chip system monolithic microwave integrated circuit that provides both high-frequency performance at a low cost is provided.

Abstract: In a method for mixing an information signal, a digital information signal at a sampling frequency fs is generated. A mixed signal is generated as a multiplication of the digital information signal with a mixing signal at the sampling frequency fs, wherein the mixing signal corresponds to a sinusoid having a frequency fm equal to fs/8.

Abstract: The present invention relates to a bidirectional frequency mixer, as well as a radiofrequency transceiver system including at least such a mixer. The mixer includes two ports separated in intermediate frequency FI, one for the reception, the other for the emission and a common port in frequency RF both for reception and for emission. It also includes at least fours mixing cells and three phase shifting means of signals used to remove the undesirable frequencies generated by the mixing cells. The mixer enables a rejection of the frequencies produced by a local oscillator in transmitting phase and a rejection of the image phase in receiving phase to be preformed. The invention is in particular applicable to designing microwave integrated circuits, in particular in millimetric frequency band.

Abstract: An equivalent radio frequency (RF) notch filter, an RF chip, and a receiver are provided. The equivalent RF notch filter includes: a local oscillation (LO) circuit, configured to provide a LO frequency signal; configured to be connected in parallel with the main chain, and down-convert signals of the main chain; and a frequency selective circuit realized by impedance difference, configured to provide different impedances for down-converted signals with different frequencies from the mixing circuit, so as to absorb the signals that need to be suppressed.

Abstract: Aspects of a method and system for a shared GM-stage between in-phase and quadrature channels may include processing an in-phase (I) component signal for the I channel and a quadrature (Q) component signal for the Q channel via one or more shared transconductance stages in a frequency demodulator. The I channel may be isolated from the Q channel and the Q channel may be isolated from the I channel using isolation resistors. The values of the isolation resistors may be selected so as to balance the isolation and signal attenuation. A folding circuit, comprising active devices, may isolate the I channel from the Q channel. A generated voltage may be utilized to bias the folding circuit. An oscillator for the I channel may be isolated from a mixer for the Q channel and an oscillator for the Q channel may be isolated from a mixer for the I channel.

Abstract: The invention relates to a mixer circuit 31 comprising a down-conversion mixing component 33 arranged for down-converting an input radio frequency signal Irf+, Irf?. In order to improve such a mixer circuit, it is proposed that it comprises in addition an active mixer load circuit 34 connected to output terminals of the mixing component. The active mixer load circuit includes an active mixer load 51, T1, T2 and modulating means S1-S4 arranged for modulating a flicker noise produced by the active mixer load away from the signal band of a signal Ibb+, Ibb? output by the down-conversion mixing component. The invention relates equally to a receiver, a chip and a device comprising such a mixer circuit and to a method for use with such a mixer circuit.

Abstract: Provided is a frequency conversion mixer. The frequency conversion mixer includes a transconductance stage, a switching stage, a load stage, a current bleeding circuit, and a bias stage. The transconductance stage receives an RF signal, and outputs a current corresponding to a voltage of the RF signal. The switching stage switches the current which is outputted from the transconductance stage in response to a local oscillation signal, for frequency conversion the RF signal into an intermediate frequency (IF) signal. The load stage is connected between the switching stage and a supply voltage terminal. The current bleeding circuit is connected parallel with the switching stage, especially, embodying inverter structure with transconductance stage to get not only current bleeding effect but also current reuse effect, and one resonant inductor for reducing noise which is generated in parasitic capacitance at node between transconductance stage and switching stage.

Abstract: An apparatus, method, and system for DC offset cancellation are provided herein. For instance, the apparatus can include a first commutating mixer switch and a second commutating mixer switch. The first commutating mixer switch can have a first input port configured to receive a first differential signal and a first differential output port. The second commutating mixer switch can have a second input port configured to receive a second differential offset signal and a second differential output port. The first and second differential output ports can be coupled to one another to provide a combined differential output signal.

Abstract: A mixer includes a magnetoresistive effect element, a magnetic field applying unit, and an impedance circuit. The magnetoresistive effect element includes a fixed magnetic layer, a free magnetic layer, and a nonmagnetic spacer layer disposed between the fixed magnetic layer and the free magnetic layer, is operable when a first high-frequency signal and a second high-frequency signal as a local signal are inputted, to multiply the first high-frequency signal and the second high-frequency signal according to a magnetoresistive effect to generate a multiplication signal. The magnetic field applying unit applies a magnetic field to the free magnetic layer. The impedance circuit has a higher impedance for the multiplication signal than an impedance for the first high-frequency signal and the second high-frequency signal and is disposed between an input transfer line, which transfers the first high-frequency signal and the second high-frequency signal, and the magnetoresistive effect element.

Abstract: The present invention relates to a signal converting device and receiving device in a wireless communication system. The receiving device of the wireless communication system includes a differential signal converter for receiving a single ended radio frequency signal and converting it into a differential radio frequency signal, and a frequency down converter for down converting the differential radio frequency signal to down frequency signal.

Abstract: An exemplary embodiment of the present invention described and shown in the specification and drawings is a transceiver with a receiver, a transmitter, a local oscillator (LO) generator, a controller, and a self-testing unit. All of these components can be packaged for integration into a single IC including components such as filters and inductors. The controller for adaptive programming and calibration of the receiver, transmitter and LO generator. The self-testing unit generates is used to determine the gain, frequency characteristics, selectivity, noise floor, and distortion behavior of the receiver, transmitter and LO generator. It is emphasized that this abstract is provided to comply with the rules requiring an abstract which will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or the meaning of the claims.

Abstract: A balanced mixer circuit (300, 400, 500, 600, 700 and 800) in a baseband receiver (202) includes an oscillator circuit (212), a mixer (214 and 215), a digital-to-analog converter (258 and 259) and a digital signal processor (250). The mixer includes CMOS devices (301, 302, 303 and 304). In response to differential outputs from the mixer, the digital signal processor controls the digital-to-analog converter to output bias voltages for the gate of at least one of the CMOS devices of the mixer to compensate for imbalance in the differential output of the mixer that may be caused by mismatch among two or more CMOS devices of the mixer or caused by other reasons, in order to increase second order intercept point of the mixer.

Abstract: A double-balanced mixer is provided having a shorting switch connecting the signal inputs to the mixer core. A timer circuit provides pulses to close the switch, thereby shorting those inputs at times when the switches of the mixer core are switching. This is done because non-linear components in the output are produced at those times and therefore they can be removed if the signal input is shorted at those times.

Abstract: A balanced mixer circuit (300, 400, 500, 600, 700 and 800) in a baseband receiver (202) includes an oscillator circuit (212), a mixer (214 and 215), a digital-to-analog converter (258 and 259) and a digital signal processor (250). The mixer includes CMOS devices (301, 302, 303 and 304). In response to differential outputs from the mixer, the digital signal processor controls the digital-to-analog converter to output bias voltages for the gate of at least one of the CMOS devices of the mixer to compensate for imbalance in the differential output of the mixer that may be caused by mismatch among two or more CMOS devices of the mixer or caused by other reasons, in order to increase second order intercept point of the mixer.

Abstract: Disclosed are apparatus and methods for electronic signal conversion in which a power level of the signal is used to adjust the bias current of a converter.

Abstract: A mixer includes: a magnetoresistive effect element including a fixed magnetic layer, a free magnetic layer, and a nonmagnetic spacer layer disposed between the fixed magnetic layer and the free magnetic layer; and a magnetic field applying unit that applies a magnetic field to the free magnetic layer. The mixer is operable, when a first high-frequency signal and a second high-frequency signal as a local signal are inputted, to multiply the first high-frequency signal and the second high-frequency signal using the magnetoresistive effect element and to generate a multiplication signal. A frequency converting apparatus includes the mixer and a filter operable, when a higher frequency and a lower frequency out of frequencies of the first high-frequency signal and the second high-frequency signal are expressed as f1 and f2 respectively, to pass one out of a frequency (f1+f2) and a frequency (f1?f2) out of the multiplication signal.

Abstract: A digital communication circuit can be implemented can be implemented in a CMOS, or other IC structure. The digital circuit can utilize negative frequency removers or image frequency removers in the digital domain. The circuit can include mixers, switches, a complex filter, a low noise amplifier and summers. The image frequency can be removed digitally.

Abstract: Aspects of a method and system for simultaneous signal transmission on multiple selected frequencies may include generating from a single baseband signal, a plurality of radio frequency transmission signals each at a different radio frequency, wherein the single baseband signal comprises an in-phase signal component and/or a quadrature signal component. The single baseband signal, to generate said plurality of radio frequency transmission signals, may be modulated in a single radio frequency transmission chain, the radio frequency transmission chain comprising intermediate frequency modulation and radio frequency modulation. The plurality of radio frequency transmission signals may be a radio frequency signal and a corresponding image frequency signal, based on the intermediate frequency modulation and the radio frequency modulation.

Abstract: A sampling mixer includes TAs (transconductance amplifiers), an in-phase mixer section connected to the TA and the TA, an opposite-phase mixer section connected in parallel with the in-phase mixer section, and a signal generator for generating a control signal for the in-phase mixer section and the opposite-phase mixer section respectively. The IIR filter using signals that underwent a current conversion by using the different transconductances is constructed, so that the filter characteristic can be designed by a weighting of the transconductance in addition to a capacitance ratio. As a result, the wide-band filter characteristic and the band-pass filter characteristic can be obtained, and deterioration of the receiving sensitivity can be suppressed by designing the filter characteristic suitable for the radio communication system.

Abstract: A buffer circuit buffers incoming signals, from a local oscillator generator to a mixing circuit and has a push-pull circuit having two inputs, a first being coupled to a first incoming signal, and a second of the inputs being coupled to one of the buffered versions of the incoming signals, having a phase related to that of the first incoming signal. By coupling a second input to a buffered version rather than to the incoming signal, the load presented to the preceding circuit can be halved, while maintaining reduced power consumption. By using as a second input, a signal which is phase related to the first incoming signal, the normal operation of the push-pull circuit can be maintained. The incoming signals from the LO generator can be differential IQ signals and the buffered version of the further incoming signal be in phase with the first incoming signal.

Abstract: A sub-harmonic mixer includes a first transistor having a source and a drain and a second transistor having a source connected to the source of the first transistor and a drain connected to the drain of the first transistor. A mixing transistor is configured to be biased in a linear operating region. The mixing transistor includes a drain coupled to the sources of the first transistor and the second transistor. The mixing transistor has its drain driven by a signal at twice a local oscillator (LO) frequency and its gate driven by a radio frequency (RF) signal while the mixing transistor is biased in the linear region such that a process of frequency doubling and mixing are performed simultaneously.

Abstract: A signal processing arrangement (REC) comprises a filter (PPF) with variable filter elements (FE). A switching circuit (SWCT) switches a filter element (FE1) and, subsequently, another filter element (FE3) from a filter state to an adjustment state and back again to the filter state. A filter element that is in the filter state contributes to a suppression of unwanted signals. A filter element that is in the adjustment state affects a characteristic of a measurement signal (Sm). An adjustment circuit (ADCT) adjusts the filter element that is in the adjustment state so that the characteristic of the measurement signal is substantially equal to a target value (TV).

Abstract: A receiver includes a Gilbert cell mixer comprising an input transconductance stage. The input transconductance stage includes first and second transistors receiving an input signal and providing a first gain characteristic that is substantially non-linear over an operating frequency range of the receiver. Third and fourth transistors receive the input signal and provide a second gain characteristic that is substantially non-linear over the operating range of the receiver. A combined gain characteristic of the input transconductance stage is based on the first and second gain characteristics and is substantially linear over the operating frequency range of the receiver.

Abstract: A mixer includes a transduction circuit, a first and a second switch circuit, and a first and a second load circuit. The transconductor circuit is for generating a differential current signal according to a differential voltage signal. The first switch circuit and the first load circuit are connected in series, and the first switch circuit is used to regulate the differential current signal in response to a first oscillator signal. The second switch circuit and a second load circuit are connected in series, and the second switch circuit is used to regulate the differential current signal in response to a second oscillator signal. The first load circuit and the second load circuit are connected at a common node to reduce harmonic interferences.

Abstract: A down-conversion module for a heterodyne receiver comprises a first mixer circuit, a second mixer circuit and an interconnection. The first mixer circuit includes first and second differential control terminals and is arranged to produce a first down-converted differential voltage signal at a first down-converted frequency as a function of a first RF differential input signal applied to the first differential control terminals and of a first RF differential reference frequency signal applied to the second differential control terminals.

Abstract: A mixer is provided. The transconductance stage receives an input signal through an input node and outputs an output signal through an output node. The transconductance stage includes a first transistor coupled between the output node and a first power node, having a first gate coupled to the input node, and operating in a saturation region, a second transistor coupled to the first power node, having a second gate coupled to the input node, and operating in a sub-threshold region, a first biasing circuit providing a first bias voltage, and a third transistor coupled between the output node and the second transistor, and having a third gate coupled to the first bias voltage. The switching quad is coupled to the output node and generates a translation current according to the output signal. The transimpedance amplifier transforms the translation current to a corresponding voltage.

Abstract: A passive, differential RF mixer reduces second order intermodulation interference while maintaining I/Q isolation via common mode feedback wherein the I and Q error signals in the feedback path are time multiplexing using a four-phase LO signal. An RF signal is received at a differential input having a center tap. The RF signal is mixed with an in-phase differential signal of the four-phase local oscillator signal in a differential mixer (I mixer). The RF signal is also mixed with a quadrature-phase differential signal Q components of the four-phase local oscillator signal in a differential mixer (Q mixer). The common mode levels of the I and Q differential mixer outputs are compared to a reference DC voltage to generate I and Q error signals. The I and Q error signals are time-multiplexed, and fed back to the RF input center tap.

Abstract: A sub-harmonic mixer is provided, which includes: a mixer core having first and second transistors performing switching operations in response to a local oscillator (LO) signal and a radio frequency (RF) signal; a power source applying bias maximizing nonlinearity of a transistor included in the mixer core; an RF port applying an RF signal to the mixer core; an LO port applying an LO signal to the mixer core; and first and second phase delay circuits in which the RF signals applied to the first and second transistors have a 180-degree phase difference.

Abstract: An improved passive double balanced mixer with reduced capacitor voltage mismatch is described. A passive double balanced mixer includes two sets of mixer circuits, each comprised of switches. Each switch is separately divided into a first portion and a second portion of unequal number of fingers. A first and second LO AC coupling capacitors associated with a given switch are coupled at one end to an LO signal. The outputs of the first LO AC coupling capacitors are coupled to the first portion of the first switch and the second portion of the second switch, respectively, while the outputs of the second LO AC coupling capacitors are coupled to the second portion of the first switch and the first portion of the second switch, respectively. In one embodiment, the unequal number of fingers is defined by an n?1 and an n+1 number of fingers, respectively. In an alternate embodiment, the mixer is an ADB mixer with a transconductance amplifier and two sets of mixer circuits as above.

Abstract: A double-balanced sinusoidal mixing phase interpolator circuit comprises: a double-balanced gain stage having a first input for receiving a first phasor clock, a second input for receiving a second phasor clock, and a phase interpolator (PI) output, wherein the double-balance gain stage includes (i) a first gain stage having a positive input side and a negative input side for the first phasor clock and (ii) a second gain stage having a positive input side and a negative input side for the second phasor clock; and a sinusoidal digital-to-analog (DAC) stage coupled to the double-balanced gain stage and configured to implement sinusoidal weighting of positive and negative sides of differential DAC current for the first phasor clock and positive and negative sides of differential DAC current for the second phasor clock, wherein the sinusoidal weighting provides uniformly spaced phase steps in the phase interpolator (PI) output.

Abstract: A wireless communication unit (200) comprises a radio frequency (RF) receiver for receiving an RF signal and providing the received RF signal to an off-channel signal detector (218) and a quadrature down conversion mixer circuit comprising at least one dynamic matching mixer stage (226, 228, 250, 252). The off-channel signal detector (218) is arranged to detect whether an off-channel signal level of the received RF signal exceeds a threshold and, in response to determining that the received off-channel RF signal exceeds the threshold, the off-channel signal detector (218) deactivates the at least one dynamic matching mixer stage. Also described is a semiconductor that comprises a receiver, and a method of operation therefor.

Abstract: A band control apparatus, a band control program and a band control method that control bands takes the cost into consideration.

Abstract: An RF mixer provides extended dynamic range with reduced noise by utilizing degeneration inductors in the RF input section of a doubly balanced mixer. Degeneration inductors are also utilized in a mixer having a class AB input section. A current mirror in the class AB input section is also inductively degenerated for further noise reduction. The input section is biased by an all-NPN bandgap reference cell which is tightly integrated into the input section so as to reduce the power supply voltage required for the reference cell. The mixer can be optimized for wide input voltage ranges or low distortion.

Abstract: A mixer circuit comprises an input stage arranged to convert an input voltage signal received at an input of the mixer circuit into at least one current signal, and a frequency conversion stage comprising at least one switching element arranged to convert a signal component of the at least one current signal from an input frequency to a output frequency. The input stage comprises at least one resistance connected between the input of the mixer circuit and the at least one switching element. The at least one switching element and the at least one resistance are arranged such that the at least one switching element comprises a ‘turn-on’ resistance that exhibits a resistivity that is a factor less than the at least one resistance connected thereto.