Abstract: A test apparatus that tests a device under test is provided. The test apparatus includes: a control processor that executes a test program to test the device under test; a test unit connected to the device under test that tests the device under test according to an instruction by the control processor; and a relay section connected to the control processor and the test unit that relays a control instruction transmitted from the control processor to the test unit. The relay section includes: a buffer section that buffers the control instruction to be written to the address assigned from the control processor to the test unit; a timing storage section that stores a timing at which the control instruction received from the control processor should be transmitted to the test unit; and a buffer control unit that transmits the control instruction buffered in the buffer section to the test unit in response to that the timing stored in the timing storage section comes.

Abstract: A testing device that tests an electronic device includes a test pattern outputting unit operable to output a test pattern to the electronic device, a deciding unit operable to decide whether an output signal from the electronic device satisfies a predetermined condition, an instruction storing unit operable to store a plurality of instruction codes, a first instruction pipeline operable to generate a condition satisfaction instruction stream including a plurality of instructions that causes the test pattern outputting unit to output the test pattern to be supplied to the electronic device when the output signal satisfies the condition based on the plurality of instruction codes, a second instruction pipeline operable to generate a condition non-satisfaction instruction stream including a plurality of instructions that causes the test pattern outputting unit to output the test pattern to be supplied to the electronic device when the output signal does not satisfy the condition based on the plurality of instru

Abstract: A system and methods for evaluating the response of an optical digital disk player to vibration encountered during playback of optical digital disks are provided. The system includes a simulator configured to provide digital simulated output signals simulating the output of an optical digital disk player encountering vibration during playback of an optical digital disk. The system also includes digital-to-analog converter circuitry to convert the digital simulated output signals to analog simulated output signals and provide the analog simulated output signals to processing circuitry. The processing circuitry generates control signals based on the value of the analog simulated output signals, and provides the control signals as outputs.

Abstract: A shoe-based weight measuring system, comprising: a shoe; one or more weight sensitive detectors constructed and arranged with the shoe to sense weight of a person wearing the shoe and walking or standing; a processor for processing signals from the detectors to determine a weight of the person; a remote receiver; and a communications port for wirelessly communicating the weight to the remote receiver. An on demand weight system, comprising a weight detector coupled with a shoe for sensing weight of a person on the detector, a processor processing information from the detector for determining applied weight, a personal data display, and a communications port for wirelessly relaying the applied weight to the data display.

Abstract: A method and system for reporting website activity. According to an example embodiment, the system receives event-level data representing visitor activity through navigation entities on a client website, infers attribution of one or more metrics to at least one navigation entity based on the visitor activity, and provides online reports to the client based on the inferred attribution.

Abstract: An integrated circuit (IC) includes circuitry for measuring accurately at least one of set-up and hold times of a flip-flop included in the IC design. The circuitry uses data determined at the location of the flip-flop in the IC, and includes a first delay element driven by a first clock and configured to supply a zero-delay value of the first clock to a first flip-flop. The circuitry also includes a second delay element having a selectable delay, the second delay element configured to supply a first delayed version of the first clock to a second flip-flop, wherein an output of the first flip-flop is coupled to an input of the second flip-flop. A third delay element has a selectable delay and is coupled in series with the second delay element to supply a second delayed version of the first clock to a third flip-flop, and an output of the second flip-flop is coupled to an input of the third flip-flop.

Abstract: There is provided a waveform generator that generates a waveform. The waveform generator includes: a lamp waveform generating section that generates a lamp wave of which a signal value linearly changes for a predetermined period; a square wave generating section that generates a square wave of which pulse width is generally equivalent to the predetermined period; a waveform adding section that generally accords a timing at which a signal value in the lamp wave begins to be changed and a timing at a leading edge of the square wave, to add the lamp wave and the square wave; and a low-pass filter that removes a predetermined frequency band component from a waveform output from the waveform adding section.

Abstract: A system and method for testing an integrated circuit is provided. In one embodiment, a method includes comparing the signal level of the output signal of the integrated circuit to the signal level of a reference signal, wherein a comparison signal is output, which has a first or a second value depending on whether the actual signal level of the output signal is above or below the actual signal level of the reference signal; determining the value of the comparison signal at a certain time; evaluating the value of the comparison signal determined at the time by way of a default; and outputting an error signal if the determined value of the comparison signal does not correspond to the default.

Abstract: A system and method for automated baseline correction for Raman spectra is disclosed which may operate as a piecewise-linear baseline correction function. In an embodiment, a first set of data points from a Raman spectrum are determined to be baseline data points, a second set of data points from the Raman spectrum are determined to be baseline data points where the second set of data points are not contiguous with the first set of data points. The gap between the first and second set of data points is bridged by a straight line thereby forming an estimated baseline. The estimated baseline is smoothed and then subtracted from the Raman spectrum resulting in an adjusted-baseline Raman spectrum.

Abstract: A pulse generator and method thereof. The pulse generator may include a first switching unit receiving a plurality of receiving a plurality of time interval indicators and a first selection signal. The first switching unit may select one of the plurality of time interval indicators in accordance with the first selection signal and may output the selected time interval indicator. The pulse generator may further include a second switching unit receiving a plurality of pulse states and a second selection signal. The second switching unit may select one of the plurality of pulse states in accordance with the second selection signal and may output the selected pulse state for a first time interval, where the first time interval may be determined by the selected time interval indicator.

Abstract: A method and device for testing an electrical circuit, which do not require a thorough electrical circuit simulation but reliably identifying circuit faults. Preferred embodiments generate a fault signal that indicates that a given state of the circuit, which is defined by an electrical state variable, could occur in an electrical circuit. Generally, electrical components are individually treated as short-circuited or non-conducting regarding each pair of connections of the components. An electrical state variable is permanently allocated to at least one network node or a connecting pin of the electrical circuit. Electrical state variables of the network nodes and connecting pins of the components that are to be treated as short-circuited are allocated to each network node and each connecting pin. An assessment is made at least based on the allocated state variables as to whether the given circuit state can occur.

Abstract: A system, method and computer program product according to one embodiment are provided for calibrating an RFID interrogator. A signal is sent from an interrogator to a calibration device. A backscatter signal is received from the calibration device. The backscatter from the calibration device is analyzed. An outgoing signal strength of the interrogator is adjusted based on the analysis. In a system, method and computer program product according to another embodiment, the interrogator is set to selectively respond to tags returning a backscatter signal strength selected based on the analysis. In a system, method and computer program product according to another embodiment, comparison criteria is selected based on the analysis of the backscatter signal. An RF device is instructed to store the comparison criteria, which is then used by the RF device to selectively respond to an interrogator signal having at least a desired strength.

Abstract: A real-time bulk material analyzing system is disclosed for analyzing the elemental characteristics of bulk material passing by the system on a moving conveyor belt. An exemplary embodiment includes a source of illumination emitting white light for exciting bulk material to be analyzed, and a hyperspectral imaging spectrometer for capturing spectral reflectance from bulk material excited by the illumination source. A non-hazardous source of excitation can be used, which allows the bulk material to pass unobstructed and undisturbed through the detector array.

Abstract: A multimedia device test method is provided. The multimedia device test method includes generating parameters of a reference signal and a measured signal via a computer; creating multiple sub-files of the reference signal and multiple sub-files of the measured signal according to corresponding parameters via the computer; combining the multiple sub-files of the reference signal and the multiple sub-files of the measured signal into one composite file with a composite test signal via the computer; compiling the file of the composite test signal as an object executable file via the computer; executing the object executable file via a test signal generator for generating a frame including parameters of the composite test signal, and the frame is then transmitted to the multimedia device for outputting the composite test signal; and providing an analyzer to analyze the output composite test signal.

Abstract: The present invention includes a method for generating a model of a circuit having an input port and an output port. The method determines an amplitude for current leaving the output port at a frequency ?k when a signal that includes a carrier at ?j modulated by a signal Vj(t) is input to the input port, wherein ?k is a harmonic of ?j. The determined amplitude is used to determine values for a set of constants, ak, such that a function fk(V,ak) provides an estimate of the current, Ik(t), leaving the output port at a frequency ?k when a signal having the form V ? ( t ) = Re ? ? k = 1 , H ? V k ? ( t ) ? exp ? ( j? k ? t ) is input to the input port. Here Vk(t) is a component of a set of values V. The fk(V,ak) are used to provide a simulator component adapted for use in a circuit simulator.

Abstract: A video signal generator, employing a multi-output amplifier and a video signal connector, is physically connected to a device under test to eliminate the use of signal cables, to solve the impedance matching issue, and to reduce noise from the signal cables' exposure to high temperatures. Moreover, the video signal generator employs a video algorithm stored in a programmable microprocessor and instructions downloaded to provide on-line adjustable video patterns sets for test. The video signal generator includes the programmable microprocessor, a television encoder, a multi-output amplifier, and a video signal connector.

Abstract: A known error signal is recorded in a recording medium for testing. When manufacturing a reproducing apparatus, the recording medium for testing is used to check whether there is a deficiency in the reproducing apparatus.

Abstract: A controller of an optical disk device includes: a first sub-controller, a second sub-controller and a third sub-controller. The first sub-controller includes serially connected a first lead-lag filter and a first low pass filter. The second sub-controller includes a second lead-lag filter and a second low pass filter that are serially connected. The third sub-controller includes serially connected a second lead-lag filter, a third low pass filter and a extra lead-lag filter. A parameter calibrating apparatus and method for the controller is also disclosed.

Abstract: An integrated circuit is provided that includes a first port to receive a first signal from a first channel and a first device coupled to the first port to modify a channel response of the first signal received from the first channel. A waveform capture device may be coupled to the first device to capture a waveform of a signal modified by the first device.

Abstract: Unique representation, such as music or image full of originality, is generated in relation to a specific data sequence such as a telephone number. A music generation server 10 is provided with a material table TA in which material data associated with music phrases are provided in correspondence with the digits of the telephone number and the numerals thereof given at the respective digits, and such server is connected to a user's terminal, such as a PC 50 or a cellular phone 56. When a specific data acquisition program 30 is executed to acquire a telephone number as a specific data sequence from a user, a material data extraction program 32 is executed to make reference to the foregoing material table TA and extract therefrom a particular material data MD corresponding to the acquired telephone number. Then, a generation program 34 is executed to arrange such material data MD in a predetermined order and thereby generate one completed piece of music.

Abstract: A method and apparatus for cycle-based simulation of a transparent latch includes classifying a phase of the transparent latch, classifying a phase of an input to the transparent latch, and classifying a phase of a simulation cycle. The transparent latch is simulated as a cycle-based simulation element based on the phase of the transparent latch, the phase of the input to the transparent latch, and the phase of the simulation cycle.

Abstract: Equalisation of a communication channel is achieved through use of a Wiener filter frequency response mechanism that operates to transform at least a portion of a data stream generated from a plurality of space time coded (STC) symbol streams received from a plurality of transmit antenna elements into a packet spectrum. A training sequence for a channel through which the symbol streams have been sent is also transformed to a channel impulse response spectrum in order to assess the channel impulse response for the channel. The packet spectrum is equalised with the channel impulse response spectrum to produce an equalised packet spectrum in the transform domain. This is then converted into a time domain equalised data stream for recovery of originally transmitted information.

Abstract: A realtime power mask trigger generator for an instrument that acquires data in response to a trigger signal integrates power amplitudes over a defined bandwidth within a frequency spectrum for an input signal to produce an average signal power, and compares the average signal power with a specified reference power level for the defined bandwidth. Violation of the reference power level by the average signal power generates the trigger signal for acquiring data from the input signal about the trigger event by the instrument. The frequency spectrum may be divided into more than one defined frequency bandwidth, and each defined frequency bandwidth may have its own specified reference power level. The defined frequency bandwidths and associated reference power levels define a realtime power mask trigger.

Abstract: A method of characterizing a signal path includes (i) generating a reference spread-spectrum signal; (ii) coupling the reference spread-spectrum signal into the signal path while the signal path is carrying an operational signal; (iii) receiving a reflected spread-spectrum signal from the signal path generated in response to the reference spread-spectrum signal; and (iv) correlating the reflected spread-spectrum signal with the reference spread-spectrum signal to produce a correlation result corresponding to a characteristic of the signal path.

Abstract: A signal processing system for a sensor for judging whether an event to be detected has occurred on the basis of a frequency of a sensor output includes a converting device for converting the sensor output into a square wave, a presuming device for presuming whether the frequency of the sensor output is lower than a predetermined frequency referred for judging whether the event to be detected has occurred on the basis of an output from the converting device, and a judging device for judging whether the event to be detected has occurred on the basis of an output from the presuming device.

Abstract: A micro-magnetization analysis program, method, and apparatus which can analyze transitional change of a micro-magnetization state while one of a plurality of magnetic substances such as a recording medium and a recording head is moved in an arbitrary direction. An input unit reads an analysis object model in which merely regions of a magnetic substance fixed in a space and a magnetic substance to be moved are subjected to mesh-division into minute elements and analysis conditions. A magnetic field distribution calculating unit generates a first magnetic field equation, generates a second magnetic field equation, and solves the simultaneous equations thereof.

Abstract: A power circuit which can reduce power consumption. More specifically, a testing apparatus for testing an electronic device which includes: a pattern generation unit for generating a test pattern which is supplied to the electronic device; a power supply circuit for supplying power to the electronic device; and a decision unit for deciding pass/fail of the electronic device based on an output signal output from the electronic device, wherein the power supply circuit has: a voltage source for generating a predetermined input voltage to be applied to the electronic device; a power device for supplying the power to the electronic device based on the input voltage generated by the voltage source; a power supply for supplying drive power of the power device; and a voltage control unit for controlling a drive voltage applied by the power supply to the power device based on the power output from the power device.

Abstract: Novel excitation signals are specifically designed for testing a high-frequency mixer such that all of the desired intermodulation products are measurable after being converted by a sampling frequency converter. This is achieved by using excitation frequencies which are equal to an integer multiple of the sampling frequency of the sampling frequency convertor plus or minus small frequency offsets. The offset frequencies are carefully choosen such that the frequencies of all the significant intermodulation products after being converted by the sampling frequency converter are within the bandwidth of the sampling frequency converter output.

Abstract: Apparatus for detecting failure of an isolation device includes a current sensor to sense current through the isolation device and a circuit responsive to the current sensor output signal and to an enable signal that controls the isolation device for providing an Early Failure Warning (EFW) signal indicative of whether the isolation device has failed. The enable signal is at a first logic level when the isolation device is on and is brought to a second logic level to disable and test the isolation device. Also described is a method of detecting a failure of an isolation device including disabling the isolation device, sensing a current through the isolation device, and providing an EFW signal indicating that the isolation device has failed if the current through the isolation device is greater than a predetermined level when the isolation device is disabled.

Abstract: A system for generating a signal for testing a relay is provided. The system includes a plurality of argument vector arrays, each defines a digital signal for testing the relay. Each of the argument vector arrays includes a plurality of argument vectors and each argument vector includes a plurality of arguments. The system includes a plurality of waveform generators to generate a plurality of signal components. Each waveform generator generates the signal component based on the argument vectors contained by a selected one of the plurality of argument vector arrays. The system also includes a merge component to combine the signal components to produce the digital signal for testing the relay.

Abstract: Engine measuring equipment for obtaining engine torque regarded as necessary for engine performance assessments for a short time period during a period when engine revolution is under a transient state is disclosed. The engine measuring equipment includes a central control unit for controlling throttle opening degrees due to revolution of the engine and load torque of the dynamometer; a detector connected to an output shaft of the engine, for detecting measurement data including at least revolution and shaft torque of the engine driven by controlling the central control unit; and a signal processing unit for measuring engine torque based on measurement data from the detector. The signal processing unit operates so as to calculate the engine torque based on time series data of the revolution and the shaft torque detected with the detector to measure engine torque from transient state data.

Abstract: A test apparatus for testing an electric device includes a plurality of signal input-output units for inputting and/or outputting test signals in response to each of a plurality of terminals included by the electric device, a channel selection memory for storing pieces of channel selection information indicating whether each of the signal input-output units should perform setting based on a setting condition or not, a setting condition memory for storing the setting condition with regard to the signal input-output unit, and a controlling means for retrieving and supplying the setting condition stored in the setting condition memory and the channel selection information stored in the channel selection memory to the signal input-output units based on a setting instruction, when receiving the setting instruction to set the setting condition of the signal input-output unit, wherein when at least one of the signal input-output units is selected by the channel selection information supplied from the controlling mea

Abstract: Various systems, methods, and programs embodied in a computer readable medium are provided for determining a worst-case impedance and worst-case voltage of a power supply loop coupled to a power input of a die. In various embodiments, the worst-case impedance of a power supply loop is determined and a reference voltage at the power input of the die associated with an average current generated at a power supply included in the power supply loop. A maximum change in a current at the power input of the die is also measured and an estimate of a worst-case voltage at the power input of the die is calculated based upon the worst-case impedance, the reference voltage, and the maximum change in the current.

Abstract: A disc interface, a disc interface system having the same, and a disc interfacing method may be provided. The disc interface may receive a reduced quantity of test command information at a lower speed which may correspond to an operation speed of a general test apparatus to automatically generate a real-time testbench signal. The digital unit of the disc interface may be operated at an actual operation speed though the test command information and debugging data may be input and output at a lower speed. Thus, digital circuits operating at a high speed may be tested using an less expensive test apparatus.

Abstract: A method and a device for monitoring at least one output stage which is actuated by a microcontroller using an input signal having any pulse duty factor. The output signal from the output stage is averaged by an electrical circuit and compared to a setpoint value which is calculated from the input signal of the output stage. An error in the output stage is diagnosed when the averaged value deviates from the calculated setpoint value.

Abstract: An event based test system for testing an IC device under test (DUT) designed under an automatic electronic design (EDA) environment. The event based test system includes an event memory for storing event data derived directly from simulation of design data for an intended IC in the EDA environment where the event data to denote each event is formed with time index indicating a time length from a predetermined point and an event type indicating a type of change at an event, an event generation unit for generating test vectors based on the event data where waveform of each vector is determined by the event type and a timing of the waveform is determined by accumulating the time index of previous events, and means for supplying test vectors to the DUT and evaluating response outputs of the DUT at predetermined timings.

Abstract: A method for inspecting an object using a time delay integration sensor. A storage time of the time delay integration sensor is changed in response to a signal level of a signal outputted from the time delay integration sensor, and a scanning speed of a scan by the time delay integration sensor is changed in response to the signal level of the signal outputted from the time delay integration sensor. The object is then scanned using the time delay integration sensor to inspect the object under the changed storage time and the changed scanning speed.

Abstract: Disclosed is method of controlling an asymmetric waveform generator including the steps of providing a reference timer signal, and generating an asymmetric waveform as a combination of a first sinusoidal wave having a first frequency and a second sinusoidal wave having a second frequency approximately twice the first frequency. The generated asymmetric waveform is sampled to obtain a set of data points, which set of data points is indicative of the generated asymmetric waveform. The method includes analyzing the set of data points in terms of at least a first function relating to an ideal sinusoidal wave of the first frequency, to determine a first set of resultant values relating to the first sinusoidal wave, and analyzing the set of data points in terms of at least a second function relating to an ideal sinusoidal wave of the second frequency, to determine a second set of resultant values relating to the second sinusoidal wave.

Abstract: The perceptibility of degradations caused to signals transmitted over a transmission medium is measured by generating one or more predetermined transmission degradation conditions (et) and subjecting a test signal (St) to the transmission degradation conditions (et) in a network simulation device. The degree M(e) to which the or each transmission degradation condition (et) is perceptible to the human perceptual system is measured and a data set is generated and stored for converting one or more transmission degradation conditions (et) to respective values of perceptibility M(e). The data set may be a look-up table or an empirically determined formula. The data set may then be used on live traffic (S?), by identifying objectively measured transmission degradation conditions (e) in the received signal (S?) and retrieving from the data set in the data storage means (7) a value of perceptibility (M) associated with the transmission degradation conditions (e) so identified.

Abstract: A low cost, low power and lightweight swept sine wave analysis system that is affordable to engineers, university laboratories and students, providing accurate magnitude and phase response measurements over a wide bandwidth is described. An analog mixer mixes a local oscillator signal with an amplified input signal allowing AC signal coupling between input stages. This minimizes errors due to DC and low frequency drift. A computer graphical interface is used for controlling the acquisition hardware in real time, displaying results on the computer screen, and making the graphical results and numerical results immediately available for inclusion in documentation or spreadsheet applications.

Abstract: Structures and methods for non-intrusive testing of communication signals exchanged between two circuit boards via an intermediate interconnect board. In one aspect hereof, the functional signal normally exchanged between the circuits is latched during the exchange of test signals and the latched functional signal is utilized within the circuit that normally receives the functional signal to continue normal operations. In another aspect hereof, the test signals are exchanged over a dedicated test signal path between the two circuits. In another aspect hereof, the test signals are exchanged over the functional signal paths as out of band signals.

Abstract: An event pipeline and vernier summing apparatus for high speed event based test system processes the event data to generate drive events and strobe events with various timings at high speed to evaluate a semiconductor device under test. The event pipeline and vernier summing apparatus is configured by an event count delay logic, a vernier data decompression logic, an event vernier summation logic, an event scaling logic, and a window strobe logic. The event pipeline and summing method and apparatus of the present invention is designed to perform high speed event timing processing with use of a pipeline structure. The window strobe logic provides a function for detecting a window strobe request and generating a window strobe enable.

Abstract: One embodiment of the invention provides a system that characterizes cells within an integrated circuit. During operation, the system obtains a number of input noise signals to be applied to the cell. The system then simulates responses of the cell to each of the input noise signals, and stores a representation of the responses. This allows a subsequent analysis operation to access the stored representation to determine a response of the cell instead of having to perform a time-consuming simulation operation.

Abstract: An apparatus includes a device under test, a network analyzer, an internal amplifier, a first switch, a second switch, a third switch, a first air-line directional coupler, and a first attenuator. A method of characterization measurement includes providing a harmonics signal from the device under test to a spectrum analyzer, providing a generated signal and a reflected signal to a first receiver disposed within a network analyzer, and recording a parameter deviation of the network analyzer.

Abstract: A method and apparatus for generating a system specific test by providing sophisticated error tracking mechanisms to trigger on a specific system event. The present invention addresses the problem of monitoring network traffic and isolating a point of error at the testing stage. The present invention defines a specific system event to be monitored. A trigger is created in the host system and routed to the analyzer, wherein the trigger is used to allow the analyzer to capture information related to the specific system event. When a signal is received at the analyzer, the signal automatically triggers the analyzer to capture and store a predetermined amount of data related to the specific system event before and after the trigger is executed.

Abstract: A time varying electrical excitation(s) is applied to a system containing biologic and/or non-biologic elements, whereupon the time-varying electrochemical or electrical response is detected and analyzed. For biologic specimens, the presence, activity, concentration or relative quantity, and certain inherent characteristics of certain target substances (hereinafter referred to as “target analytes”) within, or comprising, the specimen of interest may be determined by measuring either the current response induced by a voltage-mode excitation, or the voltage response induced by a current-mode excitation. Labeling or marker techniques may be employed, whereby electrochemically active auxiliary molecules are attached to the substance to be analyzed, in order to facilitate or enhance the electrochemical or electrical response.

Abstract: A profile-based system is described for verifying the functionality of a device design. In one embodiment, the system includes a profile generation module, a coverage measurement module, and a pattern generation module. The profile generation module operates from a rule set that represents the design specification and any applicable standards, and a profile mode that specifies “interesting” aspects of test patterns for device design verification. The profile generation module determines an ordered set of variable values that specify a test pattern, and produces a profile that intelligibly describes the interesting aspects of the test pattern. The coverage measurement module analyzes the profile to determine coverage, and the analysis results may be operated on by the profile generation module to determine a profile for an improved test pattern. The pattern generation module converts the profile into a test pattern having the interesting aspects specified in the profile.

Abstract: A method of describing a set of tests capable of being performed on a device under test (DUT) is disclosed. The method includes identifying a scenario space of the DUT.

Abstract: A system and method for measuring integrated circuit processor power demand comprises calibrating one or more voltage controlled oscillators for use as ammeters, calibrating a calibration current source, wherein the calibration current source draws current through a inherent resistance, calibrating the inherent resistance, and interleaving said calibrations in time with calculating the processor power demand using a voltage that is measured across the inherent resistance.

Abstract: The present invention relates to a method and an apparatus for generating an electronic test signal, and particularly to the use of such a method and apparatus for calibrating meters used to measure electrical characteristics such as voltage, current, phase angle and power. A user may select via a user input control the frequency domain characteristics of a desired electronic test signal including a user-defined set of amplitudes and phases of a fundamental frequency and one or more harmonic frequencies. A processor generates from the user-defined set of amplitudes and phases a frequency domain output set of amplitudes and phases for the fundamental frequency and one or more harmonic frequencies, which is then converted into a first time domain set of amplitudes extending over at least one cycle of the fundamental frequency. The first time domain set of amplitudes is communicated to a digital-to-analog output stage which generates an electronic test signal corresponding to the time domain set of amplitudes.