Abstract: A control arrangement and method is provided for detecting and responding to disturbances in electrical power systems. In a preferred arrangement, an integration is initiated that is based on a comparison of actual voltage of a source and a reference voltage. When the integration exceeds a predetermined value, the source is considered unreliable. Also in a preferred arrangement, a determination is made as to whether or not the disturbance is a downstream fault condition. For example, this is useful for applications where a transfer is made from a first source to a second source when predetermined disturbances are detected. In this manner, the transfer of the load to a second source is avoided which would continue the supply of the downstream fault. Additionally, the arrangement distinguishes between various degrees of disturbances to permit appropriate response based on the severity and type of disturbance. For example, a first immediate response, i.e.

Abstract: A method and apparatus for measuring one or more physical conditions of a computer operator and for automatically inputting signals corresponding to the physical conditions into a computer (12) for control and monitoring purposes.

Abstract: Provided is a system and method for black-box testing of software using positive and negative test cases with N-way combinations of parameter values. An original model comprising valid and invalid values is modified in a first phase, by generating exclusions (constraints) for pairs of invalid values. A first suite of test cases is generated from the modified model, and positive test cases eliminated, creating a first test suite with only negative tests. In a second phase, the original model is modified by eliminating invalid values, from which a second test suite having only positive test cases for all valid N-way combinations is generated. Merging the two test suites provides a suite of positive and negative test cases that test software with N-way combinations of values, in which each negative test case has only one invalid value.

Abstract: Methods for displaying an anomaly in a periodic waveform. Specifically, in one embodiment according to the present invention, a method is provided of (a) setting a pulse start address, (b) setting an initial screen position, (c) displaying a pulse at a time-aligned position, (d) updating the pulse start address in response to a pulse width value, (e) repeating (c) and (d), and (f) interactively adjusting the pulse width value at any time without using a clock recovery procedure.

Abstract: A self-calibrating sigma-delta converter (SCADC) functions in a calibration mode and in an operational mode. In the calibration mode, a test circuit of the SCADC generates test signals that are periodic rectangular voltage waveforms. Each test signal has a dc component with a precise voltage amplitude, as well as harmonic components. A low-pass filter of a sigma-delta converter (SDC) within the SCADC filters out the harmonic components. A digital calibration processing circuit within the SCADC uses the precise voltage amplitudes to generate digital correction factors that compensate for dc offset error, gain error and INL error of the SDC. In the operational mode, the SDC receives an analog operational signal and outputs an operational digital data stream. The digital calibration processing circuit uses the correction factors to compensate for dc offset error, gain error and INL error in the operational digital data stream and outputs a corrected digital data stream.

Abstract: An apparatus includes a device under test, a network analyzer, an internal amplifier, a first switch, a second switch, a third switch, a first air-line directional coupler, and a first attenuator. A method of characterization measurement includes providing a harmonics signal from the device under test to a spectrum analyzer, providing a generated signal and a reflected signal to a first receiver disposed within a network analyzer, and recording a parameter deviation of the network analyzer.

Abstract: A highly time resolved impedance spectroscopy that enhances the measurement of the dynamics of non-stationary systems with enhanced time resolution. The highly time resolved impedance spectroscopy includes an optimized, frequency rich a.c., or transient, voltage signal is used as the perturbation signal, non-stationary time to frequency transformation algorithms are used when processing the measured time signals of the voltage and current to determine impedance spectra which are localized in time; and the system-characterizing quantities are determined from the impedance spectra using equivalent circuit fitting in a time-resolution-optimized form. Methods and apparatus for processing impedance spectra data are also provided.

Abstract: The present invention is directed to a method and system for measuring bus frequency. A system suitable for determining bus frequency may include a bus device and a processor. The bus device is suitable for performing an operation and the processor is communicatively coupled to the bus device utilizing a bus. The processor is capable of starting a timer, initiating the bus device to perform a number of operations, receiving an indication that the bus device completed the number of operations, stopping the timer when the indication is received. A bus clock frequency is computed based upon time taken to complete the number of operations as indicated by the timer and the number of operations performed by the bus device.

Abstract: A testing system is described for testing a memory device. The testing system includes a timing generator, an optional frequency multiplier circuit, a pattern generator, and a waveform shaping circuit. The timing generator generates a first clock signal. The frequency multiplier circuit receives the first clock signal, and uses the first clock signal to produce a second clock signal. In general, the second clock signal has a frequency greater than a frequency of the first clock signal. The frequency of the second clock signal may twice the frequency of the first clock signal. The testing system provides the second clock signal to the memory device such that operations within the memory device are synchronized to the second clock signal. The waveform shaping circuit produces an address signal synchronized to the first clock signal, and provides the address signal to the memory device when reading data from the memory device.

Abstract: A signal generator produces a signal. The signal generator includes signal hardware that physically produces the signal and signal software that is used to control signal hardware. The signal software includes a higher level object and a plurality of lower level objects. The higher level object processes an instruction from a user to produce the signal such that the signal sweeps through a plurality of frequencies. The plurality of lower level objects serve as an interface between the higher level object and the signal hardware. At least one of the lower level objects communicates with the signal hardware and at least one of the lower objects communicates with the higher level object.

Abstract: A frequency margin testing blade is adapted for use in a bladed server. The testing blade is further adapted to provide one or more output clock signals for use as clock inputs to one or more server blades internal to the bladed server in which the testing blade is installed and/or one or more server blades external to the bladed server in which the testing blade is installed.

Abstract: In a file, the TDEV mask data information including the TDEV mask data constituted by connecting a plurality of line segments and a calculation expression for forming the TDEV mask data, are stored in advance. A readout section reads out a predetermined TDEV mask data information from the file. A display section displays the line segment which is represented by the desired TDEV mask data information. An operating section inputs information for changing at least one of the start point and the characteristic value to the desired value with respect to the line segment to be represented by the desired TDEV mask data information. A TDEV mask data change section receives information inputted by the operating section and changes TDEV mask data ifnromation based on the calculation expression of the TDEV mask data information, and allows the display section to display the line segment represented by the changed TDEV mask data information.

Abstract: A device and method for detecting islanding of a grid connected inverter makes use of an injected white noise as a perturbing force on the output voltage of the inverter. The white noise is injected at least once in every cycle and can be generated at different rates in implementation. On loss of the grid, a frequency drift of the output voltage is detected and a positive feedback is activated that accelerates the drift.

Abstract: A programmable gain amplifier (PGA) controlled through a serial communications interface are fabricated on an integrated circuit (IC). A multiplexer (MUX) may also be included on the IC. The serial communications interface controls the gain of the PGA, MUX channel selection, and other functions of the PGA. Status of the PGA may also be obtained through the serial communications interface. By using a serial communications interface, the pin count of the PGA IC package may be kept to a minimum.

Abstract: An ATPG unit permits allocation of a don't care X as a state for activating a propagating path of a failure and, after a change in network, transfers the state from the don't care X to an uncontrol value, thereby activating the propagating path of the failure. Further, the ATPG unit supplies a system clock as a sending clock to a sending FF, gives a change to the network from the sending FF, propagates the change, supplies the system clock as a receiving clock to a receiving FF, and captures the network change, thereby propagating a state for detecting a delay failure to a path between the sending FF and the receiving FF and generating a test pattern when the propagation succeeds.

Abstract: An apparatus comprises an edge detector, a memory and a pulse-input engine. The edge detector is configured to receive an input signal and a counter signal. The edge detector is further configured to send a set of time values based on the input signal and the counter signal. Each time value from the set of time values is uniquely associated with a detected edge transition from the input signal. The memory is coupled to the edge detector. The memory is configured to receive from the edge detector the set of time values. The memory is configured to store the set of time values. The pulse-input engine is coupled to the memory. The pulse-input engine is configured to measure a set of pulse-to-pulse delays based on the set of the time values stored in the memory.

Abstract: The present invention relates to a method and an apparatus for generating an electronic test signal, and particularly to the use of such a method and apparatus for calibrating meters used to measure electrical characteristics such as voltage, current, phase angle and power. A user may select via a user input control the frequency domain characteristics of a desired electronic test signal including a user-defined set of amplitudes and phases of a fundamental frequency and one or more harmonic frequencies. A processor generates from the user-defined set of amplitudes and phases a frequency domain output set of amplitudes and phases for the fundamental frequency and one or more harmonic frequencies, which is then converted into a first time domain set of amplitudes extending over at least one cycle of the fundamental frequency. The first time domain set of amplitudes is communicated to a digital-to-analog output stage which generates an electronic test signal corresponding to the time domain set of amplitudes.

Abstract: A method for measuring a bandwidth of a signal path between a data source and a data recipient involves sending a block of test data from the data source along the signal path to the data recipient, using that test data to obtain a measured bandwidth of the signal path, and transferring information from the data source along the signal path to the data recipient in accordance with the measured bandwidth. The measured bandwidth value can be calculated each time the data recipient accesses a website or the measured bandwidth value can be retained for future use.

Abstract: By the speaker detecting device, the test signal is supplied to the output terminal to which the speaker is to be connected. If a speaker is connected to the output terminal, the test sound is output via the speaker. If no speaker is connected to the output terminal, no test sound is output. The test sound detecting unit detects the test sound in the acoustic space and compares the signal level of the test sound with the predetermined threshold level, thereby to judge whether or not a speaker is connected to the output terminal.

Abstract: A seismic prospecting method and device is disclosed using simultaneous emission, by vibrators, of seismic signals obtained by phase modulating a periodic signal whose amplitudes and derivatives with respect to the amplitude time are equated to zero at the beginning and at the end of each period, by pseudo-random sequences. The seismic signals are formed either from elementary sequences whose length is at least equal to the product of the number of seismic sources vibrating simultaneously by a listening time, or from the elementary sequence extended, before and after, with parts whose length is at least equal to the listening time, the reception and recording of the signals reflected by the subsoil discontinuities in response to the signals emitted, and the processing of the recorded signals. The respective contributions of the various seismic sources are isolated by correlating the signals received and recorded.

Abstract: An apparatus and associated method for testing an integrated circuit for electrical over stress includes a spike source configured to couple to an input of the integrated circuit, and responsively provide a signal spike to the input, and a current sensor configured to couple to a power supply. The power supply is coupled to the integrated circuit to provide power to the integrated circuit. The current sensor provides a sensor output related to the current supply to the integrated circuit from the power supply. The apparatus also includes test circuitry coupled to the sensor output configured to provide a failure output in response to a characteristic increase in power supply current sensed by the current sensor in response to an applied signal spike.

Abstract: A scan test methodology is presented. In one embodiment of the present invention, a scan test methodology is implemented which generates a test pattern set. A linear-time analysis is then performed on the test pattern set. As a result a new test pattern set is generated. Comparisons are made between the original test pattern set and the new test pattern set to analyze any difference in faults detected by the original test pattern set and the new test pattern set. If there are any differences in faults, test pattern generation is performed using the new test pattern set and the original test pattern set is used to augment the new test pattern set.

Abstract: The invention relates to an apparatus for dynamically testing an integrated circuit having a core logic area. The apparatus comprises a first test circuit having a first plurality of elements connected by a first plurality of traces wherein the first test circuit mimics a data path within the integrated circuit, a second test circuit having a second plurality of elements connected by a second plurality of traces wherein the second plurality of traces are routed within the core logic area, a third test circuit having a third plurality of elements connected by a third plurality of traces wherein the third plurality of elements are randomly located within the core logic area, and a fourth test circuit having a fourth plurality of elements connected by a fourth plurality of traces wherein the fourth test circuit mimics a data path within the integrated circuit.

Abstract: Methods and systems are provided to fast fill media players and buffers associated with media players. A bandwidth associated with initial startup of a media player is overloaded to rapidly fill the buffer and initiate the media player. Alternatively, multiple simultaneous data communication sessions are established with a media data source device, and the media data are concurrently received from the simultaneous sessions into the buffer or transferred of out the buffer at startup, thereby decreasing the latency associated with initiating the media player.

Abstract: The present invention includes a system and method for generating a signal particularly useful in testing JMX monitors using a generator bean, such as a signal generating Java Mbean. A user can specify equations and/or parameters in order to determine the type of signal to be generated. The generator bean is then polled at a frequency at least twice the frequency of the generated signal using a monitor MBean of the JMX monitor. A testing value is returned for each polling of the generator bean.

Abstract: A method for voltage detection and lockout. The method of one embodiment first compares a reference voltage to a supply voltage to determine whether the voltage supply voltage is greater than the reference voltage. The reference voltage is validated by determining whether the reference voltage is at least a valid voltage potential. An unlock signal is generated if the supply voltage is greater than the reference voltage and if the reference voltage is valid.

Abstract: The invention relates to a combination for determining the effects of signal noise and cross-talk on on-chip propagation, comprising an integrated circuit, and a testing system having a signal generator, a plurality of ring oscillators responsive to the signal generator and a signal analyzer responsive to the plurality of ring oscillators for dynamically measuring the effects of noise and cross-talk on the integrated circuit. The plurality of ring oscillators includes a first ring oscillator constructed to mimic a data path within the integrated circuit, a second ring oscillator constructed with traces routed within the core logic area, a third ring oscillator randomly placed within the core logic area, and a fourth ring oscillator constructed to mimic a data path within the integrated circuit, the fourth ring oscillator sharing a power source with at least one component of the plurality of components within the core logic area.

Abstract: A testing card including a converting circuit, a latch circuit, a data processor, a signal generator, an oscillation combination circuit, and a reset circuit is provided. The converting circuit is used to receive the attribute control signal, the common memory signal and the input/output signal fed in from the card interface, convert these signals and output them to the data processor afterwards. The latch circuit is used to receive the data signal fed in from the card interface, latch the data signal and output it to the data processor afterwards. Having received the signal sent from the converting circuit and the latch circuit, the data processor will be able to proceed with testing accordingly. The signal generator can output the mode selection signal and the interrupt signal to the card interface to test the functions of mode selection and interrupt signals.

Abstract: The invention provides a method for testing oscillators in which cracks and chips on oscillator chips that may possibly have an effect on the oscillation characteristics can be detected efficiently, without using an optical examination device and an image processing device, which require troublesome adjustment and higher cost. When testing the oscillation characteristics of oscillator chips, the method comprises a network analyzer, an upper electrode, a lower electrode, an oscillator chip, a bush, and a personal computer. The personal computer is connected to the network analyzer using a GP-IB interface cable, and is capable of storing, displaying, and comparing all measurement results of the network analyzer. The upper electrode can be shifted vertically by a vertical mechanism.

Abstract: A preferred system for facilitating automated test equipment functionality within integrated circuits includes automated test equipment (ATE) configured to electrically interconnect with an integrated circuit and to provide at least one signal to the integrated circuit. A first parametric test circuit, internal to the integrated circuit, also is provided. The first parametric test circuit is adapted to electrically communicate with the automated test equipment so that, in response to receiving a signal from the automated test equipment, the first parametric test circuit measures at least one parameter of a first pad of the integrated circuit.

Abstract: An object of the present invention provides a method of predicting radio wave propagation characteristics that can implement a ray launching technique at higher speed. A plurality of Central Processing Units (CPUs) are interconnected via a network, and a recording device that can be read or written from all the CPUs is installed, and plural rays radiated from a predetermined transmitting point are divided into a plurality of groups, each group being assigned to a different CPU, whereby the CPUs perform a ray launching processing for the assigned rays independently and simultaneously to predict the radio wave propagation characteristics. The plural rays radiated from the transmitting point are divided and assigned to the CPUs, and the ray launching processing is performed simultaneously, resulting in a shorter computation time.

Abstract: A multiple network electronic component includes an insulator having a first element-forming surface and a second element-forming surface spaced thicknesswise from the first element-forming surface, a plurality of first intermediate film conductors 20A formed on the first element-forming surface and spaced from each other, a plurality of second intermediate film conductors 20B formed on the second element-forming surface and spaced from each other in corresponding relation to the first intermediate film conductors, and a plurality of through-conductive paths penetrating the insulator for electrically connecting each of the first intermediate film conductors to a corresponding one of the second film conductors. The first element-forming surface is formed with a plurality of first elements and a plurality of second elements, and each of the first and second elements has one end connected to a respective one of the first intermediate film conductors.

Abstract: An apparatus and method for the detection of and recovery from a plurality of electrical transients in a plasma generator system is disclosed. The plasma generator system comprises a plasma chamber and a power amplifier is provided, wherein the apparatus comprises a sensor, the sensor detects an electrical transient in the electrical transients and outputs a first signal when the electrical transient is detected. The system also includes a first circuitry for receiving the first signal, the circuitry controlling said power output from said power amplifier in response to the first signal and outputting a second signal communicating the controlled power output, and a second circuitry for receiving the second signal, the second circuitry outputting a reset signal to the first circuitry, wherein the first circuitry receives the reset signal and resets the power output in response to the reset signal.

Abstract: A measurement system and method for determining a revolution rate of a rotating gear is described. Such a rotating gear can be, for example, a turbine or compressor. The described measurement system and method, for example, can perform highly accurate measurements and can be a fault tolerant system providing high reliability. In one embodiment, an apparatus comprises an edge detector, a memory and a pulse-input engine. The edge detector is configured to receive an input signal and a counter signal. The edge detector is further configured to send a set of time values based on the input signal and the counter signal. The pulse-input engine is configured to measure a set of pulse-to-pulse delays based on the set of time values stored in the memory.

Abstract: A method is provided for aligning the center frequency of an infrared transmitter. The method comprises the steps of: (a) providing a voltage-controlled oscillator for driving the infrared transmitter, where the oscillator is adapted to receive a bias voltage from a microprocessor; (b) applying a bias voltage to the oscillator; (c) receiving an output signal from the infrared transmitter into an infrared receiver; (d) determining a frequency associated with the output signal; and (e) adjusting the bias voltage based on the frequency associated with the output signal, thereby aligning the center frequency of the infrared transmitter.

Abstract: An apparatus and method for deskewing single-ended signals from different driver circuits of an automatic test system provides enough of a reduction in skew to allow differential signals to cross at or near their 50%-points. In accordance with this technique, first and second driver circuits are respectively coupled to first and second inputs of a measurement circuit through pathways having known and preferably equal propagation delays. The first and second driver circuits each generate an edge that propagates toward the DUT, and reflects back when it reaches a respective unmatched load at the location of the DUT. In response to the edge and its reflection, the first and second inputs of the measurement circuit each see a first voltage step and a second voltage step. The interval between the first and second voltage steps is then measured for each input of the measurement circuit.

Abstract: An electronic unit mounted in a vehicle includes a controller unit. The electronic unit is tested by a test device using periodic communications cycled therebetween. A frame of order signal is formulated by loading data designating several ports and transmitted from the test device to the controller unit. The controller unit processes the order signal and returns the processed results to the test device. At least part of the above data are shortened from 8 bits to 4 bits, and several ports are tested in one cycle of the periodic communications. The testing time is thus reduced for the electronic unit.

Abstract: An error-suppression signal measurement system and method therefor is provided. The system transmits a test signal from a first probe, through a device under test, and into a second probe. The probes extract normalization signals from reference signals therein, exchange specific ones of the normalization signals, and combine the normalization signals with data signals derived from the test signal to form receiver signals. The probes propagate the receiver signals to a receiver, where the signals are gain-ranged, digitized, normalized, and compensated for phase-noise.

Abstract: A method for improving the performance of a micromachined device, preferably an angular rate microsensor, is provided. The method includes collecting data on rate bias over a selected operating phase demodulation angles for at least one tine of a microsensor and determining optimum settings for phase demodulation angles at which the rate bias hysteresis over temperature is at a minimum by applying dynamic programming.

Abstract: In an RBW filter, a bandwidth is set so as to selectively pass a frequency component of only a desired signal bandwidth of the measured signals that have been frequency converted into a normalized intermediate frequency signal. A waveform detector detects a signal that passes through the RBW filter. An A/D converter samples the signal detected by the waveform detector at a predetermined sampling rate at which a Nyquist frequency is within the frequency bandwidth of the RBW filter, thereby converting the sampled signal into digital data. A data storage section stores the digital data converted by the A/D converter. A signal processing section re-samples the digital data stored in the data storage section so as to reproduce a bandwidth of the detection signal of the waveform detector, thereby generating arbitrary time data.

Abstract: A method for injecting an error into a waveform sent over a data link includes the following: The data link is monitored for a control event such as a symbol in the waveform. In response to the control event, a control signal is generated. In response to the control signal, the waveform is distorted, thereby injecting an error into it. The method can be applied in a number of ways. For example, different control events can be chosen, including fill words, start-of-frame or end-of-frame delimiters, or other recognizable portions of a waveform whether before or after the data field. The distortion applied to the waveform can take the form of amplitude or frequency distortion, or both. The method is applicable to electrical, optical, or other types of signals. Selected parts of a waveform can be distorted by introducing delay into the method, such as delay in generating the control signal, delay in generating the distortion, or delay in transmitting the waveform.

Abstract: Signal measuring apparatus (100) comprises a detector head (110) connected to a meter (112) by a cable (114). The cable (114) allows the meter to supply power and a RF local oscillator signal to the head (110), and the head (110) to send an intermediate frequency signal to the meter (112). The head (110) contains a mixer (120) for downconverting a test input at connector (116). The meter (112) receives the downconverted signal and measures its various parameters.

Abstract: An apparatus compares propagation delay of electronic by using flip-flops or similar storage elements. The apparatus includes a strobe source having an output line coupled to a control terminal of a pattern source and an input terminal of a variable clock delay. The strobe source triggers the pattern source to output signal a sequence of signals to an input terminal of an element or device under test (DUT). The DUT propagates the signals to a flip-flop. The output signal of the flip-flop is captured after a delay. The propagation delay of the DUT is determined by coinciding the clock signal edge with the data signal edge to the flip-flop so that the flip-flop enters the ambiguity region. Once the delay settings that define the ambiguity region under the same delay are determined for various DUTs, they are compared to determine which DUT has the least propagation delay.

Abstract: A method and system that include a first measurement signal and a second measurement signal that can be input to first and second filters. The filters can be subject to a first constraint to minimize the energy difference between the first and second measurement signals on a per frequency basis, and subject to a second constraint that includes a model frequency and phase response. By adapting the filters subject to the two constraints, coherent differences between the two measurement signals can be identified. In one embodiment, the system can be applied to Synthetic Aperture Radar (SAR) data.

Abstract: A method for storing time series data comprising storing short period data at an arbitrary sampling period and storing long period data at a sampling period longer than the arbitrary sampling period, in which the time series data are stored in a hierarchically correlated manner. Even when a great amount of data are stored, processes such as reading out, transferring, and displaying requisite data can be efficiently executed at high speed.

Abstract: A control arrangement and method is provided for detecting and responding to disturbances in electrical power systems. In a preferred arrangement, an integration is initiated that is based on a comparison of actual voltage of a source and a reference voltage. When the integration exceeds a predetermined value, the source is considered unreliable. Also in a preferred arrangement, a determination is made as to whether or not the disturbance is a downstream fault condition. For example, this is useful for applications where a transfer is made from a first source to a second source when predetermined disturbances are detected. In this manner, the transfer of the load to a second source is avoided which would continue the supply of the downstream fault. Additionally, the arrangement distinguishes between various degrees of disturbances to permit appropriate response based on the severity and type of disturbance. For example, a first immediate response, i.e.

Abstract: A method for measuring a bandwidth of a signal path between a data source and a data recipient involves sending a block of test data from the data source along the signal path to the data recipient, using that test data to obtain a measured bandwidth of the signal path, and transferring information from the data source along the signal path to the data recipient in accordance with the measured bandwidth. The measured bandwidth value can be calculated each time the data recipient accesses a website or the measured bandwidth value can be retained for future use.

Abstract: In test program generation system and test program generation method for semiconductor test apparatus, there is used data necessary for generation of test programs of respective kinds of LSI testers of data of library in which information common to respective kinds of LSI testers are registered, and data of device information file in which inherent device information are registered every kinds of LSIs to convert those data into data of common language independent of inherent various test program languages every kinds of LSI testers to thereby generate test element data used for generation of test programs of respective kinds of LSI testers. Accordingly, preparation of test programs corresponding to respective kinds of LSI testers can be made. Thus, it becomes possible to easily carry out preparation and modification of template files in which measurement sequences prepared every kinds of LSI testers are described.

Abstract: The power and environmental condition monitoring system monitors the quality of power provided to a site as well as other environmental conditions that might affect the operation of electronic equipment at the site. The system detects and records power events, such as spikes, sags, surges, and other transients, records power conditions, such as voltage level, RMS volts, phase differential, A/C frequency, current, and impedance, and records environmental conditions, such as temperature, vibration, and humidity. The system includes an analog signal receiver that receives analog signals from measurement devices and converts the analog signals into digital signal data. At least some of the channels on the analog boards are high frequency channels capable of receiving and converting high frequency voltage event signals. The system also includes a digital signal processor (DSP) for reading the raw digital signal data from the analog signal receiver and for processing the raw digital signal data.

Abstract: A timer on a microprocessor includes a vibrator formed by a comparator, a capacitor, three reference voltages, and switched current sources, which charge and discharge the capacitor. The vibrator oscillates at two different amplitudes to generate two timing windows, one at high amplitude and the other at low amplitude. A counter counts incoming clocks and times out after a fixed number of vibrator oscillations. Logic starts the timing windows and subtracts incoming clock measurements taken during the two timing windows. The logic subtraction cancels errors accumulated from the multiple ramps of the capacitor in the vibrator. The subtraction allows more precise measurement of incoming clocks. If the clocks counted exceed a threshold value, the microprocessor shuts down due to over clocking.