Transform Patents (Class 708/400)
  • Patent number: 9252803
    Abstract: A signal processor for providing a processed version of an input signal in dependence on the input signal has a windower configured to window a portion of the input signal, or of a pre-processed version thereof, in dependence on a signal processing window described by signal processing window values for a plurality of window value index values, in order to obtain the processed version of the input signal. The signal processor also has a window provider for providing the signal processing window values for a plurality of window value index values in dependence on one or more window shape parameters.
    Type: Grant
    Filed: September 11, 2012
    Date of Patent: February 2, 2016
    Assignee: Fraunhofer-Gesellschaft zur Foerderung der angewandten Forschung e.V.
    Inventors: Christian Helmrich, Ralf Geiger
  • Patent number: 9213680
    Abstract: A method and structure for an in-place transformation of matrix data. For a matrix A stored in one of a standard full format or a packed format and a transformation T having a compact representation, blocking parameters MB and NB are chosen, based on a cache size. A sub-matrix A1 of A, A1 having size M1=m*MB by N1=n*NB, is worked on, and any of a residual remainder of A is saved in a buffer B. Sub-matrix A1 is worked on by contiguously moving and contiguously transforming A1 in-place into a New Data Structure (NDS), applying the transformation T in units of MB*NB contiguous double words to the NDS format of A1, thereby replacing A1 with the contents of T(A1), and moving and transforming NDS T(A1) to standard data format T(A1) with holes for the remainder of A in buffer B. The contents of buffer B is contiguously copied into the holes of A2, thereby providing in-place transformed matrix T(A).
    Type: Grant
    Filed: September 1, 2007
    Date of Patent: December 15, 2015
    Assignee: International Business Machines Corporation
    Inventors: Fred Gehrung Gustavson, John A. Gunnels, James C. Sexton
  • Patent number: 9152922
    Abstract: A first iterative Grover Search process is performed by causing at least one quantum computer to perform a first series of Grover Searches according to a characteristic function for varying numbers of iterations to identify a first search target. The characteristic function is modified according to the identified first search target. A second iterative Grover Search process is performed by causing the at least one quantum computer to perform a second series of Grover Searches according to the modified characteristic function beginning with a number of iterations determined based on a number of iterations required for at least one prior iterative Grover Search process to identify a second search target.
    Type: Grant
    Filed: December 16, 2009
    Date of Patent: October 6, 2015
    Assignee: AT&T Intellectual Property I, L.P.
    Inventor: Robert J. Hall
  • Patent number: 9141871
    Abstract: Feature-matching methods for attempting to match visual features in one image with visual features in another image. Feature-matching methods disclosed progressively sample the affine spaces of the images for visual features, starting with a course sampling and iteratively increasing the density of sampling. Once a predetermined threshold number of unambiguous matches has been satisfied, the iterative sampling and matching can be stopped. The iterative sampling and matching methodology is especially, but not exclusively, suited for use in fully affine invariant feature matching applicants and can be particularly computationally efficient for comparing images that have large differences in observational parameters, such as scale, tilt, object-plane rotation, and image-plane rotation. The feature-matching methods disclosed can be useful in object/scene recognition applications. The disclosed methods can be implemented in software and various object/scene recognition systems.
    Type: Grant
    Filed: October 5, 2012
    Date of Patent: September 22, 2015
    Assignee: Carnegie Mellon University
    Inventors: Bernardo Rodrigues Pires, José M. F. Moura
  • Patent number: 9128817
    Abstract: An address transforming circuit that can change a memory mapping when a system is booted includes a switch control signal generating circuit and an address transforming unit. The switch control signal generating circuit generates alternately enabled switch control signals synchronized with a reset signal. The address transforming unit transforms bits of a first address to generate a second address in response to the switch control signals. Accordingly, a semiconductor memory device including the address transforming circuit has a long lifetime and high reliability.
    Type: Grant
    Filed: January 5, 2012
    Date of Patent: September 8, 2015
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seok-Il Kim, You-Keun Han, Sung-Ho Choi
  • Patent number: 9098449
    Abstract: An FFT operation is performed by dividing n time-domain input points into a plurality of groups of m points, performing a plurality of constant-geometry butterfly operations on each of the groups of m points, and finally performing at least one in-place butterfly operation on the group of n points.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: August 4, 2015
    Assignee: Analog Devices, Inc.
    Inventors: Ning Yang, David Miller, Boris Lerner, Guolin Pan, Steven L. Cox, Jiang Wu
  • Patent number: 9069713
    Abstract: In general, techniques are described that provide for 4×4 transforms for media coding. A number of different 4×4 transforms are described that adhere to these techniques. As one example, an apparatus includes a 4×4 discrete cosine transform (DCT) hardware unit. The DCT hardware unit implements an orthogonal 4×4 DCT having an odd portion that applies first and second internal factors (C, S) that are related to a scaled factor (?) such that the scaled factor equals a square root of a sum of a square of the first internal factor (C) plus a square of the second internal factor (S). The 4×4 DCT hardware unit applies the 4×4 DCT implementation to media data to transform the media data from a spatial domain to a frequency domain. As another example, an apparatus implements a non-orthogonal 4×4 DCT to improve coding gain.
    Type: Grant
    Filed: May 27, 2010
    Date of Patent: June 30, 2015
    Assignee: QUALCOMM INCORPORATED
    Inventor: Yuriy Reznik
  • Publication number: 20150120798
    Abstract: A method of encoding data includes selecting a line to define an adjustment target coefficient group in each of a plurality of coefficient groups included in a transform unit that has been transformed and quantized. Each of the coefficient groups comprises a plurality of coefficients. For each of the coefficient groups, a sum of the coefficients for the respective coefficient group is calculated. For each of the coefficient groups, a value of one adjustment target coefficient included in the adjustment target coefficient group is adjusted according to a result of the calculation of the sum of the coefficients for the respective coefficient group.
    Type: Application
    Filed: October 20, 2014
    Publication date: April 30, 2015
    Inventors: Yo Won Jeong, Nyeong Kyu Kwon, Yo Han Lim, Young Beom Jung
  • Patent number: 9013973
    Abstract: The present invention discloses a carrier frequency acquisition method and apparatus in which the structure of a transmission frame includes a short training sequence, the method including: delaying a received short training sequence by L sampling points and multiplying the delayed short training sequence with the original short training sequence to obtain a new sequence; delaying the new sequence by D sampling points and conjugate multiplying the delayed new sequence with the original new sequence; accumulating the results of the conjugate multiplication; and evaluating a phase from the result of the accumulation to estimate carrier frequency offset. With the above method, the present invention is capable of greatly improving the acquisition range of carrier frequency offset while requiring a simple set of hardware.
    Type: Grant
    Filed: August 27, 2012
    Date of Patent: April 21, 2015
    Assignee: Omnivision Technologies (Shanghai) Co. Ltd.
    Inventor: Yun Zhang
  • Patent number: 8990280
    Abstract: In some embodiments, a data processing system including an operation unit including circuitry configurable to perform any selected one of a number of operations on data (e.g., audio data) and a configuration unit configured to assert configuration information to configure the operation unit to perform the selected operation. When the operation includes matrix multiplication of a data vector and a matrix whose coefficients exhibit symmetry, the configuration information preferably includes bits that determine signs of all but magnitudes of only a subset of the coefficients. When the operation includes successive addition and subtraction operations on operand pairs, the configuration information preferably includes bits that configure the operation unit to operate in an alternating addition/subtraction mode to perform successive addition and subtraction operations on each pair of data values of a sequence of data value pairs.
    Type: Grant
    Filed: November 14, 2006
    Date of Patent: March 24, 2015
    Assignee: Nvidia Corporation
    Inventors: Partha Sriram, Robert Quan, Bhagawan Reddy Gnanapa, Ahmet Karakas
  • Patent number: 8984038
    Abstract: Aspects of a method and system for unconstrained frequency domain adaptive filtering include one or more circuits that are operable to select one or more time domain coefficients in a current filter partition. A value may be computed for each of the selected one or more time domain coefficients based on a corresponding plurality of frequency domain coefficients. The corresponding plurality of frequency domain coefficients may be adjusted based on the computed values. A subsequent plurality of frequency domain coefficients in a subsequent filter partition may be adjusted based on the computed values. Input signals may be processed in the current filter partition based on the adjusted corresponding plurality of frequency domain coefficients. A time-adjusted version of the input signals may be processed in a subsequent filter partition based on the adjusted subsequent plurality of frequency domain coefficients.
    Type: Grant
    Filed: November 22, 2013
    Date of Patent: March 17, 2015
    Assignee: Broadcom Corporation
    Inventors: Kuoruey (Ray) Han, Peiqing Wang, Linghsiao Wang, Kishore Kota, Arash Farhoodfar
  • Publication number: 20150006603
    Abstract: Polychoric correlations between two discrete random variables and polyserial correlations between a discrete random variable and a continuous random variable may be determined by using a normal-to-anything (NORTA) method and a stochastic root finding algorithm.
    Type: Application
    Filed: September 17, 2014
    Publication date: January 1, 2015
    Inventor: Vladimir Shklover
  • Publication number: 20140372495
    Abstract: Computerized singular value decomposition of an input complex matrix. A real-value matrix representation of the input complex matrix is provided to a singular value decomposition module, which correctly obtains a singular value representation of the real-value matrix representation. However, the result is not provided in a form for convenient conversion back into a valid singular value decomposition solution for the original input complex matrix, as the upper left half and lower right half of the diagonal of the diagonal matrix are not identical. A correction module corrects by formulating a corrected diagonal matrix that represents the value of the diagonal of the first diagonal matrix, but shuffled so that the upper left half of the diagonal of the second diagonal matrix is the same as the lower right half of the diagonal of the second diagonal matrix. Corrected unitary matrices may also be formed.
    Type: Application
    Filed: June 14, 2013
    Publication date: December 18, 2014
    Inventors: Chun Sun, Sudarshan Raghunathan, Parry Jones Reginald Husbands, Tong Wen
  • Patent number: 8909688
    Abstract: Disclosed is a method of seeking semianalytical solutions to multispecies transport equations coupled with sequential first-order network reactions under conditions wherein a groundwater flow velocity and a dispersion coefficient vary spatially and temporally and boundary conditions vary temporally.
    Type: Grant
    Filed: July 15, 2013
    Date of Patent: December 9, 2014
    Assignee: Korea Institute of Geoscience and Minerals Resources
    Inventors: Heejun Suk, Kyoochul Ha
  • Patent number: 8907822
    Abstract: A signal processor for providing a processed version of an input signal in dependence on the input signal includes a windower configured to window a portion of the input signal, or of a pre-processed version thereof, in dependence on a signal processing window described by signal processing window values for a plurality of window value index values, in order to obtain the processed version of the input signal. The signal processor also includes a window provider for providing the signal processing window values for a plurality of window value index values in dependence on one or more window shape parameters.
    Type: Grant
    Filed: September 11, 2012
    Date of Patent: December 9, 2014
    Assignee: Fraunhofer-Gesellschaft zur Foerderung der angewandten Forschung e.V.
    Inventors: Christian Helmrich, Ralf Geiger
  • Patent number: 8898209
    Abstract: Sensor data is received from one or more sensors. The sensor data is organized within a hierarchy. The sensor data is organized within a hierarchy that is non-dyadic. A processor of a computing device generates a discrete wavelet transform, based on the sensor data and based on the hierarchy of the sensor data, to compress the sensor data. The sensor data, as has been compressed via generation of the discrete wavelet transform, is processed.
    Type: Grant
    Filed: July 12, 2009
    Date of Patent: November 25, 2014
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Chetan Kumar Gupta, Choudur Lakshminarayan, Song Wang, Abhay Mehta
  • Patent number: 8898212
    Abstract: A data reordering system for determining addresses associated with a vector of transformed data and corresponding method of reordering transformed data, where the data reordering system includes: a first transform function coupled to a data vector and operable to provide the vector of transformed data; a reordering function, including a plurality of counters, that is operable to determine a plurality of offset addresses, with a, respective, offset address for each element in the vector of transformed data; and an adder operable to add a base address that corresponds to the first address to the each, respective, offset address to provide a sequence of addresses suitable for accessing the vector of transformed data to provide a re-sequenced vector of transformed data.
    Type: Grant
    Filed: October 24, 2008
    Date of Patent: November 25, 2014
    Assignee: Freescale Semiconductor, Inc
    Inventors: Ning Chen, Christopher J. Daniels, Leo G. Dehner, Gregory C. Ng, Wendy F. Reed
  • Publication number: 20140337396
    Abstract: A data processing apparatus and method are provided for performing a transform between spatial and frequency domains when processing video data. The data processing apparatus comprises transform circuitry configured to receive N input values and to perform a sequence of operations to generate N output values representing the transform of the N input values between the spatial and frequency domains. In doing this, the transform circuitry employs a base circuitry that is configured to receive M internal input values generated by the transform circuitry, where M is greater than or equal to 4, and to perform a base operation equivalent to matrix multiplication of the M internal input values by a Hankel matrix, which is a square matrix with constant skew diagonals, where each element of the array identifies a coefficient, performance of the base operation generating M internal output values for returning to the transform circuitry.
    Type: Application
    Filed: March 26, 2014
    Publication date: November 13, 2014
    Applicant: ARM LIMITED
    Inventors: Dominic Hugo SYMES, Tomas EDSO
  • Publication number: 20140330879
    Abstract: A signal is decomposed into different components using a transform, with the components then being separately presented to a person in a manner that produces a different cognitive experience than would have resulted from either (a) presentation of the original signal, or (b) presentation of a fully synthesized (inverse transformed) signal.
    Type: Application
    Filed: July 21, 2014
    Publication date: November 6, 2014
    Inventors: Don Wayne Estes, Randall Joseph Stack
  • Publication number: 20140324935
    Abstract: Described herein are technologies pertaining to matrix computation. A computer-executable algorithm that is configured to execute perform a sequence of computations over a matrix tile is received and translated into a global directed acyclic graph that includes vertices that perform a sequence of matrix computations and edges that represent data dependencies amongst vertices. A vertex in the global directed acyclic graph is represented by a local directed acyclic graph that includes vertices that perform a sequence of matrix computations at the block level, thereby facilitating pipelined, data-driven matrix computation.
    Type: Application
    Filed: July 11, 2014
    Publication date: October 30, 2014
    Inventors: Zheng Zhang, Zhengping Qian, Xiuwei Chen, Yuan Yu
  • Publication number: 20140289298
    Abstract: Faster methods for topological categorization and field line calculations are developed by using decomposition regions together with the self-winding techniques first developed in a prior patent application. A point iteration technique provides direct calculation of low order digits of winding counts without use of complex intervals. Easy to calculate derivatives define decomposition interval boundaries which substitute for methods using the slower complex interval processing of the prior patent. Methods common to this and the prior patent are developed for visualizing conformal mappings of iterated functions.
    Type: Application
    Filed: June 9, 2014
    Publication date: September 25, 2014
    Inventor: Michael T. Everest
  • Publication number: 20140280419
    Abstract: Polychoric correlations between two discrete random variables and polyserial correlations between a discrete random variable and a continuous random variable may be determined by using a normal-to-anything (NORTA) method and a stochastic root finding algorithm.
    Type: Application
    Filed: March 15, 2013
    Publication date: September 18, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Vladimir E. Shklover
  • Publication number: 20140280418
    Abstract: This innovation involves a proof of a necessary change in the universal transform describing natural laws. Instead of the prohibitively refining force velocity squared, this system is created by transforms which use force vectors: TWO distinct, separate force vectors that can work in different directions and create a perfect resultant force which will prevent so many of the anomalous problems across scientific design. As well as pave the way for great advancements and new levels of exactness.
    Type: Application
    Filed: March 13, 2013
    Publication date: September 18, 2014
    Inventor: Leonard Alan Bollingham
  • Patent number: 8835204
    Abstract: A method for manufacturing a multi-dimensional target waveguide grating and volume grating with micro-structure quasi-phase-matching. An ordinary waveguide grating is used as a seed grating, and on this basis, a two-dimensional or three-dimensional sampling structure modulated with a refractive index, that is, a sampling grating, is formed. The sampling grating comprises multiple shadow gratings, and one of the shadow gratings is selected as a target equivalent grating. A sampled grating comprises Fourier components in many orders, that is, shadow gratings, a corresponding grating wave vector is [Formula 1], and the grating profile of all the shadow gratings changes with the sampling structure [Formula 2]. In a case where a seed grating wave vector [Formula 3] and a required two-dimensional or three-dimensional grating wave vector do not match, a certain Fourier periodic structure component of the Fourier components of the sampling structure is used to compensate for the wave vector mismatch.
    Type: Grant
    Filed: December 30, 2011
    Date of Patent: September 16, 2014
    Assignee: Nanjing University
    Inventors: Yuechun Shi, Xiangfei Chen
  • Patent number: 8838661
    Abstract: A system and method to reduce roundoff error of Fast Fourier transform (FFT) operation. Data which comes out as an irrational number (a square root) out of twiddle factors on a complex plane, included in a butterfly operation (8p) is preserved intentionally without being calculated in one stage of multiple stages of a multi-stage pipelined FFT, and when it occurs again in a later stage, an operation to multiply the two twiddle factors with each other is performed. This enables to eliminate roundoff errors during the butterfly operation 8p of radix-8. Other applications are also possible such as by overlaying a further stage by a butterfly operation of radix-2 or radix-4.
    Type: Grant
    Filed: November 21, 2011
    Date of Patent: September 16, 2014
    Assignee: International Business Machines Corporation
    Inventors: Yasunao Katayama, Kohji Takano
  • Patent number: 8832172
    Abstract: A configuration for FPGA logic is provided to perform random access channel (RACH) preamble detection used in 3G mobile communications to identify individual rows of a Hadamard matrix using a Walsh Hadamard Transform (WHT). The configuration provides minimal add/subtract circuit blocks for the WHT by using stages, each stage containing a shift register connected to an add/subtract circuit. The shift register has outputs provided from a tap into its nth and n/2 elements, the outputs being connected to an add/subtract circuit, wherein n is the order of the Hadamard matrix. In a further embodiment parallel connected shift registers are used in each stage to increase operation speed.
    Type: Grant
    Filed: March 31, 2005
    Date of Patent: September 9, 2014
    Assignee: Xilinx, Inc.
    Inventors: Neil Lilliott, Andrew David Laney
  • Patent number: 8819097
    Abstract: An apparatus for performing a Fast Fourier Transform (FFT) is provided. The apparatus comprises a reorder matrix, symmetrical butterflies, and a memory. The reorder matrix is configured to have a constant geometry, and the butterflies are coupled in parallel to the reorder matrix. The memory is also coupled to the reorder matrix and each butterfly. The reorder matrix, the butterflies, and the memory can then execute a split radix algorithm.
    Type: Grant
    Filed: September 9, 2011
    Date of Patent: August 26, 2014
    Assignee: Texas Instruments Incorporated
    Inventors: Joyce Y. Kwong, Manish Goel
  • Publication number: 20140237014
    Abstract: The described system and method uses data from interaction between a known wave and an unknown wave to analyze or characterize the unknown wave using cross correlation frequency resolved optical gating (X-FROG). The system may obtain X-FROG trace data from the interaction between the two waves. The system analyzes the X-FROG trace data using a modified principal component generalized projection method strategy to invert the X-FROG trace data, analyzing or characterizing the unknown wave. Results of the analysis can be provided in real time and displayed.
    Type: Application
    Filed: February 20, 2013
    Publication date: August 21, 2014
    Inventor: Daniel James Kane
  • Patent number: 8805909
    Abstract: A method for converting a signal, including the steps of: providing a first representation of the signal in a first domain; converting the first representation of the signal into a second representation of the signal in a second domain, by applying a transform involving a Haar transform and a Hadamard transform, such that a basis of the second domain is maximally incoherent to a Haar basis. The signal is converted to a domain whose basis is maximally incoherent to a Haar basis. Yet, it is not required to convert the input vector representing the signal to a Haar basis first. This allows reducing the number of steps which increases conversion efficiency. Accordingly, obtaining the structure of the signal requires fewer samples.
    Type: Grant
    Filed: April 28, 2011
    Date of Patent: August 12, 2014
    Assignee: International Business Machines Corporation
    Inventors: Paul T. Hurley, Tomas Tuma
  • Patent number: 8788558
    Abstract: A method of operating a data-processing unit to produce a transform comprises calculating first and second output data values based at least on first and second input data values. The method comprises reading the first and second input data values from locations of a first buffer, the locations being determined by first and second read addresses based on first and second read indices. The method also comprises writing the first and second output data values to adjacent memory locations of a second buffer during a single write cycle. Furthermore, the method comprises reading third and fourth input data values from locations of the second buffer, the locations being determined by third and fourth read addresses determined by swapping at least two of the bits of the first and second read indices respectively. A data-processing unit for producing a transform, a transform-computation unit and an electronic apparatus are also described.
    Type: Grant
    Filed: June 26, 2008
    Date of Patent: July 22, 2014
    Assignee: Telefonaktiebolaget L M Ericsson (Publ)
    Inventor: Per Persson
  • Patent number: 8788556
    Abstract: Described herein are technologies pertaining to matrix computation. A computer-executable algorithm that is configured to execute perform a sequence of computations over a matrix tile is received and translated into a global directed acyclic graph that includes vertices that perform a sequence of matrix computations and edges that represent data dependencies amongst vertices. A vertex in the global directed acyclic graph is represented by a local directed acyclic graph that includes vertices that perform a sequence of matrix computations at the block level, thereby facilitating pipelined, data-driven matrix computation.
    Type: Grant
    Filed: May 12, 2011
    Date of Patent: July 22, 2014
    Assignee: Microsoft Corporation
    Inventors: Zheng Zhang, Zhengping Qian, Xiuwei Chen, Yuan Yu
  • Patent number: 8788557
    Abstract: A signal is decomposed into different components using a transform, with the components then being separately presented to a person in a manner that produces a different cognitive experience than would have resulted from either (a) presentation of the original signal, or (b) presentation of a fully synthesized (inverse transformed) signal.
    Type: Grant
    Filed: June 5, 2013
    Date of Patent: July 22, 2014
    Assignee: Innersense, Inc.
    Inventors: Don Wayne Estes, Randall Joseph Stack
  • Publication number: 20140192977
    Abstract: A multiplication method and a modular multiplier are provided. The multiplication method includes transforming a redundant-form multiplier by adding a recoding constant to the multiplier, performing recoding by using the transformed multiplier, and performing partial multiplication between the multiplier and a multiplicand using result values of the recoding.
    Type: Application
    Filed: December 23, 2013
    Publication date: July 10, 2014
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Yong Ki LEE, Sun-Soo SHIN, Jonghoon SHIN, Kyoung Moon AHN, Ji-Su KANG, Kee Moon CHUN
  • Publication number: 20140164455
    Abstract: A signal is decomposed into different components using a transform, with the components then being separately presented to a person in a manner that produces a different cognitive experience than would have resulted from either (a) presentation of the original signal, or (b) presentation of a fully synthesized (inverse transformed) signal.
    Type: Application
    Filed: June 5, 2013
    Publication date: June 12, 2014
    Inventors: Don Wayne Estes, Randall Joseph Stack
  • Publication number: 20140136586
    Abstract: Disclosed is a method of seeking semianalytical solutions to multispecies transport equations coupled with sequential first-order network reactions under conditions wherein a groundwater flow velocity and a dispersion coefficient vary spatially and temporally and boundary conditions vary temporally.
    Type: Application
    Filed: July 15, 2013
    Publication date: May 15, 2014
    Inventors: Heejun Suk, Kyoochul Ha
  • Patent number: 8705337
    Abstract: The present application discloses methods and apparatus for generating a Zadoff-Chu sequence for use by a mobile station. One embodiment discloses generating exponents oof elements of a Zadoff-Chu sequence representing a preamble for uplink synchronization of a mobile station or a mobile station reference signal by first obtaining a preamble index defining the Zadoff-Chu sequence. Then an initial exponent of the first element in the Zadoff-Chu sequence and an initial first difference between exponents of consecutive elements of the Zadoff-Chu sequence are determined. Finally the embodiment discloses determining exponents of the remaining elements in the Zadoff-Chu sequence from the initial first difference and the initial exponent in an iterative procedure that avoids multiplication operations.
    Type: Grant
    Filed: August 22, 2008
    Date of Patent: April 22, 2014
    Assignee: Telefonaktiebolaget LM Ericsson (Publ)
    Inventor: Oskar Mauritz
  • Patent number: 8706786
    Abstract: A signal processing device and an image processing device are provided. The signal processing device includes a matrix calculator for performing a matrix operation selected by a switch part among a DCT matrix operation, a Haar matrix operation, and a Slant matrix operation, with respect to an input signal. Thus, the signal processing device can be implemented in a hybrid architecture capable of selectively processing the DCT-II transform, the Haar transform, and the Slant transform with a single chip.
    Type: Grant
    Filed: November 24, 2010
    Date of Patent: April 22, 2014
    Assignee: Industrial Cooperative Foundation Chonbuk National University
    Inventors: Moon Ho Lee, Dae Chul Park
  • Patent number: 8706787
    Abstract: Provided two CORDIC processors, each including: two input ports representing real and imaginary input ports; and two output ports representing real and imaginary output ports; wherein real and imaginary parts of a first input signal are applied to the imaginary input ports of the first and second CORDIC processors; real and imaginary parts of a second input signal are applied to the real input ports of the first and second CORDIC processors; the first and second CORDIC processors rotate the respective input signals applied thereto by 45 degrees in the clockwise direction; respective data from the real output ports of said first and second CORDIC processors constitute real and imaginary parts of a first output signal; and respective data from the imaginary output ports of said first and second CORDIC processors constitute real part and imaginary part of a second output signal.
    Type: Grant
    Filed: September 26, 2007
    Date of Patent: April 22, 2014
    Assignee: NEC Corporation
    Inventor: James Awuor Oduor Okello
  • Patent number: 8682949
    Abstract: A proximity detection device has transmitting and receiving electrodes and a multiline driving unit that simultaneously applies periodic alternating voltages to at least two of the transmitting electrodes. A measurement unit measures currents or amounts of accumulated charge from the receiving electrodes in synchronization with the simultaneous application of periodic alternating voltages to the at least two transmitting electrodes by the multiline driving unit. A linear computing unit performs linear computation of measurement results from a measurement unit in response to electrostatic capacitances of respective intersections between the transmitting and receiving electrodes. The linear computing unit has a memory unit that stores an output of the linear computation for readout at plural times. A proximity computing unit performs a computation to determine an approach and/or a position of an object relative to a detection area based on the output from the linear computing unit stored in the memory unit.
    Type: Grant
    Filed: August 18, 2010
    Date of Patent: March 25, 2014
    Assignee: Seiko Instruments Inc.
    Inventor: Kenichi Matsushima
  • Patent number: 8676981
    Abstract: A method for providing a virtual cloud service at the lowest actual cost can begin with an optimal transaction handler of a federated virtual service cloud maintaining a virtual resource pool of transactional units. Each transactional unit can represent a service application deployed to a cloud service provided by a cloud service provider having a usage-based service cost model that allows transactional units to be placed in an inactive state to suspend its operating expense. Operational metrics data for the cloud service providers can be continuously captured. In response to a service request, the transactional unit that meets fulfillment requirements of the service request and incurs a lowest actual cost can be determined based upon cost factors derived from the operational metrics data, the usage-based service cost model, and a current usage state of the virtual resource pool. The received service request can be routed to the determined transactional unit.
    Type: Grant
    Filed: May 12, 2011
    Date of Patent: March 18, 2014
    Assignee: International Business Machines Corporation
    Inventors: Joseph Hackett, Leonard S. Hand
  • Publication number: 20140052765
    Abstract: A signal processing circuit respectively transforms complex covariance matrices, which are consecutively inputted at a predetermined period, into upper triangular matrices. The signal processing circuit includes: a storage unit that stores at least N-number of complex covariance matrices; a reading unit that reads matrix elements of the stored complex covariance matrices; a CORDIC calculation circuit that implements a CORDIC algorithm by a pipelined circuit system; and a QR decomposition unit that controls the reading unit and the CORDIC calculation circuit unit to calculate an upper triangular matrix by iteratively using the CORDIC calculation circuit unit on a single complex covariance matrix and that calculates in parallel a transformation of N-number of complex covariance matrices into upper triangular matrices in an interleaved format.
    Type: Application
    Filed: January 13, 2012
    Publication date: February 20, 2014
    Applicant: CANON KABUSHIKI KAISHA
    Inventor: Haruo Yoda
  • Patent number: 8645447
    Abstract: A method and structure for transposing a rectangular matrix A in a computer includes subdividing the rectangular matrix A into one or more square submatrices and executing an in-place transposition for each of the square submatrices Aij.
    Type: Grant
    Filed: January 14, 2005
    Date of Patent: February 4, 2014
    Assignee: International Business Machines Corporation
    Inventors: Fred Gehrung Gustavson, John A. Gunnels
  • Publication number: 20140025715
    Abstract: Processing a neural signal sequence occurs in accordance with a neural signal spiking model that includes an exponential component (EC) and a polynomial component (PC). The exponential component is correlated with the presence of signal sequence noise, and the polynomial component is correlated with the presence of detectable signal sequence spikes distinguishable from the noise. A neural interface includes a frequency shaping amplifier (FSA) configured for receiving input signals; an amplifier gain stage and an analog-to-digital conversion (ADC) stage; a Hilbert transformer configured for performing a Hilbert transform upon neural signal data received from the ADC stage; a linear regression engine configured for estimating EC parameters and PC parameters corresponding to Hilbert transformed neural signal data; and a neural spike probability estimator configured for generating a neural spike probability map based upon the EC parameters and the PC parameters.
    Type: Application
    Filed: July 16, 2013
    Publication date: January 23, 2014
    Inventors: Zhi YANG, Jian XU
  • Patent number: 8631060
    Abstract: A more efficient encoder/decoder is provided in which an N-point MDCT transform is mapped into smaller sized N/2-point DCT-IV, DST-IV and/or DCT-II transforms. The MDCT may be systematically decimated by factor of 2 by utilizing a uniformly scaled 5-point DCT-II core function as opposed to the DCT-IV or FFT cores used in many existing MDCT designs in audio codecs. Various transform factorizations of the 5-point transforms may be implemented to more efficiently implement a transform.
    Type: Grant
    Filed: December 12, 2008
    Date of Patent: January 14, 2014
    Assignee: QUALCOMM Incorporated
    Inventors: Yuriy Reznik, Ravi Kiran Chivukula
  • Patent number: 8626815
    Abstract: In a matrix multiplication in which each element of the resultant matrix is the dot product of a row of a first matrix and a column of a second matrix, each row and column can be broken into manageable blocks, with each block loaded in turn to compute a smaller dot product, and then the results can be added together to obtain the desired row-column dot product. The earliest results for each dot product are saved for a number of clock cycles equal to the number of portions into which each row or column is divided. The results are then added to provide an element of the resultant matrix. To avoid repeated loading and unloading of the same data, all multiplications involving a particular row-block can be performed upon loading that row-block, with the results cached until other multiplications for the resultant elements that use the cached results are complete.
    Type: Grant
    Filed: March 3, 2009
    Date of Patent: January 7, 2014
    Assignee: Altera Corporation
    Inventor: Martin Langhammer
  • Patent number: 8606839
    Abstract: A method for computing a fast Fourier transform (FFT) in a parallel processing structure uses an interleaved computation process. In particular, the interleaved FFT computation process intertwines the output of two different shifted Fourier matrices to obtain a Fourier transform of an input vector. Next, an even-odd extension process is applied to the transformed input vector, whereupon various terms are grouped in a computational tree. As such, the resulting segmentation of the computation allows the fast Fourier transform to be computed in a parallel manner.
    Type: Grant
    Filed: August 21, 2008
    Date of Patent: December 10, 2013
    Assignee: The University of Akron
    Inventors: Dale H. Mugler, Nilimb Misal
  • Patent number: 8595278
    Abstract: Aspects of a method and system for unconstrained frequency domain adaptive filtering include one or more circuits that are operable to select one or more time domain coefficients in a current filter partition. A value may be computed for each of the selected one or more time domain coefficients based on a corresponding plurality of frequency domain coefficients. The corresponding plurality of frequency domain coefficients may be adjusted based on the computed values. A subsequent plurality of frequency domain coefficients in a subsequent filter partition may be adjusted based on the computed values. Input signals may be processed in the current filter partition based on the adjusted corresponding plurality of frequency domain coefficients. A time-adjusted version of the input signals may be processed in a subsequent filter partition based on the adjusted subsequent plurality of frequency domain coefficients.
    Type: Grant
    Filed: June 23, 2009
    Date of Patent: November 26, 2013
    Assignee: Broadcom Corporation
    Inventors: Kuoruey Han, Peiqing Wang, Linghsiao Wang, Kishore Kota, Arash Farhoodfar
  • Patent number: 8583718
    Abstract: According to certain embodiments, a first Boolean function and a second Boolean function are received. The first Boolean function represents a first data set, and the second Boolean function represents a second data set. The first Boolean function and the second Boolean function are transformed to a first arithmetic function and a second arithmetic function, respectively. A first hash code and a second hash code are calculated from the first arithmetic function and the second arithmetic function, respectively. If the first hash code equals the second hash code, the first Boolean function and the second Boolean function are designated as equivalent; otherwise, the first Boolean function and the second Boolean function are designated as not equivalent.
    Type: Grant
    Filed: August 17, 2010
    Date of Patent: November 12, 2013
    Assignee: Fujitsu Limited
    Inventors: Stergios Stergiou, Jawahar Jain
  • Patent number: 8577949
    Abstract: A system for a conjugate gradient iterative linear solver that calculates the solution to a matrix equation comprises a plurality of gamma processing elements, a plurality of direction vector processing elements, a plurality of x-vector processing elements, an alpha processing element, and a beta processing element. The gamma processing elements may receive an A-matrix and a direction vector, and may calculate a q-vector and a gamma scalar. The direction vector processing elements may receive a beta scalar and a residual vector, and may calculate the direction vector. The x-vector processing elements may receive an alpha scalar, the direction vector, and the q-vector, and may calculate an x-vector and the residual vector. The alpha processing element may receive the gamma scalar and a delta scalar, and may calculate the alpha scalar. The beta processing element may receive the residual vector, and may calculate the delta scalar and the beta scalar.
    Type: Grant
    Filed: July 7, 2009
    Date of Patent: November 5, 2013
    Assignee: L-3 Communications Integrated Systems, L.P.
    Inventors: Matthew P. DeLaquil, Deepak Prasanna, Antone L. Kusmanoff
  • Patent number: 8572149
    Abstract: Disclosed are apparatus and methods for dynamic data-based scaling of data. The disclosed methods and apparatus involve storing one or more input data samples, which are to be scaled and input to a processing function such as a Fast Fourier Transform. A scaling value operable for scaling the one or more data samples is determined based on the one or more input data samples, and then the stored data samples are scaled based on the computed scaling value when read out of storage prior to the processing function. The scaling of data based on the input data allows the data to be scaled dynamically, not statically, and ensures that the data fits within a desired bit width constraint of the processing function thereby economizing processing resources.
    Type: Grant
    Filed: March 25, 2010
    Date of Patent: October 29, 2013
    Assignee: QUALCOMM Incorporated
    Inventors: Brian C. Banister, Surendra Boppana