Abstract: According to certain embodiments, a first characteristic function representing a first set of samples and a second characteristic function representing a second set of samples are generated. The first characteristic function and the second characteristic function are transformed to a first arithmetic function and a second arithmetic function, respectively. A first hash code and a second hash code are calculated from the first arithmetic function and the second arithmetic function, respectively. If the first hash code equals the second hash code, the first set of samples and the second set of samples are designated as equivalent; otherwise, the first set of samples and the second set of samples are designated as not equivalent.

Abstract: The present invention discloses a signal processing method and a data processing method and apparatus. A time-domain to frequency-domain signal processing method includes: pre-processing time-domain data; pre-rotating the pre-processed data by using a rotation factor a·WNn+0.5; performing a discrete Fourier transform (DFT) of N/4 points on the pre-rotated data; and post-rotating the data transformed by the DFT by using a rotation factor b·WNk+0.5 to obtain frequency-domain data. A frequency-domain to time-domain signal processing method includes: twiddling frequency-domain data; pre-rotating the twiddled data by using a rotation factor c·WNk+0.5; performing a DFT of N/4 points on the pre-rotated data; and post-rotating the data transformed by the DFT by using a rotation factor d·WNn+0.5; and post-processing the post-rotated data to obtain time-domain data. The present invention increases the efficiency of signal processing.

Abstract: Techniques for perforating IFFT pipelining are described. In some aspects, the pipelining is achieved with a processing system having a memory with a first, second and third sections, an encoder configured to process data in each of the first, second and third memory sections in a round robin fashion, an IFFT configured to process the encoded data in each of the first, second, and third sections in a round robin fashion, and a post-processor configured to process the IFFT processed data in each of the first, second and third memory sections in a round robin fashion.

Abstract: A signal processor for providing a processed version of an input signal in dependence on the input signal has a windower configured to window a portion of the input signal, or of a pre-processed version thereof, in dependence on a signal processing window described by signal processing window values for a plurality of window value index values, in order to obtain the processed version of the input signal. The signal processor also has a window provider for providing the signal processing window values for a plurality of window value index values in dependence on one or more window shape parameters.

Abstract: A finite impulse response (FIR) filter having a differential output and capable of having negative coefficients, and a method of designing the filter, is disclosed. In contrast to the prior art, in which two output signals requires the use of two identical sets of impedance devices corresponding to the Fourier coefficients that create the desired response of the filter, the described method and system uses only a single set of impedance devices, and thus approximately one-half of the number of impedance devices used in the prior art. This is accomplished by appropriately selecting which resistors contribute to which output, so that a differential output may be obtained that is substantially the same as if impedance devices corresponding to all of the coefficients were used for each signal.

Abstract: Method for determining at least one wavelet coefficient Ws(?) of a wavelet transform of a signal in which the mother wavelet of the transform has a support subdivided into J?1 intervals bound by (J+1) extremity points, and is defined by a polynomial of a maximum level N?1 on each interval. The method includes calculating all or some of the primitives of the signal of order k between 2 and N+1, at least at (J+1) points corresponding to extremity points of the intervals of the wavelet support dilated by a factor of s and translated by a time ?; calculating the convolution of said or each primitive sampled in this way with a respective succession of (J+1) coefficients Cik(s), dependent upon said wavelet; and determining the wavelet coefficient by calculating a linear combination of convolutions. Steps a) to c) are implemented by a processor configured or programmed in an appropriate manner.

Abstract: The invention utilizes low complexity estimates of complex functions to perform combinatorial coding of signal vectors. The invention disregards the accuracy of such functions as long as certain sufficient properties are maintained. The invention in turn may reduce computational complexity of certain coding and decoding operations by two orders of magnitude or more for a given signal vector input.

Abstract: A transform calculator includes a plurality of memories. A memory mapping rules module is configured to apportion points of a discrete time domain sequence among the plurality of memories. A pipelined data path is configured to iteratively process pairs of the points of the discrete time domain sequence received from the plurality of memories. A control module is configured to select the pairs of the points in the plurality of memories for processing by the pipelined data path, wherein only one point of each of the pairs of the points is selected at a given time.

Abstract: There is provided a method for generating a table for reordering the output of a Fourier transform, the Fourier transform being performed on a predefined number of input samples, the method comprising performing one or more decomposition stages on a sequence corresponding in number to the predefined number of input samples to form a representation of the output of the Fourier transform; wherein at least one of the decomposition stages comprises a composite operation that is equivalent to two or more operations; and rearranging the representation of the output of the Fourier transform to generate a reordering table.

Abstract: To transmit a multi-carrier signal, a transmitter provides zero symbols for guard subbands, performs OFDM modulation, and filters the resultant time-domain samples with a pulse shaping filter. To transmit a single-carrier signal, the transmitter partitions the single-carrier signal into segments. Each segment contains up to K samples and is padded, if needed, to the length of an OFDM symbol. Each padded segment is transformed from the time domain to the frequency domain to generate a corresponding frequency-domain segment with K symbols. For each frequency-domain segment, the symbols corresponding to the guard subbands are set to zero. Each frequency-domain segment is then transformed from the frequency domain to the time domain to generate a corresponding time-domain segment. A cyclic prefix may or may not be appended to each time-domain segment. Each time-domain segment is filtered with the same pulse shaping filter to generate an output waveform for the single-carrier signal.

Abstract: A method for providing an adiabatic RF pulse that is an inversion or refocusing pulse for a RF pulse sequence is provided. A linear phase frequency profile (Flp(?)) is determined for the adiabatic RF pulse. A quadratic phase is applied to the linear phase frequency profile for the adiabatic RF pulse to obtain F(?), wherein the applying the quadratic phase comprises setting F(?)=Flp(?)eik?2. A polynomial ? is set to equal a Fourier Transform (F(?)). A corresponding minimum phase ? polynomial is determined for the ? polynomial. (?,?) are set as inputs to an inverse Shinnar Le-Roux transform to generate an adiabatic RF waveform. The adiabatic RF waveform is truncated to produce the adiabatic RF pulse, wherein k>0.03?/(?5??p)/(N+1) and k<kmax, where kmax is a value at which the adiabatic RF pulse is truncated at 25% of a maximum RF amplitude.

Abstract: This invention relates to the automatic detection and identification of broadcast programming, for example music, speech or video that is broadcast over radio, television, the Internet or other media. “Broadcast” means any readily available source of content, whether now known or hereafter devised, including streaming, peer to peer delivery or detection of network traffic. A known program is registered by deriving a numerical code for each of many short time segments during the program and storing the sequence of numerical codes and a reference to the identity of the program. Detection and identification of an input signal occurs by similarly extracting the numerical codes from it and comparing the sequence of detected numerical codes against the stored sequences. Testing criteria is applied that optimizes the rate of correct detections of the registered programming. Other optimizations in the comparison process are used to expedite the comparison process.

Abstract: Signals (for example audio signals) which seem to be completely random, yet for which universally valid statements should be made, for example in the form of parameterizations which, on average, are accurate and can be determined only on the basis of short signal sections. Instead of simulating for example a Gaussian process, projections of algebraic operations—on the plane of real or complex numbers—of said signal sections for example are observed and proven for said astonishingly simple algebraic invariants. Said invariants are subsequently used as tags in order to perform, for example, a selection according to their frequency. On average, the present system proves to be more efficient than known methods to date. The practical-commercial application of said system covers nearly the entire signal processing field. The present document addresses in particular the stochastic observation of audio signals, as known for example from the field of digital audio broadcasting.

Abstract: The ability to examine the frequency content of a signal is critical in a variety of fields, and many techniques have been proposed to fill this need, including the Fourier and wavelet family of transforms. One of these, the S-transform, is a Fourier based transform that provides simultaneous time and frequency information similar to the wavelet transform but uses sinusoidal basis functions to produce true frequency and globally referenced phase measurements. It has been shown to be useful in several medical imaging applications but its use is limited due to high computational requirements of the original, continuous form. The described embodiments include a general framework for describing linear time-frequency transforms, using the Fourier, wavelet and S-transforms as examples. As an illustration of the utility of this formalism, a fast discrete S-transform algorithm is developed that has the same computational complexity as the fast Fourier transform.

Abstract: The present invention relates to a memory address generating method and a twiddle factor generator using the memory address generating method in a fast Fourier transform (FFT) system. In the memory address generating method for generating a memory address of a twiddle factor in a fast Fourier transform (FFT) system according to an embodiment of the present invention: a) a temporary address value of a second twiddle factor is induced and generated based on a first twiddle factor; b) a control signal for controlling the system is generated based on the generated temporary address value; and c) a memory address value of the second twiddle factor is generated from the temporary address value.

Abstract: A CORDIC processor has a plurality of stages, each of the stages having a X input, Y input, a sign input, a sign output, an X output, a Y output, a mode control input having a ROTATE or VECTOR value, and a stage number k input, each CORDIC stage having a first shift generating an output by shifting the Y input k times, a second shift generating an output by shifting X input k times, a multiplexer having an output coupled to the sign input when the mode control input is ROTATE and to the sign of the Y input when the mode input is VECTOR, a first multiplier forming the product of the first shift output and the multiplexer output, a second multiplier forming the product of the second shift output and an inverted the multiplexer output, a first adder forming the X output from the sum of the first multiplier output and the X input, and a second adder forming the Y output from the sum of the second multiplier output and the Y input.

Abstract: Multiple transform sizes improve video coding efficiency, but also increase the implementation complexity. Furthermore, both forward and inverse transforms need to be supported in various consumer devices. Embodiments provide a unified forward and inverse transform architecture that supports computation of both forward and inverse transforms for multiple transforms sizes using shared hardware circuits. The unified architecture exploits the symmetry properties of forward and inverse transform matrices to achieve hardware sharing across different the transform sizes and also between forward and inverse transform computations.

Abstract: Methods and systems of processing and displaying data that include obtaining and processing time-time data to obtain an in-phase sum of the time-time data, and of providing and utilizing the in-phase sum of the time-time data to generate a graphical display of the Radon sum of the time-time data. The in-phase sum of the time-time data may be provided for display, for example, by outputting a data signal suitable for generating a graphical representation of the in-phase sum of the time-time data, and the output data signal may be utilized to generate a graphical representation of the in-phase sum of the time-time data.

Abstract: A linear feedback shift calculation apparatus, into which input data is input, and which outputs output data, including: an L generation unit which generates q values of q0 to qN?2 represented by: q k = { p 0 ( k = 0 ) p k + ? i = 0 k - 1 ? q k - 1 - i × p i ( 1 ? k ? N - 2 ) Equation ? ? 1 (where, p0, p1, . . . , pN?1, q0, q1, . . .

Abstract: Repetitive synchronized signal events may be detected in received raw signal data that contains a signal. The type of signal, element length (or minimum interval) and/or other characteristics of such repetitive synchronized signal events may also be optionally determined. The disclosed methods and systems may be implemented for processing signals in real time as part of a receiver or transceiver system, or may be implemented by one or more computer processing components that are configured to process stored raw signal data or signal data received from another source, such as across a computer network.

Abstract: To generate at least one hash value for a feature vector that represents a data object, a discrete orthogonal transform is applied on a second vector produced from the feature vector. Applying the discrete orthogonal transform on the second vector produces a third vector. At least one value is selected from the third vector to produce the hash value. The at least one hash value is used to perform an action.

Abstract: A signal processor is configured to perform a process equivalent to performing a series of fixed-to-rotating coordinate conversion, a predetermined process and then rotating-to-fixed coordinate conversion, while maintaining linearity and time-invariance. The signal processor performs a process given by the following matrix G: G = [ F ? ( s + j? 0 ) + F ? ( s - j? 0 ) 2 F ? ( s + j? 0 ) - F ? ( s - j? 0 ) 2 ? j - F ? ( s + j? 0 ) - F ? ( s - j? 0 ) 2 ? j F ? ( s + j? 0 ) + F ? ( s - j? 0 ) 2 ] where F(s) is a transfer function representing the predetermined process, ?0 is a predetermined angular frequency and j is the imaginary unit.

Abstract: In one embodiment, a circuit for matrix decomposition is provided. The circuit includes an input circuit for receiving a first matrix. A permutation circuit is coupled to the input circuit and configured to interchange columns of the first matrix according to a selected permutation to produce a second matrix. A systolic array is coupled to the permutation circuit and configured to perform QR decomposition of the second matrix to produce a third matrix and a fourth matrix. A reverse permutation circuit is coupled to the systolic array and configured to interchange rows of the third matrix according to an inverse of the selected permutation to produce a first factor matrix and interchange rows of the fourth matrix according to the inverse of the selected permutation to produce a second factor matrix.

Abstract: In an approximation computation apparatus, a location monitor designates, each time the number of data of a received data sequence exceeds an integer l, a starting location of the received data for calculating reduced received-data; a dimensionality reducer dimensionally reduces each data sequence including the received data after the corresponding designated starting location by random projection to generate the reduced received-data; an object selecting controller controls an object in response to a result of monitoring from the location monitor of the number of the received data reaching another integer n, deletes currently-stored object data, selects the reduced received-data after the oldest reduced received-data in the reduced received-data, and substitutes and updates an object data sequence to the selected reduced received-data; and a coefficient approximator calculates an approximate value of a wavelet coefficient on the basis of the object data and a wavelet matrix.

Abstract: A Montgomery multiplication device calculates a Montgomery product of an operand X and an operand Y with respect to a modulus M and includes a plurality of processing elements. In a first clock cycle, two intermediate partial sums are created by obtaining an input of length w?1 from a preceding processing element as w?1 least significant bits. The most significant bit is configured as either zero or one. Then, two partial sums are calculated using a word of the operand Y, a word of the modulus M, a bit of the operand X, and the two intermediate partial sums. In a second clock cycle, a selection bit is obtained and one of the two partial sums is selected based on the value of the selection bit. Then, the selected partial sum is used for calculation of a word of the Montgomery product.

Abstract: In a data processing system, having a twiddle factor unit, a method for performing a mixed-radix discrete Fourier transform (DFT) having a block size, N, and a maximum block size, Nmax, wherein the maximum block size includes a radix that is not a power of 2 is provided. The method includes receiving a delta value at an input of the twiddle factor unit, the delta value representing a ratio of a modified maximum bock size to the block size, wherein the modified maximum block size is a power of 2. The method further includes using the delta value to obtain a step size for generating indices of a look-up table stored within the twiddle factor unit, wherein the look-up table stores real and imaginary components of twiddle factors corresponding to a set of block sizes of the DFT.

Abstract: A device that detects the presence of several amplitude-modulated high-frequency signals in a sum signal with closely-adjacent carrier frequencies. The sum signal is phase-demodulated by a phase demodulator and Fourier-transformed by a Fourier-transformation device. On the basis of the Fourier transform, the presence of several carrier frequencies is determined by an evaluation device.

Abstract: Methods and apparatus for relative pitch tracking of multiple arbitrary sounds. A probabilistic method for pitch tracking may be implemented as or in a pitch tracking module. A constant-Q transform of an input signal may be decomposed to estimate one or more kernel distributions and one or more impulse distributions. Each kernel distribution represents a spectrum of a particular source, and each impulse distribution represents a relative pitch track for a particular source. The decomposition of the constant-Q transform may be performed according to shift-invariant probabilistic latent component analysis, and may include applying an expectation maximization algorithm to estimate the kernel distributions and the impulse distributions. When decomposing, a prior, e.g. a sliding-Gaussian Dirichlet prior or an entropic prior, and/or a temporal continuity constraint may be imposed on each impulse distribution.

Abstract: Methods for determining variance properties of a noise component of a raw signal of a machine or a system. An example method includes recording a signal using a noise estimation unit, numerically differentiating the signal using a first module of the noise estimation unit to obtain a differentiated signal, identifying, using a second module of the noise estimation unit, a histogram which corresponds to the differentiated signal, and determining using the histogram, a variance property of the noise component of the signal.

Abstract: A decoding apparatus includes a random number generating section and a decoding section. The random number generating section generates random numbers according to distribution of original data corresponding to respective quantization indexes. The decoding section generates decoded data on a basis of the random numbers generated by the random number generating section.

Abstract: The present invention relates to a efficient implementation of integer and fractional 8-length or 4-length, or 8×8 or 4×4 DCT in a SIMD processor as part of MPEG and other video compression standards.

Abstract: Methods and systems are disclosed for computing one or more continuous wavelet transforms on a dedicated integrated circuit. The systems comprise an integrated circuit having a receiver, memory, and processing circuitry. The receiver receives input data corresponding to an input signal. The memory stores information corresponding to one or more wavelet functions scaled over a set of scales. The processing circuitry is configured to compute, in-parallel, various portions of a single continuous wavelet transform of the input signal based on the received input data and the stored information corresponding to a single wavelet function computed over a set of scales.

Abstract: Language-integrated query (LINQ) operators can be extended to a set of vectors associated with a digital signal processing (DSP) environment. A language-integrated query (LINQ) operator can be created to execute a change of basis for a set of vectors. LINQ operators can be further be utilized with specifically generated parameters to perform a change of basis for the set of vectors. Additionally, the standard LINQ operators can be extended to enable querying with LINQ against the set of vectors.

Abstract: A CORDIC processor has a plurality of stages, each of the stages having a X input, Y input, a sign input, a sign output, an X output, a Y output, a mode control input having a ROTATE or VECTOR value, and a stage number k input, each CORDIC stage having a first shift generating an output by shifting the Y input k times, a second shift generating an output by shifting X input k times, a multiplexer having an output coupled to the sign input when the mode control input is ROTATE and to the sign of the Y input when the mode input is VECTOR, a first multiplier forming the product of the first shift output and the multiplexer output, a second multiplier forming the product of the second shift output and an inverted the multiplexer output, a first adder forming the X output from the sum of the first multiplier output and the X input, and a second adder forming the Y output from the sum of the second multiplier output and the Y input.

Abstract: A method of detecting and isolating at least one rhythmic component from a discrete-time input signal, comprises subjecting the input signal to discrete wavelet packet transform multi-resolution analysis; applying wavelet packet basis selection criteria to the result of the analysis to evaluate rhythmic signal features of the input signal; and isolating at least one rhythmic signal component from the input signal based on the evaluation.

Abstract: A discrete cosine transform (DCT) and inverse discrete cosine transform (IDCT) circuit includes a microcode memory, a processor, and a butterfly operation circuit. The microcode memory stores multiple microcode groups corresponding to DCT/IDCT operations and each of the microcode groups includes a series of microcodes. The processor obtains one of the microcode groups corresponding to one of the DCT/IDCT operations to be performed and retrieves microcodes in the obtained microcode group in sequence. The butterfly operation circuit performs butterfly operations according to the retrieved microcodes to execute one of the DCT/IDCT operations.

Abstract: An apparatus, a computer readable medium to instruct a process to implement a method, and a method of reducing blocking artifacts and/or noise in an image that has been compressed by a block-based encoding process. The method includes deblocking the image using overlapped forward directional transforms, the overlapped forward directional transforms including directional selecting to filter across horizontal and vertical boundaries, denoising the image, in one version edge detecting to classify individual pixels as to whether or not they belong to edge features, and generating output pixels by locally adapting to whether the pixels are in block boundaries, and/or include edge features.

Abstract: An exemplary embodiment of the present invention provides a lattice reduction method comprising obtaining a preliminary estimate of a transformation matrix, generating a covariance matrix based on the preliminary estimate of the transformation matrix, reducing diagonal elements of the covariance matrix to generate a unimodular transformation matrix, and using the unimodular transformation matrix to obtain an estimate of an input.

Abstract: An adaptive low pass filtering process with a filter delay DA is conducted in parallel with reference low pass filtering process with a filter delay DR which is greater than DA. The error is measured between a delayed version of the adaptive process output and the reference process output. Filter parameters of the adaptive process are controlled to minimise the error.

Abstract: A system and method for estimating a signal based on a stream of randomly generated samples. The method includes: (a) receiving a sample; (b) generating a sampling vector; (c) multiplying the sample and the sampling vector to obtain a current back projection; (d) computing a first intermediate vector that represents an average of the current back projection and previous back projections; (e) transforming the first intermediate vector to determine a second intermediate vector; (f) identifying locations where the second intermediate vector attains its k largest values; (g) computing an estimate for the transformation of the signal by solving a system of equations based on the identified locations, the received sample value, previously received sample values, the sampling vector and previously generated sampling vectors; (h) inverse transforming the transformation estimate to determine an estimate of the signal; and (i) storing the signal estimate.

Abstract: Faster methods for topological categorization and field line calculations are developed by using decomposition regions together with the self-winding techniques first developed in a prior patent application. A point iteration technique provides direct calculation of low order digits of winding counts without use of complex intervals. Easy to calculate derivatives define decomposition interval boundaries which substitute for methods using the slower complex interval processing of the prior patent. Methods common to this and the prior patent are developed for visualizing conformal mappings of iterated functions.

Abstract: A method is disclosed for transmitting measurement data from a transmitter system to a receiver system by way of a transmission link of a medical device. In an embodiment, the measurement data, as input data of a transformation method, is transformed to output values and, after transmission, back transformed again, the values of the input data lying between a maximum value and a minimum value and an assignment function being used for compression purposes, to allocate an output value to every value of the input data, a root function being used as the assignment function for at least some of the values.

Abstract: A method and apparatus are presented for performing wavelet transforms, post transform processing and inverse wavelet transforms whereby hardware complexity is reduced and processor performance is enhanced by performing the forward and inverse wavelet transformations and post transform processing in variable precision arithmetic. Optimal decreases in the operational arithmetic precision of different wavelet scale coefficients, multiplication and weighting operations, and other operations, results in reduced computational complexity, increased speed, and in some cases better signal to noise ratios.

Abstract: A method estimates parameters of 3-phase voltage signals to synchronize a power grid in a presence of a voltage unbalance by transforming the 3-phase voltage signals to ??-reference signals using a Clark transformation matrix, and estimating sinusoidal signals and corresponding quadrature signals of the ??-reference signals using an extended Kalman filter, and determining a phase angle of a positive sequence based on a relationship of the phase angle to the estimated the sinusoidal signals.

Abstract: The present invention relates to computing circuits and method for running an MPEG-2 AAC or MPEG-4 AAC algorithm efficiently, which is used as an audio compression algorithm in multi-channel high-quality audio systems, on programmable processors. In accordance with the present invention, the IMDCT process which takes large part of the amount of the operations in implementation of an MPEG-2/4 AAC algorithm can be performed in efficient. In addition, while the architecture of the existing digital signal processor is still used, the performance can be improved by means of the addition of the architecture of the address generator, Huffman decoder, and bit processing architecture. After all, to design and change the programmable processor is facilitated.

Abstract: For converting first and second blocks of discrete values into a transformed representation, the first block is transformed according to a first transformation rule and then rounded. Then, the rounded transformed values are summed with the second block of original discrete values, to then process the summation result according to a second transformation rule. The output values of the transformation via the second transformation rule are again rounded and then subtracted from the original discrete values of the first block of discrete values to obtain a block of integer output values of the transformed representation. By this multi-dimensional lifting scheme, a lossless integer transformation is obtained, which can be reversed by applying the same transformation rule, but with different signs in summation and subtraction, respectively, so that an inverse integer transformation can also be obtained.

Abstract: A system, method and chip for transforming data through a Rung-Kutta integration of a single point on a plane defined by X, Y, and Z values along X, Y and Z axes from a travel time data volume. The system includes at least one memory bank and at least one alternate memory bank and at least one single cycle Runge-Kutta travel time generator in communication with the memory banks. The single cycle Runge-Kutta travel time generator reads data from the at least one memory bank, and transforms the data by performing a Runge-Kutta integration on points of a plane defined by X, Y, and Z values along X, Y and Z axes in a travel time data volume and slowness data to generate another plane of values with the integration carried forward by a half step; and writes the data back to the at least one alternate memory bank.

Abstract: An Inverse Hadamard Transform (IHT) converter and system includes a first group of registers for receiving coefficients inputted to the IHT converter; a first adder for adding selected the coefficients stored in the first group of registers; a second group of registers for receiving results from the first adder; and a second adder for adding selected the results stored in the second group of registers.

Abstract: Methods of generating Hilbert space-filling indexes using simple bit-wise transformation are described herein. One method is based on a linear-based transformation uses bit-wise AND and XOR operations on a simple input index counter. In another method, the regular structure of the transform matrix was then used to obtain a Gray-based transform at a reduced complexity. Due to the simple and regular structure of the transformation, an efficient hardware implementation of generating indexes (addresses) along the Hilbert curve results.

Abstract: Methods for transposing elements of a sequence according to a rule, wherein the rule is derived from pseudo-noise or pseudo-noise like binary and non-binary sequences are disclosed. Sequences of transposed symbols can be recovered by applying a reversing rule. Sets of orthogonal hopping and transposition rules are created by applying transposition rules upon themselves. Sets of orthogonal hopping and transposition rules are also created from binary and non-binary Gold sequences.