Abstract: A transmission apparatus is capable of accessing a register of a cable satisfactorily. An inquiry about the presence or absence of a register in a cable connected between the transmission apparatus and a reception apparatus is performed. In response to the inquiry, information indicating the presence or absence of the register is received from the cable. When the information indicates the presence of the register, the register of the cable is accessed so that acquisition of storage data or writing in the storage data is performed.

Abstract: Keyboard dock verification can be performed. A dock report can be created and stored on a keyboard dock as part of the manufacturing process. The dock report can include device information for the child devices of the keyboard dock. When the keyboard dock is attached to a computing device, a dock manager executing on the computing device can query the keyboard dock to retrieve device information for the keyboard dock's child devices. The dock manager can create a dock report from the retrieved device information. The dock manager can also retrieve the dock report that is stored on the keyboard dock and compare it to the dock report that the dock manager created. If the two dock reports match, the dock manager can determine that the keyboard dock is verified and can allow the keyboard dock, including its child devices, to be enumerated on the computing dock.

Abstract: Systems and methods for identifying memory devices for swapping virtual machine memory pages. An example method may comprise: identifying, by a processing device, a workload type associated with a workload being executed by a computer system; identifying a memory device associated with the workload type; evaluating a memory pressure metric reflecting a period of time during which an application being executed by the computer system has been blocked by a memory allocation operation; and responsive to determining that the memory pressure metric exceeds a threshold value, allocating a memory block on the identified memory device.

Abstract: Software allows images captured during product development on a mobile device (e.g., smartphone or other client device) to be uploaded to a design management system from the mobile device. Mark-up annotations and comments can be added to the images at the mobile device. Assignment of tasks related to the images can be made from the mobile device.

Abstract: Embodiments of the disclosure may provide an apparatus and method of controlling and altering the acoustic output of audio devices that are used in conjunction with a computing device. In some embodiments, the apparatus and methods include a wireless speaker communication method and computing device software application that are configured to work together to more easily setup and deliver audio information from an audio source to one or more portable audio speakers.

Abstract: Disclosed herein are system, method, and computer-readable storage-medium embodiments for automatic discovery of translated text. An embodiment may include relating a user-interface (UI) output with a corresponding localization object in a code-base index and matching a first instance of a unique identifier with a second instance of the unique identifier. The first instance of the unique identifier may be located in a code base corresponding to the code-base index, and the second instance of the unique identifier may correspond to the UI output. The code base may be structured to comprise the unique identifier in a given context. Further operations may include retrieving a reference to the corresponding localization object of the UI output in response to a determination that the UI output is incorrect in the given context, and outputting the reference to the corresponding localization object. The reference may be copied into a ticket of a tracking system.

Abstract: Embodiments for accessing data are provided. A method of accessing data comprises: receiving a request to access first data in a storage device, at least a part of data in the storage device being cached in a cache, and index information of the at least a part of data being recorded in an index structure associated with the cache; querying the index structure to determine whether the first data is cached in the cache; and accessing the first data based on a result of the query. Embodiments of the present disclosure can improve data accessing efficiency while saving memory consumption.

Abstract: A method can be used for addressing a slave integrated circuit connected to a bus. The slave integrated circuit has a default address on the bus. The method includes receiving, at the slave integrated circuit, an addressing message conveyed on the bus. The addressing message contains a replacement address. The method also includes replacing the default address within the slave integrated circuit with the replacement address upon receiving the addressing message, restarting the slave integrated circuit, and upon the restarting, assigning the replacement address as a new default address.

Abstract: Technologies for error handling of high speed input/output (I/O) data transfer is disclosed. Before a data transfer between an external I/O device (such as an SDIO card, other SDIO device, or USB device) and an I/O host controller of a compute device, tuning registers of the I/O host controller may be set. If the data transfer is unsuccessful, the compute device may access a table stored in the I/O host controller (or stored elsewhere in the compute device) which includes other sets of values of the tuning registers that may be used to successfully transfer data, and then attempt the data transfer with another set of values of the tuning registers. In order to initialize the table with sets of values that may be used, the compute device first performs test data transfers with various settings of the tuning registers.

Abstract: The present technology relates to a memory device and a method of operating the memory device. The memory device includes a target block manager configured to store a target block address on which a refresh operation is to be performed and output a refresh signal for the target block corresponding to the target block address when an auto refresh command is received, and a data transmission controller configured to output a transmission signal and a buffer control signal for transmitting data between the target block or the buffer block and the temporary buffer circuit in response to the refresh signal.

Abstract: A memory system includes: a memory device; a memory; a plurality of queues; a victim block manager suitable for storing garbage collection information corresponding to a victim block in the memory; a queue manager suitable for classifying the garbage collection information and the queues according to attribute and queuing the classified garbage collection information to the corresponding queues, respectively; and a garbage collection performer suitable for controlling a garbage collection operation of the memory device based on the queued garbage collection information.

Abstract: A hybrid mapped redundant array of independent nodes (mapped RAIN) for data storage is disclosed. A hybrid mapped RAIN cluster can be allocated on top of one or more real data clusters comprising storage devices of different storage device types. Mapping of data storage locations in a hybrid mapped RAIN cluster can facilitate use of a real cluster at a different granularity than conventionally administered in a real cluster of storage locations, can enable selectable use of the different storage device types based on attributes attributed to the storage device types, how data will be stored, customer agreements, etc. Data storage schema associated with the storage device types can result in constraints on allocating storage devices of the different storage device types in a hybrid mapped RAIN cluster to forestall possible data loss events. A hybrid mapped RAIN cluster based on storage device types can enable tiered mapped storage.

Abstract: In accordance with embodiments of the present disclosure, an information handling system may include a processor, a memory communicatively coupled to the processor, and an allocation agent embodied in a program of executable instructions and configured to, when executed by the processor, maintain an attribute index setting forth one or more attributes for each of one or more memory modules of the memory, and based on the one or more attributes and one or more memory requirements of an application executing on the information handling system, dynamically allocate the one or more memory modules to a namespace associated with the application.

Abstract: An apparatus includes a host and a baseboard. An out-of-band request is received via a host network interface of the host. The baseboard includes a management controller operating independently of the host and coupled to a management network interface separate from the host network interface. The out-of-band request is sent via an in-band communications channel from a proxy server of the host to a management agent running on the management controller microprocessor. Management data is formatted via the management agent. The management data is sent to the proxy server via the in-band communications channel. The management data describes hardware status that is obtained via the management controller in response to the out-of-band request. The management data is sent from the host network interface in response to the out-of-band request.

Abstract: Enhanced data storage devices in various form factors are discussed herein. In one example, a storage drive includes a 2.5-inch form factor chassis that structurally supports elements of the storage drive, and at least one host connector. The storage drive also includes a plurality of M.2 storage device connectors, and a Peripheral Component Interconnect Express (PCIe) switch circuit configured to receive storage operations over the at least one host connector and transfer the storage operations for delivery to ones of the plurality of M.2 storage device connectors over associated device PCIe interfaces. The storage drive also includes power circuitry configured to provide holdup power to ones of the plurality of M.2 storage device connectors after loss of input power over the at least one host connector.

Abstract: During degeneration processing in which a first electronic device is degenerated based on an abnormality which has occurred in the first electronic device among the plurality of electronic devices after a new firmware used for switching of firmware of the electronic devices is stored in the first memories of the electronic devices, a storage control device confirms whether switching to new firmware has been completed in a second electronic device among the plurality of electronic devices, where the second electronic device is on a connection route coupling the first electronic device which is a firmware switching target and the storage control device. The storage device inhibits incorporation of the second electronic device as a usable device in a case where switching to the new firmware has not been completed in the second electronic device.

Abstract: A computerized system for API migration. The system includes a memory storing instructions and a processor configured to execute the instructions to perform operations, which include segregating client accounts three groups, assigning a first API for communications with the first group and a second API for communications with the second group, and assigning the first API for communications with a first portion of the third group and the second API for communications with a second portion of the third group. The operations may also include collecting communications from the groups and generating metrics associated with each group, and generating a comparative report and a compatibility report. The operations may also include transmitting at least one of an alert or a recommendation based on the comparative report and the compatibility report.

Abstract: An information handling system peripheral stores a wireless dongle in a cavity formed in the peripheral housing. The cavity has a head end with a width that accepts a head of the wireless dongle and a connector end with a width that accepts a connector of the wireless dongle and that is too narrow for the head of the wireless dongle to fit. When inserted into the cavity, the wireless dongle is removed by pressing on the connector with a finger to raise the head out of the cavity and in position to be grasped between the finger and a thumb. The wireless dongle pivots about a raised portion in the cavity with a greater depth at the connector end providing room for the downward press. A magnet disposed in the raised portion aids in retention of the wireless dongle.

Abstract: Examples may include sleds for a rack in a data center including physical compute resources and memory for the physical compute resources. The memory can be disaggregated, or organized into near and far memory. A first sled can comprise the physical compute resources and a first set of physical memory resources while a second sled can comprise a second set of physical memory resources. The first set of physical memory resources can be coupled to the physical compute resources via a local interface while the second set of physical memory resources can be coupled to the physical compute resources via a fabric.

Abstract: A method, system, and/or computer program product controls transitions from a first bandwidth to a second bandwidth in a bus within a multi-processor computer. A bus controller predicts a bandwidth transition requirement for a bus in a multi-processor computer, and transitions the bus from a first bandwidth to a second bandwidth based on the predicted bandwidth transition requirement. The bus controller checks an actual transitioning requirement of the bus in the computer, such that the bus controller checks the actual transitioning requirement for the bus at each occurrence of a predefined stage of operation of one or more processor processors in the computer. In response to the actual transitioning requirement matching the predicted bandwidth transition requirement, the bus controller directions a continuation of the transitioning of the bus from the first bandwidth to the second bandwidth.

Abstract: A device is interposed between a first device display port and a second device display port. The device passes through signals provided from the first device display port to the second device display port except when predefined signals are detected. For the predefined signals, the device translates the predefined signals received from the first device display port into different signals that are provided to the second device display port.

Abstract: A device connection method includes a terminal receiving a communications connection request of a vehicular device, enabling a communications mode corresponding to the communication connection request in a process of connecting to a service of an interconnect protocol, and when determining that the service is successfully connected and that the communications mode is successfully enabled, determining that the terminal is successfully connected to the vehicular device using the interconnect protocol.

Abstract: Novel tools and techniques are provided for implementing Internet of Things (“IoT”) functionality. In some embodiments, microphones of an IoT human interface device might receive user voice input. The IoT human interface device and/or a computing system might identify explicit commands in the voice input, identify first IoT-capable devices to which the explicit commands are applicable, receive sensor data from IoT sensors, and analyze the voice input in view of previous user voice inputs and in view of the sensor data to determine whether the voice input contains any implicit commands. If so, second IoT-capable devices to which an implicit command is additionally applicable might be identified, instructions based on a combination of the explicit and implicit commands may be generated and sent to the second IoT-capable devices. Instructions based only on the explicit commands are generated and sent to first IoT-capable devices to which implicit commands are not applicable.

Abstract: Technologies for USB device policy enforcement include a computing device having a USB controller and secure enclave support. On boot, a firmware enclave randomly generates a binding identity and then securely provisions the binding identity to the USB controller. The firmware enclave also seals the binding identity to a policy enforcement enclave. At runtime, the policy enforcement enclave unseals the binding identity and includes the binding identity in a policy enforcement command sent to the USB controller. The USB controller verifies that the binding identity included in the command matches the binding identity that was previously provisioned. If the binding identities are successfully verified, the USB controller enforces the command. The USB controller may block data transfers or device configuration changes for one or more specified devices. Each of the firmware enclave and the policy enforcement enclave are trusted execution environments. Other embodiments are described and claimed.

Abstract: Provided are a computer program product, system, and method for applying a machine learning algorithm to problem analysis in a code load operation of a data storage system. A code load driver is provided that receives code load operation information for an event during a code load operation in the storage system. The code load operation information indicates an error in the code load operation at a time of the event. A portion of the code load inform is processed by a machine learning to obtain a label indicating whether to halt the code load operation. In response to a label indicating the code load operation is to be halted, the code load operation is halted.

Abstract: A printed circuit board (PCB) includes first and second integrated circuits (ICs) connected by way of write and read interfaces. The first IC includes a training circuitry for training the write and read interfaces. The first IC further includes read and write delay elements. The training circuitry trains the read and write interfaces (i.e., configures the read and write delay elements) for correcting signal skews that may be introduced by the read and write interfaces, respectively. The training circuitry configures the write delay element with a first write delay value for which there are no errors while writing data to a buffer memory of the second IC. The training circuitry configures the read delay element with a first read delay value for which there are no errors while reading the data from the buffer memory.

Abstract: A memory system may include a nonvolatile memory device and a wear leveling unit. The nonvolatile memory device includes a plurality of memory blocks. The wear leveling unit may be configured to intermittently increase an accumulative access count of a memory block among the memory blocks by a predetermined value, decide a wear level of the memory block based on the accumulative access count whenever the accumulative access count is increased, set the memory block to a hot block based on the wear level, and perform a hot block management operation on the hot block. The wear leveling unit may increase the accumulative access count in response to an access count reaching a predetermined value. The accumulative access count may be stored in the nonvolatile memory device, and the access count may be stored in a volatile memory device.

Abstract: Aspects described herein may provide a payment card having a base, a cavity positioned within the base, a wheel positioned within the cavity, a coupling component coupling the wheel to the base, a first microchip coupled to the wheel, and a second microchip coupled to the wheel. The first microchip may be associated with a first financial account and/or a first rewards offer and the second microchip may be associated with a second, different financial account and/or a second, different rewards offer. The wheel may be rotated to select between the first and second microchips, thereby allowing a financial transaction to be conducted using the selected microchip while reaping the benefits of the corresponding rewards offer.

Abstract: A method for identifying an IP camera and enhancing transmission quality by packet transmission based on the ONVIF specifications is applied to a gateway device configured for data transmission to and from at least one IP camera and a network video recorder according to the ONVIF specifications. The gateway device sends a Probe packet to the IP camera after receiving therefrom a Hello packet, analyzes a ProbeMatch packet from the IP camera to identify the IP camera, relays a Resolve packet from the network video recorder to the IP camera in order to receive audiovisual data from the IP camera, and adds an exclusive group code (e.g., VLAN ID) and the highest transmission speed classification (e.g., Quality of Service) to the received audiovisual data to distinguish the audiovisual data from other network packets and give higher priority of transmission to the audiovisual data.

Abstract: An information handling system includes a storage device and a processor. The storage device includes a boot image for the information handling system. The processor determines an architectural location for a boot device for the information handling system, determines that the storage device is located at the architectural location of the information handling system, determines a unique identifier for the storage device, determines from a basic input/output system (BIOS) of the information handling system a BIOS identifier associated with the unique identifier, and places the BIOS identifier at the top of a BIOS boot order list.

Abstract: A chipset fuse programming system includes a chassis that houses a chipset with programmable fuses and a Basic Input/Output System (BIOS) that is coupled to the chipset. The BIOS includes a BIOS storage storing fuse configuration profiles. The BIOS determines a chipset type of the chipset and selects a first fuse configuration profile based on the chipset type. The BIOS then programs the programmable fuses included in the chipset using the first fuse configuration profile. A central processing system may be housed in the chassis and coupled to the BIOS, with the BIOS determining a central processing system type of the central processing system, and selecting the first fuse configuration profile based on a combination of the chipset type and the central processing system type.

Abstract: Embodiments provide for a primary storage array having multiple storage tiers. The multiple storage tiers include one or more performance tiers and at least one deduplicated storage tier storing deduplicated data. One embodiment provides for a data storage system including a first storage tier including a first set of storage devices; a second storage tier including a second set of storage devices, the second storage tier including deduplicated data; and a quality of service (QoS) manager to manage data migration between the first storage tier and the second storage tier, the QoS manager to maintain deduplication statistics for the deduplicated data, wherein the QoS manager, based on the deduplication statistics, is to partially migrate a data extent between the first storage tier and the second storage tier, the data extent including data stored at a range of storage addresses.

Abstract: A method of staging a move group of applications of a network is provided and includes the step of developing a reference base of applications via monitoring traffic flow between devices of the network on which applications are executed or accessing information about such applications. The method further includes the step of classifying each such selected application as a member of one of the classification sub-sets with regard to applications of the reference application base. Additionally, the method includes the step of accessing information about the classification sub-sets of those respective applications executed on each of a target group of devices to thereby form an application classification glossary associated with the device.

Abstract: An authenticating system and process for authenticating user devices to a access a service where access to certain portions of the service may be limited according to a access point or other device used by a user device to facilitate interfacing a user with the service. The authentication may be achieved without directly assessing a trustworthiness of the user devices, and optionally, without requiring a user thereof to complete a sign-on operation.

Abstract: Provided is an application module provided with a stationary interface, and more particularly, an application module performing functions of a battery management system (BMS), which transceives data from an application module data control device or calls a service module included in a basic program (basic software (BSW) to increase compatibility regarding function execution among one or more modules.

Abstract: A system for operating an electronic device supporting enhanced data processing is provided. The system includes a plurality of electronic devices supporting playback of content; and a managing device delivering content whose data is processed by a certain electronic device among the plurality of electronic devices to a preset electronic device when playback of the content in the certain electronic device is requested.

Abstract: The present application describes techniques for managing primary and secondary databases. One example method includes determining whether a lock held by a primary database expires, wherein the primary database and the secondary databases share the lock; in response to determining that the lock held by the primary database has expired, determining whether a lock renewal request of the primary database has been received; and in response to determining that the lock renewal request of the primary database has not been received, selecting a particular secondary database from the secondary databases as a new primary database, and controlling the primary database to be switched to the particular secondary database.

Abstract: A system and method for conditioning a tissue are provided. The system includes a substrate, a plurality of microwells formed in the substrate, and a microsphere associated with each of the plurality of microwells. The system also includes a pair of flexible pillars within each of the plurality of microwells. Each flexible pillar includes a first end bonded to a respective microwell and at least one flexible pillar has a second end bonded to the microsphere. The flexible pillars are configured to deflect when exposed to a magnetic field to controllably stretch microtissue spanning the flexible pillars.

Abstract: According to various aspects and embodiments, a device is provided. The device includes a memory, a Controller Area Network (CAN) controller coupled to a CAN bus, at least one processor coupled to the memory and the CAN controller. The at least one processor is configured to set the CAN controller to a first baud rate, determine a second baud rate, and send, in response to determining the second baud rate, a baud rate change request via the CAN bus, wherein the baud rate change request includes a least an identifier of the second baud rate.

Abstract: A circuit device includes first and second physical layer circuits, a bus switch circuit that switches connection between a first bus and a second bus that comply with a USB standard, on in a first period and off in a second period, and a processing circuit that performs, in the second period, processing for transferring packets on a transfer route that includes the first bus, the first and second physical layer circuits, and the second bus. When a host chirp K/J is detected on the first bus by the first physical layer circuit, the second physical layer circuit outputs a host chirp K/J to the second bus in the state where connection between the first bus and the second bus is switched off by the bus switch circuit.

Abstract: A data storage device that provides priority-based internal data movement includes a controller communicatively coupled to volatile memory and to non-volatile memory circuits, where the controller is configured to queue requests in a plurality of queues in the volatile memory, where each of the requests is associated with one of a plurality of internal data movement command types. The controller is also configured to select one of the plurality of queues based on a prioritization of the plurality of internal data movement command types. The controller is also configured to determine that the selected queue includes at least one request of the associated internal data movement command type. The controller is also configured to issue the at least one request from the selected queue to at least one of the non-volatile memory circuits.

Abstract: An information processing apparatus includes multiple input interfaces each capable of receiving a user instruction to perform a management function provided by the information processing apparatus and circuitry that accepts, independently for each one of the multiple input interfaces, a selection that selects an option among multiple options regarding the access to the management function, the multiple options including an option that limits access to the management function and an option that allows access to the management function without authentication and controls access to the management function independently via each of the multiple input interfaces based on the option independently selected for each of the multiple input interfaces.

Abstract: In some embodiments, the present disclosure provides techniques for concurrently exchanging USB 2.0 information, SuperSpeed information, and four lanes of DisplayPort information via a single USB Type-C connection. In some embodiments, this may be accomplished in part by multiplexing signals such as the USB 2.0 signals and the DisplayPort AUX signal to fewer than a standard number of conductors in order to free up other conductors for the third and fourth lanes of DisplayPort information. In some embodiments, a standard USB Type-C receptacle, plug, and cable are used. In some embodiments, a modified receptacle, plug, and/or cable are provided.

Abstract: A carrier board for use with a host computing system includes bus connectors for one or more removable memory modules. The carrier board includes energy storage components and control circuitry to charge the energy storage components using a voltage source provided by the host computing system. If the host computing system experiences a power failure, the control circuitry initiates discharge the energy storage components to power the carrier board. As such, the memory controller on the carrier board may initiate steps to secure any data that would have been lost due to the power failure, such as data that is part of write operations in progress at the time of the power failure or data to be migrated as part of garbage collection operations.

Abstract: Processors configured by aspects of the present invention optimize reference cache maintenance in a serialization system by serializing a plurality of objects into a buffer and determining whether any of the objects are repeated within the buffered serialized plurality. The configured processors insert an object repetition data signal within the serialized plurality of objects that indicates to a receiver whether or not any objects are determined to be repeated within the buffered serialized plurality of objects, and send the serialized plurality of objects with the inserted object repetition data signal as a single chunk to a receiver, wherein the inserted object repetition data signal conveys reference cache management instructions to the receiver.

Abstract: Apparatus, and methods of operating similar apparatus, might include an array of memory cells and a differential storage device configured to receive information indicative of a data value stored in a particular memory cell of the array of memory cells selected for a programming operation. The differential storage device might include a first non-volatile memory cell connected between a first isolation gate and a voltage node configured to receive a first voltage level, and a second non-volatile memory cell connected between a second isolation gate and the voltage node, and logic responsive to an indication of a loss of power to the apparatus and the information indicative of the data value stored in the particular memory cell to store data to the differential storage device, wherein a gate of the second non-volatile memory cell is connected to a gate of the first non-volatile memory cell.

Abstract: Provided is a memory card, which includes two pairs of opposite edges, first row terminals arranged adjacent to an insertion-side edge of the memory card, and second row terminals arranged apart from the insertion-side edge of the memory card. The memory card can be easily reset in terms of software without controlling power supply in terms of hardware. Also, the memory card can be smoothly attached and detached during insertion of the memory card into a socket and reduce damage to a device.

Abstract: A universal serial bus (USB) communication control method for a USB host connected to a USB accessory through a USB cable includes: receiving a request signal for switching from a first service to a second service in the USB accessory when the first service is being executed in the USB accessory; initializing a USB port of the USB host so as to perform switching to the second service in the USB accessory; and when the switching to the second service through initialization of the USB port is successfully performed, executing the second service in the USB accessory.

Abstract: Processing cores with the ability to suppress operations based on a contribution estimate for those operation for purposes of increasing the overall performance of the core are disclosed. Associated methods that can be conducted by such processing cores are also disclosed. One such method includes generating a reference value for a composite computation. A complete execution of the composite computation generates a precise output and requires execution of a set of component computations. The method also includes generating a component computation approximation. The method also includes evaluating the component computation approximation with the reference value. The method also includes executing a partial execution of the composite computation using the component computation approximation to produce an estimated output.

Abstract: A system for enabling data syncing between a host device and an electronic device includes a first port configured to be coupled to a first electronic device, a second port configured to be coupled to the host device, and a data sync switch coupled to the first port and the second port. The data sync switch is switchable between a first state, in which data communication between the electronic device and the host device is enabled, and a second state, in which data communication between the electronic device and the host device is disabled. The system also includes an authorization device configured to couple to an authorizing physical object and generate an output signal. The data sync switch is in one of the first state and the second state based on the output signal from the authorization device.