Entry Replacement Strategy Patents (Class 711/159)
  • Patent number: 11487658
    Abstract: A memory system may include a plurality of dies; and a controller coupled to the plurality of dies through a plurality of data paths, the controller being suitable for transmitting first data received from a host and second data obtained through an internal operation in parallel through the plurality of data paths.
    Type: Grant
    Filed: November 19, 2019
    Date of Patent: November 1, 2022
    Assignee: SK hynix Inc.
    Inventor: Eu-Joon Byun
  • Patent number: 11481133
    Abstract: A method of managing an integrated circuit memory includes having an integrated circuit card with a memory space including memory space regions for storing user profile data. The memory space is partitioned into segments of memory space regions, where the segments of memory space regions includes allocated regions and empty regions. From the empty regions, the biggest empty region of the memory space is selected. The selected biggest empty region is widened by moving memory blocks positioned in a subset of allocated regions that are at boundaries of the selected biggest empty region into other available empty regions.
    Type: Grant
    Filed: January 15, 2019
    Date of Patent: October 25, 2022
    Assignee: STMicroelectronics S.r.l.
    Inventor: Francesco Caserta
  • Patent number: 11443479
    Abstract: Techniques are disclosed relating to arbitration for computer memory resources. In some embodiments, an apparatus includes queue circuitry that implements multiple queues configured to queue requests to access a memory bus. Control circuitry may, in response to detecting a first threshold condition associated with the queue circuitry, generate a first snapshot that indicates numbers of requests in respective queues of the multiple queues at a first time. The control circuitry may generate a second snapshot that indicates numbers of requests in respective queues of the multiple queues at a second time that is subsequent to the first time. The control circuitry may arbitrate between requests from the multiple queues to select requests to access the memory bus, where the arbitration is based on snapshots to which requests from the multiple queues belong. Disclosed techniques may approximate age-based scheduling while reducing area and power consumption.
    Type: Grant
    Filed: May 19, 2021
    Date of Patent: September 13, 2022
    Assignee: Apple Inc.
    Inventors: Winnie W. Yeung, Leela Kishore Kothamasu, Zelin Zhang, Guanlan Xu, Eddie M. Robinson
  • Patent number: 11422726
    Abstract: Technologies are provided for a storage device data move command. A storage device can be configured to receive a data move (or garbage collection) command and, responsive to receiving the command, move data from one zone of the storage device (or range of storage locations within the storage device) to another zone (or another range of storage locations) within the storage device. The command can comprise a source zone identifier and a target zone identifier. The storage device can read data from a storage zone associated with the source zone identifier and write the data to another storage zone associated with the target zone identifier. The identifiers can include ranges of storage location addresses within the separate storage zones. In at least some embodiments, a host bus adapter can be configured to support the data move (or garbage collection) command for a storage device attached to the host bus adapter.
    Type: Grant
    Filed: May 1, 2018
    Date of Patent: August 23, 2022
    Assignee: Amazon Technologies, Inc.
    Inventors: Keun Soo Jo, Munif M. Farhan, Seth William Markle
  • Patent number: 11409646
    Abstract: A method for releasing memory allocated by a contiguous memory allocator that merges a to-be-released memory page with an adjacent free page to form a memory block that can be released more efficiently than would be the case when releasing a series of un-merged memory pages.
    Type: Grant
    Filed: September 27, 2018
    Date of Patent: August 9, 2022
    Assignee: AMLOGIC (SHANGHAI) CO., LTD.
    Inventor: Tao Zeng
  • Patent number: 11372988
    Abstract: A system deletes and sanitizes files in a distributed file system. The system also randomizes rotation of data in a distributed file system.
    Type: Grant
    Filed: June 25, 2019
    Date of Patent: June 28, 2022
    Assignee: Raytheon Company
    Inventors: Nicholas Wayne Barrett, Gregory Andrew Early
  • Patent number: 11360935
    Abstract: An efficient data storage system is described. An agent software application on computing devices in a first tier processes snapshot backups and pushes them to an appliance software application on a server in a second tier. The appliance software application processes archive backups and pushes them to cloud storage in a third tier. A cloud application on a management server receives storage policy specifications from customers and promulgates the policies to the agent software application and the appliance software application. The policy specifications include time periods and retention set information for the backups. When a retention set has been exceeded, the storage system is pruned to remove file references to unneeded files and delete data files no longer referenced in storage sets in the retention set.
    Type: Grant
    Filed: October 25, 2018
    Date of Patent: June 14, 2022
    Assignee: Aparavi Software AG
    Inventor: Rod Christensen
  • Patent number: 11341091
    Abstract: Customers in regulated industries face demanding compliance regulations, including content immutability. While broadened to allow software-based solutions, the regulations for immutability require content preservation to prevent overwriting, erasure or alteration of the content, where the preservation must be implemented through irrevocable features. Embodiments are directed to provision of an administrative user experience to enable customers to create a preservation policy that defines item(s) to be preserved. After detecting enablement of the policy, the item(s) may be preserved, a preservation lock on the policy may be initiated by disabling controls associated with the policy, and an attribute may be set to the policy to identify the policy as locked.
    Type: Grant
    Filed: April 17, 2019
    Date of Patent: May 24, 2022
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Julian Zbogar-Smith, Kamal Janardhan, Sanjay Ramaswamy, Le-Wu Tung
  • Patent number: 11294806
    Abstract: The disclosed embodiments provide a method, apparatus, and system for selecting, based on feedback from previous garbage collections, a portion of a referenced memory area for garbage collection within a time window. During the execution of a software program, the system selects a given portion of a referenced memory area on which garbage collection can be completed within the given time window and attempts to complete garbage collection on at least the given portion of the referenced memory area before the end of the given time window. Next, the system selects, based on the results of the garbage collection performed during the given time window, a subsequent portion of the referenced memory area on which garbage collection can be completed within the subsequent time window and attempts to complete garbage collection on at least the subsequent portion of the referenced memory area before the end of the subsequent time window.
    Type: Grant
    Filed: July 30, 2019
    Date of Patent: April 5, 2022
    Assignee: Oracle International Corporation
    Inventors: Thomas Schatzl, Nils Mikael Gerdin, Erik Gustav Helin
  • Patent number: 11281374
    Abstract: An apparatus includes a processing device configured to receive a request to change a given storage network from a first to a second configuration, the given storage network being associated with a heterogeneous storage cluster comprising a plurality of storage targets and initiators having first network addresses in the first configuration. The processing device is also configured to generate a shadow storage network comprising second network addresses having the second configuration, to assign the second network addresses to a subset of a plurality of storage targets and initiators affected by the request to change the given storage network from the first to the second configuration, and, responsive to validating connectivity of the subset of the plurality of storage targets and initiators, to apply the requested change by unassigning ones of the first network addresses assigned to the subset of the plurality of storage targets and initiators.
    Type: Grant
    Filed: October 28, 2020
    Date of Patent: March 22, 2022
    Assignee: EMC IP Holding Company LLC
    Inventor: Dmitry Vladimirovich Krivenok
  • Patent number: 11249851
    Abstract: A new snapshot of a storage volume is created by instructing computing nodes to suppress write requests. Storage nodes create a new snapshot for the storage volume by allocating a new segment to the new snapshot and finalizes and performs garbage collection with respect to segments allocated to the previous snapshot. Subsequent write requests to the storage volume are then performed on the segments allocated to the new snapshot. A segment maps segments to a particular snapshot and metadata stored in the segment indicates storage volume addresses of data written to the segment. The snapshots may be represented by a storage manager in a hierarchy that identifies an ordering of snapshots and branches to clone snapshots. A non-snapshot volume may be converted to a snapshot volume at any point after creation.
    Type: Grant
    Filed: September 5, 2019
    Date of Patent: February 15, 2022
    Assignee: ROBIN SYSTEMS, INC.
    Inventors: Dhanashankar Venkatesan, Jagadish Kumar Mukku, Ripulkumar Hemantbhai Patel
  • Patent number: 11232090
    Abstract: In one aspect, there is provided a method. The method may include accessing a multi-version concurrency control block providing row state for a block of rows in a table of a database, the multi-version concurrency control block including a header portion and a data portion, the header portion including a type indicator indicating whether all of the rows of the block are visible to a plurality of threads at a database management system or invisible to the plurality of threads at the database management system. Related systems, methods, and articles of manufacture are also disclosed.
    Type: Grant
    Filed: April 3, 2019
    Date of Patent: January 25, 2022
    Assignee: SAP SE
    Inventors: Amarnadh Sai Eluri, Vimal Chandran Satheesh, Mihnea Andrei, Prateek Basavapur Swamy
  • Patent number: 11216365
    Abstract: This disclosure provides for improvements in managing multi-drive, multi-die or multi-plane NAND flash memory. In one embodiment, the host directly assigns physical addresses and performs logical-to-physical address translation in a manner that reduces or eliminates the need for a memory controller to handle these functions, and initiates functions such as wear leveling in a manner that avoids competition with host data accesses. A memory controller optionally educates the host on array composition, capabilities and addressing restrictions. Host software can therefore interleave write and read requests across dies in a manner unencumbered by memory controller address translation. For multi-plane designs, the host writes related data in a manner consistent with multi-plane device addressing limitations. The host is therefore able to “plan ahead” in a manner supporting host issuance of true multi-plane read commands.
    Type: Grant
    Filed: March 28, 2020
    Date of Patent: January 4, 2022
    Assignee: Radian Memory Systems, Inc.
    Inventors: Andrey V. Kuzmin, James G. Wayda
  • Patent number: 11210209
    Abstract: The present invention provides a method for managing a flash memory module, wherein the flash memory module includes a plurality of flash memory chips, each flash memory chip includes a plurality of blocks, and each block includes a plurality of pages, and the method includes the steps of: using a time management circuit to generate current time information; when data is written into any one of the blocks, recording the time information generated by the time management circuit; and determining at least one specific block according to quantity of invalid pages within each block and the time information of each block.
    Type: Grant
    Filed: November 18, 2019
    Date of Patent: December 28, 2021
    Assignee: Silicon Motion, Inc.
    Inventors: Jian-Dong Du, Pi-Ju Tsai, Tsung-Chieh Yang
  • Patent number: 11210213
    Abstract: Provided is an operation method of a controller which controls a memory device including a plurality of memory blocks. The operation method may include calculating a number of extended free blocks in the memory device based on valid page counts of the respective memory blocks, when a number of substantive free blocks in the memory device is less than a first threshold value, and performing a garbage collection operation when the number of extended free blocks is less than a second threshold value.
    Type: Grant
    Filed: November 8, 2019
    Date of Patent: December 28, 2021
    Assignee: SK hynix Inc.
    Inventor: Gi-Pyo Um
  • Patent number: 11194666
    Abstract: Time addressable storage in a content addressable storage system includes providing a log volume having an index and a journal. For each snapshot, an identifier is entered in the index and a corresponding journal offset is increased. For each write transaction received for a volume, an aspect includes recording a time, address, and hash handle as entries in the journal. Upon receiving a point in time (PIT) for one of the volumes, an aspect includes identifying a most recent snapshot (S) created before the PIT, taking a snapshot (S?) of snapshot (S), identifying a journal corresponding to the snapshot (S) in the index, and reviewing entries of the identified journal up to the PIT. An aspect further includes updating the snapshot (S?) with a corresponding hash handle for each address appearing in the entries until all write transactions before the PIT are contained in the snapshot (S?).
    Type: Grant
    Filed: April 26, 2019
    Date of Patent: December 7, 2021
    Assignee: EMC IP Holding Company LLC
    Inventors: David Meiri, Anton Kucherov
  • Patent number: 11188229
    Abstract: In some examples, a system may include at least one class of storage that is configured for having freed storage space reclaimed to enable reuse of the freed storage space. For instance, the system may determine whether a volume corresponding to the at least one class of storage is used to store system data or user data. If the volume is used to store user data, then the system may determine whether any of the user data has been deleted from the volume. If data has been deleted from the volume, the system may determine whether an available capacity of the volume is less than a remaining capacity threshold before performing reclamation on the at least one storage device corresponding to the volume. Alternatively, if the volume is used to store system data, the system may perform reclamation based on an elapsed period of time since the last reclamation.
    Type: Grant
    Filed: September 25, 2015
    Date of Patent: November 30, 2021
    Assignee: HITACHI VANTARA LLC
    Inventors: Yury Kats, Sowmya Manjanatha
  • Patent number: 11182097
    Abstract: A computer-implemented method includes receiving a plurality of storage requests to store a plurality of objects in a dispersed storage network. The computer-implemented method further includes transforming each object in the plurality of objects into a set of error encoded slices. The computer-implemented method further includes dispersing each error encoded slice in each set of error encoded slices to a memory zone of a distinct storage unit. The computer-implemented method further includes co-locating two or more error encoded slices in a common memory zone of a storage unit based, at least in part, on an expiry time associated with the two or more encoded slices. The computer-implemented method further includes logically deleting the common memory zone of the storage unit after all error encoded slices stored in the common memory zone have expired.
    Type: Grant
    Filed: May 14, 2019
    Date of Patent: November 23, 2021
    Assignee: International Business Machines Corporation
    Inventors: Praveen Viraraghavan, Ethan Wozniak, Amit Lamba
  • Patent number: 11163679
    Abstract: Memory systems and components thereof execute an improved garbage collection (GC) strategy in the case of multiple sudden power offs (SPOs). Such a memory system comprises a memory device including single-level cell (SLC) memory blocks grouped into super blocks (SLC SBs) and multi-level cell (MLC) memory blocks grouped into SBs (MLC SBs); and a memory controller to execute a flash translation layer (FTL) to perform a garbage collection (GC) operation. The memory controller executes the GC operation after a sudden power off (SPO) by determining each MLC SB with user data opened before the SPO to be an unsafe super block (UB), copying data from pages in a select one of the UBs to pages in the SLC SBs, and copying data from the pages in the SLC SBs to pages in a select MLC SB not determined to be a UB.
    Type: Grant
    Filed: April 3, 2019
    Date of Patent: November 2, 2021
    Assignee: SK hynix Inc.
    Inventors: Igor Novogran, Andrei Konan
  • Patent number: 11157365
    Abstract: A solution for processing a stripe in a storage device is provided. Where at least one stripe unit not requiring garbage collection from each stripe of at least two stripes in the storage device is determined, each of the at least two stripes comprises a stripe unit requiring garbage collection and a stripe unit not requiring garbage collection; parity data of data in the determined stripe units not requiring garbage collection is computed and stored into a first idle stripe unit, where the first idle stripe unit and the determined stripe units not requiring garbage collection are in a new stripe in the storage device.
    Type: Grant
    Filed: April 18, 2018
    Date of Patent: October 26, 2021
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Mingchang Wei, Suhong Wu, Guoyan Huang
  • Patent number: 11157483
    Abstract: Embodiments of the present disclosure provide methods, systems, apparatuses, and computer program products for digital content auditing in a group based communication repository, where the group based communication repository comprises a plurality of enterprise-based digital content objects organized among a plurality of group-based communication channels. In one embodiment, a computing entity or apparatus is configured to receive an enterprise audit request, where the enterprise audit request comprises an audit credential and digital content object retrieval parameters. The apparatus is further configured to determine if the audit credential satisfies an enterprise authentication protocol.
    Type: Grant
    Filed: March 10, 2020
    Date of Patent: October 26, 2021
    Assignee: Slack Technologies, LLC
    Inventors: Brenda Jin, Britton Jamison
  • Patent number: 11144451
    Abstract: According to one embodiment, a memory system determine both of a first block to which data from a host is to be written and a first location of the first block, when receiving a write request to designate a first logical address from the host. The memory system writes the data from the host to the first location of the first block. The memory system notifies the host of the first logical address, a first block number designating the first block, and a first in-block offset indicating an offset from a leading part of the first block to the first location by a multiple of grain having a size different from a page size.
    Type: Grant
    Filed: December 20, 2019
    Date of Patent: October 12, 2021
    Assignee: Toshiba Memory Corporation
    Inventors: Shinichi Kanno, Hideki Yoshida
  • Patent number: 11106372
    Abstract: An asynchronous power loss (APL) event is determined to occur. A first erased page (FEP) in a block of a memory device is determined and a last written page (LWP) is determined from the FEP. Data is read from the LWP and peer pages corresponding to the LWP. The data is copied to a temporary area in the memory device and a write pointer is incremented by a deterministic number of pages in the block. Data from the temporary area is copied to a page location in the block identified by the write pointer and the write pointer is incremented by the deterministic number of pages again. A host system is notified that the memory device is ready for a subsequent programming operation after the APL event.
    Type: Grant
    Filed: May 27, 2020
    Date of Patent: August 31, 2021
    Assignee: Micron Technology, Inc.
    Inventor: Michael G. Miller
  • Patent number: 11099982
    Abstract: Methods and systems for garbage collection are described. In some embodiments, Garbage collector threads may maximize local accesses and minimize remote access by copying Young objects and Old objects differently. When copying a Young object, a garbage collector thread may determine the lgroup of the pool that contains the object and copy the object to a pool of the same lgroup. The garbage collector thread may spread Old objects among lgroups by copying Old objects to pools of the same lgroup as the respective garbage collector thread. Additional methods and systems are disclosed.
    Type: Grant
    Filed: March 31, 2011
    Date of Patent: August 24, 2021
    Assignee: ORACLE INTERNATIONAL CORPORATION
    Inventors: Antonios Printezis, Igor Veresov, Paul Henry Hohensee, John Coomes
  • Patent number: 11086660
    Abstract: Techniques for a thread in client process to switch to a server virtual address space are provided. In one aspect, a process may attach to a server virtual address space. A request may be received from a client thread within the client process to switch from a virtual address space associated with the client thread to a server virtual address space. The client thread may switch from the client thread associated virtual address space to the server virtual address space.
    Type: Grant
    Filed: March 9, 2016
    Date of Patent: August 10, 2021
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Izzat El Hajj, Alexander Merritt, Gerd Zellweger, Dejan S Milojicic
  • Patent number: 11080097
    Abstract: Customers of a computing resource service provider may transmit requests to instantiate compute instances associated with a plurality of logical partitions. The compute instances may be executed by a server computer system associated with a particular logical partition of the plurality of logical partitions. For example, a compute service may determine a set of server computer systems that are capable of executing the compute instance based at least in part on placement information and/or a diversity constraint of the plurality of logical partitions.
    Type: Grant
    Filed: May 30, 2017
    Date of Patent: August 3, 2021
    Assignee: Amazon Technologies, Inc.
    Inventors: Vikas Panghal, Alan Hadley Goodman, André Mostert, Stig Manning, Joshua Dawie Mentz, Gustav Karl Mauer, Marnus Freeman
  • Patent number: 11061815
    Abstract: A memory system, a memory controller and an operating method are disclosed. By determining a time for garbage collection, based on information for a write command group including a plurality of write commands inputted from a host, it is possible to minimize a time in which processing a command transmitted from the host is delayed due to garbage collection, and ensure stable write performance.
    Type: Grant
    Filed: January 28, 2020
    Date of Patent: July 13, 2021
    Assignee: SK hynix Inc.
    Inventors: Hye Mi Kang, Eu Joon Byun
  • Patent number: 11049585
    Abstract: Field configurable bad block repair for a memory array comprising a plurality of blocks utilizes a block repair information store for data identifying one or more bad blocks in the array. The block repair information store includes nonvolatile memory writable at least once. Block repair circuitry on the device is configurable to redirect commands to access bad blocks identified in the bad block repair information store to reserved blocks in the memory array. A controller is responsive to a command to write bad block repair information, such as an identifier of a bad block in the plurality of blocks to the block repair information store in the field, and to reconfigure the block repair circuitry in the field using the updated information.
    Type: Grant
    Filed: March 27, 2020
    Date of Patent: June 29, 2021
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Shuo-Nan Hung, Chun-Hsiung Hung
  • Patent number: 11036629
    Abstract: In accordance with an embodiment of the present disclosure, a method of a controller for controlling a nonvolatile memory device including a plurality of data storage regions may include: determining, in response to a first copy event of receiving from a host a command instructing copy of data from a first logical address into a second logical address, whether a second copy event of copying the data from a first data storage region having a first physical address mapped to the first logical address into a data storage region having another physical address will occur; and in response to determining that the second copy event will not occur, changing a logical address mapped to the first physical address from the first logical address to the second logical address and invalidating the first logical address.
    Type: Grant
    Filed: December 27, 2019
    Date of Patent: June 15, 2021
    Assignee: SK hynix Inc.
    Inventors: Hye Mi Kang, Eu Joon Byun
  • Patent number: 11030094
    Abstract: A memory system includes a nonvolatile memory device including a plurality of dies, each die including a plurality of planes, each plane including a plurality of blocks, each block including a plurality of pages, and further includes a plurality of page buffers, each page buffer for caching data in a unit of a page to be inputted to, and outputted from, each of the blocks; and a controller suitable for managing a plurality of super blocks according to a condition, each super block including N blocks capable of being read in parallel among the blocks, generating predicted required times for the super blocks, respectively, each of the predicted required times representing a time needed to extract valid data from the corresponding super block, and selecting a victim block for garbage collection from among the blocks based on the predicted required times.
    Type: Grant
    Filed: July 3, 2019
    Date of Patent: June 8, 2021
    Assignee: SK hynix Inc.
    Inventors: Yeong-Sik Yi, Jin-Woong Kim
  • Patent number: 11016883
    Abstract: A method of manual memory management is described which comprises enabling one or more threads to access an object created in a manual heap by storing a reference to the object in thread-local state and subsequently deleting the stored reference after accessing the object. In response to abandonment of the object, an identifier for the object and a current value of either a local counter of a thread or a global counter are stored in a delete queue and all threads are prevented from storing any further references to the object in thread-local state. Deallocation of the object only occurs when all references to the object stored in thread-local state for any threads have been deleted and a current value of the local counter for the thread or the global counter has incremented to a value that is at least a pre-defined amount more than the stored value, wherein the global counter is updated using one or more local counters.
    Type: Grant
    Filed: June 6, 2017
    Date of Patent: May 25, 2021
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Matthew John Parkinson, Manuel Silverio da Silva Costa, Dimitrios Vytiniotis, Kapil Vaswani
  • Patent number: 10977172
    Abstract: Techniques are disclosed relating to virtual memory page reclamation policies. In some embodiments, an operating system of a computing device implements, during a first operating mode, a first page reclamation policy for pages corresponding to user processes and non-user processes. The computing device may then enter a second operating mode upon detecting some indication of user inactivity. The operating system may then implement, during the second operating mode, a second page reclamation policy for pages corresponding to user processes and non-user processes, where the second page reclamation policy prioritizes, relative to the first page reclamation policy, eviction of pages corresponding to non-user processes.
    Type: Grant
    Filed: September 29, 2018
    Date of Patent: April 13, 2021
    Assignee: Apple Inc.
    Inventors: Lionel D. Desai, Benjamin C. Trumbull
  • Patent number: 10970415
    Abstract: Examples of techniques for sensitive data redaction in a memory dump are described herein. An aspect includes, based on a dump of a virtual address space being triggered, receiving a primary dump corresponding to the virtual address space, the primary dump including one or more tagged memory pages. Another aspect includes identifying, by a sensitive data identification module, sensitive data that is located outside of the of the one or more tagged memory pages in the primary dump. Another aspect includes redacting data corresponding to the sensitive data and the one or more tagged memory pages to determine a redacted dump.
    Type: Grant
    Filed: July 18, 2019
    Date of Patent: April 6, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Purvi Sharadchandra Patel, Elpida Tzortzatos, Scott B. Compton, Hong Min
  • Patent number: 10956577
    Abstract: An apparatus and methods are provided to defending device against attacks. When it is determined that a device is under attack, a determination is made as to whether a layout of objects within said at least one resource at said device is protecting said device against said attack. The determination is then transferred to a remote server together with a layout of the resource at the device. When it is determined that the layout of objects within the at least one resource at the device is not protecting the device against the attack, then the layout of the at least one resource is changed. Either the remote server or the device may determine whether to change the layout in response to the attack.
    Type: Grant
    Filed: August 27, 2018
    Date of Patent: March 23, 2021
    Assignee: ARM IP Limited
    Inventors: Alessandro Angelino, Milosch Meriac, Brendan James Moran
  • Patent number: 10949198
    Abstract: Disclosed herein is an online platform for facilitating the development of software applications based on an executable statechart using a microservices architecture, in accordance with some embodiments. Accordingly, the online platform may include a communication device, a processing device, and a storage device. Further, the communication device may be configured for transmitting a software application design interface to a user device. Further, the communication device may be configured for receiving a plurality of design commands, through the software application design interface, from the user device. Further, the processing device may be configured for generating an executable statechart design based on the plurality of design commands. Further, the storage device may be configured for storing the at least one executable statechart design.
    Type: Grant
    Filed: January 24, 2020
    Date of Patent: March 16, 2021
    Inventor: Clarence Yandell Weston
  • Patent number: 10924502
    Abstract: Techniques for providing network security and anomaly detection are disclosed. In some embodiments, network traffic may be monitored in order to create a model of network traffic over a first period of time. Based on the model of network traffic, one or more inflated files may be created and stored on a system, wherein the inflated files are of a sufficient file size such that attempts to exfiltrate one or more of the files may be detected based by network monitoring tools. The inflated files may further include one or more indicators of sensitivity, including indicators of the presence of sensitive information that is not actually included in the inflated files. Network traffic characteristics may then be repeatedly or continuously monitored in order to update the size of the one or more inflated files based on changes in network traffic characteristics.
    Type: Grant
    Filed: December 29, 2016
    Date of Patent: February 16, 2021
    Assignee: NOBLIS, INC.
    Inventors: Matthew K. Monaco, Daniel Negron, Brian Satira, Michael Collins
  • Patent number: 10909621
    Abstract: A system and method is disclosed for quantifying temporal fairness on an electronic trading venue as a scalar value with unit time. The system may, for an instrument traded on the venue, construct some pluralities of time deltas associated with each pair of market participants in a plurality of such that are active on the instrument. The system may populate these pluralities of time deltas by determining the amount of time that elapses between when the first and second participant in a pair each send (or are sent) a similar message to (or from) the venue. Through analysis of these pluralities of time deltas the system may find two minimum values, fords and fmktdata, the sum of which may quantify temporal fairness for the instrument on the venue. The resultant sum may inform the value of a latency floor deployed for the instrument on the venue.
    Type: Grant
    Filed: November 2, 2015
    Date of Patent: February 2, 2021
    Assignee: Refinitiv US Organization LLC
    Inventor: Hayden Paul Melton
  • Patent number: 10901620
    Abstract: A storage system and method for thin provisioning are provided. In one embodiment, a storage system is provided comprising a memory and a controller. The controller is configured to provide a logical exported capacity of the memory to a host, wherein the logical exported capacity is greater than an actual storage capacity of the memory; receive a command from the host to write data to a logical address; determine whether there is available actual storage capacity in the memory to write the data; and write the data to a physical address in memory that corresponds to the logical address only if it is determined that there is available actual storage capacity in the memory to write the data. Other embodiments are possible, and each of the embodiments can be used alone or together in combination.
    Type: Grant
    Filed: March 26, 2019
    Date of Patent: January 26, 2021
    Assignee: Western Digital Technologies, Inc.
    Inventors: Amir Shaharabany, Michael Zaidman, Rotem Sela, Hadas Oshinsky
  • Patent number: 10901891
    Abstract: A controller for controlling a memory device including memory dies includes: a processor suitable for checking whether or not any of the memory dies in the memory device is idle after transferring a write command to the memory device, and when there is an idle memory die, performing a garbage collection read operation of the idle memory die; and a garbage collection (GC) data region suitable for storing a valid data of a victim block, which is read through the garbage collection read operation; and wherein the processor transfers the valid data to the memory device based on an amount of valid data stored in the GC data region and controlling the memory device to perform a garbage collection write operation of programming the valid data in a target block.
    Type: Grant
    Filed: February 19, 2019
    Date of Patent: January 26, 2021
    Assignee: SK hynix Inc.
    Inventor: Eu-Joon Byun
  • Patent number: 10896055
    Abstract: An access data collector collects access assignment data characterizing active access assignment operations of a hypervisor in assigning host computing resources among virtual machines for use in execution of the virtual machines. Then, a capacity risk indicator calculator calculates a capacity risk indicator characterizing a capacity risk of the host computing resources with respect to meeting a prospective capacity demand of the virtual machines, based on the access assignment data.
    Type: Grant
    Filed: April 3, 2019
    Date of Patent: January 19, 2021
    Assignee: BMC Software, Inc.
    Inventors: Jeyashree Sivasubramanian, Sudheer Apte
  • Patent number: 10831607
    Abstract: In a processing unit, a processor core executes instructions in a plurality of simultaneous hardware threads, where multiple of the plurality of hardware threads concurrently execute memory transactions. A transactional memory circuit in the processing unit tracks transaction footprints of the memory transactions of the multiple hardware thread. In response to detecting failure of a given memory transaction of one of the plurality of multiple threads due to an overflow condition, the transactional memory circuit transitions to a throttled operating mode and reduces a number of hardware threads permitted to concurrently execute memory transactions.
    Type: Grant
    Filed: July 30, 2018
    Date of Patent: November 10, 2020
    Assignee: International Business Machines Corporation
    Inventors: Derek E. Williams, Guy L. Guthrie, Hugh Shen, Sanjeev Ghai, Hung Doan
  • Patent number: 10831663
    Abstract: An approach is disclosed that tracks memory transactions by a node. The approach establishes a transaction processing state corresponding to common virtual addresses accessed by a processing threads. Transactions are executed by the threads. A selected transaction is allowed to complete. In response to detecting a conflict in the transaction processing state, completion of a non-selected transaction is inhibited.
    Type: Grant
    Filed: December 10, 2018
    Date of Patent: November 10, 2020
    Assignee: International Business Machines Corporation
    Inventors: James A. Kahle, Charles R. Johns
  • Patent number: 10809942
    Abstract: An example apparatus comprises a hybrid memory system to couple to a host and a controller coupled to the hybrid memory system. The controller may be configured to cause data associated with a virtual memory location of the host to be selectively transferred to the hybrid memory system responsive to a determination that a main memory of the host experiences threshold amount of resource utilization.
    Type: Grant
    Filed: March 21, 2018
    Date of Patent: October 20, 2020
    Assignee: Micron Technology, Inc.
    Inventors: Danilo Caraccio, Emanuele Confalonieri, Marco Dallabora, Roberto Izzi, Paolo Amato, Daniele Balluchi, Luca Porzio
  • Patent number: 10802984
    Abstract: Examples may include techniques for persistent memory virtualization. Persistent memory maintained at one or more memory devices coupled with a host computing device may be allocated and assigned to a virtual machine (VM) hosted by the host computing device. The allocated persistent memory based on a file based virtual memory to be used by the VM. An extended page table (EPT) may be generated to map physical memory pages of the one or more memory devices to virtual logical blocks of the file based virtual memory. Elements of the VM then enumerate a presence of the assigned allocated persistent memory, create a virtual disk abstraction for the file based virtual memory and use the EPT to directly access the assigned allocated persistent memory.
    Type: Grant
    Filed: February 6, 2019
    Date of Patent: October 13, 2020
    Assignee: Intel Corporation
    Inventors: Vivekananthan Sanjeepan, Leena K. Puthiyedath, Chandan Apsangi, Nikhil Talpallikar, Abinash K. Barik
  • Patent number: 10795604
    Abstract: The disclosure relates in some aspects to reporting the amount of available physical storage space of a non-volatile memory (NVM) array. A device including an NVM array may send reports regarding the amount of available physical storage space in the non-volatile memory device to a host device or some other suitable apparatus. The amount of available physical storage space takes into account whether any of the physical address blocks of the NVM array have been designated as worn-out. The host device (or other suitable apparatus) may send a report to a user when the amount of available physical storage space is relatively low.
    Type: Grant
    Filed: July 23, 2018
    Date of Patent: October 6, 2020
    Assignee: Western Digital Technologies, Inc.
    Inventors: Michal Silbermintz, David Haliva, Gadi Vishne
  • Patent number: 10795768
    Abstract: Apparatus and method for managing data in a multi-device storage system, such as a RAID (redundant array of independent discs) system. Distributed data sets are stored across a plurality of storage devices. A selected storage device is replaced with a new storage device responsive to an anomalous event. A rebuild operation is performed to reconstruct data from the selected storage device to the new storage device. The rebuild process includes accessing a list of distributed data sets in a local memory. For each distributed data set in the list identified as constituting valid data, read commands are issued to the remaining storage devices and a write command is issued to the new storage device. For each distributed data set in the list identified as constituting unused data, a data clear command is issued to each of the remaining storage devices and to the new storage device.
    Type: Grant
    Filed: October 22, 2018
    Date of Patent: October 6, 2020
    Assignee: Seagate Technology LLC
    Inventors: Kushal R. Hosmani, Thomas George Wicklund, Ian Davies, Ryan Patrick McCallister
  • Patent number: 10783113
    Abstract: Systems, methods, and other embodiments associated with a data retention framework that enforces archive eligibility criteria beyond a simple retention period are described. In one embodiment, a method includes identifying a record that has been stored in a primary data store for at least a retention period prescribed for the record and evaluating the record to determine if archive eligibility criteria for the record are met. When the archive eligibility criteria is met, the record is marked as eligible for archiving. When the archive eligibility criteria is not met, the record is marked as not eligible for archiving.
    Type: Grant
    Filed: June 11, 2015
    Date of Patent: September 22, 2020
    Assignee: Oracle International Corporation
    Inventors: Anthony Shorten, Shrenik Jain
  • Patent number: 10761933
    Abstract: A storage system comprises a plurality of storage nodes each comprising one or more storage devices. At least a given one of the storage nodes is configured to read data blocks from its one or more storage devices, and for a given one of the data blocks, to determine based at least in part on a content-based signature of that data block whether or not the given data block is appropriate for use in a prefilling operation of the given storage node. Responsive to the given data block being appropriate for use in the prefilling operation of the given storage node, the given storage node uses the data block in the prefilling operation of the given storage node. Responsive to the given data block not being appropriate for use in the prefilling operation of the given storage node, the given storage node sends the data block to another one of the storage nodes for use in a prefilling operation of that other storage node.
    Type: Grant
    Filed: June 19, 2019
    Date of Patent: September 1, 2020
    Assignee: EMC IP Holding Company LLC
    Inventors: William F. Moore, Anton Kucherov, Boaz Binia, Zvi Schneider
  • Patent number: 10754547
    Abstract: Disclosed is a method of managing a disaggregated memory. According to the present disclosure, the method includes: assigning at least one memory page to a local memory and a remote memory; checking a request for access to the memory page; checking whether a target performance ratio required in service is satisfied or not when the memory page requested to be accessed is assigned to the remote memory; predicting a size of the local memory on the basis of an LRU distance-based histogram when the target performance ratio is not satisfied; and reassigning the memory page requested to be accessed in consideration of the predicted size of the local memory.
    Type: Grant
    Filed: October 16, 2018
    Date of Patent: August 25, 2020
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Kang Ho Kim, Kwang Won Koh
  • Patent number: 10725763
    Abstract: An updated version of a configuration of a computing resource may be rolled back to a previous version. The computing resource can include code for a function or the computing resource can be used to implement calls of an API. In some cases, the computing resource can be tagged to indicate that rollback functionality is applicable to the computing resource. The rollback to a previous version of code for a function or a previous version of an API may take place based on a rollback condition being satisfied that is related to error rates that take place when updated versions of a function or an API are utilized. The computing resource may be implemented in conjunction with a cloud-based storage system.
    Type: Grant
    Filed: June 28, 2017
    Date of Patent: July 28, 2020
    Assignee: Amazon Technologies, Inc.
    Inventor: Andrew Christopher Chud