Entry Replacement Strategy Patents (Class 711/159)
  • Patent number: 10719439
    Abstract: A method operable with the storage device includes determining a workload to the storage device based on host Input/Output (I/O) requests to the storage device. When the workload is above a threshold, a first portion of the storage device is selected for garbage collection based on the I/O requests. Otherwise, when the workload is below the threshold, a second different portion of the storage device is selected for garbage collection based on a storage ability of the second portion of the storage device.
    Type: Grant
    Filed: September 6, 2017
    Date of Patent: July 21, 2020
    Assignee: Seagate Technology LLC
    Inventors: Ryan James Goss, Siddhartha K. Panda, Daniel J. Benjamin, Ryan C. Weidemann
  • Patent number: 10678754
    Abstract: A storage controller coupled to a multi-tenant storage array receives a request from a client device to write a data block to a volume resident on the storage array, wherein the client device is associated with a tenant of the storage array. The storage controller determines a tenant identifier associated with the tenant, generates a hash value for the data block based at least in part on the data block and the tenant identifier, and performs at least one data deduplication operation on the data block using the hash value by determining whether the hash value matches with any of the plurality of previous hash values that are identified in a deduplication map. Responsive to determining that the hash value does not match with any of the plurality of previous hash values that are identified in the deduplication map, the hash value is stored in the deduplication map.
    Type: Grant
    Filed: April 21, 2017
    Date of Patent: June 9, 2020
    Assignee: Pure Storage, Inc.
    Inventors: John Colgrove, Rajesh Kanungo, Ronald Karr, Ethan L. Miller
  • Patent number: 10681146
    Abstract: The present invention discloses a method and an apparatus for isolating a page cookie. The method includes: when a predetermined login account logs in, assigning an independent cookie storage for the predetermined login account; after a request of creating a page associated with the predetermined login account is acquired, establishing a mapping relation table for storing a mapping relation between a page view identification of the page associated with the predetermined login account and the independent cookie storage; when the page associated with the predetermined login account is loaded, looking up the mapping relation table; and initiating, according to the independent cookie storage corresponding to the page view identification of the page associated with the predetermined login account found in the mapping relation table, a request of loading the page associated with the predetermined login account.
    Type: Grant
    Filed: December 22, 2015
    Date of Patent: June 9, 2020
    Assignee: Guangzhou UCWEB Computer Technology Co., Ltd.
    Inventor: Xiangyang Zhao
  • Patent number: 10635358
    Abstract: A memory management method is provided. The method includes storing an acquired first command into a command queue, wherein in response to determining that the first command is a flush command, a flush phase value of the flush command and a corresponding second command is set according to a current flush phase, a command phase count value corresponding to the current flush phase is calculated, and the current flush phase is adjusted; selecting a new target command from the command queue, and executing the target command according to a target flush phase value of the target command and a corresponding target flush phase count value, wherein the target flush phase count value not being a preset value is adjusted; determining, according to the adjusted target flush phase count value, whether to respond to a host system that an execution of a target flush command corresponding to the target flush phase value is completed.
    Type: Grant
    Filed: December 12, 2018
    Date of Patent: April 28, 2020
    Assignee: Shenzhen EpoStar Electronics Limited CO.
    Inventors: Yu-Hua Hsiao, Hung-Chih Hsieh
  • Patent number: 10628304
    Abstract: Garbage collection in a first node server of an in-memory replication system includes: in response to a garbage collection trigger in the first node server, determining whether identification information for a data object eligible for garbage collection in the first node server has been received by the first node server from at least a second node server in the in-memory replication system; and if the identification information has been received from at least the second node server, performing garbage collection on the data object with the first node server.
    Type: Grant
    Filed: May 12, 2011
    Date of Patent: April 21, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Li Li, Ju Wei Shi, Rui Xiong Tian, Yi Xin Zhao
  • Patent number: 10613767
    Abstract: A non-volatile memory system includes a NAND flash memory device including at least one NAND flash memory and a memory controller that controls the NAND flash memory, a host device including a file system and a host controller that receives a command from the file system to provide the command to the NAND flash memory device, and a save storage manager that monitors a number and location of run-time bad blocks in the NAND flash memory, monitors a logical address use-state of the file system, and reduces a logical address space which the file system is able to use as the number of the run-time bad blocks is increased.
    Type: Grant
    Filed: May 18, 2018
    Date of Patent: April 7, 2020
    Assignees: The-AiO Inc., Essencore Limited
    Inventors: Seok Cheon Kwon, Seung Hyun Han
  • Patent number: 10579276
    Abstract: A storage scheme allocates portions of a logical volume to storage nodes in excess of the capacity of the storage nodes. Slices of the storage nodes and segments of slices are allocated in response to write requests such that actual allocation on the storage nodes is only in response to usage. Segments are identified with virtual segment identifiers that are retained when segments are moved to a different storage node. Logical volumes may therefore be moved seamlessly to different storage nodes to ensure sufficient storage capacity. Data is written to new locations in segments having space and a block map tracks the last segment to which data for a given address is written. Garbage collection is performed to free segments that contain invalid data, i.e. data for addresses that have been subsequently written to.
    Type: Grant
    Filed: September 13, 2017
    Date of Patent: March 3, 2020
    Assignee: ROBIN SYSTEMS, INC.
    Inventors: Dhanashankar Venkatesan, Partha Sarathi Seetala
  • Patent number: 10572351
    Abstract: A production host includes a persistent storage for storing backup policies and a production agent that obtains a backup generation request for a virtual machine of the virtual machines; in response to the backup generation request, performs a continuity chain verification of a continuity chain associated with the virtual machine to identify a continuity state of backups associated with the virtual machine; makes a first determination, based on the continuity state of the backups associated with the virtual machine, that the backups associated with the virtual machine are in a remediable state; and, in response to the first determination, performs a remediation of the continuity chain to change the backups associated with the virtual machine to be in a continuous state; and generates a backup of the virtual machine using the backup policies while the continuity state of the backups associated with the virtual machine are in the continuous state.
    Type: Grant
    Filed: October 16, 2018
    Date of Patent: February 25, 2020
    Assignee: EMC IP Holding Company LLC
    Inventors: Aaditya Rakesh Bansal, Sunil Yadav
  • Patent number: 10572350
    Abstract: A production host for hosting virtual machines includes a persistent storage and a production agent. The persistent storage stores virtual machine data associated with a virtual machine of the virtual machines and a virtual machine shadow copy associated with the virtual machine data. The production agent obtains a backup generation request for the virtual machine; in response to the backup generation request, generates the virtual machine shadow copy; makes a determination that the virtual machine shadow copy comprises an auto-recovery disk that comprises some data; in response to the determination, merges the virtual machine shadow copy using a parent block set storage template to obtain a backup of the virtual machine; and store the backup in backup storage. The parent block set storage template is not associated with the virtual machine shadow copy.
    Type: Grant
    Filed: October 16, 2018
    Date of Patent: February 25, 2020
    Assignee: EMC IP Holding Company LLC
    Inventors: Aaditya Rakesh Bansal, Sunil Yadav, Shelesh Chopra, Soumen Acharya, Manish Sharma, Sudha Vamanraj Hebsur, Hareej G. Hebbur
  • Patent number: 10572448
    Abstract: A system for managing data using purging includes an input interface and a processor. The input interface is to receive an indication of a data object to be purged. The processor is to prepare the data object to be purged, which includes severing weak relations of the data object as of a purge prepare time. Preparing the data object to be purged transitions the data object from an operational state to a purge prepared state. The weak relations of the data object are relations to non-purge data objects of an object tree. The data object in a purge prepared state is monitored for access. In response to a detection of an attempt to access the data object, reinstate the data object, which includes rebuilding the weak relations. Reinstating the data object transitions the data object from the purge prepared state to the operational state.
    Type: Grant
    Filed: December 15, 2015
    Date of Patent: February 25, 2020
    Assignee: Workday, Inc.
    Inventors: Seamus Donohue, Sergio Mendiola Cruz, Ken Pugsley, John Levey, Gerald Green, Iacopo Pace
  • Patent number: 10558382
    Abstract: A memory system may include: a memory device including a plurality of memory blocks; and a controller suitable for grouping the memory blocks based on type into a plurality of super blocks according to a preset condition and managing the memory blocks by managing the super blocks, the controller may manage one or more of the super blocks, in each of which at least one bad memory block and good memory blocks are grouped, by classifying the one or more superblocks as first super blocks, and the controller may differently manage uses of the respective first super blocks based on the numbers of bad memory blocks included in the respective first super blocks.
    Type: Grant
    Filed: November 9, 2018
    Date of Patent: February 11, 2020
    Assignee: SK hynix Inc.
    Inventors: Ik-Sung Oh, Kyeong-Rho Kim, Sung-Kwan Hong, Jin-Woong Kim
  • Patent number: 10552254
    Abstract: The present disclosure relates to partially written superblock treatment. An example apparatus includes a memory device operable as a multiplane memory resource including blocks organized as superblocks. The memory device is configured to maintain, internal to the memory device, included in a status of an open superblock, a page indicator corresponding to a last written page of the open superblock. The memory device is further configured, responsive to receipt, from a controller, of a read request to a page of the open superblock, determine from page map information maintained internal to the memory device and from the indicator of the last written page, which of a number of different read trim sets to use to read the page of the open superblock corresponding to the read request.
    Type: Grant
    Filed: August 15, 2017
    Date of Patent: February 4, 2020
    Assignee: Micron Technology, Inc.
    Inventors: Dheeraj Srinivasan, Ali Mohammadzadeh
  • Patent number: 10552387
    Abstract: A system for managing data using simulated purging includes an input interface and a processor. The input interface is to receive an indication of a data to simulate purging. The processor is to mark the data as purge simulated at a purge simulated time, to monitor the data for an attempt to access the data after the purge simulated time, to increase a count of a number of attempts to access the data after the purge simulated time by one in response to an attempt to access the data after the purge simulated time, and to unmark the data as purge simulated and cease monitoring the data for the attempt to access the data in response to the count of the number of attempts to access the data after the purge simulated time exceeding a threshold.
    Type: Grant
    Filed: December 15, 2015
    Date of Patent: February 4, 2020
    Assignee: Workday, Inc.
    Inventors: Seamus Donohue, Sergio Mendiola Cruz, Ken Pugsley, John Levey, Gerald Green, Iacopo Pace
  • Patent number: 10529427
    Abstract: A semiconductor memory system includes a memory device including a plurality of memory blocks; a partial memory block detector suitable for detecting at least one partial memory block among the plurality of memory blocks; an open page detector suitable for detecting addresses and a number of a plurality of open pages among a plurality of pages included in the partial memory block; and a controller suitable for controlling the memory device to perform a one-shot program operation with dummy data according to the addresses and the number of the plurality of open pages.
    Type: Grant
    Filed: July 17, 2018
    Date of Patent: January 7, 2020
    Assignee: SK hynix Inc.
    Inventor: Jong-Min Lee
  • Patent number: 10503658
    Abstract: The present disclosure is directed to techniques for migrating data between heterogeneous memories in a computing system. More specifically, the techniques involve migrating data between a memory having better access characteristics (e.g., lower latency but greater capacity) and a memory having worse access characteristics (e.g., higher latency but lower capacity). Migrations occur with a variable migration granularity. A migration granularity specifies a number of memory pages, having virtual addresses that are contiguous in virtual address space, that are migrated in a single migration operation. A history-based technique that adjusts migration granularity based on the history of memory utilization by an application is provided. A profiling-based technique that adjusts migration granularity based on a profiling operation is also provided.
    Type: Grant
    Filed: April 27, 2017
    Date of Patent: December 10, 2019
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Arkaprava Basu, Jee Ho Ryoo
  • Patent number: 10496535
    Abstract: Embodiments of the invention include systems and methods for recovering the system status and maintaining drive coherency after an unexpected power loss. In particular, these systems and methods reduce overhead for maintaining drive coherency by providing for pre-allocation of groups of write addresses and recording the pre-allocated groups of addresses to the non-volatile memory. Write processes can write to the pre-allocated group of addresses while the next group of addresses are pre-allocated and recorded to non-volatile memory.
    Type: Grant
    Filed: June 18, 2018
    Date of Patent: December 3, 2019
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Lyndon S. Chiu, Frederick H. Adi
  • Patent number: 10491667
    Abstract: A computing system providing virtual computing services may maintain a fleet of servers that host virtual machine instances having a wide variety of types and configurations. A service provider may rent processor and memory capacity by defining and offering various virtual machine instances to clients. Each virtual machine instance may include one or more virtual CPUs and a fixed amount of virtualized memory allocated to each virtual CPU, dependent on a predefined ratio between virtual CPU capacity and virtualized memory capacity for the instance type. Each server may include a custom, non-standard sized physical memory module containing memory devices of multiple technologies, types, or sizes on the same printed circuit board. By including custom memory modules, rather than relying only on standard memory modules, the service provider system may implement virtual machines having finer grained options for processor and memory capacity combinations, and may avoid stranding rentable resources.
    Type: Grant
    Filed: March 26, 2015
    Date of Patent: November 26, 2019
    Assignee: Amazon Technologies, Inc.
    Inventors: Darin Lee Frink, Brent Kenneth Clore
  • Patent number: 10409684
    Abstract: A method, a device and a storage medium for cleaning a memory are provided. The method includes that: a preset level corresponding to a detected hang state is determined; a cleaning mode corresponding to the preset level is determined; and an application program running in a memory is cleaned according to the cleaning mode.
    Type: Grant
    Filed: April 27, 2017
    Date of Patent: September 10, 2019
    Assignee: BEIJING XIAOMI MOBILE SOFTWARE CO., LTD.
    Inventors: Xiaoliang Zhang, Hao Yan, Ren Liu
  • Patent number: 10382377
    Abstract: A data transaction processing system receives electronic data transaction request messages from client computers over a data communication network and groups a subset of the electronic data transaction request messages. The data transaction processing system may preprocess the group of electronic data transaction request messages based on the other messages in the same group before forwarding the electronic data transaction request messages to a transaction processor.
    Type: Grant
    Filed: December 28, 2017
    Date of Patent: August 13, 2019
    Assignee: Chicago Mercantile Exchange Inc.
    Inventors: José Antonio Acuña-Rohter, Ari Studnitzer, Kyle D. Kavanagh, Pearce Peck-Walden, Eric Schuldt
  • Patent number: 10372500
    Abstract: In some embodiments, a system includes a register file, a plurality of clock gating circuits, a free list circuit, and a register allocation adjustment circuit. The register file includes a plurality of registers. The clock gating circuits control receipt of a clock signal at respective regions of registers. The free list circuit performs multiple search operations in parallel to identify unallocated registers. The register allocation adjustment circuit implements a mapping between registers identified by the free list circuit and registers of the register file such that the multiple search operations identify whether registers of a first region are unallocated prior to identifying whether registers of a second region are unallocated. As a result, a region of the register file is less likely to be in use during a particular clock cycle and a clock gating circuit may prevent a clock signal from being received at the region.
    Type: Grant
    Filed: February 17, 2016
    Date of Patent: August 6, 2019
    Assignee: Apple Inc.
    Inventors: Christopher S. Thomas, James N. Hardage, Jr., Christopher M. Tsay
  • Patent number: 10366000
    Abstract: Reusing data in a memory. A method includes determining to revalidate a first set of data stored in a first, invalidated, portion of the memory. An amount of data in a second set of data in the free portion of the memory that will also be revalidated by revalidating the first portion of the memory is determined. As a result, an action to perform is determined and performed. The action includes either revalidating the first portion of the memory if the amount of data in the second set of data is at or below a predetermined threshold or copying the first set of data in the first portion of the memory, and re-writing the first set of data to the active valid portion of the memory, if the amount of data in the second set of data is above the predetermined threshold.
    Type: Grant
    Filed: January 12, 2018
    Date of Patent: July 30, 2019
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Cristian Petculescu, Amir Netz
  • Patent number: 10325672
    Abstract: Disclosed are a memory apparatus having a plurality of information storage tables managed by separate virtual regions and a control method thereof. That is, a fault repair is applied in a memory system having a plurality of information storage tables managed by a separate virtual region, so that the entire information storage space is uniformly used for every region to improve a performance of the entire system and maximize efficiency of the information storage space by utilizing the information storage space.
    Type: Grant
    Filed: April 13, 2017
    Date of Patent: June 18, 2019
    Assignee: Korea University Research and Business Foundation
    Inventors: Seon Wook Kim, Ho Kwon Kim, Jae Yung Jun, Kyu Hyun Choi, Young Sun Han
  • Patent number: 10325317
    Abstract: The invention relates to a system and method for providing a latency floor for an electronic trading venue in which market participants who can respond within the value the floor and choose to compete in a specific race to make or take a price may each have a substantially equal chance of winning that race. The system may detect and distinguish individual “races” that occur on an electronic trading venue. Upon detection of the first order (or message) in such a race, the system may create a batch and a timer for that race. As orders pertaining to that race are received, they are added to its batch. Upon the timer reaching a predetermined value, typically the value of the floor, the race is determined to have ended and the orders are drained from the batch for processing (e.g., against the instrument's central limit order book (CLOB)).
    Type: Grant
    Filed: November 5, 2014
    Date of Patent: June 18, 2019
    Assignee: Refinitiv US Organization LLC
    Inventor: Hayden Paul Melton
  • Patent number: 10310772
    Abstract: The present disclosure provides memory control methods and memory control apparatus. An exemplary method includes providing a memory having a targeted memory zone, the targeted memory zone having a plurality of memory cells, and a storage capacity of each memory cell being one page; receiving and reading out to-be-stored data and obtaining the targeted address information of the to-be-stored data; reading out data status of all memory cells of a targeted memory zone; determining the data status of the memory cells of the targeted memory zone; performing a programming operation to a memory cell with an erased state to write the to-be-stored data into the memory cell with the erased state; and performing an erasing operation to a memory cell having a logic address of written data to remove the logic address.
    Type: Grant
    Filed: November 25, 2016
    Date of Patent: June 4, 2019
    Assignees: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION, SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION
    Inventor: Shi Cong Zhou
  • Patent number: 10303780
    Abstract: Customers in regulated industries face demanding compliance regulations, including content immutability. While broadened to allow software-based solutions, the regulations for immutability require content preservation to prevent overwriting, erasure or alteration of the content, where the preservation must be implemented through irrevocable features. Embodiments are directed to provision of an administrative user experience to enable customers to create a preservation policy that defines item(s) to be preserved. After detecting enablement of the policy, the item(s) may be preserved, a preservation lock on the policy may be initiated by disabling controls associated with the policy, and an attribute may be set to the policy to identify the policy as locked.
    Type: Grant
    Filed: June 3, 2016
    Date of Patent: May 28, 2019
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Julian Zbogar-Smith, Kamal Janardhan, Sanjay Ramaswamy, Le-Wu Tung
  • Patent number: 10303612
    Abstract: Apparatuses, systems, and methods for hardware-level data encryption having integrity and replay protection are described. An example electronic device includes a memory encryption engine (MEE) having a MEE cache configured to store a plurality of MEE cache lines, each MEE cache line comprising a plurality of cryptographic metadata blocks, where each metadata block is associated with each of a plurality of encrypted data lines stored in a memory, and each MEE cache line includes a bit vector mapped to the plurality of metadata blocks, where a set bit in the bit vector indicates that the associated metadata block has been accessed by one or more processors, and MEE circuitry configured to select a replacement candidate from the plurality of MEE cache lines for eviction from the MEE cache based on a number of accessed metadata blocks in the replacement candidate as indicated by the associated bit vector.
    Type: Grant
    Filed: December 30, 2016
    Date of Patent: May 28, 2019
    Assignee: Intel Corporation
    Inventor: Siddhartha Chhabra
  • Patent number: 10289304
    Abstract: A storage system includes a controller connected to a solid state memory device. The controller releases the physical address for reassignment when no pending reads are associated with the physical address. In certain embodiments, a read status table may be included within the storage system. In certain embodiments, subsequent to the release of the physical address, erase operations may erase data at the physical address and the physical address may be reassigned to a new logical address by ensuing host write operations.
    Type: Grant
    Filed: March 5, 2018
    Date of Patent: May 14, 2019
    Assignee: International Business Machines Corporation
    Inventors: Charles J. Camp, Timothy J. Fisher, Kevin E. Sallese
  • Patent number: 10289687
    Abstract: A system is described for backing-up a client device to a server using space-optimized snapshots. A snapshot is captured on the client device. The system determines which files of the snapshot are required to be uploaded to perform a backup. Thereafter, the system monitors the required files (and not other files) for write commands and directs write operations for the required files to be performed copy-on-write. After a required file is uploaded, the system stops monitoring the file and any copy-on-write data that may have been generated for the file is removed from the snapshot to conserve space. The process continues until all required files are uploaded.
    Type: Grant
    Filed: April 7, 2016
    Date of Patent: May 14, 2019
    Assignee: VMware, Inc.
    Inventors: Nir Adler, Boaz Harel
  • Patent number: 10282125
    Abstract: Systems and methods are provided for preserving data in a data deduplication system. A hash tree-based deduplication system balancing memory utilization and duplication-related storage access overhead is disclosed. The system preferably relies on distributed file system infrastructure and the system modifies this infrastructure. The data structures may be adapted to accommodate file-block distribution properties at runtime, such as runtime-specializing the hash tree to detect replicated chunks.
    Type: Grant
    Filed: April 17, 2017
    Date of Patent: May 7, 2019
    Assignee: International Business Machines Corporation
    Inventors: Mark Korondi, Dániel Kovács, Michael C. Osborne, Tamas Visegrady
  • Patent number: 10282097
    Abstract: A storage system and method for thin provisioning are provided. In one embodiment, a storage system is provided comprising a memory and a controller. The controller is configured to provide a logical exported capacity of the memory to a host, wherein the logical exported capacity is greater than an actual storage capacity of the memory; receive a command from the host to write data to a logical address; determine whether there is available actual storage capacity in the memory to write the data; and write the data to a physical address in memory that corresponds to the logical address only if it is determined that there is available actual storage capacity in the memory to write the data. Other embodiments are possible, and each of the embodiments can be used alone or together in combination.
    Type: Grant
    Filed: March 31, 2017
    Date of Patent: May 7, 2019
    Assignee: Western Digital Technologies, Inc.
    Inventors: Amir Shaharabany, Michael Zaidman, Rotem Sela, Hadas Oshinsky
  • Patent number: 10248573
    Abstract: Managing memory of a computing environment. A determination is made as to whether a block of memory is being used to back an address translation structure used by a guest program. The block of memory is a block of host memory, and the guest program is managed by a virtual machine manager that further manages the host memory. A memory management action is performed based on whether the block of memory is being used to back the address translation structure.
    Type: Grant
    Filed: July 18, 2016
    Date of Patent: April 2, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jonathan D. Bradbury, Michael K. Gschwind
  • Patent number: 10235056
    Abstract: A storage device may include a plurality of memory devices logically divided into a plurality of blocks and a controller. In some examples, the controller may be configured to determine a respective fullness percentage for each respective block of the plurality of blocks; determine the smallest fullness percentage for the plurality of respective fullness percentages; and responsive to determining that the smallest fullness percentage exceeds a predetermined threshold value, perform an action related to health of the storage device.
    Type: Grant
    Filed: September 26, 2014
    Date of Patent: March 19, 2019
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventor: Haining Liu
  • Patent number: 10216639
    Abstract: A storage device made up of multiple storage media is configured such that one such media serves as a cache for data stored on another of such media. The device includes a controller configured to manage the cache by consolidating information concerning obsolete data stored in the cache with information concerning data no longer desired to be stored in the cache, and erase segments of the cache containing one or more of the blocks of obsolete data and the blocks of data that are no longer desired to be stored in the cache to produce reclaimed segments of the cache.
    Type: Grant
    Filed: February 9, 2018
    Date of Patent: February 26, 2019
    Assignee: Hewlett Packard Enterprise Development LP
    Inventor: Umesh Maheshwari
  • Patent number: 10191844
    Abstract: The system identifies objects that cause thrashing behavior in garbage collection. A garbage collection process may be monitored for a period of time. Over that period of time, a number of objects may be observed to be collected by the garbage collection process. Data may be collected for those objects and a subset of those objects may be determined to be suspicious based on data collected for each object. The suspicious objects may then be reported as causing garbage collection thrashing.
    Type: Grant
    Filed: April 29, 2015
    Date of Patent: January 29, 2019
    Assignee: Cisco Technology, Inc.
    Inventor: Vinay Srinivasaiah
  • Patent number: 10185605
    Abstract: The disclosure generally describes computer-implemented methods, software, and systems for modeling and deploying decision services. One computer-implemented method includes operations for identifying a sequence number of a first message, the sequence number indicating a position of the first message within a first sequence of messages. If a second message positioned prior to the first message in the first sequence is in a final processing state and the second message in the first sequence is a parent message, a plurality of child messages associated with the second message are identified. Each child message is associated with a sequence number indicating a position of the child message within a second sequence associated with the plurality of child messages. The computer-implemented method determines whether a child message positioned at the end of the second sequence is in a final processing state.
    Type: Grant
    Filed: August 31, 2012
    Date of Patent: January 22, 2019
    Assignee: SAP SE
    Inventors: Manuel Holzleitner, Jan Trobitius
  • Patent number: 10180902
    Abstract: Garbage collection processing is facilitated. Based on execution of a load instruction and determining that an address of an object pointer to be loaded is located in a pointer storage area and the object pointer indicates a location within a selected portion of memory undergoing garbage collection, processing control is obtained by a handler executing within a processor of the computing environment. The handler obtains the object pointer from the pointer storage area, and determines whether the object pointer is to be modified. If the object pointer is to be modified, the handler modifies the object pointer. The handler may then store the modified object pointer in a selected location.
    Type: Grant
    Filed: November 14, 2015
    Date of Patent: January 15, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Giles R. Frazier, Michael K. Gschwind
  • Patent number: 10169357
    Abstract: Methods, systems, and computer program products are provided for optimizing selection of files for eviction from a first storage pool to free up a predetermined amount of space in the first storage pool. A method includes analyzing an effective space occupied by each file of a plurality of files in the first storage pool, selecting one or more of the plurality of files as one or more candidate files for eviction, based on the identified one or more data blocks, and evicting the one or more candidate files for eviction from the first storage pool to a second storage pool.
    Type: Grant
    Filed: January 6, 2017
    Date of Patent: January 1, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Duane M. Baldwin, Sandeep R. Patil, Riyazahamad M. Shiraguppi, Prashant Sodhiya
  • Patent number: 10168918
    Abstract: Various embodiments include methods, apparatus, and systems for assigning a plurality of version number values to instances of a logical entity of a memory device. Each version number value of the plurality version number values may be separately assigned to one of the instances of the logical entity. The version number values may be recycled after the plurality of version number values are assigned. Other embodiments including additional methods, apparatus, and systems are disclosed.
    Type: Grant
    Filed: June 8, 2015
    Date of Patent: January 1, 2019
    Assignee: Micron Technology, Inc.
    Inventor: Wanmo Wong
  • Patent number: 10169249
    Abstract: Provided are a computer program product, system, and method for adjusting active cache size based on cache usage. An active cache in at least one memory device caches tracks in a storage during computer system operations. An inactive cache in the at least one memory device is not available to cache tracks in the storage during the computer system operations. During caching operations in the active cache, information is gathered on cache hits to the active cache and cache hits that would occur if the inactive cache was available to cache data during the computer system operations. The gathered information is used to determine whether to configure a portion of the inactive cache as part of the active cache for use during the computer system operations.
    Type: Grant
    Filed: September 20, 2017
    Date of Patent: January 1, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kevin J. Ash, Matthew G. Borlick, Lokesh M. Gupta, Will A. Wright
  • Patent number: 10152427
    Abstract: Methods, systems, and apparatus for determining whether an access bit is set for each page table entry of a page table based on a scan of the page table with at least one page table walker, the access bit indicating whether a page associated with the page table entry was accessed in a last scan period; incrementing a count for each page in response to determining that the access bit is set for the page table entry associated with the page; resetting the access bit after determining whether the access bit is set for each page table entry; receiving a request to access, from a main memory, a first page of data; initiating a page fault based on determining that the first page of data is not stored in the main memory; and servicing the page fault with a DMA engine.
    Type: Grant
    Filed: August 12, 2016
    Date of Patent: December 11, 2018
    Assignee: Google LLC
    Inventors: Joel Dylan Coburn, Albert Borchers, Christopher Lyle Johnson, Robert S. Sprinkle
  • Patent number: 10133517
    Abstract: A storage control device includes a memory device and a processor. The memory device stores therein management information representing a relationship of a total amount of writable data within a warranty period of a storage device with respect to a user capacity of the storage device. The processor acquires a current user capacity and a current spare capacity from the storage device. The processor predicts, at a predetermined timing, a maximum write amount within the warranty period on basis of an accumulated amount of data written into the storage device and an operation time of the storage device. The processor restricts, when the user capacity is extended using the spare capacity, an extension amount of the user capacity on basis of the management information such that a total amount of writable data after the extension of the user capacity does not become less than the maximum write amount.
    Type: Grant
    Filed: June 22, 2016
    Date of Patent: November 20, 2018
    Assignee: FUJITSU LIMITED
    Inventor: Kazuyuki Sunaga
  • Patent number: 10127236
    Abstract: A method is provided for storing files in a filesystem of a data storage system. The method includes (a) storing data of each file of a set of files of the filesystem in a set of data allocation units (AUs) of the filesystem on the data storage system, each data AU of the set of data AUs having a common data AU size, and (b) storing metadata pertaining to each file of the set of files in a set of metadata AUs of the filesystem on the data storage system, each metadata AU of the set of metadata AUs having a common metadata AU size, the common data AU size being larger than the common metadata AU size. A computerized apparatus and a computer program product are also provided for performing a method similar to that described above.
    Type: Grant
    Filed: June 27, 2013
    Date of Patent: November 13, 2018
    Assignee: EMC IP Holding Company
    Inventors: Yingchao Zhou, William C. Davenport, Christopher A. Seibel, Jun Guo, Jia Zhai, Wengang Wang, Philippe Armangau
  • Patent number: 10061616
    Abstract: A system and method for handling requests by virtual machines (VMs) to lock portions of main memory are disclosed. In accordance with one embodiment, a host operating system (OS) of a computer system receives a request by the guest OS of a VM to lock a portion of main memory of the computer system. The host OS determines whether locking the portion of main memory violates any of a set of constraints pertaining to main memory. The host OS locks the portion of main memory when locking does not violate any of the set of constraints. The locking prevents any page of the portion of main memory from being swapped out to a storage device. The host OS can still swap out pages of main memory that are not allocated to this VM and are not locked by any other VM.
    Type: Grant
    Filed: May 30, 2012
    Date of Patent: August 28, 2018
    Assignee: Red Hat Israel, Ltd.
    Inventors: Michael Tsirkin, Dor Laor
  • Patent number: 10013841
    Abstract: The invention relates to any electronic device such as a chip card, a passport, a dongle or any other object requiring personalization of the content of a memory. More precisely, the invention provides for a method for processing a data item of a container stored in a memory, said method being implemented by the electronic device by utilizing in particular a table of identifiers. The invention furthermore provides for a prior step for associating a data identifier with a data item of a container and creating said table of identifiers.
    Type: Grant
    Filed: April 1, 2010
    Date of Patent: July 3, 2018
    Assignee: GEMALTO SA
    Inventors: Olivier Joffray, Jean-Michel Desjardins
  • Patent number: 9940045
    Abstract: A data storage device includes a nonvolatile memory device including a memory block, to which a write operation is interrupted and not completed due to at least one time occurrence of sudden power-off (SPO) of the data storage device, wherein the memory block includes at least one first valid page group including one or more valid pages caused before the interruption and at least one invalid page group having one or more invalid pages caused by the interruption; and a controller suitable for writing at least one physical address-to-logical address (P2L) list for the first valid page group into the invalid page group after power-on of the data storage device following the SPO, and recovering an address mapping table for the memory block based on the P2L list after completion of the write operation to the memory block.
    Type: Grant
    Filed: June 7, 2016
    Date of Patent: April 10, 2018
    Assignee: SK Hynix Inc.
    Inventor: Jeen Park
  • Patent number: 9934874
    Abstract: A storage medium management device may include a non-volatile storage, an error information register, and a congenital defective block identification register. The storage stores a defective block identification indicating a location of a defective block in a plurality of storage media. The error information register stores error information indicating that an error has occurred in access to the plurality of storage media. If at least one of the plurality of storage media has been replaced, the congenital defective block identification register identifies based on the error information a replaced storage medium of the plurality of storage media, reads a congenital defective block identification indicating a location of a congenital defective block from a prescribed block of the storage medium replaced, and updates the defective block identification of the replaced storage medium, with the congenital defective block identification read out from the replacing storage medium.
    Type: Grant
    Filed: August 27, 2015
    Date of Patent: April 3, 2018
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Kiyotaka Tsuji
  • Patent number: 9921759
    Abstract: A method for memory de-allocation may include identifying, by a processing device, a first memory object to be de-allocated within a scope of a function, creating a private freelist associated with the function, the private freelist comprising a reference to the first memory object, performing, within the scope of the function, a plurality of iterations to de-allocate a plurality of memory objects, wherein each iteration comprises adding, to the private freelist, a reference to a memory object of the plurality of memory objects, and causing, by a processing device, a public freelist to reference the private freelist.
    Type: Grant
    Filed: October 22, 2015
    Date of Patent: March 20, 2018
    Assignee: Red Hat, Inc.
    Inventor: Jesper Dangaard Brouer
  • Patent number: 9910602
    Abstract: A virtual memory management apparatus of an embodiment is embedded in a computing machine 80 and is provided with an application program 21, an operating system 22, a volatile memory 11, and a nonvolatile memory 12. The volatile memory 11 is provided with a plurality of clean pages. The nonvolatile memory 12 is provided with a plurality of dirty pages and a page table memory unit 51. The operating system 22 is provided with a virtual memory management unit 23 which includes a page transfer unit 25.
    Type: Grant
    Filed: September 20, 2016
    Date of Patent: March 6, 2018
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Hideki Yoshida, Tatsunori Kanai, Masaya Tarui, Yutaka Yamada
  • Patent number: 9811268
    Abstract: A method for reducing disk read rate by managing dataset mapping of virtual machine (VM) guest memory, comprising: monitoring a plurality of disk read write operations of a VM guest; updating a dataset mapping between disk blocks allocated to the VM guest and corresponding physical addresses of memory pages of the VM guest containing replica of data stored in the disk blocks, based on the plurality of disk read write operations; when identifying writing to one of the memory pages, removing a mapping of corresponding disk block and corresponding physical address of memory page; when reclaiming a mapped memory page of the VM guest by a host of the VM guest, discarding data contained in the memory page; and when the data is requested by the VM guest after it was reclaimed by said host, retrieving the data from corresponding disk block according to the mapping.
    Type: Grant
    Filed: February 16, 2015
    Date of Patent: November 7, 2017
    Assignee: Technion Research & Development Foundation Limited
    Inventors: Assaf Schuster, Nadav Amit, Dan Tsafrir
  • Patent number: 9811549
    Abstract: Disclosed herein are system, method, and computer program product embodiments for directly restoring a database from a log volume. An embodiment operates by reading one or more database transaction log records from a log volume. The embodiment then loads from a database table persistent storage one or more pages containing rows in the database table that will be read from or written to by the one or more database transaction log records. The embodiment then loads a dictionary for each column associated with the one or more database transaction log records. The embodiment then applies the one or more database transaction log records directly into the one or more loaded pages and the one or more dictionaries. Each dictionary and page modified in memory is then written to the database table persistent storage when a savepoint operation is performed.
    Type: Grant
    Filed: November 25, 2014
    Date of Patent: November 7, 2017
    Assignee: SAP SE
    Inventors: Ivan Schreter, Shiping Chen, David Wein, Steffen Geiβinger