Abstract: Systems, apparatuses and methods for erasing hard drives. A system, which can be configured as a stand alone and portable apparatus, includes a control device configured to support an erase module. The erase module is configured to erase a hard drive such that data erased from the hard drive is forensically unrecoverable. The system further includes a user interface and at least one drive bay configured to provide communication between a hard drive and the control device.

Abstract: A storage stack delete notification can be received at a storage stack filter. The delete notification can indicate deletion of primary data in a primary storage region. Secondary data that is taking up storage resources managed by the storage stack filter can be identified. The secondary data can be associated with the primary storage region, and the storage resources can be resources other than the primary storage region. It can be determined whether it is useful to have the secondary data continue taking up the storage resources. If having the secondary data continue taking up the storage resources is not useful, then the storage resources can be freed.

Abstract: A delete notification can be received at a storage stack filter in a storage stack. It can be determined whether the delete notification applies to an entire storage volume. If the delete notification does not apply to the entire storage volume, a first set of actions can be taken with the storage stack filter in response to the delete notification. If the delete notification does apply to the entire storage volume, a second set of actions can be taken with the storage stack filter in response to the delete notification.

Abstract: An apparatus having a memory module and an initialization module is disclosed. The initialization module may be configured to (i) mark a particular location in the memory module as an uninitialized location by writing a predetermined word into the particular location in response to an occurrence of an event, (ii) read a read word from an address in the memory module in response to a read cycle and (iii) generate an interrupt signal by analyzing the read word, the interrupt signal being asserted where the read word indicates that the address is the uninitialized location in the memory module.

Abstract: Systems, methods, and other embodiments associated with selecting a memory page for removal from a buffer pool based on the operating conditions of a computing system.

Abstract: A method and apparatus for reverting a resource to a prior state in time is provided. Changes are committed to a resource at a particular point in time. After the particular point in time, a request, which may be a file system operation request, to revert the resource to a state prior to the particular point in time is received at a database server. In response to the request, the resource is reverted to the state prior to the particular point in time. The current state of the resource ceases to reflect the plurality of changes. Advantageously, if a requestor creates an incorrect version of a resource, the changes made to a schema-based resource are not compatible with the schema, or the changes of multiple requesters are not compatible with each other, the resource may be reverted to the earlier point in time.

Abstract: A file system independent virtualized boot block with discovery volume and cover files renders a volume visible when accessed by an accessing system which differs from a source system. For example, a downlevel operating system recognizes that data is present on a volume created in an uplevel operating system, even where the uplevel data itself may not be accessible.

Abstract: A control apparatus, control method and computer readable article of manufacture for controlling data. The control apparatus includes a data storage unit; a plurality of entry storage units, and a plurality of registration units. The data storage unit stores data. Each of the entry storage units stores an entry for registering a pointer to data. If each of the registration units receives an instruction for registering data, then each registration unit (i) searches the entry storage units for an entry storage unit having an empty entry, (ii) registers a pointer to the data to be registered in the retrieved entry storage unit and (iii) stores the data to be registered and identification information of the retrieved entry storage unit in the data storage unit in such a manner that the data to be registered and the identification information is associated with each other.

Abstract: One method of updating a change track map involves resetting a mirror recovery map for a data volume. Just before the mirror recovery map is reset, a change track map for the data volume can be updated, using the mirror recovery map. The mirror recovery map can be reset by a data element of a data processing system, while the change track map can be updated by a control element of the data processing system.

Abstract: Differential management information that is information representing the difference between a logical volume and a sequential device group after a full backup is updated in response to an update of the logical volume. Partial data that are data representing the difference between the logical volume and sequential device group are specified by using the updated differential management information, information necessary for restoration that is necessary to restore the data group located in the updated logical volume by using the partial data is recorded in the sequential device group, and the partial data are backed up from the updated logical volume into the sequential device group.

Abstract: A method for storing data in a mobile device includes initializing a memory of the mobile device when the mobile device is powered on, allocating a free block of memory from the memory, saving received new data in the free block, and allocating a new free block again from the memory for saving received new data next time. The method further includes prompting for sufficient memory space to be manually freed from the memory if the new free block allocation is a failure, and re-prompting for sufficient memory space to be manually freed from the memory until a preset prompt time has been prompted if sufficient memory space has not been manually freed, or allocating a new free block of memory from the memory if sufficient memory space has been manually freed.

Abstract: A solid state storage system is disclosed including a memory area having a plurality of chips. The solid state storage system includes a micro controller unit (MCU) configured to utilize the number of deletions for logical blocks corresponding to logical block addresses when performing wear leveling on the memory area. The allocation of the logical block addresses can be performed using an interleaving process and a multi-plane method. The solid state storage system performs global wear leveling by which the lifespan of the cells of the chips can be uniformly managed.

Abstract: An embodiment of the invention relates to a nonvolatile mass storage device such as a flash memory device formed with erase blocks partitioned into memory management blocks. An erase block is identified containing at least a minimum number of management blocks marked invalid, from which data is copied, merged, and stored in a new management block. The erase block is then erased. Erase blocks containing at least the minimum number of invalid management blocks may be erased until a minimum amount of management blocks is free. Alternatively, all erase blocks containing at least the minimum number of invalid management blocks may be erased. A management table listing the number of invalid management blocks in erase blocks may be included in the mass storage device. Preferably, the new management block for storage of the merged data is located in an erase block different from the identified erase block.

Abstract: A system and method for efficient garbage collection. A general-purpose central processing unit (CPU) sends a garbage collection request and a first log to a special processing unit (SPU). The first log includes an address and a data size of each allocated data object stored in a heap in memory corresponding to the CPU. The SPU has a single instruction multiple data (SIMD) parallel architecture and may be a graphics processing unit (GPU). The SPU efficiently performs operations of a garbage collection algorithm due to its architecture on a local representation of the data objects stored in the memory. The SPU records a list of changes it performs to remove dead data objects and compact live data objects. This list is subsequently sent to the CPU, which performs the included operations.

Abstract: Methods and apparatus relating to a hardware and file system agnostic mechanism for achieving capsule support are described. In one embodiment, content associate with a capsule are stored in a non-volatile memory prior to a cold reset. A capsule descriptor may also be constructed, prior to the reset, which includes information about the physical location of the capsule content on the non-volatile memory. Other embodiments are also described and claimed.

Abstract: A method, apparatus, and computer program product for initializing a plurality of extents in a computing storage environment is provided. A plurality of states for each of the plurality of extents is defined to include either an initialized state or a modified state. The plurality of extents is initialized at an advance time, designating the plurality of extents as having the initialized state. Upon a first occurrence of a destage operation of a first extent of the plurality of extents, the first extent is designated as having the modified state.

Abstract: The present invention provides a memory management method, including the steps of: securing a memory area by a program executed by a computer; storing an object in the memory area in accordance with the execution of the program; bringing the memory area into a release reservation state in accordance with the program instructing the memory area to be released; moving the object to a memory area not to be released while another object in the memory area not to be released and not to be brought into the release reservation state refers to the object in the memory area to be released including the memory area to be brought into the release reservation state; and releasing the memory area to be released.

Abstract: A system and method for data storage by shredding and deshredding of the data allows for various combinations of processing of the data to provide various resultant storage of the data. Data storage and retrieval functions include various combinations of data redundancy generation, data compression and decompression, data encryption and decryption, and data integrity by signature generation and verification. Data shredding is performed by shredders and data deshredding is performed by deshredders that have some implementations that allocate processing internally in the shredder and deshredder either in parallel to multiple processors or sequentially to a single processor. Other implementations use multiple processing through multi-level shredders and deshredders. Redundancy generation includes implementations using non-systematic encoding, systematic encoding, or a hybrid combination.

Abstract: Methods and apparatuses are presented for reducing the power consumed in an in-line memory module. In some embodiments, the method may include monitoring a memory requirement of a computer system, the computer system comprising a plurality of memory modules. In the event that the memory requirement changes, unmapping at least one of the plurality of memory modules and maintaining a low power state for the at least one unmapped memory module. The method may further comprise selectively re-initializing the plurality of memory modules such that the at least one unmapped memory module remains in a low power state while the remainder of the plurality of memory modules are in a non-low power state. Where, in the event that the memory requirement changes again, the method also may comprise re-programming the memory controller with an identifier associated with the at least one unmapped memory module.

Abstract: An electronic device managing method and system, and a host electronic device using the method are disclosed. A plurality of client electronic devices may be connected to the host electronic device. The host electronic device may perform file storage state management, remaining battery capacity management, and file reproduction management, thereby integrally and efficiently managing the plurality of client electronic devices. The file storage state management may include managing file storage states corresponding to the memories of the plurality of client electronic devices, respectively. The remaining battery capacity management may include managing the remaining capacity of the batteries of the plurality of client electronic devices. The file reproduction management may include reproducing at least one of the files stored in the plurality of client electronic devices.

Abstract: The disclosure is related to systems and methods of management of memory. In a particular embodiment, a system is disclosed that comprises a control circuit adapted to compare a second data set to a first data set and to selectively replace the first data set with the second data set without performing an erase operation based on the comparison, wherein the erase operation is not performed when the first data set and the second data set differ only when locations of the second data set include a first logic value corresponding to one or more locations of the first data set that include a second logic value.

Abstract: A digital system including flash memory, coupled to a system-on-a-chip within which a flash memory subsystem controller is embedded, is disclosed. The system-on-a-chip includes support for a standard external interface, such as a Universal Serial Bus (USB) or IEEE 1394 interface, to which a host system such as flash memory test equipment can connect. Initialization of the flash memory is effected by opening a communications channel between the host system and the embedded flash memory subsystem controller. The host system can then effect initialization of the flash memory subsystem, including formatting of the flash memory arrays, loading application programs, and the like, over the communications channel.

Abstract: In a particular embodiment, a controller is adapted to control read/write access to a storage media including a pre-allocated area having multiple meta-blocks. The controller includes logic adapted to control the multiple meta-blocks as a first in first out (FIFO) circular queue. The logic selects one or more meta-blocks from the multiple meta-blocks based on an order associated with the FIFO circular queue and selectively writes a logical block address (LBA) mapping table to the selected one or more meta-blocks.

Abstract: A reset signal generation circuit for generating a reset signal synchronously or asynchronously to a clock signal in accordance with an operation state. An operation detection circuit detects operation of a CPU and generates an operation detection signal. A signal control circuit generates a first reset signal synchronously or asynchronously to an internal clock signal based on the operation detection signal and a system reset signal. The first reset signal is provided to synchronous circuits including the CPU.

Abstract: A method for initializing a control device of a memory, the control device executing commands for accessing the memory transmitted to the memory by a control signal, the method comprising steps of detecting the switching on of the memory and of at least partially initializing the control device following the switching on of the memory. According to one embodiment of the present invention, the method comprises steps of detecting a specific event in the control signal, and of at least partially initializing the control device following the detection of the specific event.

Abstract: An electronic data flash card is accessible by a host system, and includes a flash memory controller and at least one flash memory device coupled to the flash controller. The boot code and control code for the flash memory system (flash card) are stored in the flash memory device during a programming procedure. The flash controller transfers the boot code and control code to a volatile main memory (e.g., random access memory or RAM) at start up or reset making a RAM-based memory system. Boot code and control code are selectively overwritten during a code updating operation. A single flash controller thus supports multiple brands and types of flash memory to eliminate stocking issues.

Abstract: A computer system manages logical volumes as operation map including a volume ID of the logical volume and a plurality of pieces of a predetermined operating information (for example, a path setting, main-volume, sub-volume, permanent storage setting, and storage period setting), when an operation is added to the logical volume, corresponding operating information is set to addition and when the operation is released, the information is set to release, and at a time when a predetermined operating information is all set to release, a corresponding logical volume to the volume ID is detected as being deletable, thereby detecting the deletable the logical volume automatically.

Abstract: A system and computer program product for synchronizing direct access storage volumes designated as managed by storage management software with direct access storage volumes available to a computer system. An identifier of a volume is provided. The volume is connected to and available to a computer system, and is not managed by storage management software. The identifier is matched with an identification pattern included in a record of a database accessible to the computer system. Management options that facilitate managing the volume by the storage management software, and that are included in the record are retrieved from the record. The volume is automatically added to a set of volumes being managed by the storage management software. The adding of the volume includes designating the volume as being managed by the storage management software and providing the management options to the storage management software.

Abstract: One or more multi-level NAND flash cells are operated so as to store only single-level data, and these operations achieve an increased level of charge separation between the data states of the single-level operation by requiring a write to both the upper and lower pages, even though only one bit of data is being stored. That is, the second write operation increases the difference in floating gate charge between the erased state and the programmed state of the first write operation without changing the data in the flash memory cell. In one embodiment, a controller instructs the flash memory to perform two write operations for storing a single bit of data in an MLC flash cell. In another embodiment, the flash memory recognizes that a single write operation is directed a high reliability memory area and internally generates the required plurality of programming steps to place at least a predetermined amount of charge on the specified floating gate.

Abstract: An information processing apparatus, comprising: a decryption request unit that issues a decryption request for decrypting a encrypted target program at the time of the start of execution of the target program; a decryption unit that receives said decryption request from said decryption request unit, decrypts said encrypted target program and writes the so-decrypted target program into a first memory; an erasure request unit that issues an erasure request for erasing said decrypted target program at the time of the completion of execution of the target program; and an erasure unit that receives said erasure request from said erasure request unit and erases said decrypted target program from said first memory.

Abstract: A method for initializing a memory area, the method includes: receiving a request to access a first memory sub of a first memory area that comprises multiple memory sub areas; and initializing the first memory sub area if a first memory area initialization indicator differs from a first memory sub area initialization request indicator; wherein the first memory area initialization request indicator is a multiple bit variable indicative of a time of a last request to initialize the first memory area and the first memory sub area initialization indicator is a multiple bit variation indicative of a time of a request to initialize the first memory area that resulted in a last initialization of the first memory sub area.

Abstract: A memory system includes a nonvolatile memory, and a memory controller for performing control to extend the maximum value of a logical address by erasing data of the nonvolatile memory which has become unnecessary in accordance with a command from the outside, and reassigning the data which has become unnecessary to a memory area assigned to a part of the logical address.

Abstract: An information processing apparatus and method configured to access multiple external storage medium. The apparatus and method detect theft or loss (or otherwise unauthorized use) of the information processing apparatus with respect to data stored in multiple storage areas, back up the data to the storage medium, and record, in association with each of the storage medium, an easiness degree indicating how easily a user accesses the storage medium. The apparatus and method calculate erasure priority rankings of the data stored in a manner that an erasure priority ranking is higher as an easiness degree is higher, record the calculated erasure priority rankings in association with each of the multiple storage areas, and erases the data stored in the multiple storage areas in accordance with the erasure priority rankings when detecting theft or loss of the information processing apparatus.

Abstract: A reset generator for resetting at least one register in a register bank. The register generator comprises a scan mode input terminal configured to input a scan mode signal, a system reset input terminal configured to input a system reset signal, a secure reset output terminal configured to output a secure reset signal and a combination logic unit configured to combine the scan mode signal and the system reset signal. The combination is such that when the scan mode of the at least one register is activated, the secure reset signal is immediately activated for resetting the at least one register. The activation of the secure reset signal is independent of the system reset signal. The secure reset signal is deactivated when the system reset signal is deactivated and the secure reset signal follows the activation/deactivation cycles of the system reset signal after deactivation.

Abstract: A file to be read or written is designated and accessed from an access device side to a nonvolatile memory device. In an initialization after start-up of the power source, an empty capacity detector detects empty capacity parameters of a nonvolatile memory with dividing the memory into a plurality of regions. An empty capacity parameter notification part notifies the access device of the empty capacity parameters in a stepwise fashion whenever the empty capacity detector detects an empty capacity. With this, at the time when the empty capacity becomes not less than a capacity required to write file data, the data can be written to the nonvolatile memory without waiting for completion of the initialization, resulting in improvement of a response in the recording.

Abstract: A method for securing a flash memory from data damage is provided. After writing of data to a plurality of written pages of a first block of a flash memory is completed, a last weak page of the written pages is determined. A first strong page corresponding to the last weak page is then determined. A plurality of strong pages between the first strong page and the last weak page are then determined. Data of the plurality of strong pages is the coped to a backup area of the flash memory for data recovery.

Abstract: Even if a write operation onto a storage media on an external storage device is interrupted, consistency of management information on the storage media is improved. An image file transfer device includes a transferor which transfers an image file stored on a storage media to an external device, a retriever which obtains management information in relation to a file system from a storage media included in the external device, before the transfer of the image file by the transferor, a non-volatile storage which stores the management information obtained by the retriever, and a deleter which deletes the management information stored in the non-volatile storage in response to a completion of the transfer of the image file by the transferor.

Abstract: A cache method and a cache system for storing file's data in memory blocks divided from a cache memory are disclosed. The cache method for storing data of a file in memory blocks divided from a cache memory includes: receiving a request command for first data of a first file from an application; retrieving a memory block that stores the first data; setting reference information which indicates that the memory block storing the first data is referred to by the application; transmitting the first data stored in the memory block to the application; and resetting the reference information for the memory block that stores the first data.

Abstract: In one embodiment, a controller can perform a secure clear of a poisoned indicator associated with an uncorrectable error (after recovery from the error). To this end, the controller may access a register storing an address of a memory location associated with indicator, determine whether the address corresponds to an entry in a table storing a list of such errors, and perform the clear based at least in part on the determination. Other embodiments are described and claimed.

Abstract: A memory access mode detection circuit and method for detecting and initiating memory access modes for a memory device The memory access mode detection circuit receives the memory address signals, the control signals, and the clock signal and generates a first mode detection signal in response to receipt of the memory address signals or a first combination of control signals. An first mode initiation signal is generated a time delay subsequent to the detection signal to initiate the first mode memory access operation. In response to receipt of a second combination of control signals and an active clock signal, the memory access mode detection circuit further generates a second mode detection signal to initiate a second mode memory access operation and to suppress generation of the first mode detection signal, thereby canceling the first mode memory access operation.

Abstract: Aspects of the invention may include gradually decrementing or incrementing a write pointer (370) associated with a data buffer such as the FIFO buffer (310) until a reset value of the write pointer (370) is reached in response to an indication that a data buffer controlled by the gray code counter is empty. Additionally, a read pointer (380) associated with the data buffer (310) may be gradually incremented or decremented until a reset value of the read pointer (380) is reached in response to an indication that the data buffer controlled by the gray code counter is full. The data buffer may be a first-in-first-out (FIFO) buffer such as FIFO buffer 310, which may be asynchronously clocked. The data buffer may be adapted to buffer any one or a combination of video, voice and data.

Abstract: It is determined whether management information exists in an erasure folder or not after a power of an image forming apparatus is turned on. When the management information exists, image data is erased based on information of the management information. Then, it is determined whether the power is turned off or not during the erasing operation, and when it is determined that the power is turned off, the erasing operation of the image data is stopped and the management information remains in the erasure folder, but when it is determined that the power is not turned off, the erasing operation of the image data is completed.

Abstract: A system and related method of operation for migrating the memory of a virtual machine from one NUMA node to another. Once the VM is migrated to a new node, migration of memory pages is performed while giving priority to the most utilized pages, so that access to these pages becomes local as soon as possible. Various heuristics are described to enable different implementations for different situations or scenarios.

Abstract: Automated paging device management is provided for a shared memory partition data processing system. The automated approach includes managing a paging storage pool defined within one or more storage devices for holding logical memory pages external to physical memory managed by a hypervisor of the processing system. The managing includes: responsive to creation of a logical partition within the processing system, automatically defining a logical volume in the paging storage pool for use as a paging device for the new logical partition, the automatically defining occurring absent use of a filesystem, with the resultant paging device being other than a file in a filesystem; and automatically specifying the logical volume as a paging space device for the new logical partition and binding the paging space device to the new logical partition, wherein the logical volume is sized to accommodate a defined maximum memory size of the new logical partition.

Abstract: Embodiments of systems and methods for a high availability storage system are disclosed. More particularly, in certain embodiments desired locations of storage devices may be zeroed out during operation of the storage system and areas that have been zeroed out allocated to store data when commands pertaining to that data are received. Specifically, in one embodiment a distributed RAID system comprising a set of data banks may be provided where each data bank in the set of data banks may execute a background process which zeroes areas of the storage devices of the data bank. When a command pertaining to a logical location is received a zeroed area of the physical storage devices on the data bank may be allocated to store data associated with that logical location.

Abstract: An embodiment of the present invention is a technique to provide independent reset of a main partition. A reset functionality is disabled to preclude a main partition from resetting a platform. The platform has a visible resource belonging exclusively to the main partition. An activity of the main partition is monitored to determine if the main partition is about to reset the platform or becomes inoperable. The main partition is restricted to initialize the visible resource.

Abstract: Upon receiving an access request from a server, a microprocessor allocates a free slot as a data storage destination that is different from the LU# and LBA designated as a storage destination of user data, stores user data and data identifying information for identifying the user data in the free slot, and zero-clears the pre-updated data slot designated with the LU# and LBA. During a subsequent read access, the microprocessor accesses the data slot and, if the read data identifying information and the data identifying information designated in the read access from the server coincide, transfers this read data to the server as correct data, and, if the read data identifying information and the data identifying information designated in the read access from the server do not coincide, performs processing for recovering correct data based on the read data identifying information.

Abstract: A memory clear apparatus includes a processor that issues a memory clear request including a zero clear target area on a memory area and a zero clear target size, and a memory clearing circuit that receives the memory clear request from the processor, performs zero clearing on the zero clear target area based on the memory clear request, and transmits a memory clear completion notification to the processor.

Abstract: Systems and methods that facilitate securing data associated with a memory from security breaches are presented. A memory component includes nonvolatile memory, and a secure memory component (e.g., volatile memory) used to store information such as secret information related to secret processes or functions (e.g., cryptographic functions). A security component detects security-related events, such as security breaches or completion of security processes or functions, associated with the memory component and in response to a security-related event, the security component can transmit a reset signal to the secure memory component to facilitate efficiently erasing or resetting desired storage locations in the secure memory component in parallel and in a single clock cycle to facilitate data security. A random number generator component can facilitate generating random numbers after a reset based on a change in scrambler keys used by a scrambler component to descramble data read from the reset storage locations.

Abstract: In a computer system with a disk array that has physical storage devices arranged as logical storage units and is capable of carrying out hardware storage operations on a per logical storage unit basis, a switch is provided to offload storage operations from a file system to storage hardware. The switch translates primitives used for performing storage operations into commands executable by the physical storage devices so that the data moving portion of the storage operations can be offloaded from the file system to the storage devices.