Abstract: Data is managed efficiently by switching between block level hierarchical control and file level hierarchical control according to file characteristics. A storage apparatus which is connected via a network to a host computer which requests data writing comprises storage media of a plurality of types of varying performance, a volume management unit which manages storage areas provided by the storage media of the plurality of types as different storage tiers and manages storage tiers of the same type or different types as a pool and provides predetermined areas of the pool to the host computer as volumes, and a file management unit which constructs file systems, for managing data in file units configured from a plurality of blocks, in the volumes, and receives file unit data write requests from the host computer.

Abstract: A method and apparatus for providing efficient strong atomicity is herein described. Optimized strong operations may be inserted at non-transactional read accesses to provide efficient strong atomicity. A global transaction value is copied at a beginning of a non-transactional function to a local transaction value; essentially creating a local timestamp of the global transaction value. At a non-transactional memory access within the function, a counter value or version value is compared to the LTV to see if a transaction has started updating memory locations, or specifically the memory location accessed. If memory locations have not been updated by a transaction, execution is accelerated by avoiding a full set of slowpath strong atomic operations to ensure validity of data accessed. In contrast, the slowpath operations may be executed to resolve contention between a transactional and non-transaction access contending for the same memory location.

Abstract: A method and apparatus for handling reusable and non-reusable code is herein described. Page table entries include code reuse and locality fields to hold hints for associated pages. If a code reuse and locality field holds a non-reusable value to indicate an associated page holds non-reusable code, then an instruction decoded from the associated page is not stored in the trace to obtain maximum efficiency and power savings from the trace cache and decode logic.

Abstract: A storage system, according to one embodiment, includes a processor and logic integrated with and/or executable by the processor. The logic is configured to: search for an instance of a file or portion thereof on a second storage tier; at least one of: associate the instance of the file or portion thereof on the second storage tier with a first user when the instance of the file or portion thereof is not associated with any user, and replicate the instance of the file or portion thereof on the second storage tier and associate the replicated instance of the file or portion thereof on the second storage tier with the first user; and disassociate an instance of the file on a first storage tier from the first user.

Abstract: A method for programming a plurality of data sequences into a corresponding plurality of flash memory functional units using a programming process having at least one selectable programming duration-controlling parameter controlling the duration of the programming process for a given data sequence, the method comprising providing at least one indication of at least one varying situational characteristic and determining a value for said at least one selectable programming duration-controlling parameter controlling the duration of the programming process for a given data sequence, for each flash memory functional unit, depending at least partly on said indication of said varying characteristic; and, for each individual flash memory functional unit from among said plurality of flash memory functional units, programming a sequence of bits into said individual flash memory functional unit using a programming process having at least one selectable parameter, said at least one selectable parameter being set at said

Abstract: A method and apparatus adaptively controlling a page open time for a memory device are disclosed. The method includes determining a page open maintenance time of an access-requested page based on system information and intellectual property (IP) request information; and controlling closing of an open page based on the determined page open maintenance time.

Abstract: A method includes receiving input data comprising a plurality of bits and processing an access control list into an ESOP expression comprising a plurality of product terms. The method also includes storing a plurality of bits associated with the plurality of product terms in a TCAM comprising a plurality of rows and comparing the plurality of bits associated with the input data to the plurality of bits associated with the product terms stored in each row of the plurality of rows, such that each row of the TCAM outputs a plurality of signals, such that each of the plurality of signals indicate a match or no match for each bit stored in the selected row. The method includes receiving the plurality of signals from the plurality of rows by an ESOP evaluator and outputting an address associated with a selected row from the plurality of rows of the TCAM.

Abstract: A programmable integrated circuit device (IC) can include a configuration controller configured to assert a suspend request signal responsive to an input triggering suspend mode within the programmable IC and a memory controller block coupled to the configuration controller and a memory device. The memory controller block can be configured to place the memory device in self refresh mode in response to the suspend request signal and assert a suspend acknowledgement signal subsequent to placing the memory device in self refresh mode. The configuration controller can continue implementing suspend mode within the programmable IC in response to assertion of the suspend acknowledgement signal.

Abstract: A method is used in iterating for deduplication. A collection of data is selected from a set of storage extents. The collection of data is comprised of respective subset of the contents of each storage extent of the set of storage extents. A deduplicating technique is applied to the collection of data.

Abstract: A data processing apparatus comprises a processor constructed to operate under control of a sequence of program instructions selected from a predetermined instruction set; master circuitry to request access to storage locations of the processor; an interface circuit to provide an interface for an external apparatus to signal a request for access to the storage locations and an interface for the master circuitry to signal a request for access to the storage locations; and control to provide access between the storage locations and the interface circuit in response to the request only at predetermined points in execution of the stored program, the control being operable to fix periods of time for providing such access relative to the sequence of program instructions such that execution timing of the stored instructions is independent of whether a request is supplied to the interface.

Abstract: A method for deleting a relation between a source and a target in a multi-target architecture is described. The multi-target architecture includes a source and multiple targets mapped thereto. In one embodiment, such a method includes initially identifying a relation for deletion from the multi-target architecture. A target associated with the relation is then identified. The method then identifies a sibling target that inherits data from the target. Once the target and the sibling target are identified, the method copies the data from the target to the sibling target. The relation between the source and the target is then deleted. A corresponding computer program product is also disclosed and claimed herein.

Abstract: A method, system and computer program product for optimizing storage system behavior in a cloud computing environment. An Input/Output (I/O) operation data is appended with a tag, where the tag indicates a class of data for the I/O operation data. Upon the storage controller reviewing the tag appended to the I/O operation data, the storage controller performs a table look-up for the storage policy associated with the determined class of data. The storage controller applies a map to determine a storage location for the I/O operation data in a drive device, where the map represents a logical volume which indicates a range of block data that is to be excluded for being stored on the drive device and a range of block data that is to be considered for being stored on the drive device. In this manner, granularity of storage policies is provided in a cloud computing environment.

Abstract: A memory-array decoder operably coupled to a memory array comprising a sequence of rows and receiving as input a plurality of address bits whereby these address bits are transformed by transforming logic. This transforming logic may include adders. Transforming logic may alternately include comparators or exclusive-or circuits. Transforming logic comprising adders may include overflow carry bits that are discarded, ignored, or otherwise not used or the overflow logic may be omitted altogether.

Abstract: A device, system, and method are disclosed. In one embodiment the device includes a non-volatile memory (NVM) storage array to store a plurality of storage elements. The device also includes a dual-scope directory structure having a background space and a foreground space. The structure is capable of storing several entries that each correspond to a location in the NVM storage array storing a storage element. The background space includes entries for storage elements written into the array without any partial overwrites of a previously stored storage element in the background space. The foreground space includes entries for storage elements written into the array with at least one partial overwrite of one or more previously stored storage elements in the background space.

Abstract: A computer storage system includes multiple disk trays, each disk tray holding two or more physical disks. The disks on a single tray are virtualized into a single logical disk. The single logical disk reports to the RAID (redundant array of inexpensive disks) subsystem, creating the impression that there is one large capacity disk. In one implementation, each disk in the tray is allocated to a different RAID group. By allocating the disks in a tray to different RAID groups, if the tray is removed, only a portion of several different RAID groups are removed. This arrangement permits a simple reconstruction of the RAID groups if a disk tray is removed from the system.

Abstract: A device is connected between an storage device controller and a storage device, providing data storage device protection in a manner transparent to the computing system and to the user of the computing system independent of operating system. The device protects the user from malicious code by preventing its execution and the unauthorized or unwanted user data modification by making the contents of one of the storage device read only. All the operations of the device are invisible to the computing system and to the user independent of installed operating system. The device can be disabled by a switch or by other means. When this happens the effect is the same as if the device were physically removed of the computing system.

Abstract: A storage system according to one embodiment includes a first storage tier; an intermediate storage tier; a second storage tier; logic for storing instances of a file in the first storage tier, the intermediate storage tier, and the second storage tier; logic for determining which of a plurality of instances of the file in the first storage tier are to be migrated to the second storage tier; logic for copying one instance of the file from the first storage tier to the intermediate storage tier; and logic for copying the instance of the file from the intermediate storage tier to the second storage tier for creating an instance of the file on the second storage tier for each instance of the file on the first storage tier that is to be migrated to the second storage tier. Additional systems, methods, and computer program products are also presented.

Abstract: Methods and apparatus relating to a replacement policy for hot code detection are described. In some embodiments, it may be determined which entry amongst a plurality of entries stored in storage unit is to be replaced next. The entries may correspond to hot code and may store age and execution frequency information corresponding to the hot code. Other embodiments are also described and claimed.

Abstract: This invention is a data processing system having a multi-level cache system. The multi-level cache system includes at least first level cache and a second level cache. Upon a cache miss in both the at least one first level cache and the second level cache the data processing system evicts and allocates a cache line within the second level cache. The data processing system determine from the miss address whether the request falls within a low half or a high half of the allocated cache line. The data processing system first requests data from external memory of the miss half cache line. Upon receipt data is supplied to the at least one first level cache and the CPU. The data processing system then requests data from external memory for the other half of the second level cache line.

Abstract: Example embodiments described herein may comprise a transfer of firmware execution within a non-volatile memory device to one or more replacement instructions at least in part in response to a match between a code fetch address and an address stored in a trap address register.

Abstract: Each CM retains a function management table in which entry information indicating which function is operating in which CM for what period is registered. Every time a command is executed in a function processing unit on the basis of an instruction from a GUI, components of a CM perform control, communicating registered pieces of content in a function management table to corresponding components of another CM for synchronization among the CMs. Regardless of which of a plurality of CMs in a storage apparatus is a master, processing can be executed in any CM from any GUI without inconsistency in the processing between the CMs.

Abstract: A system and a method for protecting the security of data stored externally to a data processing engine of a data processor using at least one secure pad memory that is mapped to internal memory of the data processing engine and to the external memory. The memory data protection system and method performs an arithmetic operation, such as a bitwise exclusive OR (“XOR”) operation, on data being read from the data processing engine or written to the external memory using data stored in secure pads of the secure pad memory, which data may be random numbers generated by a random number generator.

Abstract: An information system comprises a host computer; a management computer; and a storage system including a storage controller and a plurality of storage volumes, the storage system configured to provide thin provisioned volumes from the plurality of storage volumes to the host computer for input/output. Each thin provisioned volume includes a plurality of segments which are provided by chunks of the storage volumes in the storage system. The storage controller is configured to assign a chunk to a segment on demand, analyze effectiveness of different chunk sizes for a chunk to be assigned to a segment and provide a report of the analyzed effectiveness to the management computer, and determine a size of a chunk to be assigned to a segment based on input from the management computer after the management computer receives the report of analyzed effectiveness.

Abstract: A storage control apparatus of the present invention is able to duplicatively manage data in a cache memory even during maintenance work. When a memory package CMPK3 specified by a user is removed from the apparatus 1 (S2), a microprocessor 2 changes a pair that has been configured using CMPK2 and CMPK3 to a pair of CMPK2 and a free area of a CMPK1. As a result, received data (S5) is respectively written to multiple cache memories (S6, S7), and duplicatively managed.

Abstract: Write caching for sequential tracks is performed by a processor device in a computing storage environment for destaging data from nonvolatile storage (NVS) to a storage unit. If a first track is determined to be sequential, and an earlier track is also determined to be sequential, a temporal bit associated with the earlier track is cleared to allow for destage of data of the earlier track. If a temporal bit for one of a plurality of additional tracks in one of a plurality of strides in a modified cache is determined to be not set, a stride associated with the one of the plurality of additional tracks is selected for a destage operation. If the NVS exceeds a predetermined storage threshold, a predetermined one of the plurality of strides is selected for the destage operation.

Abstract: There is disclosed a computer system operable to process a plurality of logical storage unit manifests the manifests comprising respective pluralities of chunk identifiers identifying data chunks in a deduplicated data chunk store The computer system can determine at least one preferred manifest or preferred combination of manifests according to levels of duplication of the chunk identifiers within respective said manifests, and/or within respective combinations of said manifests. The computer system can provide preferred seed data corresponding to data chunks identified by the at least one preferred manifest or preferred combination of manifests. A method and computer readable medium are also disclosed. At least some embodiments facilitate timely and convenient transfer and storage of relevant data chunks to a receiving deduplicated data chunk store of a data storage system.

Abstract: A method, device, and system are disclosed. In one embodiment method begins by incrementing a count of a total number of write operations to a non-volatile memory storage for each write operation to the non-volatile memory storage. The method then receives a request for the total count of lifetime write operations from a requestor. Finally, the method sends the total count of lifetime write operations to the requestor.

Abstract: Provided are techniques for more efficient data storage on a computing system. An inode table is provided and populated with information relating to current and N previous locations within data storage that a particular data block has been stored. When a particular data block is modified in a redirect on write system, the modified data block is stored, if possible is a previous storage location for that particular data block and the current data location may be saved for use as the location for a subsequent modification.

Abstract: A system and method of controlling a flash memory device such as a NAND memory device may involve receiving a command to execute an operation. A Ready/Busy contact of the memory device may be pulsed low in response to determining that execution of the operation has completed.

Abstract: An electronic device comprises: a mounting unit in which a first storage medium to be mounted; an acquiring unit configured to acquire attribute information of a mounted storage medium; a first determining unit configured to determine whether or not the mounted storage medium is a storage medium having a function other than a storage function based on the attribute information; a transmitting unit configured to transmit a command that can be used in a function other than a storage function to the mounted storage medium, in a case where it is determined that the storage medium is not a storage medium having the function other than the storage function; and a second determining unit configured to determine whether or not the mounted storage medium has the function other than the storage function based on whether or not there is a response to the transmitted command.

Abstract: An object storage system providing a secure object destruction and deletion service is provided. The destruction and deletion of files can be handled through secure overwriting of files on a storage medium or through cryptographic scrambling of file contents followed by subsequent deletion from a file table. The triggering of secure deletion can be periodically scheduled or dependent upon some particular event, making files self-destructing. Methods and systems for periodic re-authorization of files are also provided, allowing self-destructing files to be persisted in an available state.

Abstract: Method, system, and computer program product embodiments for, in a computing storage environment for destaging data from nonvolatile storage (NVS) to a storage unit, identifying working data on a stride basis by a processor device are provided. A multi-update bit is established for each of a plurality of strides in a modified cache, wherein the multi-update bit is adapted to indicate a corresponding stride is part of at least one track in a working set that refers to a group of frequently updated tracks. The plurality of strides are scanned based on a schedule to identify tracks for destaging. An operation to destage is performed on a selected track identified during the scanning, if the multi-update bit of a selected stride on the selected track is set to indicate the selected track is part of the working set and if the NVS is about 90% full or greater.

Abstract: In an analyzer device, a method for identifying a logical unit (LUN) of a data storage system as a candidate for migration to a second storage group is presented. The method includes receiving, by the analyzer device, a set of data associated with activity of the LUN of a first storage group, comparing, by the analyzer device, a performance metric value of a performance metric of the set of data, associated with the LUN, to a performance metric threshold associated with the performance metric, and when the performance metric value corresponds to the performance metric threshold, categorizing, by the analyzer device, the LUN as a candidate for storage on the second storage group, the second storage group distinct from the first storage group and having a disk type different from that of the first storage group.

Abstract: A state indicator associated with a cache line is stored, wherein the cache line is one of a plurality of cache lines each associated with a corresponding unique section of a region of system memory. The state indicator comprises a dirty indication indicating that the cache line is a candidate for writing data stored in the cache line to the associated section of the region of system memory. The state indicator is one of a plurality of state indicators each associated with a corresponding cache line. For the region of system memory, a number of the plurality of state indicators that comprises the dirty indication is determined, and if a threshold is exceeded, data stored in a selected cache line is written to the associated section of the region of system memory, and a clean indication is stored in the state indicator corresponding to the cache line.

Abstract: Systems and methods are presented to facilitate implementation of controlling memory management, e.g., garbage collection, of computer objects based upon determination of a source side weak event and associated components. A first class determines the existence of a listener and a second class, based upon an indication from the first class, determines whether the second class should “re-register for finalization” during execution of a finalizing operation. Where existence of the second class is maintained, existence of associated components such as the first class, a delegate, a listener, and the like, is continued and data, etc., continues to be published from the weak event to the listener. Where existence of the second class is no longer maintained (e.g., the second class does not re-register for finalization), the various components, e.g., the first class, the second class, a delegate, a listener, and any other objects are available for garbage collection.

Abstract: An adaptive buffer device includes a plurality of entries each including an address field and a record block, and a control unit for selectively setting each entry to one of a normal status and a transformed status. When the control unit sets a first one of the entries to the normal status, the address field thereof records a first address, and the record block thereof records data corresponding to the first address and data corresponding to addresses adjacent to the first address. When the control unit sets a second one of the entries to the transformed status, the control unit reconfigures the address field and the record block thereof into a plurality of units, each of which includes a second address, data corresponding to the second address, and data corresponding to addresses adjacent to the second address. In addition, an adaptive buffer method is also disclosed.

Abstract: The storage system is coupled to a host apparatus and includes a plurality of storage devices, each of which includes a plurality of real pages, and a controller. The controller is configured to: manage the plurality of storage devices as a pool; provide a virtual volume to the host apparatus, the virtual volume including a plurality of virtual pages to each of which a portion of the pool is allocated in accordance with a write command; distribute data written in a first virtual page to a first group of real pages, the first group of real pages making up a redundant array and being selected from different storage devices; and migrate data stored in a first real page, which is a real page of the first group and belongs to a first storage device, to another storage device without migrating data stored in another real page of the first group.

Abstract: A scheme is provided that guarantees the completion of cache invalidation processing in an information processing apparatus that performs directory-based coherence control. Each processor includes a cache and a Fence control unit that transmits an identifier to be returned to its own processor toward each bank through a network at timing when guarantee of completion of consistency processing of data stored in shared memory and the cache is requested and confirms that the identifier is returned from each bank. Each bank includes a memory main body, a directory that issues an invalidation request for invalidating the data stored in the cache according to an area where the data is written to the memory main body, and an invalidation request queue that queues the invalidation request and the identifier and transmits one of the invalidation request and the identifier through the network in a sequence of queuing.

Abstract: In accordance with embodiments of the present disclosure, a method may include receiving a read command. The method may also include determining if the read command is a command to read current data or historical data for a given logical address. The method may additionally include reading data stored on a storage resource at a historical physical address defined by a historical data offset associated with the given logical address in response to determining that the read command is a command to read historical data. The method may further include communicating the data stored at the historical physical address as a response to the read command.

Abstract: A recording/reproducing apparatus is configured to record a replacement block by logical overwrite (LOW) for updating data recorded on an information storage medium in a first area of the medium, record a replacement block for replacing a defect block generated on the medium in a second area of the medium, and record a second replacement block for replacement by defect of a first replacement block in the second area if the defect is detected while the first replacement block is being recorded in the first area to perform the logical overwrite of an original block recorded in a predetermined area of the medium, generate a defect list (DFL) entry including location information of the original block and location information of the second replacement block in order to indicate the replacement state, and move location information of the first replacement block in the second replacement block.

Abstract: A novel and useful mechanism and method for writing data updates to a data cache subsystem of a storage controller. Updates received by the storage controller requiring storage allocation on a repository volume are delayed prior to being written to the data cache subsystem. The delay is based on the storage utilization of the repository volume. As the utilization of the repository volume increases, the cache write delay increases, thereby limiting the possibility that there will still be any updates in the data cache subsystem waiting to be destaged to the repository volume when the repository volume is fully utilized. When the repository volume is fully utilized all writes to the data cache of updates that will cause destage of tracks in the repository volume are stopped, thereby causing an infinite delay.

Abstract: Systems, methods and a computer program product the differential storage and eviction for information resources from a browser cache. In an embodiment, the present invention provides differential storage and eviction for information resources by storing fetched resources in a memory and assigning, with a processor, a persistence score to the resources. Further embodiments relocate the resources from a sub-cache to a different sub-cache based on their persistence score, and remove the resource from the memory based on the persistence score.

Abstract: Method and apparatus for handling data in a data storage device. In accordance with some embodiments, a memory space with a plurality of garbage collection units (GCUs) that are each arranged into pages of memory that store user data identified by logical addresses (LAs) and each GCU has a metadata region that stores metadata that correlates the LAs with physical addresses (PAs). A header region in each page of memory stores a bitmask and a sequence map of the LAs in each page that are used by a log manager to creates a bitmask table stored in a first cache and a hierarchical log stored in a second cache. The bitmask table and hierarchical log are used to determine when the LAs stored in the selected GCU are stale, and update the bitmask for each page in the selected GCU after the stale data has been erased.

Abstract: A microprocessor includes one or more N-way caches and a way prediction logic that selectively enables and disables the cache ways so as to reduce the power consumption. The way prediction logic receives an address and predicts in which one of the cache ways the data associated with the address is likely to be stored. The way prediction logic causes an enabling signal to be supplied only to the way predicted to contain the requested data. The remaining (N?1) of the cache ways do not receive the enabling signal. The power consumed by the cache is thus significantly reduced.

Abstract: A chunk index has information on chunks in a storage space referenced in objects in the storage space. The chunk index includes a reference count for each chunk indicating a number of objects in which the chunk is referenced and a reference measurement representing a level of data object references to the chunk. One chunk is selected to remove from the storage space based on a criteria applied to the reference measurements of chunks having reference counts indicating that the chunks are not referenced in one object in the storage space.

Abstract: A system and method for locking data in a cache memory. A first processing thread may be operated to run a program requesting data, where at least some of the requested data is loaded from a source memory into a non-empty cache. A second processing thread may be operated independently of the first processing thread to determine whether or not to lock the requested data in the cache. If the requested data is determined to be locked, the requested data may be locked in the cache at the same time as the data is loaded into the cache.

Abstract: Inoperable bits are determined in a memory block. Rather than abandon the block as inoperable, a data structure is generated that includes at least one memory page pointer that identifies the location of the inoperable bits in the memory block. The data structure is stored in one of a group of memory blocks that are reserved for the data structures. A pointer to the data structure is stored in metadata associated with the memory block with the inoperable bits. When a later memory operation is received for the memory block, the pointer is retrieved from the metadata and the memory page pointers are used to avoid the inoperable bits.

Abstract: A storage system including first storage devices constituting a first logical storage area, second storage devices constituting a second logical storage area; and a storage control apparatus. The storage control apparatus manages the first and second logical storage areas so that the data stored in the first and second logical storage areas have redundancy, and parity data for the data stored in the second logical storage area are stored in parity storage areas arranged in part of the second storage devices. When part of the first storage devices constituting part of the first logical storage area fail, the storage control apparatus generates part of the data stored, before the failure, in the part of the first storage devices, and stores the generated part of the data in at least part of the second parity storage areas in the second logical storage area.

Abstract: A method of merging subsequent updates to a memory location includes receiving, at a first stage in an update pipeline, a first request to update a status word at a first address of a cache memory and receiving the status word from the cache memory. The method continues with determining, at a stage subsequent to the first stage, that a second request to update the status word has been received. Further included is updating the status word according to the first and second requests to form an updated status word and writing the updated status word to the cache memory.

Abstract: A method and a system for utilizing less recently used (LRU) bits and presence bits in selecting cache-lines for eviction from a lower level cache in a processor-memory sub-system. A cache back invalidation (CBI) logic utilizes LRU bits to evict only cache-lines within a LRU group, following a cache miss in the lower level cache. In addition, the CBI logic uses presence bits to (a) indicate whether a cache-line in a lower level cache is also present in a higher level cache and (b) evict only cache-lines in the lower level cache that are not present in a corresponding higher level cache. However, when the lower level cache-line selected for eviction is also present in any higher level cache, CBI logic invalidates the cache-line in the higher level cache. The CBI logic appropriately updates the values of presence bits and LRU bits, following evictions and invalidations.