Abstract: A method and apparatus for providing efficient strong atomicity is herein described. Optimized strong operations may be inserted at non-transactional read accesses to provide efficient strong atomicity. A global transaction value is copied at a beginning of a non-transational function to a local transaction value; essentially creating a local timestamp of the global transaction value. At a non-transactional memory access within the function, a counter value or version value is compared to the LTV to see if a transaction has started updating memory locations, or specifically the memory location accessed. If memory locations have not been updated by a transaction, execution is accelerated by avoiding a full set of slowpath strong atomic operations to ensure validity of data accessed. In contrast, the slowpath operations may be executed to resolve contention between a transactional and non-transaction access contending for the same memory location.

Abstract: A method, data processing system and program product for protecting against stale page overlays which includes executing a process in memory of the data processing system. A storage controller pages data from the memory to a disk in pages when the memory is constrained by other processes being executed by the data processing system. Data is then paged from the disk into memory in a one or more paged-in pages. The paged-in page is updated with updated data by the process, and the version on the disk is marked as stale. The storage controller commands the disk to make the stale disk version of the updated paged-in page as write-only, thereby providing that the disk version may be overwritten with new data while providing that the disk version cannot be read.

Abstract: Embodiments of the present invention provide a mechanism for an operating system and applications to cooperate in memory management. Applications register with the operating system for cooperative memory management. The operating system monitors the memory and determines a memory “pressure” related to the amount of demand for the memory. As the memory pressure increases, the operating system provides a memory pressure signal as feedback to the registered applications. The operating system may send this signal to indicate it is about to commence evicting pages from the memory or when it has commenced swapping out application data. In response to the signal, the registered applications may evaluate the memory pressure, determine which data should be freed, if any, and provide this information back to the operating system. The operating system may then free those portions of memory relinquished by the applications. By releasing data the system may thus avoid swapping and increase its performance.

Abstract: A computer implemented method, apparatus and program product automatically optimizes hash function operation by recognizing when a first hash function results in an unacceptable number of cache misses, and by dynamically trying another hash function to determine which hash function results in the most cache hits. In this manner, hardware optimizes hash function operation in the face of changing loads and associated data flow patterns.

Abstract: Hierarchically paging data in a computer system wherein, when evicting a page of data from the computer system main storage, evicting the page to a first paging store (preferably NVRAM). When evicting a page of data from the first paging store, evicting the page to a second paging store (such as a disk). When the main store requires a page of data that is not in the main store and when the page of data is available in the first paging store, loading the third page of data into main store from first paging store. When the page of data is not available in the first paging store, loading the third page of data into main store from the second store. Optionally, pages of main store are saved and restored from NVRAM during a power-down, power-up sequence of events.

Abstract: According to some embodiments a system and a method are provided to storing a plurality of data, the data comprising a plurality of original data elements and corresponding modified data elements. The plurality of original data elements may be automatically compared against editable field data in one or more editable fields that are displayed on a display screen by an application program. A determination may be made if the editable field data will be replaced and the editable field data may be replaced with the corresponding modified data elements if a determination is made to replace the editable field data.

Abstract: A method for reserving memory space for storing chunk sizes during Audio Video Interleave (AVI) recording, wherein an AVI file contains a plurality of interleaved audio-video (A/V) chunks, includes: recording the AVI file sizes to the second storage; when the second storage reaches capacity, moving at least a first A/V chunk size to the first storage; and after the recording has finished, reading stored A/V chunks from the first storage to the second storage to create an index chunk.

Abstract: The dismissing of cached data that is not expected to be further used is predicted instead of predicting future I/O operations and then data is fetched from the main memory to replace the dismissed data in the cache. Thus, firstly a location in a cache memory containing data, which is expected not to be further used, is identified, followed by performing a prefetch operation in order to request new data to refill the above location in the cache memory. Therefore, a data processing system comprises at least one processor (12) for processing streaming data, at least one cache memory (200) having a plurality of cache blocks (210), wherein one of said cache memories (200) is associated to each of said processors (12), and at least one cache controller (300) for prefetching data into said cache memory (200), wherein one of said cache controllers (300) is associated to each of said cache memories (200).

Abstract: The disclosure relates to techniques for locking and unlocking cache lines in a cache included within a multi-media processor that performs read-modify-write functions using batch read and write requests for data stored in either an external memory or an embedded memory. The techniques may comprise receiving a read request in a batch of read requests for data included in a section of a cache line and setting a lock bit associated with the section in response to the read request. When the lock bit is set, additional read requests in the batch of read requests are unable to access data in that section of the cache line. The lock bit may be unset in response to a write request in a batch of write requests to update the data previously read out from that section of the cache line.

Abstract: This invention is related to content delivery systems and methods. In one aspect of the invention, a content provider controls a replacement process operating at an edge server. The edge server services content providers and has a data store for storing content associated with respective ones of the content providers. A content provider sets a replacement policy at the edge server that controls the movement of content associated with the content provider, into and out of the data store. In another aspect of the invention, a content delivery system includes a content server storing content files, an edge server having cache memory for storing content files, and a replacement policy module for managing content stored within the cache memory. The replacement policy module can store portions of the content files at the content server within the cache memory, as a function of a replacement policy set by a content owner.

Abstract: A flash memory device includes a memory cell array, a peri circuit unit, an I/O controller, and a controller. The memory cell array includes a plurality of memory cells respectively connected to a plurality of bit line pairs and a plurality word lines. The peri circuit unit is configured to program data into the memory cell array or read data stored in the memory cell array in response to a command input through a control bus. The I/O controller is configured to receive data for programming and supply the data to the peri circuit unit in response to a command provided through a data input/output (I/O) bus. The controller is configured to control the I/O controller to perform a voltage setup operation for a program while the data for program is received.

Abstract: A system and method of managing purgeable memory objects includes a LIFO and/or FIFO queue for volatile memory objects, which can be emptied at a rate that matches the speed of a page queue.

Abstract: According to embodiments of the invention, a step value and a step-interval cache coherency protocol may be used to update and invalidate data stored within cache memory. A step value may be an integer value and may be stored within a cache directory entry associated with data in the memory cache. Upon reception of a cache read request, along with the normal address comparison to determine if the data is located within the cache a current step value may be compared with the stored step value to determine if the data is current. If the step values match, the data may be current and a cache hit may occur. However, if the step values do not match, the requested data may be provided from another source. Furthermore, an application may update the current step value to invalidate old data stored within the cache and associated with a different step value.

Abstract: A method for replacing cache lines in a computer system having a non-uniform set associative cache memory is disclosed. The method incorporates access latency as an additional factor into the existing ranking guidelines for replacement of a line, the higher the rank of the line the sooner that it is likely to be evicted from the cache. Among a group of highest ranking cache lines in a cache set, the cache line chosen to be replaced is one that provides the lowest latency access to a requesting entity, such as a processor. The distance separating the requesting entity from the memory partition where the cache line is stored most affects access latency.

Abstract: A memory apparatus having a cache memory including cache segments, and memorizing validity data indicative of whether or not each of the sectors contained in each cache segment is a valid sector inclusive of valid data; and a cache controlling component for controlling access to the cache memory. The cache controlling component includes a detecting component for detecting, when writing a cache segment back to the main memory, areas having consecutive invalid sectors by accessing validity data corresponding to the cache segment, and a write-back controlling component issuing a read command to the main memory, the read command being for reading data into each area detected, making the area a valid sector, and writing the data in the cache segment back to the main memory.

Abstract: The illustrative embodiments described herein provide a computer implemented method, apparatus, and computer program product for adjusting a page size for a virtual memory range. The process identifies a set of pages in the virtual memory range that reside on a primary memory to form a page occupancy. Each of the set of pages has a first page size. The process changes the first page size to a second page size in response to a comparison of the page occupancy to a threshold value indicating that the first page size should be adjusted.

Abstract: A computing system uses specialized “Set Associative Transaction Tables” and additional “Summary Transaction Tables” to speed the processing of common transactional memory conflict cases and those which employ assist threads using an Address History Table and processes memory transactions with a Transaction Table in memory for parallel processing of multiple threads of execution by support of which an application need not be aware. Special instructions may mark the boundaries of a transaction and identify memory locations applicable to a transaction. A ‘private to transaction’ (PTRAN) tag, directly addressable as part of the main data storage memory location, enables a quick detection of potential conflicts with other transactions that are concurrently executing on another thread of said computing system. The tag indicates whether (or not) a data entry in memory is part of a speculative memory state of an uncommitted transaction that is currently active in the system.

Abstract: A solution for managing a storage device based on a flash memory is proposed. A corresponding method starts with the step for mapping a logical memory space of the storage device (including a plurality of logical blocks) on a physical memory space of the flash memory (including a plurality of physical blocks, which are adapted to be erased individually). The physical blocks include a set of first physical blocks (corresponding to the logical blocks) and a set of second—or spare—physical blocks (for replacing each bad physical block that is unusable). The method continues by detecting each bad physical block. Each bad physical block is then discarded, so to prevent using the bad physical block for mapping the logical memory space.

Abstract: A system and method for controlling access to an instance method on an instance-specific basis by intercepting an invocation of the instance method on an instance.

Abstract: A multiple computer system is disclosed in which n computers (M1, M2 . . . Mn) each run a different portion of a single application program written to execute only on a single computer. The local memory of each computer is maintained substantially the same by updating all computers with every change made to addressed memory locations. Contention can arise when the same memory location is substantially simultaneously updated by two or more machines because of transmission delays and latency of the communications network interconnecting all the computers. In particular a method of data consolidation which permits contention detection and resolution is disclosed. A count value indicative of the cumulative number of times each memory location has been updated is utilized. Contention is indicated if the currently stored count value and the incoming updating count value are the same.

Abstract: Methods and apparatus for storing data records associated with an extreme value are disclosed. Signal data is stored in a first buffer of a set of buffers. If a local extreme value for the first buffer exceeds a global extreme value, signal data is stored in a second buffer of the set of buffers. This process is repeated, wrapping around and overwriting buffers until the signal data in a current buffer does not have a local extreme value that exceeds the global extreme value. When this happens, signal data may be stored in a subsequent buffer and if a local extreme value of the subsequent buffer does not exceed the global extreme value, further signal data may be stored in the subsequent buffer in a circular manner until either an instantaneous extreme value exceeds the global extreme value or the recording period ends. In an embodiment, the extreme value may be a peak value.

Abstract: An information storage device includes one or more semiconductor memories storing management data accompanying content data and being configured to erase data in units of one block, and a controller setting up, in the one or more semiconductor memories, a working area to temporarily store the management data and a storage area to retain all or part of the management data stored in the working area, writing the management data to the working area while monitoring the free space of the working area, moving the management data stored in the working area to the storage area when the free space of the working area falls below a prescribed value, and erasing the management data stored in the working area after the movement of the management data to the storage area.

Abstract: The present invention provides methods and systems to automatically manage hardware and software capabilities of replaceable electronic modules as the modules are replaced or reassigned to different tasks. Each such module stores configuration information in a persistent memory. This configuration information enables the module to use only selected hardware and to execute only selected software. A replaceable electronic module manager stores copies of each module's configure information in a separate persistent memory. When a module is replaced, a copy of the configuration information is fetched from the module manager's persistent memory and sent to a replacement module, thereby making the replacement module functionally equivalent (from a point of view of which hardware can be used by the module or which software can be executed by the module) to the replaced module.

Abstract: In a storage management system and method which virtualizes a plurality of storage devices distributed over a network to be managed, a storage state manager, in a storage management server, manages a storage usage state in each storage device, a network state manager manages a traffic state of each network device, and a path searching/setup portion determines a storage data path to be set up in the network device based on the storage usage state and the traffic state. In a host, a virtualization mapper associates a storage space replied from the storage management server with a virtual storage, and a path information setup portion transmits/receives storage data with the storage data path.

Abstract: A multiple computer system is disclosed in which n computers (M1, M2 . . . Mn) each run a different portion of a single application program written to execute only on a single computer. The local memory of each computer is maintained substantially the same by updating all computers with every change made to addressed memory locations. Contention can arise when the same memory location is substantially simultaneously updated by two or more machines because of transmission delays and latency of the communications network interconnecting all the computers. In particular a method of detecting and resolving contention is disclosed which utilizes a count value indicative of the number of the sequence of occasions on which each memory location has been updated. Contention is indicated if the currently stored count value and the incoming updating count value are the same. The contention can be resolved by providing a further rule.

Abstract: A method, device, and system are provided for the efficient transfer of snapshot data during a snapshot delete action. The snapshot data to be deleted may have an older version of the same snapshot and that older snapshot may need to access the data from the newer snapshot. Instead of copying all of the snapshot data of the snapshot that is being deleted to the older snapshot, only pointers to the data are copied to the older snapshot. Additionally, snapshot data can be accessed for read functions or the like while the snapshot pointers are being copied to the older snapshot.

Abstract: A system and method are provided for bypassing cache memory when reading data from system memory particularly when the primary memory could include memory types where the read operation mixes non-data with data. A system and method are provided for bypassing and invalidating cache memory when writing data to system memory particularly when the primary memory could include memory types where the write operation mixes non-data with data.