Abstract: Some aspects of this disclosure relate to a peak power manager that includes a first power estimate accumulator circuit configured to receive one or more power estimates associated with one or more subsystems and to generate a first accumulated power estimate. The peak power manage can further include a first-in first-out (FIFO) storage circuit configured to store a plurality of first accumulated power estimates associated with a plurality of clock cycles corresponding to a moving time interval window. The peak power manager can further include a second power estimate accumulator circuit configured to accumulate the plurality of first accumulated power estimates to generate a second accumulated power estimate and a control circuit.

Abstract: A data storage device and method for low-latency power state transitions by having power islanding in a host memory buffer are provided. In one embodiment, a data storage device is provided comprising a volatile memory, a non-volatile memory, and a controller. The controller is configured to receive information from a host about which area, if any, in a host memory buffer will be powered on during a low-power state; and in response to the information indicating that a first area of the host memory buffer will be powered on during the low-power state, flush data from a second area of the host memory buffer that will not be powered on during the low-power state to the first area of the host memory buffer prior to entering the low-power state. Other embodiments are provided.

Abstract: Systems and methods for analyte monitoring, particularly systems and methods for monitoring and managing life of a battery in an analyte sensor system worn by a user, are provided.

Abstract: A virtual image display device and an object selection method for virtual image thereof are provided. The object selection method for virtual image includes the following: a virtual image display is enabled to capture image information of a hand of a user; whether an image of an auxiliary tool is present in the image information is determined; position information of the auxiliary tool is generated according to the image of the auxiliary tool when the image of the auxiliary tool is present in the image information; the virtual image display is enabled to generate the position information of the auxiliary tool according to inertial measurement information of the auxiliary tool when the image of the auxiliary tool is not present in the image information; and the virtual image display is enabled to display an auxiliary indicator for selecting object according to the position information.

Abstract: Embodiments disclosed herein relate to reducing a power consumption of an electronic device while maintaining some functionality of the electronic device while the electronic device is in a low power mode. The device may be in the low power mode due to a battery level being below a threshold. If the battery level is below the threshold, the electronic device may enter the low power mode. However, before entering the low power mode, some functionality of an application processor may be transferred to a communication controller. Once the functionality is transferred, the application processor may be disabled to reduce power consumption while maintaining functionality of the application processor. The electronic device may also utilize various communication protocols to communicate with a peripheral device. Even though the electronic device may be in the low power mode, the communication controller may be used to cause the peripheral device to perform various actions.

Abstract: An application processor includes an application processor including a first processor configured to generate a control signal based on whether user data is changed, wherein the application processor is configured to implement a power manager which dynamically controls power provided to the first processor, in response to the control signal.

Abstract: Embodiments include a power distribution access network comprising power sourcing equipment (PSE) having a hybrid power-data port and at least one remote distribution node coupled to the PSE. The PSE delivers power at a first voltage to the distribution node and the distribution node delivers power at a second voltage to a remote device. Delivery of power to the distribution nodes may be based on information from the distribution node. Other embodiments include a power distribution access network with remote distribution nodes daisy-chained together by hybrid power-data cables so that a power line and a plurality of optical lines pass along the distribution nodes. The optical lines sequentially drop off along the chain and a remainder of the optical lines is indexed at each distribution node. Remote powered devices are coupled to the distribution nodes. Each remote powered device receives power and optical signals from the respective remote distribution node.

Abstract: A memory device, a memory system including the memory device, and a method of operating the memory device are described. The memory device includes a memory cell array including a plurality of planes, a peripheral circuit configured to perform a read operation including a channel initialization operation on a selected memory block among a plurality of memory blocks included in each of the plurality of planes, and a control logic configured to control the peripheral circuit to perform the read operation including the channel initialization operation, and the control logic sets an activation time of the channel initialization operation based on an read mode of the read operation.

Abstract: A power source is configured to supply power to one or more components of an electronic device. A processing device that is in communication with the power source can be configured to determine an estimated power requirement of the mobile electronic device during a time period, to determine a charge state of the power source, and to produce an indication of the remaining use time of the electronic device based on the estimated power requirement and the charge state of the power source.

Abstract: A power throttling engine includes a register configured to receive a power throttling signal. The power throttling engine further includes a decoder configured to generate a vector based on a value of the power throttling signal. The value of the power throttling signal is an amount of power throttling of a device. The power throttling engine further includes a clock gating logic configured to receive the vector and further configured to receive a clocking signal. The clock gating logic is configured to remove clock edges of the clocking signal based on the vector to generate a throttled clocking signal.

Abstract: Devices and techniques for arbitrating operation of memory devices in a managed NAND memory system to conform the operation to a power budget. In an example, a method can include initiating a first plurality of host-requested NAND memory operations of a first type at a first channel of a memory device for a first interval, and, at the completion of the first interval, performing a second plurality of homogeneous, host-requested NAND memory operations of a second type at the first multiple plane memory die for a second interval.

Abstract: An interface circuit including: a first transmission circuit outputting a first signal to a transmission line via first transfer pads; and a second transmission circuit outputting a second signal to the transmission line via second transfer pads, the first transmission circuit includes a first termination resistor block including a switch and a first termination resistor connected between the first transfer pads, the second transmission circuit includes a second termination resistor block including a switch and a second termination resistor connected between the second transfer pads, and when the first transmission circuit outputs the first signal, the second termination resistor block detects the first signal, and when the first transmission circuit is in a low-power operation mode, the second termination resistor block disconnects the second termination resistor, and when the first transmission circuit is in a high-speed data transfer mode, the second termination resistor block connects the second terminati

Abstract: An operating method of a power optimization scheduler is provided, where the operating method of a power optimization scheduler includes obtaining information regarding a neural network (NN) model, determining a voltage value for a task to be performed by at least one processing device, based on the obtained information regarding the NN model, and controlling a power management device to apply a voltage corresponding to the determined voltage value to the at least one processing device.

Abstract: The disclosed technology is generally directed to the identification of unobservable nodes. In one example of the technology, a set of monitored machines are monitored. Each of the monitored machines includes associated monitoring logic. Monitoring the set of monitored machines includes receiving the machine information from the monitoring logic. A total inventory list of the set of monitored machines is generated in a manner that is independent of the monitoring of the monitored machines. An agent inventory list is generated such that the agent inventory list is a list of machines that, based on the monitoring of the monitored machine, are determined to have been running monitoring logic during a particular time period. Unobservable machine information that is associated with a set of unobservable machines is determined based on a comparison of the total inventory list with the agent inventory list.

Abstract: In one embodiment, a method for maintaining a threshold operating temperature in an information handling system includes: identifying an operating temperature associated with the information handling system; determining a first fan speed associated with one or more fans of the information handling system based on the operating temperature; causing the one or more fans to rotate based on the first fan speed; identifying that the operating temperature has increased to reach the threshold operating temperature; and in response to identifying that the operating temperature has increased to reach the threshold operating temperature: identifying a power consumption level associated with the information handling system; determining a second fan speed associated with the one or more fans based on the power consumption level; and causing the one or more fans to rotate based on the second fan speed.

Abstract: An apparatus includes an execute circuit configured to execute a plurality of operations received from a queue, as well as a power estimator circuit, and a power sensing circuit. The power estimator circuit is configured to predict power consumption due to execution of a particular operation of the plurality of operations, and to withdraw, based on the predicted power consumption, a first amount of power credits from a power credit pool. The power sensing circuit is configured to monitor one or more characteristics of a power supply node coupled to the execute circuit to generate a power value, and to deposit a second amount of power credits into the power credit pool. The second amount of power credits may be based on the power value indicating that power consumed during the execution of the particular operation is less than the predicted power consumption.

Abstract: The present disclosure relates to an apparatus that includes decoding circuitry that decodes a single instruction. The single instruction includes an identifier of a first source operand, an identifier of a second source operand, an identifier of a destination, and an opcode indicative of execution circuitry is to multiply from the identified first source operand and the identified second source operand and store a result in the identified destination. Additionally, the apparatus includes execution circuitry to execute the single decoded instruction to calculate a dot product by calculating a plurality of products using data elements of the identified first and second operands using values less precise than the identified first and second source operands, summing the calculated products, and storing the summed products in the destination.

Abstract: Embodiments of systems and methods for standby operation in a platform framework are described. In some embodiments, an Information Handling System (IHS) may include a processor and a memory coupled to the processor, the memory having program instructions stored thereon that, upon execution, cause the IHS to: identify an application registered with a platform framework via an Application Programming Interface (API); and at least one of: in response to the identification matching any entry in a whitelist, put the application in a throttled state during standby operation of the IHS; or in response to the identification not matching any entry in the whitelist, put the application in a suspended state during standby operation of the IHS.

Abstract: Examples relate to a method includes monitoring a set of parameters. The set of parameters are associated with a first set of computing components and a second set of computing components. The first set of computing components is located in a first region and the second set of computing components is located in a second region. The first region is positioned proximate a generation station control system associated with a generation station and the second region is positioned remotely from the generation station control system. Each computing system of the second set of computing systems is configured to adjust power consumption during operation. The method also includes adjusting power consumption at one or more computing components of the second set of computing components based on the set of parameters.

Abstract: An information handling system manages operation of an infrared time of flight sensor to provide accurate and timely user presence and absence detection through monitoring of the time of flight distance detection for indications of object velocity that validates or invalidates a transition between the user presence and user absence states. An integrated sensor hub in a central processing unit stores distances received from the infrared time of flight sensor in a distance table in association with a time stamp of the distance measurement. During monitoring of distances received from the infrared time of flight sensor, if the integrated sensor hub detects a user absence or presence, validation of the transition is performed by analyzing the stored distances to determine a vector of velocity at the state transition.

Abstract: The present disclosure includes apparatuses and methods for performing operations by a memory device in a self-refresh state. An example includes an array of memory cells and a controller coupled to the array of memory cells. The controller is configured to direct performance of compute operations on data stored in the array when the array is in a self-refresh state.

Abstract: Determining utilization of a computing component, including: determining, of the power limits of the respective registers, a lowest power limit; determining an instantaneous power use of the computing component; determining a power-based utilization of the computing component based on i) the instantaneous power use of the computing component and ii) the lowest power limit indicated by the registers; identifying an instantaneous temperature and temperature limit of the computing component, and an ambient temperature of an environment of the computing component; determining a temperature-based utilization of the computing component based on the instantaneous temperature and the temperature limit of the computing component, and the ambient temperature of the environment; determining the utilization of the computing component based on a greater of the power-based utilization of the computing component and the temperature-based utilization of the computing component, and in response, adjusting execution of compute

Abstract: An adaptive learning power modeling method includes: sampling at least one of a plurality of network components to form a power consumption evaluation network according to at least one parameter within a parameter range; evaluating a predictive power consumption of a to-be-measured circuit by the power consumption evaluation network; training and evaluating an actual power consumption and the predictive power consumption of the to-be-measured circuit by the power consumption evaluation network to obtain an evaluation result; and performing training according to the evaluation result to determine whether to change the power consumption evaluation network.

Abstract: Includes receiving, from a link partner, a message specifying a link partner receive wake time and resolving to a transmit wake time.

Abstract: In one aspect, a device includes at least one processor and storage accessible to the at least one processor. The storage includes instructions executable by the at least one processor to identify a power change condition in the device, and responsive to the power change condition, execute a scan for malware on the device using an operating system (O.S.) loaded into memory of the device from a server separate from the device.

Abstract: Power management includes receiving power supply unit (PSU) power capacity data and PSU power consumption data from each PSU in a set of PSUs. A priority table is updated with controlled device power consumption data received from a set of controlled devices. If the PSU power consumption data of any PSU exceeds an associated threshold calculated based on the PSU power capacity data for the PSU, then one or more controlled devices are selected based on the controlled device power consumption data in the priority table. When power consumption data of any PSU exceeds the associated threshold, a power response procedure powers off at least one of the selected one or more controlled devices, reduces power supplied to at least one of the selected one or more controlled devices, or reduces an output voltage of any of the PSU for which the PSU power consumption data exceeds the associated threshold.

Abstract: In some examples, a control unit is configured to consider battery heat. The control unit is adapted to provide power from a battery to a system during a peak power mode that includes peak power and off-peak power, and consider heat balance in the battery during the peak power mode by providing peak power so that heat of the battery corresponds to a reference condition heat of the battery.

Abstract: According to the disclosure, a memory allocation method and device and recording medium in a multi-core processor system are disclosed. According to an embodiment, a method for allocating a shared variable to a memory in a multi-core processor system comprises mapping each task to a core, allocating unshared variables to memories times of access, to which are sequentially minimized, in descending order of actual variable access count, calculating an actual variable access count per core, selecting a core with a highest actual variable access count, and allocating a shared variable to a memory of the selected core.

Abstract: Provided are an apparatus and a method for controlling an interrupt rate for a processor based on processor utilization. Accordingly, it is possible to improve an I/O response latency and improve energy efficiency.

Abstract: One embodiment provides a method comprising receiving device setting behavioral data collected from one or more consumer electronic (CE) devices, and generating one or more machine learning (ML) models based on a portion of the device setting behavioral data. In one embodiment, the method comprises predicting, via the one or more ML models, a device setting suitable for a CE device based on a current user context, and providing a recommendation comprising the predicted device setting to the CE device. In another embodiment, the method comprises clustering, via the one or more ML models, at least one user associated with the one or more user-initiated adjustments into at least one user group, and determining one or more user-preferred device settings that the user group prefers most. The one or more user-preferred device settings are provided to a CE device as one or more new device settings available for user selection.

Abstract: A data backup method of a storage device which includes a storage controller, a buffer memory, and a plurality of nonvolatile memory devices, the method including: detecting a power-off event of an external power provided to the storage device; deactivating a host interface of the storage controller in response to the detection of the power-off event; moving data stored in the buffer memory to a static random access memory (SRAM) in the storage controller; blocking or deactivating a power of the buffer memory; setting an interleaving mode of the plurality of nonvolatile memory devices to a minimum power mode; and programming the data moved to the SRAM to at least one of the plurality of nonvolatile memory devices.

Abstract: A method tests the configuration of an aggregated DERs system using distributed asset managers in a decentralized hardware-in-the-loop (“HIL”) scheme. The managers contain the model of the asset they are meant to control. The method programs an asset manager with a model of a DERs asset. A plurality of asset managers are connected to a central controller. The plurality of asset managers are also connected to a simplified hardware-in-the-loop platform. The simplified HIL platform is configured to solve a network model, a load model, a non-controllable asset model, and a grid model. The method tests the DERs system control structure by using: (a) the simplified HIL platform to solve the network model, the load model, the non-controllable asset model, and the grid model, and (b) the asset manager to solve the model of the DERs asset, without any simulation between the central controller and the distributed asset managers.

Abstract: One embodiment provides a system and method for reshaping the power budget of a cabinet to facilitate an improved deployment density of servers. A battery cabinet comprises: a plurality of sealed batteries; a power outlet; and a power management module coupled to the sealed batteries and the power outlet. The power management module comprises: a power monitoring module configured to monitor a first amount of power consumed by one or more computing devices via a main power supply; a detection module configured to detect that the first amount of power consumption exceeds a predetermined power consumption threshold; and a power provision module configured to provide, via the sealed batteries, power to the power outlet until the first amount of power consumption no longer exceeds the predetermined power consumption threshold.

Abstract: An electronic device is provided. The electronic device includes a sensor circuit, a display, a processor operationally connected to the sensor circuit and the display, and a memory operationally connected to the processor, wherein the processor may detect, via the sensor circuit, whether the electronic device is unfolded at a predetermined angle, detect a placement state of the electronic device via the sensor circuit when the electronic device is unfolded at the predetermined angle, when the detected placement state of the electronic device is a first state, control the electronic device to operate in a first operation mode corresponding to the first state, and when the detected placement state of the electronic device is a second state, control the electronic device to operate in a second operation mode corresponding to the second state.

Abstract: A three-dimensional (3D) ultra-low power neuromorphic accelerator is described. The 3D ultra-low power neuromorphic accelerator includes a power manager as well as multiple tiers. The 3D ultra-low power neuromorphic accelerator also includes multiple cores defined on each tier and coupled to the power manager. Each core includes at least a processing element, a non-volatile memory, and a communications module.

Abstract: An electronic device according to an embodiment includes a display, and a processor including a plurality of cores, wherein the processor is configured to identify a first application satisfying a designated condition related to boosting of the processor among at least one application running on the electronic device, identify a first instruction set architecture (ISA) of the first application, and boost a frequency of a clock signal applied to at least one core among the plurality of cores included in the processor according to the first instruction set architecture.

Abstract: The present invention provides a control method applied to an electronic device is disclosed, wherein the electronic device includes a processor and a wireless network module, and the control method includes the steps of: generating a determination result by determining if the wireless network module needs to transmit a packet; and when the determination result indicates that the wireless network module needs to transmit the packet, reducing a frequency of a clock signal used by the processor during a packet transmission.

Abstract: Systems and methods for ground fault circuit interrupter trip detection and entire premises loss of power and restoration detection and notification of those events is disclosed. An example system may receive a smart plug identification. The system may authorize a smart plug. The system may link the smart plug to a smart plug application. The system may query the smart plug to obtain a power notification. The system may notify smart plug application of a power status.

Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for performing a prefetch processing to prepare an ambient computing device to operate in a low-power state without waking a memory device. One of the methods includes performing, by an ambient computing device, a prefetch process that populates a cache with prefetched instructions and data required for the ambient computing device to process inputs to the system while in the low-power state, and entering the low-power state, and processing, by the ambient computing device in the low-power state, inputs to the system using the prefetched instructions and data stored in the cache.

Abstract: This disclosure describes a method to minimize disruption for throughput oriented jobs in power oversubscription services with a dynamic control. The mechanism controls power in a hardware-agnostic way, and the policy employs a multi-threshold approach that balances power safety with workload impact. Moreover, an alternative control mechanism ensures proper system operation while power measurements are unavailable.

Abstract: Embodiments of a system, method, and memory storage device for managing performance optimization of applications executed by an Information Handling System (IHS) are described. In an illustrative, non-limiting embodiment, an IHS may include computer-executable instructions to receive telemetry data associated with an operating behavior of the IHS. Using the telemetry data, the IHS generates a profile recommendation from the received telemetry data using a machine learning (ML) service, and adjusts a core stall management mechanism of a second processor to optimize a performance of the IHS. The second processor performs at least a portion of the operating behavior of the IHS.

Abstract: To avoid blocking node AC queues in the degraded MU EDCA mode due to regular OFDMA transmission of data from another AC queue in resource units provided by an AP, the present invention proposes to use a dedicated HEMUEDCATimer for each AC queue, in order for them to be able to exit the degraded MU EDCA mode independently of the other AC queues. In this respect, upon successfully transmitting data stored in two or more traffic queues, in each of one or more accessed resource units provided by the AP within one or more transmission opportunities, the node sets each traffic queue transmitting in the accessed resource unit in the degraded MU EDCA mode for a predetermined degrading duration counted down by a respective timer associated with the transmitting traffic queue. Next, upon expiry of any timer, the node switches back the associated traffic queue to the conventional EDCA mode.

Abstract: A system includes a plurality of systems-on-a-chip (SoCs), connected by a network. The plurality of SoCs and the network are configured to operate as a single logical computing system. The plurality of SoCs may be configured to exchange local power information indicative of network activity occurring on their respective portions of the network. A given one of the plurality of SoCs may be configured to determine that a local condition for placing the respective portion of the network corresponding to the given SoC into a reduced power mode has been satisfied. The given SoC may be further configured to place the respective portion of the network into the reduced power mode in response to determining that a global condition for the reduced power mode is satisfied. The global condition may be assessed based upon current local power information for remaining ones of the plurality of SoCs.

Abstract: A display device includes a control circuit and a driving circuit driving a display panel to display an image. In response to determining that the driving circuit is to be switched from a running state to a standby state, the control circuit stops supplying power to the driving circuit. In response to determining that the driving circuit is to be switched from the standby state to the running state, the control circuit resumes the power supply to the driving circuit, and transmits a target reset signal to the driving circuit. The target reset signal is the same as a reset signal sent by a host computer to the driving circuit in response to a coupling being established between the driving circuit and the host computer.

Abstract: Systems, apparatus, and methods that control power consumption in a processor are disclosed. One system apparatus, and method includes a processor that operates in at least a first power control mode including a first power amount and a second power control mode including a second power amount lower than the first power amount and a power control device. The power control device is configured to control power consumption in the processor, change a power control mode of the processor to the first power control mode in response to a first excess time period in which the power consumption of the processor exceeds a first reference power for a first period of time, and change the power control mode of the processor to the second power control mode in response to a second period of time in which the power consumption is less than or equal to a second reference power.

Abstract: An apparatus and a method for reducing power consumption of an Application Processor (AP) in an electronic device are provided. The electronic device includes a first processor for supporting a first Internet Protocol (IP) Multimedia Subsystem (IMS) protocol stack, and a second processor for supporting a second IMS protocol stack. The first processor includes an AP for processing a multimedia service, and the second processor includes at least one of a Communication Processor (CP), a Modem Processor (MP), and a Baseband Processor (BP) for processing a communication service.

Abstract: Techniques are disclosed for managing power supplies and related power consumption alerts for a server based on the availability of redundant power supplies. When the system detects that a redundant power supply to a server has ceased to provide power, the system configures a new power consumption threshold for the remaining power supply. The new power consumption threshold is different than an initial power consumption threshold (if configured) when the redundant power supply was providing power. A power consumption threshold for triggering power consumption alerts for a power supply may be based on a number of power supplies actively providing power.

Abstract: In an embodiment, a system may support programmable hashing of address bits at a plurality of levels of granularity to map memory addresses to memory controllers and ultimately at least to memory devices. The hashing may be programmed to distribute pages of memory across the memory controllers, and consecutive blocks of the page may be mapped to physically distant memory controllers. In an embodiment, address bits may be dropped from each level of granularity, forming a compacted pipe address to save power within the memory controller. In an embodiment, a memory folding scheme may be employed to reduce the number of active memory devices and/or memory controllers in the system when the full complement of memory is not needed.

Abstract: Conversion of communications from a first device over a firsts communication channel to a second communication channel that is utilized by a second communication device such that an enterprise employee can interface with and communication with a customer using the customer's preferred channel or application for communication.

Abstract: A memory device according to an aspect may include a memory cell array including a first bank region and a second bank region each including a plurality of banks; an operation logic including one or more first processing elements (PEs) corresponding to the first bank region and one or more second PEs corresponding to the second bank region; a control logic configured to control modes of the first bank region and the second bank region based on externally sourced setting information; first and second mode signal generators configured to control enabling the first PEs, wherein the first mode signal generator is configured to output the first mode signal to enable the first PEs and the second mode signal generator is configured to output the second mode signal to disable the second PEs responsive to the first bank region being set to an operation mode and the second bank region being set to a normal mode.