Of Processor Patents (Class 714/10)
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Patent number: 10592454Abstract: A system-on-chip (SoC) to perform a deadlock control on a processor of the SoC, the SoC including the processor including a plurality of central processing unit (CPU) cores, a first bus connected to the processor, a graphic processing unit (GPU) connected to the first bus, a memory controller connected to the first bus, a second bus connected to the processor, an isolation cell including a logic circuit configured to retain a signal value input to the processor according to an isolation signal, and a deadlock controller connected to the first bus and the second bus. The deadlock controller is configured to isolate the processor, which is in a deadlock state, from the first bus by applying the isolation signal on the isolation cell, and to extract, via the second bus, state information of the isolated processor in the deadlock state.Type: GrantFiled: July 13, 2018Date of Patent: March 17, 2020Assignee: Samsung Electronics Co., Ltd.Inventors: Jae-Youl Kim, Chih Jen Lin, Jinook Song, Sungjae Lee, Hyun-ki Koo, Donghyeon Ham
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Patent number: 10574509Abstract: In one or more embodiments, one or more systems, method, and/or processes may receive an event from an operating system and provide the event to a management controller configured to perform out-of-band tasks. The management controller may provide information based on the event to at least one subscriber. In one example, the information may include a status of an information handling system (e.g., an impairment, a hardware failure, a progress of an update, etc.). In another example, the management controller may provide information utilizing a protocol that provides a measure of reliability. For instance, the protocol may include a transmission control protocol. In one or more embodiments, the protocol may include one or more of a hypertext transfer protocol (HTTP) and a HTTP secure (HTTPS).Type: GrantFiled: May 5, 2017Date of Patent: February 25, 2020Assignee: Dell Products L.P.Inventors: Srikanth Kondapi, Nathan F. Martell, Joseph Kozlowski, Jr., Abeye Teshome
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Patent number: 10565056Abstract: Techniques for parallel data collection and recovery for a failing virtual processing system are disclosed. According to aspects of the present disclosure, an example method includes: detecting that the virtual processing system experiences an irreparable error; saving, by each of a plurality of processors of the physical processing system, a corresponding context and data stored in an allocated portion of a memory of the physical processing system to a data store; selecting one of the plurality of processors as a recovery processor; initializing, by the recovery processor, a pre-determined reserved portion of the memory; initiating, by the recovery processor, a new instance of the virtual processing system on the reserved portion of the memory while each remaining processor of the plurality of processors continues the saving; and dynamically adding each remaining processor of the plurality of processors to the new instance of the virtual processing system.Type: GrantFiled: March 15, 2018Date of Patent: February 18, 2020Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Bryan P. Davidson, Michael E. Gildein, Angelo M. Quadara
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Patent number: 10552740Abstract: Embodiments of the present invention relate to providing fault-tolerant power minimization in a multi-core neurosynaptic network. In one embodiment of the present invention, a method of and computer program product for fault-tolerant power-driven synthesis is provided. Power consumption of a neurosynaptic network is modeled as wire length. The neurosynaptic network comprises a plurality of neurosynaptic cores connected by a plurality of routers. At least one faulty core of the plurality of neurosynaptic cores is located. A placement blockage is modeled at the location of the at least one faulty core. A placement of the neurosynaptic cores is determined by minimizing the wire length.Type: GrantFiled: November 10, 2014Date of Patent: February 4, 2020Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Charles J. Alpert, Pallab Datta, Myron D. Flickner, Zhuo Li, Dharmendra S. Modha, Gi-Joon Nam
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Patent number: 10528110Abstract: A method in a wireless communication device for diagnosing power supply failure in the wireless communication device is provided. The wireless communication device detects (301) an indication of power supply failure in the wireless communication device. When the indication of the power supply failure further indicates a non-active state of the wireless communication device or when the wireless communication device enters an error handling mode, the wireless communication device collects (302) diagnostic data from the PMU by means of a diagnostic engine (215) in the PMU. The wireless communication device then stores (303) the collected diagnostic data to a memory in the PMU. The data is related to the event resulting in the non-active state and/or to the latest event in a system of the wireless communication device or when the wireless communication device enters an error handling mode.Type: GrantFiled: July 9, 2014Date of Patent: January 7, 2020Assignee: TELEFONAKTIEBOLAGET LM ERICSSON (PUBL)Inventors: Joni Jäntti, Joakim Andersson, Markus Littow, Tarmo Ruotsalainen, Saila Tammelin
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Patent number: 10503725Abstract: A method for maintaining consistency in distributed databases includes receiving, by a coordinator from an application server, a transaction initiation message for a transaction. Additionally, the method includes determining whether to generate a distributed transaction identifier (DXID) for the transaction, including determining whether the transaction will be performed on a single data node or on multiple data nodes, determining to generate the DXID in response to determining that the transaction will be performed on the multiple data nodes, and generating, by the coordinator, the DXID corresponding to the transaction in response to determining to generate the DXID for the transaction. The method also includes sending, by the coordinator directly to a first data node, the DXID, sending, by the coordinator directly to a second data node, the DXID, and performing the transaction using the DXID.Type: GrantFiled: December 8, 2016Date of Patent: December 10, 2019Assignee: Futurewei Technologies, Inc.Inventor: Mason Sharp
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Patent number: 10502782Abstract: A system and method for using unreachable states of a circuit design in a testing mode to increase random testability of a random resistant logic circuit. Control-improving logic circuitry is integrated into a logic circuit design to improve its testability and will not affect behavior of the design in its functional mode (by remaining “inactive” in the functional mode of the integrated circuit). The control-improving logic circuitry is automatically activated in testing mode. The control improving logic circuit is generated selectively for random resistant logic circuit regions that exhibit limited controllability in the functional mode and improves controllability of random resistant logic in the testing mode. The improved controllability results from activating test circuitry in the states that are not reachable during normal functionality.Type: GrantFiled: November 10, 2017Date of Patent: December 10, 2019Assignee: International Business Machines CorporationInventors: Victor N. Kravets, Haoxing Ren, Mary P. Kusko, Spencer K. Millican
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Patent number: 10503405Abstract: A processing device receives a request to provide a hardware device with direct memory access to a contents of a virtual memory location in application memory of an application. Responsive to the request, the processing device locks the virtual memory location. The processing device makes a determination to reclaim a physical memory location mapped to the virtual memory location. The processing device then determines whether the hardware device has completed the access to a physical memory location mapped to the virtual memory location. Responsive to determining that the hardware device has not completed the access to the physical memory location, the processing device implements a copy-on-write policy for the virtual memory location.Type: GrantFiled: February 10, 2015Date of Patent: December 10, 2019Assignee: Red Hat Israel, Ltd.Inventor: Michael Tsirkin
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Patent number: 10504606Abstract: A memory device that supports a built-in self-test (BIST) operation includes: a plurality of memory cells; a page buffer group including page buffer circuits respectively coupled to the plurality of memory cells through bit lines; a built-in self-test (BIST) controller configured to generate pattern data to be stored in the page buffer circuits and reference data to be compared with sensed data obtained from the page buffer circuits, and to compare the reference data with the sensed data; and an input/output control circuit configured to input the pattern data to the page buffer circuits and to transfer the sensed data from the page buffer circuits to the BIST controller.Type: GrantFiled: January 2, 2018Date of Patent: December 10, 2019Assignee: SK hynix Inc.Inventors: Kyoung Han Kwon, Seung Wan Chai
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Patent number: 10496499Abstract: An improved approach for disaster recovery is provided, along with corresponding systems, methods, and computer readable media. In the improved approach, a set of applications are assigned one or more application weightings (e.g., based upon asset type, a recovery time objective, a recovery time capability, a criticality to key business functions, vendor hosting, interfaces with other systems), etc. The one or more application weightings are utilized for ranking the applications, and the ranked set of applications is utilized to generate a disaster recovery boot sequence whereby specific recovery tasks and infrastructure device requirements are arranged temporally to achieve one or more recovery time conditions.Type: GrantFiled: September 6, 2017Date of Patent: December 3, 2019Assignee: ROYAL BANK OF CANADAInventors: Elton Yuen, Jacqueline Kirkland, Michael Stoyke
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Patent number: 10496335Abstract: In one embodiment, a storage device comprises non-volatile storage media; a controller to receive, from a host, an object definition command that identifies a first data object and a second data object and a transformation to apply to the first data object and the second data object to generate a first transformed object and store the first transformed object in the non-volatile storage media; and a transformation engine to apply the transformation to the first data object and the second data object.Type: GrantFiled: June 30, 2017Date of Patent: December 3, 2019Assignee: Intel CorporationInventors: Jawad Basit Khan, Peng Li, Sanjeev Trika
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Patent number: 10467100Abstract: Embodiments of the present invention provide systems and methods for recovering a high availability storage system. The storage system includes a first layer and a second layer, each layer including a controller board, a router board, and storage elements. When a component of a layer fails, the storage system continues to function in the presence of a single failure of any component, up to two storage element failures in either layer, or a single power supply failure. While a component is down, the storage system will run in a degraded mode. The passive zone is not serving input/output requests, but is continuously updating its state in dynamic random access memory to enable failover within a short period of time using the layer that is fully operational. When the issue with the failed zone is corrected, a failback procedure brings the system back to a normal operating state.Type: GrantFiled: August 15, 2016Date of Patent: November 5, 2019Assignee: Western Digital Technologies, Inc.Inventors: Ladislav Steffko, Vijay Karamcheti
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Patent number: 10423148Abstract: Redundant automation system and method for the operation thereof in which a reference device is used to provide simplified addressing of a main automation device and a substitute automation device in the redundant automation system for controlling a technical apparatus, where the reference device is configured to activate a first connection path between further automation components, which are connected to the field bus, and the first automation device, and is furthermore configured to recognize a failure of the first automation device and thereupon to activate a second connection path between the further automation components, which are connected to the field bus, and the second automation device.Type: GrantFiled: November 23, 2015Date of Patent: September 24, 2019Assignee: Siemens AktiengesellschaftInventor: Hans-Jürgen Arbogast
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Patent number: 10425067Abstract: Devices are provided in which a metastable state can be detected in a memory device by means of a metastability detector. Corresponding information can be conveyed to a further device which, in dependence thereon, can process data from the memory device.Type: GrantFiled: December 28, 2016Date of Patent: September 24, 2019Assignee: Infineon Technologies AGInventor: Tommaso Bacigalupo
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Patent number: 10416630Abstract: A system includes a high speed bus and a plurality of multi-function modules coupled to the high speed bus. The plurality of multi-function modules includes at least one controller configured to execute control logic for the system. The plurality of multi-function modules also includes at least one arbitrator configured to manage the at least one controller. The plurality of multi-function modules further includes at least one input/output (IO) manager configured to interface between the at least one controller and at least one field device.Type: GrantFiled: March 7, 2017Date of Patent: September 17, 2019Assignee: UOP LLCInventors: Rahul De, Avinash Rajan, Kalyanasundaram Govindaraj, Amol Kinage, Ravi Kumar Ramamurthy, James Schreder, Christopher Peters
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Patent number: 10402286Abstract: The present invention is directed to determine validity of input data without increasing the number of data lines. An input/output system has an output device and an input device. The output device multiplexes data obtained by latching original data at a rising edge of a clock signal and data obtained by latching the original data at a falling edge of the clock signal and inverting the latched data, outputs the resultant data as multiplexed data, and also outputs the clock signal. The input device determines validity of the multiplexed data by comparing data obtained by latching the multiplexed data at a rising edge of the clock signal and data obtained by latching the multiplexed data at a falling edge of the clock signal and inverting the latched data.Type: GrantFiled: October 26, 2017Date of Patent: September 3, 2019Assignee: RENESAS ELECTRONICS CORPORATIONInventor: Takayuki Kawahito
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Patent number: 10394768Abstract: This disclosure describes converting data from a current data schema to an updated data schema in response to an application being updated. More specifically, this disclosure describes how data stored on computing device can be converted from any previous data schema version to an updated data schema version using a single conversion operation. Additionally, any data and/or content that has already been downloaded and stored on the computing device may be salvaged and associated with the newly converted data. As such, previously downloaded content does not need to be downloaded again when a data schema associated with an application has been updated.Type: GrantFiled: August 7, 2017Date of Patent: August 27, 2019Assignee: Microsoft Technology Licensing, LLCInventors: Dawid Dariusz Kozlowski, Amit Kumar Sinha, Ethan Joseph Bernstein
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Patent number: 10372549Abstract: A system, method, and computer readable medium for consistent and transparent replication of multi process multi threaded applications. The computer readable medium includes computer-executable instructions for execution by a processing system. Primary applications runs on primary hosts and one or more replicated instances of each primary application run on one or more backup hosts. Replica consistency between primary application and its replicas is provided by imposing the execution ordering of the primary on all its replicas. The execution ordering on a primary is captured by intercepting calls to the operating system and libraries, sending replication messages to its replicas, and using interception on the replicas to enforce said captured primary execution order. Replication consistency is provided without requiring modifications to the application, operating system or libraries.Type: GrantFiled: December 14, 2015Date of Patent: August 6, 2019Assignee: OPEN INVENTION NETWORK LLCInventor: Allan Havemose
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Patent number: 10365618Abstract: A method with which one subsystem of a redundant automation system that is provided with a first subsystem and a second subsystem is operated as a master and another subsystem is operated as a slave, where the subsystems are provided with transmission and reception tasks to transmit and receive messages, and where messages are also interchanged with program path synchronization during a temporally asynchronous run through a program path in the master and the slave.Type: GrantFiled: August 21, 2013Date of Patent: July 30, 2019Assignee: Siemens AktiengesellschaftInventors: Thomas Grosch, Juergen Laforsch, Albert Renschler
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Patent number: 10366070Abstract: A storage system is described. The storage system includes an object store having a plurality of objects containing information. The storage system also includes a cluster of locking nodes to implement a distributed synchronization locking mechanism. The cluster of locking nodes include a proposer node and a plurality of acceptor nodes. The proposer node to broadcast to the acceptor nodes a proposed lock on at least some of the information. The acceptor nodes to vote on the proposed lock based on respective locking information kept in a local store of each acceptor node.Type: GrantFiled: February 20, 2015Date of Patent: July 30, 2019Assignee: Scality S.A.Inventors: Giorgio Regni, Vianney Rancurel, Mudit Verma
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Patent number: 10346263Abstract: A host swap hypervisor provides a high availability hypervisor for virtual machines on a physical host computer during a failure of a primary hypervisor on the physical host computer. The host swap hypervisor resides on the physical host computer that runs the primary hypervisor, and monitors failure indicators of the primary hypervisor. When the failure indicators exceed a threshold, the host swap hypervisor is then autonomically swapped to become the primary hypervisor on the physical host computer. The original primary hypervisor may then be re-initialized as the new host swap hypervisor.Type: GrantFiled: February 3, 2017Date of Patent: July 9, 2019Assignee: International Business Machines CorporationInventors: Bin Cao, Jim C. Chen, Lauren A. Somers
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Patent number: 10324722Abstract: Example implementations relate to global capabilities transferrable across node boundaries. For example, in an implementation, a switch that routes traffic between a node and global memory may receive an instruction from the node. The switch may recognize that data referenced by the instruction is a global capability, and the switch may process that global capability accordingly.Type: GrantFiled: June 24, 2016Date of Patent: June 18, 2019Assignee: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LPInventors: Dejan S Milojicic, Paolo Faraboschi, Chris I Dalton
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Patent number: 10305970Abstract: A mechanism is provided for automatically recovering one or more distributed cluster nodes on a host system. Responsive to the host system recovering, restoring, or restarting, a set of distributed clustered systems affected due to the reboot of the host system and details associated with each of the set of distributed clustered systems are identified. Using the details, a set of nodes that operate on the host system are identified. For each node: respective components and configurations are prepared; a heartbeat is initiated thereby causing the node to register with a cluster network and identify peers within their associated distributed clustered system; a determination is made as to whether the node has reestablished connection with its associated distributed clustered system; and, responsive to the node reestablishing connection with its associated distributed clustered system, service components are started on the node.Type: GrantFiled: December 13, 2016Date of Patent: May 28, 2019Assignee: International Business Machines CorporationInventors: Anjali Agarwal, Rachit Arora, Rakhi S. Arora, Dharmesh K. Jain, Shrinivas S. Kulkarni
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Patent number: 10303573Abstract: Software and resources, pre-deployed in accordance with a disaster recovery policy, are placed in a standby state to provide rapid disaster recovery in a cloud storage environment. When a disaster recovery situation is detected, (for example a loss of access to primary data), the pre-deployed resources are immediately activated according to the disaster recovery policy to provision and re-configure adequate resources and rapidly restore access to the data (such as restoring data from cloud backup storage). A disaster recovery situation may involve, for example, loss of hardware availability, network bandwidth interruption, or a sudden and large unforeseen jump in storage retrieval request volume (for example a recall storm).Type: GrantFiled: June 19, 2017Date of Patent: May 28, 2019Assignee: International Business Machines CorporationInventors: Robert B. Basham, John Lewars, Christopher J. Tan, Oleksandr Safonov
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Patent number: 10305971Abstract: A mechanism is provided for automatically recovering one or more distributed cluster nodes on a host system. Responsive to the host system recovering, restoring, or restarting, a set of distributed clustered systems affected due to the reboot of the host system and details associated with each of the set of distributed clustered systems are identified. Using the details, a set of nodes that operate on the host system are identified. For each node: respective components and configurations are prepared; a heartbeat is initiated thereby causing the node to register with a cluster network and identify peers within their associated distributed clustered system; a determination is made as to whether the node has reestablished connection with its associated distributed clustered system; and, responsive to the node reestablishing connection with its associated distributed clustered system, service components are started on the node.Type: GrantFiled: January 25, 2018Date of Patent: May 28, 2019Assignee: International Business Machines CorporationInventors: Anjali Agarwal, Rachit Arora, Rakhi S. Arora, Dharmesh K. Jain, Shrinivas S. Kulkarni
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Patent number: 10255225Abstract: A computer includes a first module, a second module controlled by the first module, a first connector connectible to the first module, a second connector connectible to either the first module or the second module, and a data transmission line configured to connect the first connector to the second connector via a plurality of lanes. The order of lanes of the first module is reverse to the order of lanes of the second module while the order of lanes of the first connector is reverse to the order of lanes of the second connector. Thus, it is possible to improve the expandability of the computer acting as a server. Additionally, it is possible to prevent complexity of design and increased cost in expanding the functions of servers.Type: GrantFiled: March 22, 2016Date of Patent: April 9, 2019Assignee: NEC CorporationInventor: Kazuya Uchida
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Patent number: 10257019Abstract: Various embodiments are described herein that provide a network system comprising a set of peers within a link aggregation group (LAG), the first set of peers including a first network element and a second network element and a status resolution server to connect to the set of peers within the link aggregation group, wherein one or more peers within the LAG is to query the status resolution server to determine an operational status of a peer in the set of peers in response to detection of an apparent failure of the peer.Type: GrantFiled: July 14, 2016Date of Patent: April 9, 2019Assignee: Arista Networks, Inc.Inventors: Anshul Sadana, Prasanna Parthasarathy, Adam James Sweeney
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Patent number: 10255138Abstract: A disaster recovery tool includes a server monitoring engine, a configuration engine, a security engine, and a runtime engine. The server monitoring engine detects a production server and determines that a disaster recovery server should be created for the production server. The configuration engine compares database configuration files for the production server and the disaster recovery server and copies the database configuration file for the production server to the disaster recovery server. The security engine compares user logins and file sharing credentials of the production server and the disaster recovery server and copies the user login and file sharing credential of the production server to the disaster recovery server. The runtime engine compares database jobs and schedules of the production server and the disaster recovery server and copies the database job and schedule of the production server to the disaster recovery server.Type: GrantFiled: August 17, 2016Date of Patent: April 9, 2019Assignee: Bank of America CorporationInventors: Anant Bondalapati Sharma, Badelal Rameshwar Prasad Yadav, Rakesh Madanlal Shah
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Patent number: 10257043Abstract: Disclosed are embodiments for balancing utilization of infrastructure in a networked computing environment. One example embodiment includes: mapping, for each of a plurality of workloads operating on source devices in a networked computing environment, a corresponding target device within said networked computing environment; accessing topological information defining the networked computing environment; and reducing unbalanced utilization of infrastructure in the networked computing environment including migrating a workload to an alternate device within the networked computing environment, in dependence upon the mapping and topological information.Type: GrantFiled: January 11, 2016Date of Patent: April 9, 2019Assignee: Lenovo Enterprise Solutions (Singapore) Pte. Ltd.Inventors: John S. Crowe, Gary D. Cudak, Jennifer J. Lee-Baron, Nathan J. Peterson, Amy L. Rose, Bryan L. Young
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Patent number: 10248492Abstract: A method for executing programs (P) in an electronic system for applications provided with functional safety that includes a single-processor or multiprocessor processing system and a further independent control module, the method comprising: performing an operation of breaking-down of a program (P) into a plurality of parallel sub-programs (P1, . . . , Pn); assigning execution of each parallel sub-program (P1, . . . , Pn) to a respective processing module of the system, periodically performing self-test operations (Astl, Asys, Achk) associated to each of said sub-programs (P1, . . . , Pn).Type: GrantFiled: July 31, 2015Date of Patent: April 2, 2019Assignee: Intel CorporationInventors: Riccardo Mariani, Michele Borgatti, Stefano Lorenzini
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Patent number: 10216563Abstract: An electrical subsystem for a vehicle comprises an electronic control module adapted to generate one or more output messages suitable for transmission by a communication network, for instance a communication network, such as a CAN-bus, the subsystem further comprising: a message filter which is arranged in the event of a fault of the electronic control module to filter the messages generated by the electronic control module so that only messages that meet predefined criteria are transmitted by the communication network and to block messages that do not meet that criteria.Type: GrantFiled: September 3, 2014Date of Patent: February 26, 2019Assignee: TRW LimitedInventor: Martin John Thompson
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Patent number: 10202090Abstract: A circuit for controlling an acceleration, braking and steering system of a vehicle having at least two separate motors for actuating the acceleration and braking system, at least two separate motors for actuating the steering system and at least one electronic control unit for controlling the motors. The control unit comprises three identical CPUs and one programmable logic component. Each of the CPUs generates control signals for the motors depending on input control signals and sensor signals of the motors and forwards these control signals to the programmable logic component. The programmable logic component, depending on its programming, forwards the control signals of one of the CPUs to the motors.Type: GrantFiled: February 10, 2014Date of Patent: February 12, 2019Assignee: Schaeffler Paravan Technologie GmbH & Co. KGInventors: Roland Arnold, Georg Kotrotsios
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Patent number: 10205630Abstract: A fault tolerance method is provided for a distributed stream processing system. The method includes: obtaining, by a working node, information of a failed node, and receiving retransmission data sent by an upstream node, where the retransmission data is originally sent by a source node to the failed node; determining, according to the information of the failed node, whether the failed node is related to the working node; and if the failed node is related to the working node, processing the received retransmission data, and sending the processed retransmission data to a downstream node. In the present application, retransmission data sent by an upstream node is received by a working node, and after it is determined that a failed node is related to the working node, the received retransmission data is processed, so that the retransmission data sent by the upstream node is processed only when the failed node is related to the working node.Type: GrantFiled: February 15, 2016Date of Patent: February 12, 2019Assignee: HUAWEI TECHNOLOGIES CO., LTD.Inventors: Lujia Pan, Cheng He
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Patent number: 10205806Abstract: The present invention relates to the field of communications and information technologies, and in particular, to a method and an apparatus for configuring a redundancy solution in a cloud computing architecture, so as to solve a problem that a manner of manually planning a redundancy solution has poor flexibility and is unfavorable to overall management of a system. The method in the present invention includes: receiving a redundancy solution configuration request; determining, according to the redundancy solution configuration request, redundancy capability information and redundancy constraint requirement information of an application object to be configured; and determining, according to infrastructure information, infrastructure manager information, and application object information in an established redundancy capability information base, and the redundancy capability information and the redundancy constraint requirement information of the application object to be configured.Type: GrantFiled: October 13, 2016Date of Patent: February 12, 2019Assignee: HUAWEI TECHNOLOGIES CO., LTD.Inventors: Xiaodong Gong, Jie Yin, Miaohua Li
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Patent number: 10191823Abstract: A method and system for restoring an original component from a replicated component are provided. The method includes instructing the original component in a first computing environment to boot from a restoration boot disk; synchronizing at least one original disk of the original component with at least one corresponding replicated disk of a replicated component in a second computing environment, wherein the at least one original disk maintains at least an original operating system of the original component, wherein the replicated component is configured to function in place of the original component; receiving a request to restore the original component; and instructing the original component to boot from the at least one original disk, upon determination the at least one original disk and the at least one corresponding replicated disk are consistent.Type: GrantFiled: June 29, 2016Date of Patent: January 29, 2019Assignee: CloudEndure Ltd.Inventors: Leonid Feinberg, Ofir Ehrlich, Ophir Setter, Roman Zeyde, Sigal Weiner, Eran Weiss
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Patent number: 10185631Abstract: The described embodiments relate to devices for performing continuous backup of a data file on a computing device. The computing device transmits, to a backup server, a first network backup version of the data file, when the backup server is constantly available to the computing device through an uninterrupted network connection. The computing device monitors the data file to detect when a modification has been made to the data file, and when a modification to the data file has been detected, the computing device refrains from transmitting backup data associated with the modification until a network time interval expires. During the network time interval, a delta file corresponding to the modification made to the data file is stored locally on the computing device. Upon expiry of the network time interval, the computing device then transmits a second network backup version of the data file to the backup server.Type: GrantFiled: July 4, 2014Date of Patent: January 22, 2019Assignee: DATA DEPOSIT BOX INC.Inventor: Timothy R. Jewell
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Patent number: 10169176Abstract: Software and resources, pre-deployed in accordance with a disaster recovery policy, are placed in a standby state to provide rapid disaster recovery in a cloud storage environment. When a disaster recovery situation is detected, (for example a loss of access to primary data), the pre-deployed resources are immediately activated according to the disaster recovery policy to provision and re-configure adequate resources and rapidly restore access to the data (such as restoring data from cloud backup storage). A disaster recovery situation may involve, for example, loss of hardware availability, network bandwidth interruption, or a sudden and large unforeseen jump in storage retrieval request volume (for example a recall storm).Type: GrantFiled: February 6, 2018Date of Patent: January 1, 2019Assignee: International Business Machines CorporationInventors: Robert B. Basham, John Lewars, Christopher J. Tan, Oleksandr Safonov
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Patent number: 10162528Abstract: A data storage environment can include one or more virtual machines instantiated on a host computing device. Based on physical location data of the one or more virtual machines received from the host computing device, a storage manager can control the performance of a secondary copy operation on one or more storage units that store virtual machine data associated with the one or more virtual machines and/or the performance of a secondary copy operation on the one or more virtual machines.Type: GrantFiled: October 25, 2016Date of Patent: December 25, 2018Assignee: Commvault Systems, Inc.Inventors: Ashwin Gautamchand Sancheti, Henry Wallace Dornemann
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Patent number: 10157481Abstract: An apparatus for processing a medical image includes an image processor including a plurality of processors, the plurality of processors configured to reconstruct a cross-sectional image of an object by performing a first operation having a first priority and a second operation having a second priority that is lower than the first priority, and a controller configured to monitor whether a malfunction occurs among the plurality of processors, and configured to assign, to at least one of the plurality of processors, at least one of the first operation and the second operation to be performed, based on a result of monitoring of the plurality of processors.Type: GrantFiled: May 4, 2018Date of Patent: December 18, 2018Assignee: Samsung Electronics Co., Ltd.Inventors: Jun-young Park, Nasir Desai, Yeon-mo Jeong, Abhinav Mehrotra
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Patent number: 10127068Abstract: An opportunistic hypervisor determines that a guest virtual machine of a virtualization host has voluntarily released control of a physical processor. The hypervisor uses the released processor to identify and initiate a virtualization management task which has not been completed. In response to determining that at least a portion of the task has been performed, the hypervisor enters a quiescent state, releasing the physical processor to enable resumption of the guest virtual machine.Type: GrantFiled: June 30, 2016Date of Patent: November 13, 2018Assignee: Amazon Technologies, Inc.Inventors: Anthony Nicholas Liguori, Jan Schoenherr, Karimallah Ahmed Mohammed Raslan, Konrad Jan Miller, Filippo Sironi
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Patent number: 10114825Abstract: As part of query processing within a distributed execution environment framework, available resources taken into account when generating an execution plan and/or executing an execution plan to determine whether to parallelize any operations. Related apparatus, systems, methods and articles are also described.Type: GrantFiled: March 14, 2014Date of Patent: October 30, 2018Assignee: SAP SEInventors: Christoph Weyerhaeuser, Tobias Mindnich, Johannes Merx, Joerg Schad, Julian Schwing
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Patent number: 10109370Abstract: A template of instructions may be copied from a non-volatile memory (NVM) to a plurality of cache lines of an instruction cache of a processor. The instructions of the templates copied to the instruction cache may be executed. The templates may include a conditional branch instruction to determine if to proceed to a next template of the plurality of copied templates.Type: GrantFiled: July 31, 2014Date of Patent: October 23, 2018Assignee: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LPInventor: Anys Bacha
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Patent number: 10108469Abstract: A microcomputer includes a plurality of functional blocks that exchange information with each other. A nonvolatile memory can rewrite information stored therein and first data has been written therein in advance. A central processing unit processes information read from the nonvolatile memory or writes information to the nonvolatile memory. An abnormality detecting unit detects an abnormality in exchange of data between the plurality of functional blocks. A nonvolatile memory checking unit reads the first data from the nonvolatile memory when the abnormality detecting unit has detected an abnormality, compares the first data with second data indicating the content of the first data when written to the nonvolatile memory, and detects an abnormality in the nonvolatile memory when a result of the comparison shows that the first data is not identical to the second data.Type: GrantFiled: July 18, 2015Date of Patent: October 23, 2018Assignee: RENESAS ELECTRONICS CORPORATIONInventor: Naoki Mitsuishi
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Patent number: 10101941Abstract: For handling data mirror invalid timestamped write activities, an apparatus is disclosed. The apparatus includes a data mirror that mirrors write activities from a first storage device at a first site to a second storage device at a second site. The apparatus includes a time monitor that retrieves a timestamp for each of the mirrored write activities and monitors a reference clock in a storage control session as a comparison to validate the timestamp for each of the mirrored write activities. If the timestamp of a mirrored write activity is outside of a pre-determined parameter range, then the time monitor identifies the mirrored write activity as having a missing timestamp, assigns a next logical timestamp to the mirrored write activity, and prepares the mirrored write activity for inclusion in a consistency group associated with the next logical timestamp.Type: GrantFiled: September 20, 2016Date of Patent: October 16, 2018Assignee: International Business Machines CorporationInventors: Dash D. Miller, Miguel A. Perez, David C. Reed
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Patent number: 10061530Abstract: The present disclosure relates to a method and an apparatus for configuring a redundancy data center in a cloud computing architecture. The method includes receiving a request for configuring a redundancy data center DC for a specified network service NS; acquiring, from an affinity relationship information bank of application objects according to the request for configuring a redundancy DC, information about an affinity and/or anti-affinity relationship among application objects that support the specified network service, where application objects having an affinity relationship rare deployed in a same DC, and application objects having an anti-affinity relationship are deployed in different DCs; and selecting, from deployed DCs, a redundancy DC for the specified network service according to redundancy resource information of the deployed DCs and the acquired information about an affinity and/or anti-affinity relationship.Type: GrantFiled: October 13, 2016Date of Patent: August 28, 2018Assignee: Huawei Technologies Co., Ltd.Inventors: Xiaodong Gong, Miaohua Li, Xiaohui Huang, Zhan Peng
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Patent number: 10055228Abstract: This invention provides a high performance processor system and a method based on a common general purpose unit, it may be configured into a variety of different processor architectures; before the processor executes instructions, the instruction is filled into the instruction read buffer, which is directly accessed by the processor core, then instruction read buffer actively provides instructions to processor core to execute, achieving a high cache hit rate.Type: GrantFiled: August 18, 2014Date of Patent: August 21, 2018Assignee: SHANGHAI XINHAO MICROELECTRONICS CO. LTD.Inventor: Kenneth Chenghao Lin
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Patent number: 10055316Abstract: Technology is described for generating a valid token control signal from control signals from a row driver. In one example, a matrix type integrated circuit includes a row driver module and a 2D array of cell elements. The row driver module includes a voting logic module and at least two row drivers configured to generate control signals on at least two communal lines for cell elements of a row of the 2D array. Each row driver is configured to generate control signals on at least three control lines where at least two control lines are the communal lines and coupled to a corresponding communal line of another row driver. The voting logic module is coupled to the at least three control lines of one of the row drivers and configured to generate an output based on the control signals on the at least three control lines.Type: GrantFiled: January 28, 2017Date of Patent: August 21, 2018Assignee: VAREX IMAGING CORPORATIONInventors: Steven Freestone, Pieter Gerhard Roos
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Patent number: 10048889Abstract: Systems and methods enable a virtual machine, including any applications executing thereon, to quickly start executing and servicing users based on pre-staged data blocks supplied from a backup copy in secondary storage. An enhanced media agent may pre-stage certain backed up data blocks which may be needed to launch the virtual machine, based on predictive analysis pertaining to the virtual machine's operational profile. The enhanced media agent may also pre-stage backed up data blocks for a virtual-machine-file-relocation operation, based on the operation's relocation scheme. Servicing read requests to the virtual machine may take priority over ongoing pre-staging of backed up data. Read requests may be tracked so that the media agent may properly maintain the contents of an associated read cache. Some embodiments of the illustrative storage management system may lack, or may simply not require, the relocation operation, and may operate in a “live mount” configuration.Type: GrantFiled: June 23, 2016Date of Patent: August 14, 2018Assignee: COMMVAULT SYSTEMS, INC.Inventors: Henry Wallace Dornemann, Rahul S. Pawar, Paramasivam Kumarasamy, Satish Chandra Kilaru, Ananda Venkatesha
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Patent number: 10025668Abstract: According to an embodiment, a reconfigurable device 1 includes a configuration information storage memory 12, a state transition management unit 11, and a data path unit 13. When a failure is not detected in either of tiles T1 and T2 provided in the data path unit 13, the state transition management unit 11 selects the configuration information item so that a first processing circuit is configured using the tiles T1 and T2, while when a failure is detected in the tile T2, the state transition management unit 11 selects the configuration information item so that after a first intermediate processing circuit is configured using the tile T1 in which no failure is detected, a second intermediate processing circuit is configured again using the tile T1 in order to achieve the first processing circuit.Type: GrantFiled: April 28, 2016Date of Patent: July 17, 2018Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Yoshitaka Izawa, Katsumi Togawa, Takao Toi, Taro Fujii
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Patent number: 10013330Abstract: Disclosed are various embodiments for automatically testing and verifying applications. A user input profile is generated for an application by performing a static analysis on the application. Simulated user input for the application is generated based at least in part on the user input profile. Execution of the application is initiated in a computing device. The simulated user input is provided to the application executed in the computing device. It is verified whether the application meets performance criteria in the computing device.Type: GrantFiled: October 2, 2015Date of Patent: July 3, 2018Assignee: Amazon Technologies, Inc.Inventors: Calvin Y. Kuo, Zahur A. Peracha