Abstract: Performing data flow analysis of a computer software application, including, for a data flow analysis type, identifying within a computer software application code base a plurality of seeds relating to the data flow analysis type, for each of the plurality of seeds, defining a portion of the computer software application code base to a predefined depth of calls backward from the seed and to a predefined depth of calls forward from the seed, thereby resulting in a plurality of bounded portions of the computer software application code base, detecting a change in the computer software application code base, and performing, on any of the bounded portions affected by the change, a data flow analysis relating to the data flow analysis type.

Abstract: Performing data flow analysis of a computer software application, including, for a data flow analysis type, identifying within a computer software application code base a plurality of seeds relating to the data flow analysis type, for each of the plurality of seeds, defining a portion of the computer software application code base to a predefined depth of calls backward from the seed and to a predefined depth of calls forward from the seed, thereby resulting in a plurality of bounded portions of the computer software application code base, detecting a change in the computer software application code base, and performing, on any of the bounded portions affected by the change, a data flow analysis relating to the data flow analysis type.

Abstract: A technique for the dynamic instrumentation of a running software system. One or more callable instrumentation functions are accessible in a first memory space associated with the software system. The one or more callable instrumentation functions are adapted to probe an operation of the software system and return data regarding the probed operation. Probed operation environment information needed by the one or more instrumentation functions is provided to a second memory space associated with the software system. First memory space addresses associated with the probed operation environment information are determined from a resource that is accessible in the second memory space. A probe handler is generated that includes calls to the one or more instrumentation functions with references to the first memory space addresses. The probe handler is callable as part of the probed operation.

Abstract: Systems, methods, and apparatus, including software tangibly stored on a computer readable medium, involve image processing. An image processing graph includes multiple nodes that each correspond to an image processing operation. Input image data relating to a particular input image is received. Region of interest data defining an output image region to be generated based on the input image data is received. A domain of defined node output data is identified for each of the nodes using the input image data, and the graph is traversed in a first traversal order. An identification of the first traversal order is stored. A region of requested node output data is identified for each of the nodes using the region of interest data, and the graph is traversed in a second traversal order. The second traversal order is based at least in part on the stored identification of the first traversal order.

Abstract: A technique for transferring binary instructions from a computer system to an external platform is described herein. The process extracts binary instructions from the computer system. The instructions include a function at a register location. The process disassembles the binary instructions to produce an intermediate representation of the function. An interruption is inserted at the register location linked to a routine call. The process analyzes the intermediate representation for data dependency to identify internal data references for the routine call and external data references to produce a data dependence representation. The process reconfigures the data dependence representation to produce a reconfigured representation, whose control flow logic produces a logic hierarchy representation for the function.

Abstract: An analysis engine is described for performing static analysis using CEGAR loop functionality, using a combination of forward and backward validation-phase trace analyses. The analysis engine includes a number of features. For example: (1) the analysis engine can operate on blocks of program statements of different adjustable sizes; (2) the analysis engine can identify a subtrace of the trace and perform analysis on that subtrace (rather than the full trace); (3) the analysis engine can form a pyramid of state conditions and extract predicates based on the pyramid and/or from auxiliary source(s); (4) the analysis engine can generate predicates using an increasingly-aggressive series of available discovery techniques; (5) the analysis engine can selectively concretize procedure calls associated with the trace on an as-needed basis and perform other refinements; and (6) the analysis engine can add additional verification targets in the course of its analysis, etc.

Abstract: A method for recording and replaying execution of an application running on a computer system using a program module is provided. The method includes recording events which result from the execution of the application including a non-deterministic event, wherein the program module deterministically records the non-deterministic event, saving the recorded events for deterministic replay of the recorded execution, restoring the saved recorded events, and deterministically replaying the recorded execution of the application.

Abstract: In one embodiment, marking a variable in source code of a software program written in JavaScript; constructing a control flow graph (CFG) for the software program; and tracking the marked variable through the CFG.

Abstract: A “Demand-Driven Pointer Analyzer” (DDPA) provides a “demand-driven” field-sensitive pointer analysis process. This process rapidly and accurately identifies alias sets for selected pointers in software modules or programs of any size, including large-scale C/C++ programs such as a complete operating system (OS). The DDPA formulates the pointer analysis task as a Context-Free Language (CFL) reachability problem that operates using a Program Expression Graph (PEG) automatically constructed from the program code. The PEG provides a node and edge-based graph representation of all expressions and assignments in the program and allows the DDPA to rapidly identify aliases for pointers in the program by traversing the graph as a CFL reachability problem to determine pointer alias sets. In various embodiments, the DDPA is also context-sensitive.

Abstract: In one embodiment, accessing a control flow graph (CFG) of a software program written in JavaScript; accessing a set of specification requirements of the software program; and determining if there is any portion of the CFG that violates any specification requirement of the software program.

Abstract: The system and method in one aspect allow understanding of Boolean expressions by representing them graphically as a flow of information. NOTs are represented as switches in the flow, capturing the original structure of the expression as written by the user. Verification of those expressions with live data is also enabled.

Abstract: An apparatus, system, and method are disclosed for analyzing code paths. In one embodiment, a starting point for one or more code paths within a listing of code is specified. The starting point may include code from which one or more code paths flow. An ending point is also specified for one or more code paths within the code, wherein the ending point includes code that is reachable via one or more of the code paths flowing from the starting point. Each code path flowing from the starting point to the ending point is determined by analyzing the listing of code without execution of the code. Information about the determined code paths is provided to a user.

Abstract: In tracking a deadlock caused by at least one application, a computing system is communicatively coupled to a computing device, wherein the computing device has the at least one application. A source code line in the at least one application is identified, wherein the at least one application includes a plurality of source code lines. A deadlock identifier is generated by the computing system and the computing system transmits a first response to the application, wherein first response includes the deadlock identifier. The deadlock identifier is extracted from the first response, the source code line is captured, and a second response is transmitted to the computer system by the application. The second response includes the source code line and the deadlock identifier.

Abstract: A system and method for importance-based call graph construction, including a) analyzing a computer software application to identify a plurality of calls within the computer software application, b) assigning an importance value to any of the calls in accordance with a predefined importance rule, c) selecting any of the calls for inclusion in a call graph in accordance with a predefined inclusion rule, d) representing the call in the call graph, e) adjusting the importance value of any call represented in the call graph in accordance with a predefined importance adjustment rule, and f) iteratively performing any of steps a)-e) until a predefined termination condition is met.

Abstract: A method of developing an application for deployment on a computing system. The computing system includes a processor and a reconfigurable logic in communication with the processor for configuration thereby. The method includes programming the processor with hardware-neutral instructions in a high-level software programming language. The instructions are representative of an application configured to execute at least partially on the reconfigurable logic. The method further includes instantiating elements from a library of elements compatible with the high-level programming language; and constructing programmatically a generic data graph representative of the application to be mapped at least partially onto the reconfigurable logic. The generic data graph is expressed as streams of records flowing between operators. A computing system is also disclosed.

Abstract: Methods are provided that allow a false path pruner to traverse a directed acyclic graph in conjunction with one or more checker programs that are analyzing a program for defects or other artifacts of interest. While the checkers may have ways of avoiding re-traversal of portions of the graph that have already been traversed, the false path pruner may override such decisions made by the checkers as a result of a false path in order to allow re-traversal during a future different traversal when that same defect or artifact may not lie along a false path, and therefore avoid missing a valid defect or artifact. Computer programs stored on tangible media are provided that implement the methods of the invention.

Abstract: Device, system, and method of debugging computer programs. For example, a method for debugging computer programs includes: locating a bug in a computer program based on a first score corresponding to a first instrumentation location of the computer program and a second score corresponding to a second instrumentation location of the computer program.

Abstract: System and method for converting a class oriented data flow program to a structure oriented data flow program. A first data flow program is received, where the first data flow program is an object oriented program comprising instances of one or more classes, and wherein the first data flow program is executable to perform a first function. The first data flow program is automatically converted to a second data flow program, where the second data flow program does not include the instances of the one or more classes, and where the second data flow program is executable to perform the first function. The second data flow program is stored on a computer memory, where the second data flow program is configured to be deployed to a device, e.g., a programmable hardware element, and where the second data flow program is executable on the device to perform the first function.

Abstract: A mechanism for encoding and reporting instrumented data is disclosed that requires less storage space and incurs less processor overhead than other methods of the prior art. In accordance with the illustrative embodiment, a bit vector in shared memory corresponds to nodes of a program's control-flow graph that have been instrumented, and the contents of the vector indicate which of these nodes have executed; in addition, character strings in shared memory indicate what file, class, and method each node belongs to. A process that executes concurrently with those of the program under test transmits instrumented data from the shared memory to a database. The illustrative embodiment enables efficient, rapid reporting and storage of instrumented data, and is therefore especially well-suited for run-time analysis of real-time concurrent systems.

Abstract: Evaluating software test comprehensiveness of an application. A subset of the software-under-test basic blocks is identified for emphasized and/or deemphasized testing. During test, execution of the basic blocks is monitored, and then aggregated into a weighted code coverage result which factors in the prioritization assignments of the subset of basic blocks.

Abstract: A component name manager operates within an integrated development environment to assist developers in creating dynamic websites and Internet applications. The component name manager identifies an input field displayed on a graphical user interface of an object-oriented software development environment. The input field uses a fully-qualified name of a software component for accessing to access instructions and data associated with the software component and located at an application server. In response to receiving an input associated with the input field, the component name manager displays a list of qualified names of software components available for use in the object-oriented software development environment. Each of the qualified names identifies a path for accessing a corresponding software component. The component name manager can resolve fully qualified names by accessing one or more of an application file, an administrator interface, project level mappings, and global level preference mappings.

Abstract: A software application recreation in a computing environment is provided. One embodiment involves analyzing program execution trace data of a software application, and using the analysis results in recreating an executable version of the software application from data traced at significant points during the software application execution. Recreating an executable version of the software application involves creating white space code to simulate the software application execution timing by replacing business logic code of the software application with white space code in the recreated executable version. The recreated executable version of the software application programmatically behaves essentially similarly to the software application.

Abstract: Defining a software test is disclosed. A benchmark complexity for a test case including at least one test step having a check condition and a functionality is defined. The test case is represented as a flow graph in which the check condition of each test step of the test case is represented as an edge of the flow graph and the functionality of each test step is represented as a vertex in the flow graph. A test case complexity is determined by determining a number of independent paths in the flow graph. If the test case complexity as determined based on the number of independent paths exceeds the benchmark complexity, the number of test steps in the test case is reduced.

Abstract: A performance accounting framework may be provided. Upon receiving a section of source code associated with an application, an evaluation may be performed on the section of source code. A performance metric may be calculated according to the at least one evaluation and a report of the calculated performance metric may be provided.

Abstract: In one embodiment, symbolically executing a software module having a number of execution paths; and losslessly reducing the number of execution paths during the symbolic execution of the software module.

Abstract: In an embodiment, a computer system initiates an application debugging process for an application that is to be debugged and maps runtime object elements of the application to both code elements and graphical elements. The computer system appends portions of software code to each runtime object element so that a runtime event is outputted indicating which corresponding graphical or code element is currently being processed. The computer system accesses the outputted runtime events to determine which graphical or code element is currently being processed and, based on the accessed outputted runtime events and based on the mappings, displays the elements currently being debugged in a first view. The computer system, based on the accessed outputted runtime events and based on the mappings, switches views from the first view to a second view without restarting the application debugging process for the application being debugged.

Abstract: A method for detecting user input dependence in software code. The method including representing the software code with a reachability graph having: a plurality of nodes, where a root node of the plurality of nodes represents an input controlled by a user; a first directed edge connecting a first node of the plurality of nodes and a second node of the plurality of nodes, where the first directed edge represents a data dependency; and a second directed edge connecting a third node of the plurality of nodes and a fourth node of the plurality of nodes, wherein the second directed edge represents a data dependency. The method also includes identifying a fifth node of the plurality of nodes as a reachable node from the root node by traversing the reachability graph from the root node to the reachable node; and marking a portion of the software code represented by the reachable node as user input dependant.

Abstract: In general, in one aspect, the invention relates to a method for performing points-to analysis by generating a value flow graph for source code. The method steps include: initializing the value flow graph including a set of memory objects and a set of edges based on Base and Assignment instructions, where the set of edges represents inclusion constraints between the set of memory objects and a set of pointer variables; determining a pointed-to-by set including at least one pointer variable of the set of pointer variables; updating the value flow graph by introducing a flow edge based on an indirect reference, where the flow edge is related to a memory object of the set of memory objects that is added to a working list; updating the pointed-to-by set based on the memory object in the working list; and analyzing the source code using the pointed-to-by set.

Abstract: The execution of a software application is diverted to detect software object corruption in the software application. Software objects used by the software application are identified and their pointers are inspected. One or more tests are applied to pointers pointing to the virtual method tables of the software objects, addresses (or pointers) in the virtual method tables, and memory attributes or content of the memory buffer identified by the addresses for inconsistencies that indicate corruption. A determination of whether the software objects are corrupted is made based on the outcome of the tests. If software object corruption is detected, proper corrective actions are applied to prevent malicious exploitation of the corruption.

Abstract: A system and method are provided for inlining across protection domain boundaries with a system virtual machine. A protection domain comprises a unique combination of a privilege level and a memory address space. The system virtual machine interprets or dynamically compiles not only application code executing under guest operating systems, but also the guest operating systems. For a program call that crosses a protection domain boundary, the virtual machine assembles an intermediate representation (IR) graph that spans the boundary. Region nodes corresponding to code on both sides of the call are enhanced with information identifying the applicable protection domains. The IR is optimized and used to generate instructions in a native ISA (Instruction Set Architecture) of the virtual machine. Individual instructions reveal the protection domain in which they are to operate, and instructions corresponding to different domains may be interleaved.

Abstract: A method for diagnosing problems in a computer system by visualizing flows through applications and other subsystems in a directed graph on a user interface. The user interface represents multiple instances of each application or other subsystem by a respective node, and edges indicate which nodes depend on one another. Aggregate metrics which are based on the multiple instances, and associated alerts, can be provided for the nodes and edges. An aging process can indicate which nodes have not been recently invoked. The user interface can also indicate which nodes and edges are associated with a given business transaction. In a summary view, a node hides the identity of invoked components such as servlets of the application, while in a detailed view these details are provided.

Abstract: Various embodiments include at least one of systems, methods, software, and data structures for active route validation in workflow process authoring in workflow processing applications. Some embodiments include evaluating a route as a user attempts to add or modify the route in a modeled workflow process. The evaluation is performed in some such embodiments through evaluation of a route restriction rule based on a first workflow element the route is from and a second workflow element the route is to. When the route restriction is violated, the user is prevented from adding or modifying the route.

Abstract: A computer implemented method, apparatus, and computer usable program code for sampling call stack information. An accumulated latency time is monitored for a set of threads executing in a data processing system. The call stack information is obtained for the thread in response to a thread in the set of threads having an associated accumulated latency exceeding a threshold.

Abstract: A system and method are provided for inlining a program call between processes executing under separate ISAs (Instruction Set Architectures) within a system virtual machine. The system virtual machine hosts any number of virtual operating system instances, each of which may execute any number of applications. The system virtual machine interprets or dynamically compiles not only application code executing under virtual operating systems, but also the virtual operating systems. For a program call that crosses ISA boundaries, the virtual machine assembles an intermediate representation (IR) graph that spans the boundary. Region nodes corresponding to code on both sides of the call are enhanced with information identifying the virtual ISA of the code. The IR is optimized and used to generate instructions in a native ISA (Instruction Set Architecture) of the virtual machine. Individual instructions are configured and executed (or emulated) to perform as they would within the virtual ISA.

Abstract: A computer implemented program analysis method employing a set of new abstract domains applicable to non-convex invarients. The method analyzes programs statically using abstract interpretation while advantageously considering non-convex structures and in particular those situations in which an internal region of an unreachable state exists within a larger region of reachable states. The method employs a new set of non-convex domains (donut domains) based upon the notion of an outer convex region of reachable states (Domain D1) and an inner region of unreachable states (Domain D2) which advantageously permits capture of non-convex properties by using convex regions and operations.

Abstract: The exemplary embodiment is for an architecture integrated in a generic System on Chip (SoC) and consisting of reconfigurable coprocessors for executing nested program loops performed in a functional unit array in parallel. The data arrays are accessed from one or more system inputs and from an embedded memory array in parallel. The processed data arrays are sent back to the memory array or to system outputs and enable the acceleration of nested loops. The coprocessors are connected either synchronously or using asynchronous first in first out memories (FIFOs), forming a globally asynchronous locally synchronous system and each coprocessor can be programmed by tagging and rewriting the nested loops in the original program and produces a coprocessor configuration per each nested loop group, which is replaced in the original code with coprocessor input/output operations and control.

Abstract: Some embodiments of the present invention provide a system that measures the quality of a software system. During operation, the system performs a series of stress tests on the software system and determines a set of failure rates for the software system from the stress tests. Next, the system obtains a failure distribution from the failure rates. Finally, the system assesses the quality of the software system based on characteristics of the failure distribution.

Abstract: Methods are provided for performing depth-first searches of concrete models of systems using control flow information of the system for improved reachability analysis. The concrete model's control structure and dependencies are extracted and an over-approximated (conservative) abstract control model is created. The abstract control model simulates the concrete model during model checking. Model checking the abstract control model produces execution traces based on the control paths of the concrete model. These execution traces may be used to guide a state space search on the concrete model during invariant checking to determine satisability of one or more selected invariants of the system.

Abstract: Program execution profile data is collected by direct measurement of some code paths, and by inferring data for unmeasured paths. The data collection process may cause errors, which are propagated by the inferencing process. The profile data thus constructed is further enhanced by detecting certain data mismatches, and adjusting inferred data to reduce the scope of errors propagated during the inferencing process. Preferably, a control flow graph of the program being measured is constructed. Mismatches in the total weights of input arcs versus output arcs are detected. For certain specific types of mismatches, it can be known or guessed which count is incorrect, and this count is accordingly corrected. Correction of arc counts proceeds recursively until it is no longer possible to correct mismatches. Additionally, certain other conditions are adjusted as presumed inaccuracies.

Abstract: A method, system and program product for dynamically adjusting trace buffer capacity based on execution history. The method includes receiving, by a module configured to trace, a plurality of traces pertaining to one or more trace events generated during execution of a program being traced, the trace events generated including panel data and sequence data. The method further includes determining, using trace data captured from the plurality of traces received, whether or not a path for a trace event is a new path. If the path for the trace event is determined to be a new path, the method includes dynamically adjusting, by the module, an initial size of a trace buffer configured to store the trace data captured, such that, the module increases the initial size of the trace buffer upon making a determination that the trace event is a new trace event based on execution history.

Abstract: Methods, systems, and apparatus, including computer program apparatus, implementing techniques for publishing, subscribing to, or playing live appliances. A live appliance includes a current virtual machine image. In publishing, a proxy file of a live appliance file type is provided to the publisher. The type is mapped to a live appliance player; so that when a proxy file is opened, the current virtual machine image is run. The player automatically binds a writeable file system external to the virtual machine image to the image to provide file storage that is accessible from within the virtual machine image and from a host operating system. The player also creates a subscription to the live appliance on the host computer if one does not exist when the proxy file is run. With the subscription, the player runs the then-current virtual machine image whenever the live appliance is run.

Abstract: A method of analyzing performance of a software testing system associated with a software system having multiple modules includes performing a computer-based complexity analysis of the software system, performing a computer-based impact analysis of information related to an impact of a defect on a module of the software system, and generating a computer-based distribution of effort across an impacted module of the software system based on the complexity analysis and the impact analysis to enhance the software testing system performance. The information may include reported defects from a working environment associated with the software system. The method may also include utilizing output data associated with the complexity analysis as input data to the impact analysis.

Abstract: A computer program having threads and data is assigned to a processor having a processor cores and memory organized over hardware locality groups. The computer program is profiled to generate a data thread interaction graph (DTIG) representing the computer program. The threads and the data of the computer program are organized over clusters using the DTIG and based on one or more constraints. The DTIG is displayed to a user, and the user is permitted to modify the constraints such that the threads and the data of the computer program are reorganized over the clusters. Each cluster is mapped onto one of the hardware locality groups. The computer program is regenerated based on the mappings of clusters to hardware locality groups. At run-time, optimizations are performed to improve execution performance, while the computer program is executed.

Abstract: A system comprises a plurality of computation units interconnected by an interconnection network.

Abstract: A method for detecting problems caused by access to incompletely initialized data storage in assembler programs includes generating an internal representation of control flow of the source code of the assembler program including nodes for every statement found in the source code and a directed edge for every possible flow of control between the nodes. The method also includes: attributing data attributes to the nodes and/or the edges, wherein the data attributes are used to store the information how many bits within the data storage can be guaranteed to be initialized; applying a data-flow analysis method to the internal representation of the control flow of the source code for determining how many bits of the data storage can be guaranteed to be initialized; checking for each node whether the instruction reads more bits than are guaranteed to be initialized; and generating one or more error messages responsive to the problem.

Abstract: One embodiment may estimate the processing time of tasks requested by an application by maintaining a state-model for the application. The state model may include states that represent the tasks requested by the application, with each state including the average run-time of each task. In another embodiment, a state model may estimate which task is likely to be requested for processing after the current task is completed by providing edges in the state model connecting the states. Each edge in the state model may track the number of times the application transitions from one task to the next. Over time, data may be gathered representing the percentage of time that each edge is from a state node. Given this information, the scheduler may estimate the CPU cost of the next task based on the current state, the most likely transition, and the cost of the predicted next task.

Abstract: A system comprises a plurality of computation units interconnected by an interconnection network. A method for configuring the system comprises receiving an initial partitioning of instructions into initial subsets corresponding to different portions of a program; forming a refined partitioning of the instructions into refined subsets each including one or more of the initial subsets, including determining whether to combine a first subset and a second subset to form a third subset according to a comparison of a communication cost between the first subset and second subset and a load cost of the third subset that is based at least in part on a number of instructions issued per cycle by a computation unit; and assigning each refined subset of instructions to one of the computation units for execution on the assigned computation unit.

Abstract: The present invention provides a system and method for detecting problems caused by access to incompletely initialized data storage in assembler and high-level language programs. An internal representation of the control flow of the source code of the assembler program is generated and a data-flow analysis method is applied to the internal representation.

Abstract: A method for recovering from software failures, includes: receiving failure information that identifies a failing component of a first processing graph; modifying a planning domain that includes a plurality of component descriptions according to the failure information; and composing a second processing graph by using the modified planning domain so that the second processing graph does not include the failing component.

Abstract: Techniques are disclosed which allow independent software components to share unresolved information with one another. Components may register with a component integration bus (CIB) as a provider or a consumer (or both) for a variety of different data types. The CIB may be further configured to store and share component information with users of the CIB to broker consumer-provider relationships between components included in an integrated solution package. The CIB may also validate the consumer-provider relationships between components included in such a package. Further, the CIB provides information useful to validate the solution package. Using the information from the CIB, components of the solution package are able to resolve unresolved information when the integrated solution is deployed on a remote system.