Abstract: A computer-readable, non-transitory medium storing a program that causes a computer to execute a procedure, the procedure includes acquiring a state from each of a plurality of components of a first server device group before and after execution of an execution control process in which the first server device group is caused to execute processes, the components being hardware or software and whose dependencies are previously defined, and storing, in a storage unit, information in which a component whose state is different before and after the execution of the execution control process is associated with the execution control process.

Abstract: Various embodiments are disclosed that relate to the automated identification of one or more computer program functions for potentially placing on a remote computing device in a split-computational computing environment. For example, one disclosed embodiment provides, on a computing device, a method of determining a factorable portion of code to locate remotely from other portions of the code of a program to hinder unauthorized use and/or distribution of the program. The method includes, on a computing device, receiving an input of a representation of the code of the program, performing analysis on the representation of the code, the analysis comprising one or more of static analysis and dynamic analysis, and based upon the analysis of the code, outputting a list of one or more functions determined from the analysis to be candidates for locating remotely.

Abstract: Disclosed herein are systems, methods, and non-transitory computer-readable storage media for analyzing source code and identifying potential defects. The methods employ both static analysis and dynamic testing to detect program defects early in the development stage for better quality with less cost. The analysis also ranks identified potential defects and reports only the most likely defects to a human developer. Once defects are detected, they can be removed right away and similar defects can be prevented automatically.

Abstract: A computer-implemented method for verifying a target system includes defining a specification including properties applicable to the target system. Execution sequences of the target system are identified. A set of the execution sequences is grouped into an equivalence class characterized by a common control flow. A symbolic representation of the equivalence class is evaluated so as to verify a compliance of the set of the execution sequences with one or more of the properties.

Abstract: Implementations of the present disclosure provide methods including analyzing a plurality of units of a software application to determine a dependency graph defining that at least a first unit depends on a second unit. Each unit includes executable instructions. An execution order is determined for the units based on the dependency graph, wherein the execution order specifies execution of the second unit before the first unit. Unit tests are executed for the units according to the execution order, including executing a unit test of the second unit before the first unit. Executing a unit test for a unit comprises executing the executable instructions of the unit and comparing a resulting value to an expected value.

Abstract: Program partitioning of an application can include creating execution flow graphs and static flow graphs of targeted functions or operations of the application. Based on the execution flow graphs or static flow graphs, replay interfaces are created. The replay interfaces provide data flows that are usable in re-execution of the application during program development.

Abstract: Pointer analysis is used for different applications, e.g., compilers, debugging tools and programs understanding tools, each having different requirements. A framework for pointer analysis is provided that defines a multidimensional space, for example a three-dimensional space, containing an order sensitivity dimension, a predicate sensitivity dimension and a value persistence dimension. A point in the three-dimensional space is identified. This point yields values for order sensitivity, predicate sensitivity and value persistence. Pointer analysis is then conducted on a computer program in accordance with the identified values for order sensitivity, predicate sensitivity and value persistence.

Abstract: Provided are a method, system, and article of manufacture for verification of a program partitioned according to the control flow information of the program. Properties are received indicating outcome states for a program. The program is processed to determine a control flow in the program and paths in the control flow. Enabled paths are determined in the control flow having states satisfying requirements of the outcome states. For each enabled path, a determination is made of inert variables not used along the control flow of the path and a representation of states and transitions for the enabled path is generated, wherein the represented states and transitions do not include the inert variables. The generated representation of the states and transitions for the enabled path are combined into a merged computation image.

Abstract: Analyzing and detecting soft hang program errors may lead to suggestions for either curing the programming errors at runtime or refactoring the source code. For instance, responsive function invocation patterns and blocking function invocation patterns may be used to detect soft hang program errors in a source code file. Deductive database rules may be compiled from the responsive and blocking function invocation patterns to find matching function invocations in a call graph.

Abstract: A method of analyzing single thread access by a variable of a multi-threaded program is provided. The method includes computing a thread identifier of a thread to be executed in a node of the multi-thread program; computing multiple threads configured to concurrently execute the node; and computing thread accessibility by deducing one or more variables that are executed in a single thread of the program from one or more pairs of the computed threads that concurrently execute the node.

Abstract: To achieve end-to-end security, traditional machine-to-machine security measures are insufficient if the integrity of the graphical user interface (GUI) is compromised. GUI logic flaws are a category of software vulnerabilities that result from logic flaws in GUI implementation. The invention described here is a technology for uncovering these flaws using a systematic reasoning approach. Major steps in the technology include: (1) mapping a visual invariant to a program invariant; (2) formally modeling the program logic, the user actions and the execution context, and systematically exploring the possibilities of violations of the program invariant; (3) finding real spoofing attacks based on the exploration.

Abstract: An interprocedural exception analysis and transformation framework for computer programming languages such as C++ that (1) captures the control-flow induced by exceptions precisely, and (2) transforms the given computer program into an exception-free program that is amenable for precise static analysis, verification, and optimizations.

Abstract: Systems and methods for detecting a potential deadlock in a computing execution environment are provided. A plurality of locks taken during one or more test runs are monitored. A runtime identity and a code location for each of the plurality of locks are identified during each test run. One or more locks among the plurality of locks are classified as same locks based on the runtime identity and code location identified for each lock.

Abstract: An operation synthesis system includes a pipeline structure creating section for automatically creating, based on a state number assigned to a skip statement described in a high-level language in a transition to a pipeline operation and the number of cycles required to supply a pipeline with one loop designated by a user or automatically set by the system, a state transition including a loop controller and a loop leaving controller which are capable of conducting pipeline operation. It is therefore possible to transform a loop description described in a high-level language into a description of a circuit in a practical size for pipeline operation.

Abstract: A method for generating test cases for a program is disclosed. The method combines features of path-oriented and goal-oriented software testing. The illustrative embodiment constructs a control-flow graph with nodes that correspond to invocations of subroutines, and constructs control-flow graphs for the source code of such nodes as well. A metric that is based on the topology of the control-flow graph is evaluated recursively for nodes of the graph and for control-flow graphs that correspond to invoked subroutines. In the illustrative embodiment, the metric employed is the length of a shortest path from the starting node to a particular node. A node n with the highest metric value is then selected as a goal, and a path from the starting node to the ending node that passes through node n is generated via backtracking.

Abstract: In one embodiment, a method may include symbolically executing application code on a first framework. The method may also include creating a first model based on the symbolic execution of the first framework. The method may additionally include symbolically executing the application code on a second framework. The method may further include creating a second model based on the symbolic execution of the first framework. The method may also include determining one or more parameters associated with the first framework based on the first model. The method may additionally include determining one or more parameters associated with the second framework based on the second model. The method may also include selecting one of the first framework and the second framework as a desired framework for execution of the application code based on a comparison of the one or more parameters associated with the first framework and the one or more parameters associated with the second framework.

Abstract: A computer-readable recording medium stores therein a verification support program that causes a computer to execute receiving a hardware description of a combinational circuit to be verified; extracting, from the hardware description, a conditional branch description expressing conditional branch processing; identifying, from among conditional branch descriptions extracted at the extracting of a conditional branch description and based on a description sequence in the hardware description, a combination of conditional branch descriptions having a hierarchical relation; extracting, from among combinations of conditional branch descriptions identified at the identifying, a combination having a potential to satisfy a specified condition; creating a simulation program that causes the specified condition for the conditional branch descriptions included in the combination extracted at the extracting of the combination to be satisfied; and outputting, as assertion information of the combinational circuit, the simul

Abstract: Systems and methods are disclosed to check properties of bounded concurrent programs by encoding concurrent control flow graph (CFG) and property for programming threads as a first-order formula F1; initializing an interference abstraction (IA); encoding the IA as a first-order formula F2; checking a conjunction of F1 and F2 (F1?F2); if the conjunction is satisfiable, checking if an interference relation (IR) is spurious, and iteratively refining the IA; and if the conjunction is unsatisfiable, checking if an interference relation (IR) is spurious, and iteratively refining the IA.

Abstract: Disclosed are systems, methods, and non-transitory computer-readable storage media for detecting changes in a source of entropy. A system configured to practice the method generates a cyclic graph based at least in part on the values in the entropy pool. Using the cyclic graph and one or more starting points, the system establishes one or more baseline properties for the cyclic graph. These properties can include the number of steps required to identify a cycle in the graph or the number of steps required to traverse the graph from one or more starting points to a selected end point. The computed properties are then stored for later use. As execution progresses, the system monitors the entropy pool to detect a change by regenerating the cyclic graph and using the stored properties.

Abstract: This paper describes preferential path profiling, which enables profiling a specified subset of all possible program paths with very low overhead. Preferential path profiling compactly identifies paths of interest using an array. More specifically, PPP assigns a unique and compact path index identifier to all interesting paths that can be used to index into a path array. The path array contains a second path value identifier that is used to distinguish interesting paths from other program paths This path numbering allows the implementation of preferential path profiling to use array-based counters instead of hash table-based counters for identifying paths of interest and gathering path profiles, which significantly reduces execution time and computational resource overhead during profiling.

Abstract: A method of detecting recursive instantiation loops in a wireless application. A data model digraph is constructed including a respective node for each data component in the wireless application, and a respective edge for each relationship between a pair of data components. The data model digraph is searched to identify any cycles. For each identified cycle, each data component that participates in the cycle is identified.

Abstract: A tracing-result optimization processing unit generates an optimized tracing result. A tracing-result collation processing unit collates the optimized tracing result and a time chart as a basis of a sequence processing for an external apparatus and detects shift of the optimized tracing result. A tracing-result storing unit accumulates and stores therein a tracing result obtained by a programmable logic controller at predetermined time intervals. Every time the tracing result is stored in the tracing-result storing unit, the tracing-result optimization processing unit generates the optimized tracing result.

Abstract: A computer-readable recording medium stores therein a verification support program that causes a computer to execute receiving a hardware description of a sequential circuit to be verified and a timing specification that indicates a timing constraint in the hardware description; converting the hardware description into a control flow graph that expresses a flow of control in the sequential circuit; indentifying, from the control flow graph and as a combination of conditional branch descriptions having a hierarchical relation, conditional branch descriptions that are connected in parallel; extracting, from among identified combinations of conditional branch descriptions, a combination having a potential to satisfy specified conditions; creating a simulation program that, at a timing satisfying the timing specification, causes the conditional branch descriptions included in the extracted combination to satisfy the specified conditions; and outputting, as assertion information of the sequential circuit, the simu

Abstract: A method for detecting the occurrence of rare events in an executable logic code includes assigning a first probability of a chance of traversal of one or more decision paths, in which each path connects two decision points defined by execution of the logic code. As a result of execution of the logic code, the decision paths traversed are evaluated to determine whether said traversal conforms to a predefined performance function. The performance function defines a goal to be achieved pursuant to the execution of the logic code. A second probability is assigned to the chance of traversal of at least one of said one or more decision paths to increase the likelihood that the one or more decision paths are traversed in a subsequent execution of the logic code in a closer conformity with the predefined performance function.

Abstract: A control flow graph may be generated from a model. The control flow graph may be restructured by converting at least one unstructured region of a control flow graph into a structured region. The restructuring may include locating at least one block between two merge nodes in the control flow graph, moving the located block to a different section of the control flow graph, and creating the structured region by surrounding the moved code block with a test of a guard variable.

Abstract: A method for preventing a return address from being falsified due to a buffer overflow during the program execution, and for detecting the buffer-overflow beforehand. When the return address is re-written during program execution, the debug function of the central processing unit is used to output an error. The falsification of the return address is detected through the error output. Then the falsified return address is re-written to a value stored in advance to enable the program to return to normal operation. When the falsification of the return address is detected, the executing program is terminated.

Abstract: Techniques for composition of model transformations from a predetermined set of model transformations. A state machine is provided in memory. The states are defined in the state machine in terms of predetermined model attributes. In response to specification of a target state for an input model to be transformed, an execution sequence in the state machine, between a start state corresponding to the input model and an end state corresponding to the specified target state, is selected. Each transformation in the selected sequence is then successively executed on the input model. After executing each transformation in the selected sequence, the transformed input model state is compared to the model state defined in the state machine to determine if the selected sequence is inoperable for the input model. If so, an alternative execution sequence in the state machine, between the input model state and the specified target state, is selected.

Abstract: A method for the verification of multi-threaded computer programs through the use of concurrent trace programs (CTPs) and transaction sequence graphs (TSGs).

Abstract: A mechanism for determining a probabilistic security score for a software package is provided. The mechanism calculates a raw numerical score that is probabilistically linked to how many security vulnerabilities are present in the source code. The score may then be used to assign a security rating that can be used in either absolute form or comparative form. The mechanism uses a source code analysis tool to determine a number of critical vulnerabilities, a number of serious vulnerabilities, and a number of inconsequential vulnerabilities. The mechanism may then determine a score based on the numbers of vulnerabilities and the number of lines of code.

Abstract: A method and corresponding tool, the method comprising: receiving as an input (a) a higher-level structure representing control flow through an executable program, the higher-level structure comprising one or more levels of parent nodes, each parent node representing internal structure comprising a group of one or more child nodes and one or more associated edges between nodes; and (b) an indication of at least one start and end instruction. The method further comprises probing the levels of the higher-level structure to extract a substructure representing a route through the program from the start to the end instruction, by selectively extracting nodes of different levels of parent to represent different regions along the route in dependence on a location of the start and end instructions relative to the levels of parent nodes; and based on the extracted substructure, estimating an execution time for the route through the program.

Abstract: A method and apparatus for testing an execution flow of a program are provided. The method includes measuring the execution flow that reflects instruction values constituting the program and an execution order of the instructions; and verifying the measured execution flow.

Abstract: Embodiments of the invention provide a debugging tool configured to serialize function calls made to a graphics API on a remote device such as a hand-held videogame system. Embodiments of the invention may be used to emulate the performance of the same graphics API calls made on the remote device to generate a given display frame. An instrumented driver may capture and serialize each graphics API call invoked by a graphics application running on the remote device. Thus, the host component of the graphical application debugger may generate and display the same image as displayed on the target device without the latency of waiting for a set of framebuffer data to be transmitted over the communication link for each frame rendered on the target device.

Abstract: The present relates to a method for verifying privileged and subject-executed code within a program, the method further comprising the steps of constructing a static model of a program, identifying checkPermission nodes that are comprised within the invocation graph, and performing a fixed-point iteration, wherein each determined permission set is propagated backwards across the nodes of the static model until a privilege-asserting code node is reached. The method further comprises the steps of associating each node of the invocation graph with a set of Permission allocation sites, analyzing each identified privilege-asserting code node and subject-executing code node to determine the Permission allocation site set that is associated with each privilege-asserting code node and subject-executing code node, and determining the cardinality of a Permission allocation-site set that is associated with each privilege-asserting code node and subject-executing code node.

Abstract: Embodiments of the invention provide a debugging tool configured to translate a pre-compiled binary shader as part of debugging a graphics application running on a remote device. An instrumented driver may capture and serialize each graphics API call invoked by a graphics application running on the remote device along with any pre-compiled binary shader programs supplied by the graphics application. The graphical application debugger may translate the shader program into a form appropriate for graphics hardware present on the host system. By replaying the same sequence of API calls invoked on the target device using the same shader programs, the graphical application debugger may generate and display the same image displayed on the target device without the latency of waiting for a full set of framebuffer data to be transmitted over the communication link for each frame rendered on the target device.

Abstract: System and method for deploying and executing a program, e.g., a graphical program, on an embedded device. The program and a plurality of execution system components are stored on a host computer. The program is analyzed programmatically to determine a subset of the plurality of components required for execution of the program. The subset of components and the program are combined into a file while preserving execution order of the program. The file is transmitted to the device. The file is used to construct a combined program which includes executable code for the program and the subset of components. The device includes a minimal execution engine which executes the subset of components to execute the program. The file may be streamed to the device for streaming execution, where received portions of the subset of components needed for execution of received portions of the program are stored until no longer needed.

Abstract: A method for overflow detection using partial evaluations. The method includes obtaining a section of code from a source code file stored on a storage device, analyzing the section of code to identify a buffer with an index, determining a plurality of statements that are statically-computable and dependent on the index of the buffer, and generating a code segment including the plurality of statements. The method further includes replacing an access statement of the plurality of statements with a conditional statement returning true when bounds of the buffer are exceeded, where the access statement uses the index to access the buffer, adding an unconditional statement returning false to the code segment, and executing the code segment on a computer processor to obtain a determination of whether the bounds of the buffer are exceeded.

Abstract: According to one example embodiment, there is disclosed herein uses partial recurrence relaxation for parallelizing DOACROSS loops on multi-core computer architectures. By one example definition, a DOACROSS may be a loop that allows successive iterations executing by overlapping; that is, all iterations must impose a partial execution order. According to one embodiment, the inventive subject matter may be used to transform the dependence structure of a given loop with recurrences for maximal degree of thread-level parallelism (TLP), where the threads can be mapped on to either different logical processors (in a hyperthreaded processor) or can be mapped onto different physical cores (or processors) in a multi-core processor.

Abstract: According to one embodiment, an apparatus includes a delay data calculator configured to calculate data delay data and task delay data based on a target ability parameter describing an ability of an environment of executing a parallel program, profile data of the parallel program, and a task-dependency graph representing dependence of tasks described in the parallel program, the data delay data representing time elapsing from a start of obtaining variables needed for executing a task comprised in the tasks to acquisition of all of the needed variables, the task delay data representing the time elapsing from the acquisition of the variable to execution of the task, and a display module configured to display, on a display screen, an image showing the task, a task on which the task depends, the task delay data, and the data delay data, based on the task delay data and the data delay data.

Abstract: Methods, systems, and computer-readable media are disclosed to perform path-sensitive dataflow analysis including path refinement. A path-insensitive dataflow analysis may be performed on a control flow graph (CFG) of a computer program to detect a set of potential defects in the computer program. A path-sensitive dataflow analysis may be performed to identify one or more infeasible paths of the CFG without modifying the CFG. Potential defects associated with the one or more infeasible paths may be removed from the set of potential defects to produce a resulting reduced set of potential defects. The resulting reduced set of potential defects may be output.

Abstract: Embodiments of the invention provide methods and apparatuses for providing hosted highly tailored vertical applications. In accordance with one embodiment, a set of universal configuration options for a customer relationship management application is created and presented to a user. The user selects one or more options from the set of options provided and the selected options are used to automatically configure a tailored customer relationship management application. For one embodiment of the invention multiple incompatible business entities and processes from existing verticals are decomposed to provide a set of configurations options to a customer company. The customer company selects from the provided configuration options and a highly tailored vertical is automatically configured based upon the selected configuration options.

Abstract: The present invention is directed to automatically analyzing software systems for identifying faults or bugs and/or detection of malicious code. In various embodiments, the present invention measures code coverage for high priority invocable program elements, uses a relaxed coverage estimation technique that, instead of guaranteeing which code units will be executed, guarantees that at least a certain number of code units will be executed, determines and solves constraints in code to identify infeasible paths containing one or more selected nodes, determines, for a composite data type, a range of values for each of at least two non-composite data fields, and/or translates, prior to code analysis complex code into simpler code having fewer operators.

Abstract: Systems and methods for detecting resource leaks in a program using static analysis are disclosed. Dynamically adjustable sets of must-access paths can be employed for aliasing purposes to track resources intra- and inter-procedurally through a program. Actionable reports are also disclosed, in which resource leaks are prioritized, filtered and clustered to improve utility.

Abstract: In one embodiment, the present invention includes a method for creating a control flow graph (CFG) node for a starting address, parsing code beginning at the starting address until a control transfer is encountered and statically determining a destination address for the control transfer, and creating a CFG node for the destination address, and parsing code beginning at the destination address. In this way, virtually all executed code of an application can be recognized. Other embodiments are described and claimed.

Abstract: Embodiments of the present invention provide for minimizing the number of procedure frame unwinding operations to be performed when restoring the program control flow information. A first data structure may be constructed to contain procedure linkage information along with references to the conventional memory area where each procedure linkage information element (procedure return address or a procedure frame pointer) was originally found. The first data structure may be initialized upon the initial request for program control flow information. Upon each subsequent request, the contents of the conventional memory area as referenced by the first data structure may be compared with the corresponding elements of the first data structure. As a result of said comparison, changed and unchanged regions within the conventional memory area may be determined. Then, procedure frame unwinding operations may be performed for the changed regions.

Abstract: A program verification process begins by converting a language of the program from a first language into an intermediate language representation. The loops of the program are eliminated. The program is converted from the intermediate language representation into a passive form. Dominators for the passive form of the program are determined. A verification condition is generated from the passive form of the program. The verification condition is structured according to the computed dominators such that when a theorem prover identifies a potential error, portions of the passive form of the program irrelevant to the potential error are ignored.

Abstract: A model composition environment can allow for description of fill or partial symbolic system behavior, as well as the combination of models of specific features into compound models. Compositional operators can include intersection, concatenation, substitution, alternating refinement, as well as a set of regular expression-like operators. Models called “action machines” can represent object-oriented, reactive programs, and an action machine may be composed with another action machine using a compositional operator. This can allow for testing of particular scenarios or behaviors.

Abstract: The invention relates to a method for characterizing a computer program section held in a computer memory system, comprising the steps of breaking down the computer program section into segments, wherein program commands contained in the computer program section are used to define a program flow relationship between the segments, and determining characteristic data which can be associated with the program flow relationship of the segments, wherein the characteristic data are compressed to form a signature which identifies the computer program section.

Abstract: A source code inspection method and system. The method includes receiving by a computing system, source code files associated with a specified project. The computing system retrieves metrics data comprising software metrics associated with the source code files. The computing system generates first evaluation scores associated with the source code files. The computing system generates and presents to a user, a graph displaying the first evaluation scores. The computing system calculates parameter values associated with an evaluation function used to calculate second evaluation scores associated with the source code files. The computing system calculates the second evaluation scores by enabling the evaluation function using the parameter values. The computing system generates and presents to the user, a second graph displaying the second evaluation scores.

Abstract: A method for generating a slice from a plan-based representation of a program is provided. The method comprises constructing a plan representation of a program, wherein the plan representation comprises a plurality of nodes, edges, and ports; and receiving one or more slicing criteria from a user. The slicing criteria comprise one or more variable occurrences or statements from the program, according to which a slice is generated from the plan representation.

Abstract: A system and method for identifying errors in a computer software include: identifying a potential problem in the computer software; triggering a portion of the computer software by the identified potential problem; determining a control flow graph and a data flow graph for the triggered portion of the computer software originating at the identified potential problem; and analyzing the control flow graph and the data flow graph to verify that the identified potential problem is an actual error. The potential problem may be identified using test tools such as a static analysis tool or a unit test tool.