Abstract: In some embodiments, the present invention is directed to photovoltaic (PV) devices comprising silicon (Si) nanowires as active PV elements, wherein such devices are typically thin film Si solar cells. Generally, such solar cells are of the p-i-n type and can be fabricated for front and/or backside (i.e., top and/or bottom) illumination. Additionally, the present invention is also directed at methods of making and using such devices, and to systems and modules (e.g., solar panels) employing such devices.

Abstract: A semiconductor structure is provided that includes a plurality of vertically stacked and vertically spaced apart semiconductor nanowires (e.g., a semiconductor nanowire mesh) located on a surface of a substrate. One end segment of each vertically stacked and vertically spaced apart semiconductor nanowires is connected to a source region and another end segment of each vertically stacked and vertically spaced apart semiconductor nanowires is connected to a drain region. A gate region including a gate dielectric and a gate conductor abuts the plurality of vertically stacked and vertically spaced apart semiconductor nanowires, and the source regions and the drain regions are self-aligned with the gate region.

Abstract: The present invention relates to a method for detecting a target biomolecule in a sample comprising a plurality of biomolecules, whereby the target biomolecule is provided with a tag, said tag comprising a catalytic active moiety which catalyses a reaction yielding an insoluble reaction product which precipitates on flexible electrically conductive nanoelectrodes. The precipitation onto said nanoelectrodes causes a change in their electroconductivity which is accessible to electroanalytical methods. The invention relates further to a biochip comprising a solid support with nanoelectrodes attached thereto and probe molecules bound to all or to a plurality of said nanoelectrodes which may be the same or different, a segment of said probe molecules being able to interact specifically with a segment of the target biomolecules.

Abstract: Provided is a suspended nanowire sensor having good sensing characteristics and suitable for mass production, a method for fabricating the suspended nanowire sensor. The suspended nanowire sensor includes: first and second sensor electrodes formed on upper portions of a substrate and physically separated from each other; and a nanowire sensor material piece extending from the first sensor electrode to the second sensor electrode and physically suspended between the first and second sensor electrodes.

Abstract: Systems and methods for the preparation of reinforcements for composite materials, whereby single- and/or multi-walled carbon nanotubes (CNTs) may be electrophoretically deposited on fibrous substrates for the production of hybrid CNT/fibers. The fibers may include carbon fibers and woven carbon fabrics. The length, as well as the density and orientation of the deposited nanotubes on the fiber surfaces may also be tailored. The strength of the CNT/fiber-matrix interface formed in composites fabricated from the hybrid CNT/fibers may be adjusted by introduction of functional groups on the CNT/fiber surfaces, such as aminophenyl and carboxyphenyl groups.

Abstract: A method of manufacturing a light emitting diode element is provided. A first patterned semi-conductor layer, a patterned light emitting layer, and a second patterned semi-conductor layer are sequentially formed on an epitaxy substrate so as to form a plurality of epitaxy structures, wherein the first patterned semi-conductor layer has a thinner portion in a non-epitaxy area outside the epitaxy structures. A passivation layer covering the epitaxy structures and the thinner portion is formed. The passivation layer covering on the thinner portion is partially removed to form a patterned passivation layer. A patterned reflector is formed directly on each of the epitaxy structures. The epitaxy structures are bonded to a carrier substrate. A lift-off process is performed to separate the epitaxy structures from the epitaxy substrate. An electrode is formed on each of the epitaxy structures far from the patterned reflector.

Abstract: Systems, devices, and methods for designing and/or manufacturing transparent conductors. A system is operable to evaluate optical and electrical manufacturing criteria for a transparent conductor. The system includes a database including stored reference transparent conductor data, and a controller subsystem configured to compare input acceptance manufacturing criteria for a transparent conductor to stored reference transparent conductor data.

Abstract: A thin film pattern forming device includes a chamber case having an inner space communicated with the outside, a first fixing unit provided in the chamber case, a pattern electrode plate having a certain shape and fixed to the first fixing unit, and a second fixing unit provided in the chamber case and spaced apart from the pattern electrode plate. A substrate on which an inked metallic nano-material is deposited is received on the second fixing unit. The device also includes a power supply unit for supplying power to the first fixing unit and the second fixing unit, and a drying unit for drying the inked metallic nano-material patterned on the substrate.

Abstract: A negative differential resistance (NDR) device, and methods of making and using the NDR device. The NDR device includes a substrate comprising a conductor material or a semi-conductor material and a self-assembled monolayer (SAM) that includes a first electroactive moiety and a spacer moiety disposed on the substrate that defines a barrier between the electroactive moiety and the substrate, wherein the NDR device exhibits negative differential resistance in the presence of a varying applied voltage. Also provided are NDR in multilayers in which the peak to valley ratio of the NDR response can be controlled by the number of layers; modulation of NDR using binding groups to one of the electrical contacts or to the electroactive moiety itself; and NDR devices that display multiple peaks in the current-voltage curve that contain electroactive moieties that have multiple low potential electrochemical oxidations and/or reductions.

Abstract: A device configured to have a nanowire formed laterally between two electrodes includes a substrate and an insulator layer established on at least a portion of the substrate. An electrode of a first conductivity type and an electrode of a second conductivity type different than the first conductivity type are established at least on the insulator layer. The electrodes are electrically isolated from each other. The electrode of the first conductivity type has a vertical sidewall that faces a vertical sidewall of the electrode of the second conductivity type, whereby a gap is located between the two vertical sidewalls. Methods are also disclosed for forming the device.

Abstract: There are provided a semiconductor light emitting device using a phosphor film formed on a nanowire structure and a method of manufacturing the device, the device including: a substrate; a light emitting structure including a first conductivity type semiconductor layer, an active layer and a second conductivity type semiconductor layer sequentially formed on the substrate; a plurality of nanowire structures formed on the light emitting structure and formed of a transparent material; and a phosphor film formed on at least an upper surface and a side surface of each of the plurality of nanowire structures.

Abstract: A method for forming an integrated circuit having openings in a mold layer and for producing capacitors is disclosed. In one embodiment, nanotubes or nanowires are grown vertically on a horizontal substrate surface. The nanotubes or nanowires serve as a template for forming openings in a mold layer. The substrate is covered with a mold material after the formation of the nanowires or nanotubes. One embodiment provides mold layers having openings with a much higher aspect ratio.

Abstract: Techniques are provided for fabricating memory with metal nanodots as charge-storing elements. In an example approach, a coupling layer such as an amino functional silane group is provided on a gate oxide layer on a substrate. The substrate is dip coated in a colloidal solution having metal nanodots, causing the nanodots to attach to sites in the coupling layer. The coupling layer is then dissolved such as by rinsing or nitrogen blow drying, leaving the nanodots on the gate oxide layer. The nanodots react with the coupling layer and become negatively charged and arranged in a uniform monolayer, repelling a deposition of an additional monolayer of nanodots. In a configuration using a control gate over a high-k dielectric floating gate which includes the nanodots, the control gates may be separated by etching while the floating gate dielectric extends uninterrupted since the nanodots are electrically isolated from one another.

Abstract: A process is provided to produce bulk quantities of nanowires in a variety of semiconductor materials. Thin films and droplets of low-melting metals such as gallium, indium, bismuth, and aluminum are used to dissolve and to produce nanowires. The dissolution of solutes can be achieved by using a solid source of solute and low-melting metal, or using a vapor phase source of solute and low-melting metal. The resulting nanowires range in size from 1 nanometer up to 1 micron in diameter and lengths ranging from 1 nanometer to several hundred nanometers or microns. This process does not require the use of metals such as gold and iron in the form of clusters whose size determines the resulting nanowire size. In addition, the process allows for a lower growth temperature, better control over size and size distribution, and better control over the composition and purity of the nanowire produced therefrom.

Abstract: In one aspect of the present invention, an electric-field-enhancement structure is disclosed. The electric-field-enhancement structure includes a substrate and an ordered arrangement of dielectric particles having at least two adjacent dielectric particles spaced from each other a controlled distance. The controlled distance is selected so that when a resonance mode is excited in each of the at least two adjacent dielectric particles responsive to excitation electromagnetic radiation, each of the resonance modes interacts with each other to result in an enhanced electric field between the at least two adjacent dielectric particles. Other aspects of the present invention are electric-field-enhancement apparatuses that utilize the described electric-field-enhancement structures, and methods of enhancing an electric field between adjacent dielectric particles.

Abstract: A composite material and related methods are described, the composite material configured to exhibit at least one of a negative effective permittivity and a negative effective permeability for incident radiation of at least one wavelength. The composite material comprises an arrangement of electromagnetically reactive cells of small dimension relative to the wavelength, each cell having a plurality of quantum dots associated therewith for enhancing a resonant response thereof to the incident radiation at the wavelength.

Abstract: Featured are devices and systems embodying one or more electrically-addressable-solid-state nanopores useful for sensing and/or characterizing single macromolecules as well as sequencing DNA or RNA. In one aspect of the present invention, there is featured a linear or 2-D electrically-addressable array of nanopores, where the nanopores are located at points of intersections between V-shaped grooves formed in an upper surface of the insulating member and a V-shaped groove formed in a lower surface of the insulating member. In another aspect of the present invention the solid-state nanopore of the present invention the width and/or length of the nanopore is defined or established by sharp edges of cleaved crystals that are maintained in fixed relation during the formation of the insulating member including the nanopore.

Abstract: The present invention relates to a transition metal oxide/multi-walled carbon nanotube nanocomposite and its preparation method, and particularly to a nanocomposite prepared in a composite form of an electron-transmitting and stress-relaxing one-dimensional multi-walled carbon nanotube (MWCNT) and a high-capacity-enabling zero-dimensional nanopowder-type transition metal oxide, where a transition metal oxide prepared by urea synthesis is uniformly dispersed in a carbon nanotube by a surfactant, and its preparation method. Therefore, a process of preparing a nanocomposite herein is simple and can be easily applied to a large-scale production, while enabling the manufacture of uniform-sized nanocomposites even at a relatively low temperature. Thus prepared nanocomposite can be applied to an electrochemical device such as a lithium secondary battery and a super capacitor.

Abstract: Methods of forming a microelectronic structure are described. Embodiments of those methods include providing a substrate comprising at least one opening, and then applying a nanotube slurry comprising at least one nanotube to the substrate, wherein the at least one nanotube is substantially placed within the at least one opening.

Abstract: A nanoelement field effect transistor includes a nanotube disposed on the substrate. A first source/drain region is coupled to a first end portion of the nanoelement and a second source/drain region is coupled to a second end portion of the nanoelement. A recess in a surface region of the substrate is arranged in such a manner that a region of the nanoelement arranged between the first and second end portions is taken out over the entire periphery of the nanoelement. A gate-insulating structure covers the periphery of the nanoelement and a gate structure covers the periphery of the gate-insulating structure.

Abstract: Faceted catalytic dots are used for directing the growth of carbon nanotubes. In one example, a faceted dot is formed on a substrate for a microelectronic device. A growth promoting dopant is applied to a facet of the dot using an angled implant, and a carbon nanotube is grown on the doped facet of the dot.

Abstract: A plurality of conductive pads (2) are formed on a mounting surface of a mounting board. Conductive pads (11) are formed on a principal surface of a semiconductor chip (10) at positions corresponding to the conductive pads of the mounting board, when the principal surface faces toward the mounting board. A plurality of conductive nanotubes (12) extend from the conductive pads of one of the mounting board and the semiconductor chip. A press mechanism (3) presses the semiconductor chip against the mounting board and restricts a position of the semiconductor chip on the mounting surface to mount the semiconductor chip on the mounting board, in a state that tips of the conductive nanotubes are in contact with the corresponding conductive pads not formed with the conductive nanotubes.

Abstract: A hydrogen gas sensor and/or switch fabricated from arrays nanowires composed of metal or metal alloys that have stable metal hydride phases. The sensor and/or switch response times make it quite suitable for measuring the concentration of hydrogen in a flowing gas stream. The sensor and/or switch preferably operates by measuring the resistance of several metal nanowires arrayed in parallel in the presence of hydrogen gas. The nanowires preferably comprise gaps or break junctions that can function as a switch that closes in the presence of hydrogen gas. Consequently, the conductivity of the nanowires of the sensor and/or switch increases in the presence of hydrogen.

Abstract: Fuel cell devices and systems are provided. In certain embodiments, the devices include a ceramic support structure having a length, a width, and a thickness. A reaction zone positioned along a portion of the length is configured to be heated to an operating reaction temperature, and has at least one active layer therein comprising an electrolyte separating first and second opposing electrodes, and active first and second gas passages adjacent the respective first and second electrodes. At least one cold zone positioned from the first end along another portion of the length is configured to remain below the operating reaction temperature. An artery flow passage extends from the first end along the length through the cold zone and into the reaction zone and is fluidicly coupled to the active first gas passage, which extends from the artery flow passage toward at least one side. The thickness of the artery flow passage is greater than the thickness of the active first gas passage.

Abstract: Carbon nanotubes for use in a fuel cell, a method for fabricating the same, and a fuel cell using the carbon nanotubes for its electrode are provided. The internal and external walls of the carbon nanotubes are doped with nano-sized metallic catalyst particles uniformly to a degree of 0.3-5 mg/cm2. The carbon nanotubes are grown over a carbon substrate using chemical vapor deposition or plasma enhanced chemical vapor deposition. Since the carbon nanotubes have a large specific surface area, and metallic catalyst particles are uniformly distributed over the internal and external walls thereof, the reaction efficiency in an electrode becomes maximal when the carbon nanotubes are used for the electrode of a fuel cell. The carbon nanotubes fabricated using the method can be applied to form a large electrode. The carbon nanotubes grown over the carbon substrate can be readily applied to an electrode of a fuel cell, providing economical advantages and simplifying the overall electrode manufacturing process.

Abstract: A nonvolatile memory cell is capable of reducing an excessive current leakage due to a rough surface of a polysilicon and of performing even at a low temperature process by forming the first oxide film including a silicon oxynitride (SiOxNy) layer using nitrous oxide plasma and by forming a plurality of silicon nanocrystals in a nitride film by implanting a silicon nanocrystal on the nitride film by an ion implantation method, and a fabricating method thereof and a memory apparatus including the nonvolatile memory cell.

Abstract: A capnometer adaptor includes a nanostructure sensor configured to selectively respond to a gaseous constituent of exhaled breath, such as to carbon dioxide. In certain embodiments, the adaptor includes an airway adaptor having at least one channel configured for the passage of respiratory gas; at least one nanostructure sensor in fluid communication with the passage, the sensor configured to selectively respond to at least one gaseous constituent of exhaled breath comprising carbon dioxide; and electronic hardware connected to the nanostructure sensor and configured to provide a signal indicative of a response of the sensor to the at least one gaseous constituent of exhaled breath. The sensor may be provided as a compact and solid-state device, and may be adapted for a variety of respiratory monitoring applications.

Abstract: The invention relates to a method for producing a support comprising nanoparticles (22) for the growth of nanostructures (23), said nanoparticles being organised periodically, the method being characterised in that it comprises the following steps: providing a support comprising, in the vicinity of one of its surfaces, a periodic array of crystal defects and/or stress fields (18), depositing, on said surface, a continuous layer (20) of a first material capable of catalysing the nanostructure growth reaction, fractionating the first material layer (20) by a heat treatment so as to form the first material nanoparticles (22).

Abstract: The invention provides a nanostructure including nanowires having very small diameters and integrated at a high density, and capable of being applied to still further high-functional devices. The invention provides a structure including a substrate or substrate having an underlayer, and a structure formed on the substrate or substrate having an underlayer, wherein the structure includes a columnar first part (part) and a second part (part) formed to surround the first part, and the second part comprises two or more types of materials capable of forming eutectic crystals, one type of the materials is a semiconductor material, and the height of the first part from the substrate is greater than the height of the second part from the substrate.

Abstract: Semiconductor devices may be fabricated using nanowires. In an example embodiment, a conductive gate may be used to control conduction along the nanowires, in which case one of the contacts is a drain and the other a source. The nanowires may be grown in a trench or through-hole in a substrate or in particular in an epitaxial layer on substrate. In another example embodiment, the gate may be provided only at one end of the nanowires. The nanowires can be of the same material along their length; alternatively different materials can be used, especially different materials adjacent to the gate and between the gate and the base of the trench.

Abstract: Techniques for the fabrication of field-effect transistors (FETs) having nanowire channels are provided. In one aspect, a method of fabricating a FET is provided comprising the following steps. A substrate is provided having a silicon-on-insulator (SOI) layer. At least one nanowire is deposited over the SOI layer. A sacrificial gate is formed over the SOI layer so as to cover a portion of the nanowire that forms a channel region. An epitaxial semiconductor material is selectively grown from the SOI layer that covers the nanowire and attaches the nanowire to the SOI layer in a source region and in a drain region. The sacrificial gate is removed. An oxide is formed that divides the SOI layer into at least two electrically isolated sections, one section included in the source region and the other section included in the drain region. A gate dielectric layer is formed over the channel region. A gate is formed over the channel region separated from the nanowire by the gate dielectric layer.

Abstract: A nanoelectronic device includes a nanostructure, such as a nanotube or network of nanotube, disposed on a substrate. Nanoparticles are disposed on or adjacent to the nanostructure so as to operatively effect the electrical properties of the nanostructure. The nanoparticles may be composed of metals, metal oxides or salts and nanoparticles composed of different materials may be present. The amount of nanoparticles may be controlled to preserve semiconductive properties of the nanostructure, and the substrate immediately adjacent to the nanostructure may remain substantially free of nanoparticles. A method for fabricating the device includes electrodeposition of the nanoparticles using one of more solutions of dissolved ions while providing an electric current to the nanostructures but not to the surrounding substrate.

Abstract: A semiconductor integrated circuit (IC) chip includes an IC chip body and a nano-structure-surface passivation film. The IC chip body has at least one surface. The nano-structure-surface passivation film is formed on the at least one surface. The nano-structure-surface passivation film including nano-particles and a carrier resin protects the IC chip body from encountering any external interference. The IC chip body further has a plurality of fingerprint sensing members for sensing a whole fingerprint or a partial fingerprint.

Abstract: A laser diode having nano patterns is disposed on a substrate. A first conductive-type clad layer is disposed on the substrate, and a second conductive-type clad layer is disposed on the first conductive-type clad layer. An active layer is interposed between the first conductive-type clad layer and the second conductive-type clad layer. Column-shaped nano patterns are arranged at a surface of the second conductive-type clad layer to form a laser diode such as a distributed feedback laser diode.

Abstract: A substrate including strip conductors with a wiring pattern that connects contact areas to one another. The strip conductors have a small strip conductor width. The contact areas and/or the strip conductors form a narrow connection pitch and include electrically conductive carbon nanotubes.

Abstract: The invention relates to a method of forming a conducting nanowire between two contacts on a substrate surface wherein a plurality of nanoparticles is deposited on the substrate in the region between the contacts, and the single nanowire running substantially between the two contacts is formed by either by monitoring the conduction between the contacts and ceasing deposition at the onset of conduction, and/or modifying the substrate to achieve, or taking advantage of pre-existing topographical features which will cause the nanoparticles to form the nanowire. The resultant conducting nanowires are also claimed as well as devices incorporating such nanowires.

Abstract: Disclosed herein is a printed circuit board comprising a laminate that comprises a copper foil; inorganic or metallic nanoparticles having an average diameter of less than 100 nanometers disposed on a surface of the copper foil; the nanoparticles being arranged in domains; the domains having average domain sizes of about 10 to about 100 nanometers and average interdomain spacings of 10 to about 1,000 nanometers; the nanoparticles not facilitating the transfer of an electrical current; a layer of solid organic polymer disposed on the nanoparticles; the layer of the organic polymer being bounded to the nanoparticles by van der Waals forces; the laminate being employed in a printed circuit board.

Abstract: Systems and methods for addressable field enhancement microscopy are provided. In an embodiment, a nanoscale array of islands may be illuminated with an electromagnetic signal and addressed to differentiate signals from different islands of the nanoscale array. The differentiated signals originating from illuminating the nanoscale array may be applied to microscopy of a specimen.

Abstract: A hosting structure of nanometric components is described comprising a substrate, a first multi-spacer level comprising a first plurality of spacers including first conductive spacers parallel to each other, and at least a second multi-spacer level realized above said first multi-spacer level and comprising a second plurality of spacers arranged transversally to said first plurality of spacers and including at least a lower discontinuous insulating layer and an upper layer, including in turn second conductive spacers. In particular, each pair of spacers of the second multi-spacer level defines with a spacer of the first multi-spacer level a plurality of nanometric hosting seats having at least a first and a second conduction terminal realized by portions of the first conductive spacers and of the second conductive spacers faced in the hosting seats. A method for manufacturing such a structure is also described.

Abstract: Composition of carbon nanotubes (CNTs) are produced into inks that are dispensable via printing or stencil printing processes. The CNT ink is dispensed into wells formed in a cathode structure through a stencil.

Abstract: A memory cell includes a first electrode, a second electrode, storage material positioned between the first electrode and the second electrode, and a nanocomposite insulator contacting the storage material.

Abstract: A nanoelectronic device includes a nanostructure, such as a nanotube or network of nanotubes, disposed on a substrate. Nanoparticles are disposed on or adjacent to the nanostructure so as to operatively effect the electrical properties of the nanostructure. The nanoparticles may be composed of metals, metal oxides, or salts, and nanoparticles composed of different materials may be present. The amount of nanoparticles may be controlled to preserve semiconductive properties of the nanostructure, and the substrate immediately adjacent to the nanostructure may remain substantially free of nanoparticles. A method for fabricating the device includes electrodeposition of the nanoparticles using one or more solutions of dissolved ions while providing an electric current to the nanostructures but not to the surrounding substrate.

Abstract: A surface acoustic wave based CO2 sensor using carbon nanotubes as the sensitive layer fabricated by combining surface acoustic wave (SAW) devices and nanotechnology. The device structure consists of the gas sensitive material between the input and output interdigital transducers (IDTs) of a SAW device. The CO2 gas gets adsorbed on nanotubes when the carbon nanotube based SAW sensor is exposed to CO2 at room temperature and/or at elevated temperature, which in turn changes conductivity of the carbon nanotube. This conductivity change will affect the velocity of the SAW traveling across the nanotubes and will give a frequency change which corresponds to the percentage of the CO2 molecules adsorbed by the nanotubes.

Abstract: Physical neural network systems and methods are disclosed. A physical neural network can be configured utilizing molecular technology, wherein said physical neural network comprises a plurality of molecular conductors, which form neural network connections thereof. A training mechanism can be provided for training said physical neural network to accomplish a particular neural network task based on a neural network training rule. The neural network connections are formed between pre-synaptic and post-synaptic components of said physical neural network. The neural network generally includes dynamic and modifiable connections for adaptive signal processing. The neural network training mechanism can be based, for example, on the Anti-Hebbian and Hebbian (AHAH) rule and/or other plasticity rules.

Abstract: The object of the present invention is to provide a nano-scale molecular assembly such as a conductive nano-wire. Specifically, there is provided an electrolytic apparatus for forming a molecular assembly, including two electrodes and an electrolytic cell holding an electrolyte and the two electrodes, wherein the gap between the two electrodes is from 1 nm to 100 ?m, by allowing the electrolytic cell to hold an electrolyte containing molecules that is to constitute the molecular assembly, and applying a voltage across the two electrodes in the state wherein the electrolyte and the two electrodes are in contact.

Abstract: An electronic or opto-electronic device or a chemical sensor comprising: an interpenetrating network of a nanostructured high surface area to volume ratio film material and an organic/inorganic material forming a nanocomposite. The high surface area to volume film material is obtained onto an electrode substrate first, such that the nano-scale basic elements comprising this film material are embedded in a void matrix while having electrical connectivity with the electrode substrate. For example, the film material may comprise an array of nano-protrusions electrically connected to the electrode substrate and separated by a void matrix. The interpenetrating network is formed by introducing an appropriate organic/inorganic material into the void volume of the high surface area to volume film material. Further electrode(s) are defined onto the film or intra-void material to achieve a certain device.

Abstract: A method, apparatus and system with a semiconductor package including a microchimney or thermosiphon using carbon nanotubes to modify the effective thermal conductivity of an integrated circuit die.

Abstract: A method for fabricating a membrane-electrode assembly, and fuel cells adopting a membrane-electrode assembly formed by the method, wherein the method includes: coating nano-sized catalytic metal particles on a proton exchange polymer membrane by sputtering a catalytic metal source; coating nano-sized carbon particles on the proton exchange polymer membrane by arc discharging or by sputtering a carbon source to form a nanophase catalyst layer; and bonding electrodes to the proton exchange polymer membrane having the nanophase catalyst layer. The nano-sized catalytic metal and nano-sized carbon particles can be coated on a proton exchanger polymer membrane to form a catalyst layer by simultaneously sputtering a catalyst metal source and a carbon source.

Abstract: A semiconductor memory device includes a semiconductor substrate, a control gate electrode recessed in the semiconductor substrate, a storage node layer interposed between a sidewall of the control gate electrode and the semiconductor substrate, a tunneling insulation layer interposed between the storage node layer and the semiconductor substrate, a blocking insulation layer interposed between the storage node layer and the control gate electrode, and first and second channel regions formed around a surface of the semiconductor substrate to at least partially surround the control gate electrode. The semiconductor memory device may include a plurality of control gate electrodes, storage node layers, tunneling insulation layers, blocking insulation layers, and continuous first and second channel regions.

Abstract: The present invention discloses a method including providing a substrate; forming a lower conductor over the substrate; forming a conducting nanostructure over the lower conductor; forming a thin dielectric over the conducting nanostructure; and forming an upper conductor over the thin dielectric. The present invention further discloses a device including a substrate; a lower conductor located over the substrate; a conducting nanostructure located over the lower conductor; a thin dielectric located over the conducting nanostructure; and an upper conductor located over the thin dielectric.